diff --git a/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg b/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
index 6886ae203afb71ef91eae35fb8a3e86f6b2eff54..159cc2b5ed8f7b630c5909477ffcd0e91ca783e4 100644
--- a/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
@@ -23,16 +23,19 @@ regression_test_vhdl =
tb/vhdl/tb_node_unb1_bn_capture.vhd
[modelsim_project_file]
-modelsim_copy_files = $RADIOHDL_WORK/libraries/io/i2c/tb/data data
- $RADIOHDL_WORK/libraries/base/diag/src/data data
-
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/i2c/tb/data data
+ $RADIOHDL_WORK/libraries/base/diag/src/data data
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
-quartus_copy_files = quartus/sopc_unb1_bn_capture.sopc .
- $RADIOHDL_WORK/libraries/io/i2c/tb/data data
- $RADIOHDL_WORK/libraries/base/diag/src/data data
+quartus_copy_files =
+ quartus/sopc_unb1_bn_capture.sopc .
+ $RADIOHDL_WORK/libraries/io/i2c/tb/data data
+ $RADIOHDL_WORK/libraries/base/diag/src/data data
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg b/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
index 39f2b4fad8a7239570ee26376d6604c67e300549..02f5b45e6bcbdb4406e10969cb73276df0666d35 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
@@ -15,14 +15,18 @@ test_bench_files =
[modelsim_project_file]
-modelsim_copy_files = $RADIOHDL_WORK/libraries/base/diag/src/data data
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/base/diag/src/data data
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
-quartus_copy_files = quartus/sopc_unb1_bn_terminal_bg.sopc .
- $RADIOHDL_WORK/libraries/base/diag/src/data data
+quartus_copy_files =
+ quartus/sopc_unb1_bn_terminal_bg.sopc .
+ $RADIOHDL_WORK/libraries/base/diag/src/data data
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
index 6ac27885844b2a214ea3ad1f3624e8b4f823d74a..4f1b7d363c6fbc12014bd18ca0ddd255b90be62c 100644
--- a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
@@ -15,6 +15,10 @@ test_bench_files =
tb/vhdl/tb_unb1_ddr3.vhd
[modelsim_project_file]
+
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
+
modelsim_compile_ip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
@@ -24,6 +28,7 @@ synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb1_ddr3.sopc .
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
index e5201297eb0dd5bdb1b8f9573c6485339de21915..a49544c27e1afd2a4e3d03f3a22306987a662bbb 100644
--- a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
@@ -15,6 +15,10 @@ test_bench_files =
[modelsim_project_file]
+
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
+
modelsim_compile_ip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
@@ -24,6 +28,7 @@ synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb_ddr3_transpose.sopc .
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
index 6dcd96169c9a5af2ae6252b2f6d1654f38ebb97a..e57982e66f0ade048144a1ba6608ab33e7971ae9 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
@@ -15,12 +15,16 @@ test_bench_files =
[modelsim_project_file]
#modelsim_copy_files = src/hex hex
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
-quartus_copy_files = quartus/sopc_unb1_fn_terminal_db.sopc .
+quartus_copy_files =
+ quartus/sopc_unb1_fn_terminal_db.sopc .
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_heater/hdllib.cfg b/boards/uniboard1/designs/unb1_heater/hdllib.cfg
index 0a1fcb2605e6cc86fed626b3a4c8e11a4134ca9d..230d8df0e8b015f9e2d26c0d5e62ac07da22dd1f 100644
--- a/boards/uniboard1/designs/unb1_heater/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_heater/hdllib.cfg
@@ -14,6 +14,9 @@ test_bench_files =
[modelsim_project_file]
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
+
[quartus_project_file]
@@ -21,6 +24,7 @@ synth_top_level_entity =
quartus_copy_files =
quartus/qsys_unb1_heater.qsys .
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_minimal/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
index 19bf76180a3ed0353fb6c00ce5ec6d1e0a7a1422..4d82a8de6e274515ac47014aeaed757ae303a309 100644
--- a/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
@@ -13,9 +13,10 @@ synth_files =
test_bench_files =
tb/vhdl/tb_unb1_minimal.vhd
-
[modelsim_project_file]
-
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
-
+quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
index 57bf8b965b993c8dedd6058ac05fcfff31970a38..4c4ada536980825fa02cd9c56062077c4e0b5eb3 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
@@ -15,14 +15,20 @@ test_bench_files =
[modelsim_project_file]
-modelsim_copy_files = src/hex hex
+modelsim_copy_files =
+ src/hex hex
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
+
[quartus_project_file]
synth_top_level_entity =
-quartus_copy_files = quartus/qsys_unb1_terminal_bg_mesh_db.qsys .
- src/hex hex
+quartus_copy_files =
+ quartus/qsys_unb1_terminal_bg_mesh_db.qsys .
+ src/hex hex
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
+
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_test/hdllib.cfg b/boards/uniboard1/designs/unb1_test/hdllib.cfg
index 5fe53f6bc36cb5e72fe68fa79c3d2b23e4abff95..f5246617ce281d19ab8ea8d73f29b9321d364cdf 100644
--- a/boards/uniboard1/designs/unb1_test/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/hdllib.cfg
@@ -16,7 +16,11 @@ test_bench_files =
[modelsim_project_file]
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
+quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
diff --git a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
index 16d1b7fe347d3e025df99e437657a831b8bf3d6e..532f7a2d55341d77b0568300acf55ac0d9488fa8 100644
--- a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
@@ -15,13 +15,17 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
# src/hex hex
+
+
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl ${RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus/qsys_unb1_tr_10GbE.qsys .
# src/hex/ hex
diff --git a/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg b/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
index 7910f1251ad007756f7e794c37a8b35fe4234444..01014dc0fc3dc13e4f0f05f6dbe55a326a10deb2 100644
--- a/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_heater/hdllib.cfg
@@ -14,12 +14,15 @@ test_bench_files =
[modelsim_project_file]
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus .
quartus_qsf_files =
@@ -36,5 +39,29 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/qsys_unb2b_heater/qsys_unb2b_heater.qip
+quartus_ip_files =
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_avs_eth_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_clk_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_cpu_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_jtag_uart_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_onchip_memory2_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_pio_pps.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_pio_system_info.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_pio_wdi.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_dpmm_ctrl.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_dpmm_data.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_epcs.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_fpga_temp_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_fpga_voltage_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_heater.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_mmdp_ctrl.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_mmdp_data.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_remu.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_unb_pmbus.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_unb_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_reg_wdi.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_rom_system_info.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_heater/ip/qsys_unb2b_heater/qsys_unb2b_heater_timer_0.ip
+
nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
diff --git a/boards/uniboard2b/designs/unb2b_jesd/hdllib.cfg b/boards/uniboard2b/designs/unb2b_jesd/hdllib.cfg
index 7de68fef87ac4615328b0f51d276c3d734d4f67d..534dac3205b85021a62dcc84a3525f5dc9928a79 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_jesd/hdllib.cfg
@@ -14,12 +14,15 @@ test_bench_files =
[modelsim_project_file]
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus .
quartus_qsf_files =
diff --git a/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg b/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
index 652892608dcccba8da544c2c7eaa932bbcef5f92..2fdf2728e16d86411d5f017b63c36f9e3a65406e 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_minimal/hdllib.cfg
@@ -14,12 +14,14 @@ test_bench_files =
[modelsim_project_file]
-
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus .
quartus_qsf_files =
@@ -35,7 +37,29 @@ quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/qsys_unb2b_minimal/qsys_unb2b_minimal.qip
- #$HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/unb2b_minimal_lib.qip
+
+quartus_ip_files =
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_clk_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_cpu_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_jtag_uart_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_onchip_memory2_0.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_pio_pps.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_pio_system_info.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_pio_wdi.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_dpmm_ctrl.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_dpmm_data.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_epcs.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_fpga_temp_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_fpga_voltage_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_mmdp_ctrl.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_mmdp_data.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_remu.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_unb_pmbus.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_unb_sens.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_reg_wdi.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_rom_system_info.ip
+ $HDL_BUILD_DIR/unb2b/quartus/unb2b_minimal/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_timer_0.ip
nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
diff --git a/boards/uniboard2b/designs/unb2b_test/hdllib.cfg b/boards/uniboard2b/designs/unb2b_test/hdllib.cfg
index cc7e82db71bddc4721fd6c991a3b75b0b6bdff31..3745d759255a82e6a87a6bd55dc63f7a851e54fe 100644
--- a/boards/uniboard2b/designs/unb2b_test/hdllib.cfg
+++ b/boards/uniboard2b/designs/unb2b_test/hdllib.cfg
@@ -16,7 +16,11 @@ test_bench_files =
[modelsim_project_file]
+modelsim_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
+quartus_copy_files =
+ $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb2b.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
diff --git a/init_hdl.sh b/init_hdl.sh
index de1c3ac86b49ca649434554400e4db7a16b38055..c379f631fde4a7522ad1497b7fc4e1f8da56af0f 100644
--- a/init_hdl.sh
+++ b/init_hdl.sh
@@ -34,13 +34,23 @@ if [[ "$_" == "${0}" ]]; then
exit
fi
+
+# Figure out where this script is located and set environment variables accordingly
+export RADIOHDL_WORK="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+# setup paths to build and config dir if not already defined by the user.
+export HDL_BUILD_DIR=${HDL_BUILD_DIR:-${RADIOHDL_WORK}/build}
+echo "HDL environment will be setup for" $RADIOHDL_WORK
+
+
# if exist user_components.ipx file/link remove it and make a symlink to the minimal_user_components.ipx file
# Altera/[quartus_version]/ip/altera/user_componets.ipx should be a symbolic link to Altera/user_components.ipx
user_components_file="${ALTERA_DIR}/user_components.ipx"
-if [ -h $user_components_file ]; then
+if [ -e $user_components_file ]; then
+ echo "removing existing user_components.ipx symbolic link"
rm $user_components_file
fi
# make a new symbolic link to the git version
+echo "making a new symbolic link"
ln -s ${RADIOHDL_WORK}/minimal_user_components.ipx $user_components_file
# # Finally check if user_component.ipx file of the altera package at least contains
@@ -59,11 +69,6 @@ ln -s ${RADIOHDL_WORK}/minimal_user_components.ipx $user_components_file
# fi
# done
-# Figure out where this script is located and set environment variables accordingly
-export RADIOHDL_WORK="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
-# setup paths to build and config dir if not already defined by the user.
-export HDL_BUILD_DIR=${HDL_BUILD_DIR:-${RADIOHDL_WORK}/build}
-echo "HDL environment will be setup for" $RADIOHDL_WORK
if [ -z "${RADIOHDL_GEAR}" ]; then
. ../radiohdl/init_radiohdl.sh
diff --git a/libraries/technology/10gbase_r/hdllib.cfg b/libraries/technology/10gbase_r/hdllib.cfg
index 7b331603b5c1c9b24772511130686ab79544445c..6fd0f1dfc474cd08e7ebac4f872060e433a71daa 100644
--- a/libraries/technology/10gbase_r/hdllib.cfg
+++ b/libraries/technology/10gbase_r/hdllib.cfg
@@ -41,17 +41,17 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_e3sge3_transceiver_reset_controller_24 ip_arria10_e3sge3_transceiver_reset_controller_24_altera_xcvr_reset_control_151
ip_arria10_e3sge3_transceiver_reset_controller_48 ip_arria10_e3sge3_transceiver_reset_controller_48_altera_xcvr_reset_control_151
ip_arria10_e1sg_phy_10gbase_r ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_151
- ip_arria10_e1sg_phy_10gbase_r_3 ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_170
- ip_arria10_e1sg_phy_10gbase_r_4 ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_170
- ip_arria10_e1sg_phy_10gbase_r_12 ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_170
- ip_arria10_e1sg_phy_10gbase_r_24 ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_170
- ip_arria10_e1sg_phy_10gbase_r_48 ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_170
- ip_arria10_e1sg_transceiver_pll_10g ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170
- ip_arria10_e1sg_transceiver_reset_controller_1 ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_170
- ip_arria10_e1sg_transceiver_reset_controller_3 ip_arria10_e1sg_transceiver_reset_controller_3_altera_xcvr_reset_control_170
- ip_arria10_e1sg_transceiver_reset_controller_4 ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_170
- ip_arria10_e1sg_transceiver_reset_controller_12 ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_170
- ip_arria10_e1sg_transceiver_reset_controller_24 ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_170
+ ip_arria10_e1sg_phy_10gbase_r_3 ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_180
+ ip_arria10_e1sg_phy_10gbase_r_4 ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_180
+ ip_arria10_e1sg_phy_10gbase_r_12 ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_180
+ ip_arria10_e1sg_phy_10gbase_r_24 ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_180
+ ip_arria10_e1sg_phy_10gbase_r_48 ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_180
+ ip_arria10_e1sg_transceiver_pll_10g ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_180
+ ip_arria10_e1sg_transceiver_reset_controller_1 ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_180
+ ip_arria10_e1sg_transceiver_reset_controller_3 ip_arria10_e1sg_transceiver_reset_controller_3_altera_xcvr_reset_control_180
+ ip_arria10_e1sg_transceiver_reset_controller_4 ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_180
+ ip_arria10_e1sg_transceiver_reset_controller_12 ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_180
+ ip_arria10_e1sg_transceiver_reset_controller_24 ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_180
synth_files =
sim_10gbase_r.vhd
diff --git a/libraries/technology/clkbuf/hdllib.cfg b/libraries/technology/clkbuf/hdllib.cfg
index 64d48639a170c7325736e7ee63735b07bb0a3016..8f8e995b7cb826a3c2268fe4501c3930de332712 100644
--- a/libraries/technology/clkbuf/hdllib.cfg
+++ b/libraries/technology/clkbuf/hdllib.cfg
@@ -7,7 +7,7 @@ hdl_lib_technology =
hdl_lib_disclose_library_clause_names =
ip_arria10_clkbuf_global ip_arria10_clkbuf_global_altclkctrl_150
ip_arria10_e3sge3_clkbuf_global ip_arria10_e3sge3_clkbuf_global_altclkctrl_151
- ip_arria10_e1sg_clkbuf_global ip_arria10_e1sg_clkbuf_global_altclkctrl_170
+ ip_arria10_e1sg_clkbuf_global ip_arria10_e1sg_clkbuf_global_altclkctrl_180
synth_files =
tech_clkbuf_component_pkg.vhd
diff --git a/libraries/technology/ddr/hdllib.cfg b/libraries/technology/ddr/hdllib.cfg
index f26d4331997d5f4f4ff6c68f24ffa719f605c5f5..c19a8419fdc68e5d91c75e81c992b76a24dcfbb0 100644
--- a/libraries/technology/ddr/hdllib.cfg
+++ b/libraries/technology/ddr/hdllib.cfg
@@ -33,10 +33,10 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_e3sge3_ddr4_8g_1600 ip_arria10_e3sge3_ddr4_8g_1600_altera_emif_151
ip_arria10_e3sge3_ddr4_4g_2000 ip_arria10_e3sge3_ddr4_4g_2000_altera_emif_151
ip_arria10_e3sge3_ddr4_8g_2400 ip_arria10_e3sge3_ddr4_8g_2400_altera_emif_151
- ip_arria10_e1sg_ddr4_4g_1600 ip_arria10_e1sg_ddr4_4g_1600_altera_emif_170
- ip_arria10_e1sg_ddr4_8g_1600 ip_arria10_e1sg_ddr4_8g_1600_altera_emif_170
- ip_arria10_e1sg_ddr4_4g_2000 ip_arria10_e1sg_ddr4_4g_2000_altera_emif_170
- ip_arria10_e1sg_ddr4_8g_2400 ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170
+ ip_arria10_e1sg_ddr4_4g_1600 ip_arria10_e1sg_ddr4_4g_1600_altera_emif_180
+ ip_arria10_e1sg_ddr4_8g_1600 ip_arria10_e1sg_ddr4_8g_1600_altera_emif_180
+ ip_arria10_e1sg_ddr4_4g_2000 ip_arria10_e1sg_ddr4_4g_2000_altera_emif_180
+ ip_arria10_e1sg_ddr4_8g_2400 ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180
ip_stratixiv_ddr3_mem_model ip_stratixiv_ddr3_mem_model_lib
ip_arria10_ddr4_mem_model_141 ip_arria10_ddr4_mem_model_141
diff --git a/libraries/technology/flash/hdllib.cfg b/libraries/technology/flash/hdllib.cfg
index 770dc9a79d5490fd97953c7387ef3806fd09def3..bbb6a855c1ddd20f6665c5c715b41fbca0fc94b4 100644
--- a/libraries/technology/flash/hdllib.cfg
+++ b/libraries/technology/flash/hdllib.cfg
@@ -16,8 +16,8 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_remote_update ip_arria10_remote_update_altera_remote_update_150
ip_arria10_e3sge3_asmi_parallel ip_arria10_e3sge3_asmi_parallel_altera_asmi_parallel_151
ip_arria10_e3sge3_remote_update ip_arria10_e3sge3_remote_update_altera_remote_update_151
- ip_arria10_e1sg_asmi_parallel ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_170
- ip_arria10_e1sg_remote_update ip_arria10_e1sg_remote_update_altera_remote_update_170
+ ip_arria10_e1sg_asmi_parallel ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_180
+ ip_arria10_e1sg_remote_update ip_arria10_e1sg_remote_update_altera_remote_update_180
synth_files =
diff --git a/libraries/technology/fpga_temp_sens/hdllib.cfg b/libraries/technology/fpga_temp_sens/hdllib.cfg
index 2e5124c781c28e9edeb3eab47a56835202a094f6..97baab475173f09c03d28879b67dc3f1d4685518 100644
--- a/libraries/technology/fpga_temp_sens/hdllib.cfg
+++ b/libraries/technology/fpga_temp_sens/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_technology =
hdl_lib_disclose_library_clause_names =
ip_arria10_temp_sense ip_arria10_temp_sense_altera_temp_sense_150
ip_arria10_e3sge3_temp_sense ip_arria10_e3sge3_temp_sense_altera_temp_sense_151
- ip_arria10_e1sg_temp_sense ip_arria10_e1sg_temp_sense_altera_temp_sense_170
+ ip_arria10_e1sg_temp_sense ip_arria10_e1sg_temp_sense_altera_temp_sense_180
synth_files =
tech_fpga_temp_sens_component_pkg.vhd
diff --git a/libraries/technology/fpga_voltage_sens/hdllib.cfg b/libraries/technology/fpga_voltage_sens/hdllib.cfg
index 03aaf853eda51a0d2cd3708ad0529fd869942e9b..a9c9d063c01f162f1d8a2bdb6406bfa6bcf7a68b 100644
--- a/libraries/technology/fpga_voltage_sens/hdllib.cfg
+++ b/libraries/technology/fpga_voltage_sens/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_technology =
hdl_lib_disclose_library_clause_names =
ip_arria10_voltage_sense ip_arria10_voltage_sense_altera_voltage_sense_150
ip_arria10_e3sge3_voltage_sense ip_arria10_e3sge3_voltage_sense_altera_voltage_sense_151
- ip_arria10_e1sg_voltage_sense ip_arria10_e1sg_voltage_sense_altera_voltage_sense_170
+ ip_arria10_e1sg_voltage_sense ip_arria10_e1sg_voltage_sense_altera_voltage_sense_180
synth_files =
tech_fpga_voltage_sens_component_pkg.vhd
diff --git a/libraries/technology/fractional_pll/hdllib.cfg b/libraries/technology/fractional_pll/hdllib.cfg
index 3c2cf1abd6a0a60053c1236255ee1723c7dcaf05..4814f9b5de2f475328906e2e8244a4a625d963f5 100644
--- a/libraries/technology/fractional_pll/hdllib.cfg
+++ b/libraries/technology/fractional_pll/hdllib.cfg
@@ -10,8 +10,8 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_fractional_pll_clk125 ip_arria10_fractional_pll_clk125_altera_xcvr_fpll_a10_150
ip_arria10_e3sge3_fractional_pll_clk200 ip_arria10_e3sge3_fractional_pll_clk200_altera_xcvr_fpll_a10_151
ip_arria10_e3sge3_fractional_pll_clk125 ip_arria10_e3sge3_fractional_pll_clk125_altera_xcvr_fpll_a10_151
- ip_arria10_e1sg_fractional_pll_clk200 ip_arria10_e1sg_fractional_pll_clk200_altera_xcvr_fpll_a10_170
- ip_arria10_e1sg_fractional_pll_clk125 ip_arria10_e1sg_fractional_pll_clk125_altera_xcvr_fpll_a10_170
+ ip_arria10_e1sg_fractional_pll_clk200 ip_arria10_e1sg_fractional_pll_clk200_altera_xcvr_fpll_a10_180
+ ip_arria10_e1sg_fractional_pll_clk125 ip_arria10_e1sg_fractional_pll_clk125_altera_xcvr_fpll_a10_180
synth_files =
tech_fractional_pll_component_pkg.vhd
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/compile_ip.tcl
deleted file mode 100644
index ed9f1e35b618c48b70d4fde159949d9a2aba3592..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/compile_ip.tcl
+++ /dev/null
@@ -1,149 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-vmap alt_em10g32_170 ./work/
-
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/alt_em10g32.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/alt_em10g32unit.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_clk_rst.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_clock_crosser.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_crc32.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_crc32_gf_mult32_kc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_creg_map.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_creg_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_frm_decoder.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_gmii_mii_layer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_pipeline_base.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_reset_synchronizer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rr_clock_crosser.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rst_cnt.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_fctl_filter_crcpad_rem.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_fctl_overflow.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_fctl_preamble.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_frm_control.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_pfc_flow_control.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_pfc_pause_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_pkt_backpressure_control.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_gmii16b.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_gmii16b_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_gmii_mii.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_layer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_xgmii.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_status_aligner.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_stat_mem.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_stat_reg.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_data_frm_gen.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_srcaddr_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_err_aligner.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_flow_control.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_frm_arbiter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_frm_muxer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_pause_beat_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_pause_frm_gen.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_pause_req.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_pfc_frm_gen.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rr_buffer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_gmii16b.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_gmii16b_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_layer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_xgmii_layer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_sc_fifo.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_gmii_decoder.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_gmii_decoder_dfa.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii_encoder.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii_encoder_dfa.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_gmii_mii_decoder_if.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii_mii_encoder_if.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_mm_adapter/altera_eth_avalon_mm_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_avalon_st_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter_avalon_st_rx.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter_avalon_st_tx.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/alt_em10g32_vldpkt_rddly.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter_rx.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter_tx.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_sideband_crosser.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_sideband_crosser_sync.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_32_64_xgmii_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_32_to_64_xgmii_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_64_to_32_xgmii_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_dcfifo_32_to_64_xgmii_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_dcfifo_64_to_32_xgmii_conversion.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_32_to_64_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_64_to_32_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_data_format_adapter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_altsyncram_bundle.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_altsyncram.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_lat_calc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_hecc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_secc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo_hecc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo_secc.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_ecc_dec_18_12.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_ecc_dec_39_32.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_ecc_enc_12_18.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_ecc_enc_32_39.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_rs_xgmii_layer_ultra.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_rs_xgmii_ultra.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_avst_to_gmii_if.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii_to_avst_if.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii_tsu.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii16b_tsu.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_lpm_mult.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_ptp_aligner.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_ptp_detector.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_rx_ptp_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii_crc_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii16b_crc_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii_ptp_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii16b_ptp_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_gmii16b_ptp_inserter_1g2p5g10g.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_ptp_processor.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_ptp_top.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_xgmii_crc_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_tx_xgmii_ptp_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_xgmii_tsu.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_crc328generator.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_crc32ctl8.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_crc32galois8.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii_crc_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii16b_crc_inserter.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/mentor/rtl/alt_em10g32_gmii16b_crc32.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/alt_em10g32_avalon_dc_fifo.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/alt_em10g32_dcfifo_synchronizer_bundle.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/alt_em10g32_std_synchronizer.v" -work alt_em10g32_170
- vlog "$IP_DIR/../alt_em10g32_170/sim/altera_std_synchronizer_nocut.v" -work alt_em10g32_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..7c0f26937ab74d5506c2c6f7c86819dd716cae3a
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/compile_ip.tcl
@@ -0,0 +1,149 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_mac_10g/sim"
+
+vmap alt_em10g32_180 ./work/
+
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/alt_em10g32.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/alt_em10g32unit.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_clk_rst.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_clock_crosser.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_crc32.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_crc32_gf_mult32_kc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_creg_map.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_creg_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_frm_decoder.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_gmii_mii_layer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_pipeline_base.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_reset_synchronizer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rr_clock_crosser.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rst_cnt.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_fctl_filter_crcpad_rem.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_fctl_overflow.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_fctl_preamble.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_frm_control.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_pfc_flow_control.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_pfc_pause_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_pkt_backpressure_control.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_gmii16b.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_gmii16b_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_gmii_mii.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_layer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_xgmii.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_status_aligner.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_stat_mem.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_stat_reg.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_data_frm_gen.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_srcaddr_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_err_aligner.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_flow_control.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_frm_arbiter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_frm_muxer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_pause_beat_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_pause_frm_gen.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_pause_req.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_pfc_frm_gen.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rr_buffer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_gmii16b.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_gmii16b_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_layer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_xgmii_layer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_sc_fifo.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_gmii_decoder.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_gmii_decoder_dfa.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii_encoder.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii_encoder_dfa.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_gmii_mii_decoder_if.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii_mii_encoder_if.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_mm_adapter/altera_eth_avalon_mm_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_avalon_st_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter_avalon_st_rx.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter_avalon_st_tx.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/avalon_st_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/alt_em10g32_vldpkt_rddly.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter_rx.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter_tx.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/sideband_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_sideband_crosser.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_avalon_st_adapter/altera_eth_sideband_crosser_sync.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_32_64_xgmii_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_32_to_64_xgmii_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_64_to_32_xgmii_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_dcfifo_32_to_64_xgmii_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_width_adaptor/alt_em10g_dcfifo_64_to_32_xgmii_conversion.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_32_to_64_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_64_to_32_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/adapters/altera_eth_xgmii_data_format_adapter/alt_em10g32_xgmii_data_format_adapter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_altsyncram_bundle.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_altsyncram.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_lat_calc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_hecc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_dc_fifo_secc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo_hecc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avalon_sc_fifo_secc.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_ecc_dec_18_12.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_ecc_dec_39_32.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_ecc_enc_12_18.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_ecc_enc_32_39.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_rs_xgmii_layer_ultra.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_rs_xgmii_ultra.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_avst_to_gmii_if.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii_to_avst_if.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii_tsu.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii16b_tsu.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_lpm_mult.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_ptp_aligner.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_ptp_detector.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_rx_ptp_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii_crc_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii16b_crc_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii_ptp_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii16b_ptp_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_gmii16b_ptp_inserter_1g2p5g10g.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_ptp_processor.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_ptp_top.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_xgmii_crc_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_tx_xgmii_ptp_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_xgmii_tsu.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_crc328generator.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_crc32ctl8.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_crc32galois8.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii_crc_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii16b_crc_inserter.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/mentor/rtl/alt_em10g32_gmii16b_crc32.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/alt_em10g32_avalon_dc_fifo.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/alt_em10g32_dcfifo_synchronizer_bundle.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/alt_em10g32_std_synchronizer.v" -work alt_em10g32_180
+ vlog "$IP_DIR/../alt_em10g32_180/sim/altera_std_synchronizer_nocut.v" -work alt_em10g32_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/hdllib.cfg
similarity index 78%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/hdllib.cfg
index fecc7601f59eb50369a80014a5f7c22964f602d6..0f16ed2ea08563b84db2c26831acc2ee8ce5c4ea 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_alt_em10g32_170
-hdl_library_clause_name = alt_em10g32_170
+hdl_lib_name = ip_arria10_e1sg_alt_em10g32_180
+hdl_library_clause_name = alt_em10g32_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -14,7 +14,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_em10g32_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/hdllib.cfg
deleted file mode 100644
index 189c63a2b6562c000a976d029ae6abb440f454ca..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/hdllib.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_alt_mem_if_jtag_master_170
-hdl_library_clause_name = alt_mem_if_jtag_master_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_jtag_dc_streaming_170 ip_arria10_e1sg_timing_adapter_170 ip_arria10_e1sg_altera_avalon_sc_fifo_170 ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_170 ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_170 ip_arria10_e1sg_altera_avalon_packets_to_master_170 ip_arria10_e1sg_channel_adapter_170 ip_arria10_e1sg_altera_reset_controller_170
-
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/compile_ip.tcl
-
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/compile_ip.tcl
similarity index 83%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/compile_ip.tcl
index d35f46a0c17546c93d959dadbd9aa09b37029eaa..1ae3f80bee1f937e1768e23182102435153f2cef 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/compile_ip.tcl
@@ -30,9 +30,9 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap alt_mem_if_jtag_master_170 ./work/
+vmap alt_mem_if_jtag_master_180 ./work/
- vcom "$IP_DIR/../alt_mem_if_jtag_master_170/sim/ip_arria10_e1sg_ddr4_8g_1600_alt_mem_if_jtag_master_170_biwt3uq.vhd" -work alt_mem_if_jtag_master_170
+ vcom "$IP_DIR/../alt_mem_if_jtag_master_180/sim/ip_arria10_e1sg_ddr4_8g_1600_alt_mem_if_jtag_master_180_5ftfrmy.vhd" -work alt_mem_if_jtag_master_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..21f6ab7cfc4cffde8b55b9d3ca430d1bcad81d5b
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/hdllib.cfg
@@ -0,0 +1,17 @@
+hdl_lib_name = ip_arria10_e1sg_alt_mem_if_jtag_master_180
+hdl_library_clause_name = alt_mem_if_jtag_master_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_jtag_dc_streaming_180 ip_arria10_e1sg_timing_adapter_180 ip_arria10_e1sg_altera_avalon_sc_fifo_180 ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_180 ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_180 ip_arria10_e1sg_altera_avalon_packets_to_master_180 ip_arria10_e1sg_channel_adapter_180 ip_arria10_e1sg_altera_reset_controller_180
+
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/alt_mem_if_jtag_master_180/compile_ip.tcl
+
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/compile_ip.tcl
similarity index 87%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/compile_ip.tcl
index e1cdadbeab388c772f7994c60c79f3f9702572b3..4be28d783af91ce2de691ed2b2d25979228d60fc 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_clkbuf_global/sim"
-vmap altclkctrl_170 ./work/
- vcom "$IP_DIR/../altclkctrl_170/sim/ip_arria10_e1sg_clkbuf_global_altclkctrl_170_7fwzyby.vhd" -work altclkctrl_170
+vmap altclkctrl_180 ./work/
+ vcom "$IP_DIR/../altclkctrl_180/sim/ip_arria10_e1sg_clkbuf_global_altclkctrl_180_uuznxiq.vhd" -work altclkctrl_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/hdllib.cfg
similarity index 65%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/hdllib.cfg
index 150dab121407f6ea5247cfba2422b49a422808bc..d16da4aa988dfc2369d7c330401fcc33f33b53b9 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altclkctrl_170
-hdl_library_clause_name = altclkctrl_170
+hdl_lib_name = ip_arria10_e1sg_altclkctrl_180
+hdl_library_clause_name = altclkctrl_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altclkctrl_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/compile_ip.tcl
index f344ad332c3d0c259217199ff912ab5cdfdba37e..1d61a0aec4070b87b5c723eb203784db48758d61 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/compile_ip.tcl
@@ -29,9 +29,9 @@
vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_asmi_parallel/sim"
-vmap altera_asmi_parallel_170 ./work/
+vmap altera_asmi_parallel_180 ./work/
- vcom "$IP_DIR/../altera_asmi_parallel_170/sim/ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_170_eou4tfa.vhd" -work altera_asmi_parallel_170
+ vcom "$IP_DIR/../altera_asmi_parallel_180/sim/ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_180_2sjvniq.vhd" -work altera_asmi_parallel_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/hdllib.cfg
similarity index 60%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/hdllib.cfg
index 0e8e55c1e66a7cf84fb1832f5ed9cd4566232e5d..6a653a16896034a3253bb38ef3bab954c82c9e07 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_asmi_parallel_170
-hdl_library_clause_name = altera_asmi_parallel_170
+hdl_lib_name = ip_arria10_e1sg_altera_asmi_parallel_180
+hdl_library_clause_name = altera_asmi_parallel_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,5 +11,5 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_asmi_parallel_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/compile_ip.tcl
index 19c655935fc75dd20dfa6dfbefd11b447af83712..7f1f5797ff27449640d5c61ffd7dfa69411275a3 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/compile_ip.tcl
@@ -28,8 +28,8 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
-vmap altera_avalon_mm_bridge_170 ./work/
+vmap altera_avalon_mm_bridge_180 ./work/
- vlog "$IP_DIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/hdllib.cfg
similarity index 76%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/hdllib.cfg
index 1f0e8108fd2c3ac34bc3004d4cc4f1a5101237c4..97f5b33a724769d4ddab878d345300ced1ec6cf7 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_mm_bridge_170
-hdl_library_clause_name = altera_avalon_mm_bridge_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_mm_bridge_180
+hdl_library_clause_name = altera_avalon_mm_bridge_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -14,7 +14,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_mm_bridge_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/compile_ip.tcl
similarity index 59%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/compile_ip.tcl
index 3da14b9e74fa176ecc3c14f8b574196eb236210b..32aad9d5c1d887c995296b361d7591a6468b6013 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/compile_ip.tcl
@@ -28,19 +28,19 @@
#vlib ./work/ ;# Assume library work already exist
#
-vmap altera_avalon_onchip_memory2_170 ./work/
+vmap altera_avalon_onchip_memory2_180 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_avalon_onchip_memory2_180_yroldmy.vhd" -work altera_avalon_onchip_memory2_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_avalon_onchip_memory2_180_yroldmy.vhd" -work altera_avalon_onchip_memory2_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_avalon_onchip_memory2_180_yroldmy.vhd" -work altera_avalon_onchip_memory2_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_yroldmy.vhd" -work altera_avalon_onchip_memory2_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/hdllib.cfg
similarity index 57%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/hdllib.cfg
index 2edea37fa91875f04b9549e9bdebfc457efe2a71..3f74f6bb1421b14d8938d11829b1827cd0925ee3 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_onchip_memory2_170
-hdl_library_clause_name = altera_avalon_onchip_memory2_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_onchip_memory2_180
+hdl_library_clause_name = altera_avalon_onchip_memory2_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_onchip_memory2_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/compile_ip.tcl
similarity index 84%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/compile_ip.tcl
index 2936776afa142109e545ac1ad7d01e2d879b26f1..a28af3acd153156cddbc199a4c42a11f405c2397 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/compile_ip.tcl
@@ -30,8 +30,8 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap altera_avalon_packets_to_master_170 ./work/
+vmap altera_avalon_packets_to_master_180 ./work/
- vlog "$IP_DIR/../altera_avalon_packets_to_master_170/sim/altera_avalon_packets_to_master.v" -work altera_avalon_packets_to_master_170
+ vlog "$IP_DIR/../altera_avalon_packets_to_master_180/sim/altera_avalon_packets_to_master.v" -work altera_avalon_packets_to_master_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/hdllib.cfg
similarity index 70%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/hdllib.cfg
index 0dc7501636e1a4dde423d7e9b1e7fe132b8681ae..3289315446cc383f3eeb84c3163a1cea5dcd7233 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_packets_to_master_170
-hdl_library_clause_name = altera_avalon_packets_to_master_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_packets_to_master_180
+hdl_library_clause_name = altera_avalon_packets_to_master_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_packets_to_master_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/compile_ip.tcl
index 54dd8ac6a658c2cd69dca28c13ea4217b13ee966..51d850450c56961cd959351d242feca34018c30f 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/compile_ip.tcl
@@ -30,10 +30,10 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap altera_avalon_sc_fifo_170 ./work/
- vlog "$IP_DIR/../altera_avalon_sc_fifo_170/sim/altera_avalon_sc_fifo.v" -work altera_avalon_sc_fifo_170
+vmap altera_avalon_sc_fifo_180 ./work/
+ vlog "$IP_DIR/../altera_avalon_sc_fifo_180/sim/altera_avalon_sc_fifo.v" -work altera_avalon_sc_fifo_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/hdllib.cfg
similarity index 60%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/hdllib.cfg
index f8ab200bc09097dba9bbd9fc92a2749814a9738d..7bf034a3bcb61e092a479771a27ec097eb27b481 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_sc_fifo_170
-hdl_library_clause_name = altera_avalon_sc_fifo_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_sc_fifo_180
+hdl_library_clause_name = altera_avalon_sc_fifo_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_sc_fifo_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/compile_ip.tcl
similarity index 84%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/compile_ip.tcl
index 07d698207f4aebd212582129268a73a1e671ad42..f779ec921f150c5785ca9083eb10327c2afdbebd 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/compile_ip.tcl
@@ -30,8 +30,8 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap altera_avalon_st_bytes_to_packets_170 ./work/
+vmap altera_avalon_st_bytes_to_packets_180 ./work/
- vlog "$IP_DIR/../altera_avalon_st_bytes_to_packets_170/sim/altera_avalon_st_bytes_to_packets.v" -work altera_avalon_st_bytes_to_packets_170
+ vlog "$IP_DIR/../altera_avalon_st_bytes_to_packets_180/sim/altera_avalon_st_bytes_to_packets.v" -work altera_avalon_st_bytes_to_packets_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/hdllib.cfg
similarity index 69%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/hdllib.cfg
index 0662c5a3d2d3992f6c1c2fce438e9375b3f4a64d..55d4345da94d771253e6f80c9d5db7ed48c57449 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_170
-hdl_library_clause_name = altera_avalon_st_bytes_to_packets_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_180
+hdl_library_clause_name = altera_avalon_st_bytes_to_packets_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_bytes_to_packets_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/compile_ip.tcl
index 89f59ac908366d8720a9ccc7d65c029d6bb58199..288cfc78e3977b6ed4cee998b70b950a4217bb55 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/compile_ip.tcl
@@ -30,10 +30,10 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altera_avalon_st_packets_to_bytes_170 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+vmap altera_avalon_st_packets_to_bytes_180 ./work/
- vlog "$IP_DIR/../altera_avalon_st_packets_to_bytes_170/sim/altera_avalon_st_packets_to_bytes.v" -work altera_avalon_st_packets_to_bytes_170
+ vlog "$IP_DIR/../altera_avalon_st_packets_to_bytes_180/sim/altera_avalon_st_packets_to_bytes.v" -work altera_avalon_st_packets_to_bytes_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/hdllib.cfg
similarity index 69%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/hdllib.cfg
index f8cf50573a24551facc73d506e8bb6501eac3bd7..3b7ae8e33f1351b8105bf70fffe638ce1b9c9f38 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_170
-hdl_library_clause_name = altera_avalon_st_packets_to_bytes_170
+hdl_lib_name = ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_180
+hdl_library_clause_name = altera_avalon_st_packets_to_bytes_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_avalon_st_packets_to_bytes_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/compile_ip.tcl
deleted file mode 100644
index 169d99bda6ec620ed01347494ee751413dc826e4..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/compile_ip.tcl
+++ /dev/null
@@ -1,162 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-#
-vmap altera_emif_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_170_verwnda.v" -work altera_emif_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_170_2hmjbxa.v" -work altera_emif_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_170_7ixm4xa.v" -work altera_emif_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v" -work altera_emif_170
-
-vmap altera_emif_arch_nf_170 ./work/
-# ddr4_4g_1600
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti.sv" -work altera_emif_arch_nf_170
-
-# ddr4_4g_2000
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq.sv" -work altera_emif_arch_nf_170
-
-# ddr4_8g_1600
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei.sv" -work altera_emif_arch_nf_170
-
-# ddr4_8g_2400
-set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/generated/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170
-
-# common dependencies
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170
- vlog "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170
-
-vmap altera_emif_cal_slave_nf_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
-vmap altera_reset_controller_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_170
- vlog "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v" -work altera_reset_controller_170
-
-vmap altera_mm_interconnect_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_3gbam2q.vhd" -work altera_mm_interconnect_170
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_lcqbbfq.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
-vmap altera_avalon_onchip_memory2_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
-
-
-vmap altera_avalon_mm_bridge_170 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog "$IP_DIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..04119490cc72a68a433aaa8b6ec7cbdc1b302d07
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
@@ -0,0 +1,161 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+#
+vmap altera_emif_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_180_dzobyri.v" -work altera_emif_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000sim"
+ vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_180_lwknerq.v" -work altera_emif_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_180_ebfu2ha.v" -work altera_emif_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v" -work altera_emif_180
+
+vmap altera_emif_arch_nf_180 ./work/
+# ddr4_4g_1600
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.sv" -work altera_emif_arch_nf_180
+
+# ddr4_4g_2000
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.sv" -work altera_emif_arch_nf_180
+
+# ddr4_8g_1600
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi.sv" -work altera_emif_arch_nf_180
+
+# ddr4_8g_2400
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv" -work altera_emif_arch_nf_180
+
+# common dependencies
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_oct.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_180
+ vlog "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_180
+
+vmap altera_emif_cal_slave_nf_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+
+vmap altera_reset_controller_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vlog "$IP_DIR/../altera_reset_controller_180/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_180
+ vlog "$IP_DIR/../altera_reset_controller_180/sim/mentor/altera_reset_synchronizer.v" -work altera_reset_controller_180
+
+vmap altera_mm_interconnect_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_ibrpcbq.vhd" -work altera_mm_interconnect_180
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_mtvmp4i.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+
+vmap altera_avalon_onchip_memory2_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_avalon_onchip_memory2_180_xymx6za.vhd" -work altera_avalon_onchip_memory2_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_avalon_onchip_memory2_180_xymx6za.vhd" -work altera_avalon_onchip_memory2_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_avalon_onchip_memory2_180_xymx6za.vhd" -work altera_avalon_onchip_memory2_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd" -work altera_avalon_onchip_memory2_180
+
+
+vmap altera_avalon_mm_bridge_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
similarity index 60%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
index 7e1017d4fddbf395af61b31df28c2e4428e91687..b934e75cc06f534d7bfb0f830f7724e7b4e94629 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
@@ -1,7 +1,7 @@
-hdl_lib_name = ip_arria10_e1sg_altera_emif_170
-hdl_library_clause_name = altera_emif_170
+hdl_lib_name = ip_arria10_e1sg_altera_emif_180
+hdl_library_clause_name = altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_170 ip_arria10_e1sg_altera_merlin_slave_translator_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_merlin_slave_translator_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/compile_ip.tcl
deleted file mode 100644
index b4f18e92ca198057921da394d14ff6cc9c558e6f..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/compile_ip.tcl
+++ /dev/null
@@ -1,98 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-vmap altera_emif_arch_nf_170 ./work/
-
-# ddr4_4g_1600
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti.sv" -work altera_emif_arch_nf_170
-
-# ddr4_4g_2000
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_170_ctgfmtq.sv" -work altera_emif_arch_nf_170
-
-# ddr4_8g_1600
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_170_eg5lvei.sv" -work altera_emif_arch_nf_170
-
-# ddr4_8g_2400
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170
-
-# common dependencies
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170
- vlog "$IP_DIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..ab5916d893518abc4e4f33a3bb050bf85bbf8a9f
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
@@ -0,0 +1,97 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+vmap altera_emif_arch_nf_180 ./work/
+# ddr4_4g_1600
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.sv" -work altera_emif_arch_nf_180
+
+# ddr4_4g_2000
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.sv" -work altera_emif_arch_nf_180
+
+# ddr4_8g_1600
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi.sv" -work altera_emif_arch_nf_180
+
+# ddr4_8g_2400
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv" -work altera_emif_arch_nf_180
+
+# common dependencies
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_oct.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_180
+ vlog "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/hdllib.cfg
similarity index 75%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/hdllib.cfg
index aa1549a76543830f29f84626cac1cdaab46c22f0..b999c7f23026b67692ab403e47a1226f16a93b93 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_emif_arch_nf_170
-hdl_library_clause_name = altera_emif_arch_nf_170
+hdl_lib_name = ip_arria10_e1sg_altera_emif_arch_nf_180
+hdl_library_clause_name = altera_emif_arch_nf_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -14,7 +14,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
similarity index 59%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
index 656287d795e744bd67177a67bca475b4e056cb1e..495f63d7f66fdbc97e489ec2a0b6cb76dff03f91 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
@@ -29,19 +29,17 @@
#vlib ./work/ ;# Assume library work already exist
#
-vmap altera_emif_cal_slave_nf_170 ./work/
+vmap altera_emif_cal_slave_nf_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
-
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
similarity index 58%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
index c56bf53d57b495d9993c7d25ef95deac432d03b2..b7252eec612d79ea014b71db59b1e4455aa17470 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_emif_cal_slave_nf_170
-hdl_library_clause_name = altera_emif_cal_slave_nf_170
+hdl_lib_name = ip_arria10_e1sg_altera_emif_cal_slave_nf_180
+hdl_library_clause_name = altera_emif_cal_slave_nf_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/hdllib.cfg
deleted file mode 100644
index a21ef74c59d0a5c854f86e48a0c557129baaf750..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/hdllib.cfg
+++ /dev/null
@@ -1,27 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_170
-hdl_library_clause_name = altera_eth_tse_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim =
-ip_arria10_e1sg_altera_eth_tse_mac_170
-ip_arria10_e1sg_altera_eth_tse_avalon_arbiter_170
-ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_phyip_170
-ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_lvds_170
-ip_arria10_e1sg_altera_xcvr_native_a10_170
-ip_arria10_e1sg_altera_eth_tse_nf_phyip_terminator_170
-ip_arria10_e1sg_altera_eth_tse_nf_lvds_terminator_170
-ip_arria10_e1sg_altera_lvds_170
-ip_arria10_e1sg_altera_reset_controller_170
-
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/compile_ip.tcl
-
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/compile_ip.tcl
similarity index 75%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/compile_ip.tcl
index 1b531d9615535597ee921426a571a3878178fe01..392ed02a9ed2909aa46cb32251acb20a9aac4133 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/compile_ip.tcl
@@ -28,13 +28,13 @@
#vlib ./work/ ;# Assume library work already exist
-vmap altera_eth_tse_170 ./work/
+vmap altera_eth_tse_180 ./work/
# tse_sgmii_gx
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vcom "$IP_DIR/../altera_eth_tse_170/sim/ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_170_bs6nd6i.vhd" -work altera_eth_tse_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
+vcom "$IP_DIR/../altera_eth_tse_180/sim/ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_180_dm7dxyq.vhd" -work altera_eth_tse_180
# tse_sgmii_lvds
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vcom "$IP_DIR/../altera_eth_tse_170/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_170_kv2t7sq.vhd" -work altera_eth_tse_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
+vcom "$IP_DIR/../altera_eth_tse_180/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_180_zsww75y.vhd" -work altera_eth_tse_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..06e083362fff352f9c6b5ab461ee3e50bb7e1bf5
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/hdllib.cfg
@@ -0,0 +1,27 @@
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_180
+hdl_library_clause_name = altera_eth_tse_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+ip_arria10_e1sg_altera_eth_tse_mac_180
+ip_arria10_e1sg_altera_eth_tse_avalon_arbiter_180
+ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_phyip_180
+ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_lvds_180
+ip_arria10_e1sg_altera_xcvr_native_a10_180
+ip_arria10_e1sg_altera_eth_tse_nf_phyip_terminator_180
+ip_arria10_e1sg_altera_eth_tse_nf_lvds_terminator_180
+ip_arria10_e1sg_altera_lvds_180
+ip_arria10_e1sg_altera_reset_controller_180
+
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_180/compile_ip.tcl
+
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/compile_ip.tcl
similarity index 86%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/compile_ip.tcl
index 1e8b7658abe7beafb5da529a5e3d36d06bab2839..decc49bbd68243c20d01fd01aa6170e8f675e4bd 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/compile_ip.tcl
@@ -28,6 +28,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altera_eth_tse_avalon_arbiter_170 ./work/
- vlog "$IP_DIR/../altera_eth_tse_avalon_arbiter_170/sim/mentor/altera_eth_tse_avalon_arbiter.v" -work altera_eth_tse_avalon_arbiter_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
+vmap altera_eth_tse_avalon_arbiter_180 ./work/
+ vlog "$IP_DIR/../altera_eth_tse_avalon_arbiter_180/sim/mentor/altera_eth_tse_avalon_arbiter.v" -work altera_eth_tse_avalon_arbiter_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/hdllib.cfg
similarity index 56%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/hdllib.cfg
index 71a9c4e0ccefa77ed0b2e5be5bbccf68222ccee4..dfd8b2b09dd4a031fbf041cc21478ce7c319d34b 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_avalon_arbiter_170
-hdl_library_clause_name = altera_eth_tse_avalon_arbiter_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_avalon_arbiter_180
+hdl_library_clause_name = altera_eth_tse_avalon_arbiter_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_avalon_arbiter_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/compile_ip.tcl
deleted file mode 100644
index fb9293c0bcd841186b057d292a17a69ce8b1f9da..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/compile_ip.tcl
+++ /dev/null
@@ -1,148 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-vmap altera_eth_tse_mac_170 ./work/
-
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_eth_tse_mac.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_clk_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_crc328checker.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_crc328generator.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_crc32ctl8.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_crc32galois8.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_gmii_io.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_lb_read_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_lb_wrt_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_hashing.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_host_control.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_host_control_small.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mac_control.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_register_map.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_register_map_small.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_counter_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_shared_mac_control.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_shared_register_map.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_counter_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_lfsr_10.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_loopback_ff.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_altshifttaps.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_fifoless_mac_rx.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mac_rx.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_fifoless_mac_tx.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mac_tx.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_magic_detection.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mdio.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mdio_clk_gen.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mdio_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_mdio.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mii_rx_if.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_mii_tx_if.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_pipeline_base.v" -work altera_eth_tse_mac_170
- vlog -sv "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_pipeline_stage.sv" -L altera_common_sv_packages -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_dpram_16x32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_dpram_8x32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_dpram_ecc_16x32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_fifoless_retransmit_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_retransmit_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rgmii_in1.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rgmii_in4.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_nf_rgmii_module.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rgmii_module.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rgmii_out1.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rgmii_out4.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_ff.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_min_ff.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_ff_cntrl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_ff_cntrl_32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_ff_cntrl_32_shift16.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_ff_length.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_rx_stat_extract.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_timing_adapter32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_timing_adapter8.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_timing_adapter_fifo32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_timing_adapter_fifo8.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_1geth.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_fifoless_1geth.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_w_fifo.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_w_fifo_10_100_1000.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_wo_fifo.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_wo_fifo_10_100_1000.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_top_gen_host.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_min_ff.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff_cntrl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff_cntrl_32.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff_cntrl_32_shift16.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff_length.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_ff_read_cntl.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_tx_stat_extract.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_mac_170
- vlog -sv "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ph_calculator.sv" -L altera_common_sv_packages -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_mac_170
- vlog "$IP_DIR/../altera_eth_tse_mac_170/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_mac_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..53eec840307e3dddb80d749be624136d23631885
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/compile_ip.tcl
@@ -0,0 +1,148 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
+
+vmap altera_eth_tse_mac_180 ./work/
+
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_eth_tse_mac.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_clk_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_crc328checker.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_crc328generator.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_crc32ctl8.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_crc32galois8.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_gmii_io.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_lb_read_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_lb_wrt_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_hashing.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_host_control.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_host_control_small.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mac_control.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_register_map.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_register_map_small.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_counter_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_shared_mac_control.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_shared_register_map.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_counter_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_lfsr_10.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_loopback_ff.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_altshifttaps.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_fifoless_mac_rx.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mac_rx.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_fifoless_mac_tx.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mac_tx.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_magic_detection.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mdio.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mdio_clk_gen.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mdio_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_mdio.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mii_rx_if.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_mii_tx_if.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_pipeline_base.v" -work altera_eth_tse_mac_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_pipeline_stage.sv" -L altera_common_sv_packages -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_dpram_16x32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_dpram_8x32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_dpram_ecc_16x32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_fifoless_retransmit_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_retransmit_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rgmii_in1.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rgmii_in4.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_nf_rgmii_module.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rgmii_module.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rgmii_out1.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rgmii_out4.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_ff.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_min_ff.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_ff_cntrl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_ff_cntrl_32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_ff_cntrl_32_shift16.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_ff_length.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_rx_stat_extract.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_timing_adapter32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_timing_adapter8.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_timing_adapter_fifo32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_timing_adapter_fifo8.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_1geth.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_fifoless_1geth.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_w_fifo.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_w_fifo_10_100_1000.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_wo_fifo.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_wo_fifo_10_100_1000.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_top_gen_host.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_min_ff.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff_cntrl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff_cntrl_32.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff_cntrl_32_shift16.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff_length.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_ff_read_cntl.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_tx_stat_extract.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_mac_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ph_calculator.sv" -L altera_common_sv_packages -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_mac_180
+ vlog "$IP_DIR/../altera_eth_tse_mac_180/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_mac_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/hdllib.cfg
similarity index 61%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/hdllib.cfg
index c8e2e0ffd18c89f4b602ba39e0c5e6d438af94d0..3ca851ab1d2ef90e6cf2b0b793c6710e42756364 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_mac_170
-hdl_library_clause_name = altera_eth_tse_mac_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_mac_180
+hdl_library_clause_name = altera_eth_tse_mac_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,6 +11,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_mac_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/compile_ip.tcl
similarity index 73%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/compile_ip.tcl
index 55bf61fc4c7c965adec4d7e660909e3c0c608a13..8bafa44ba2986bdb60297ae97de15809324ed787 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/compile_ip.tcl
@@ -28,13 +28,13 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altera_eth_tse_nf_lvds_terminator_170 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
+vmap altera_eth_tse_nf_lvds_terminator_180 ./work/
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_nf_lvds_terminator_170
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/mentor/altera_eth_tse_nf_lvds_terminator.v" -work altera_eth_tse_nf_lvds_terminator_170
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_nf_lvds_terminator_170
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/mentor/altera_tse_nf_lvds_channel_reset_sequencer.v" -work altera_eth_tse_nf_lvds_terminator_170
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/mentor/altera_tse_nf_lvds_common_reset_sequencer.v" -work altera_eth_tse_nf_lvds_terminator_170
- vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_170/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_nf_lvds_terminator_170
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_nf_lvds_terminator_180
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/mentor/altera_eth_tse_nf_lvds_terminator.v" -work altera_eth_tse_nf_lvds_terminator_180
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_nf_lvds_terminator_180
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/mentor/altera_tse_nf_lvds_channel_reset_sequencer.v" -work altera_eth_tse_nf_lvds_terminator_180
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/mentor/altera_tse_nf_lvds_common_reset_sequencer.v" -work altera_eth_tse_nf_lvds_terminator_180
+ vlog "$IP_DIR/../altera_eth_tse_nf_lvds_terminator_180/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_nf_lvds_terminator_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/hdllib.cfg
similarity index 69%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/hdllib.cfg
index ad8113152b568e100f561238fa51a0f3119c220e..6cc184f5c60d447b5e774aa90425e71ae846bc61 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_nf_lvds_terminator_170
-hdl_library_clause_name = altera_eth_tse_nf_lvds_terminator_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_nf_lvds_terminator_180
+hdl_library_clause_name = altera_eth_tse_nf_lvds_terminator_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_lvds_terminator_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/compile_ip.tcl
similarity index 88%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/compile_ip.tcl
index 8fdd7610c60cf88eb22060876a65bf57421d1253..783b7647943c93cb49d9efab106c087081018ee3 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/compile_ip.tcl
@@ -28,8 +28,8 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
-vmap altera_eth_tse_nf_phyip_terminator_170 ./work/
+vmap altera_eth_tse_nf_phyip_terminator_180 ./work/
- vlog "$IP_DIR/../altera_eth_tse_nf_phyip_terminator_170/sim/mentor/altera_eth_tse_nf_phyip_terminator.v" -work altera_eth_tse_nf_phyip_terminator_170
+ vlog "$IP_DIR/../altera_eth_tse_nf_phyip_terminator_180/sim/mentor/altera_eth_tse_nf_phyip_terminator.v" -work altera_eth_tse_nf_phyip_terminator_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/hdllib.cfg
similarity index 69%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/hdllib.cfg
index 4a68c345a399bbe25d3de95fca7c004ef5ba7ee0..20e2f82c822650dffeb230becfa7416a1a49e5fd 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_nf_phyip_terminator_170
-hdl_library_clause_name = altera_eth_tse_nf_phyip_terminator_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_nf_phyip_terminator_180
+hdl_library_clause_name = altera_eth_tse_nf_phyip_terminator_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_nf_phyip_terminator_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/compile_ip.tcl
deleted file mode 100644
index 227163ef15ee6f0ae9deae1366a87ab37859026d..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/compile_ip.tcl
+++ /dev/null
@@ -1,114 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-vmap altera_eth_tse_pcs_pma_nf_lvds_170 ./work/
-
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_eth_tse_pcs_pma_nf_lvds.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_align_sync.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_dec10b8b.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_dec_func.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_enc8b10b.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_autoneg.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_carrier_sense.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_clk_gen.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_sgmii_clk_div.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_sgmii_clk_enable.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_rx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_tx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_rx_encapsulation_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_pcs_control.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_pcs_host_control.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_mdio_reg.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_mii_rx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_mii_tx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_rx_sync.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_sgmii_clk_cntl.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_colision_detect.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_rx_fifo_rd.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_sgmii.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_sgmii_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_1000_base_x.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_1000_base_x_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_pcs_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_rx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_top_tx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_lvds_reset_sequencer.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_lvds_reverse_loopback.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_pma_lvds_rx_av.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_pma_lvds_rx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_pma_lvds_tx.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ph_calculator.sv" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_170/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_pcs_pma_nf_lvds_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..60d253da4700e6f78653bbccb2cccb6f3c425296
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/compile_ip.tcl
@@ -0,0 +1,114 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
+
+vmap altera_eth_tse_pcs_pma_nf_lvds_180 ./work/
+
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_eth_tse_pcs_pma_nf_lvds.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_align_sync.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_dec10b8b.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_dec_func.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_enc8b10b.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_autoneg.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_carrier_sense.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_clk_gen.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_sgmii_clk_div.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_sgmii_clk_enable.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_rx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_tx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_rx_encapsulation_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_pcs_control.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_pcs_host_control.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_mdio_reg.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_mii_rx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_mii_tx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_rx_sync.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_sgmii_clk_cntl.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_colision_detect.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_rx_fifo_rd.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_sgmii.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_sgmii_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_1000_base_x.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_1000_base_x_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_pcs.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_pcs_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_rx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_top_tx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_lvds_reset_sequencer.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_lvds_reverse_loopback.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_pma_lvds_rx_av.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_pma_lvds_rx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_pma_lvds_tx.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ph_calculator.sv" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_lvds_180/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_pcs_pma_nf_lvds_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/hdllib.cfg
similarity index 56%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/hdllib.cfg
index 0bb69ecf007e80ef1de8b796ff5d88e0d27bf4bb..e32f89526d82d3d49ee09b86d0a44e44fe2f2420 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_lvds_170
-hdl_library_clause_name = altera_eth_tse_pcs_pma_nf_lvds_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_lvds_180
+hdl_library_clause_name = altera_eth_tse_pcs_pma_nf_lvds_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_lvds_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/compile_ip.tcl
deleted file mode 100644
index 93abb8da7fd7ed3e9b1b3ae1f1f9d1a78a37ba58..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/compile_ip.tcl
+++ /dev/null
@@ -1,116 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-
-vmap altera_eth_tse_pcs_pma_nf_phyip_170 ./work/
-
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
-
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_eth_tse_pcs_pma_nf_phyip.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_align_sync.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_dec10b8b.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_dec_func.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_enc8b10b.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_autoneg.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_carrier_sense.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_clk_gen.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_sgmii_clk_div.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_sgmii_clk_enable.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_rx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_tx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_rx_encapsulation_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_pcs_control.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_pcs_host_control.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_mdio_reg.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_mii_rx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_mii_tx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_rx_sync.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_sgmii_clk_cntl.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_colision_detect.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_rx_fifo_rd.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_sgmii.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_sgmii_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_1000_base_x.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_1000_base_x_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_pcs_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_rx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_top_tx.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_reset_sequencer.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_reset_ctrl_lego.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_xcvr_resync.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_gxb_aligned_rxsync.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ph_calculator.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
- vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_170/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_pcs_pma_nf_phyip_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..7e1cd85b20e9aa5f38f610eaf4ec52c83c92ca01
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/compile_ip.tcl
@@ -0,0 +1,116 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
+
+
+vmap altera_eth_tse_pcs_pma_nf_phyip_180 ./work/
+
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
+
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_eth_tse_pcs_pma_nf_phyip.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_align_sync.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_dec10b8b.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_dec_func.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_enc8b10b.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_autoneg.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_carrier_sense.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_clk_gen.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_sgmii_clk_div.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_sgmii_clk_enable.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_rx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_tx_encapsulation.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_rx_encapsulation_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_pcs_control.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_pcs_host_control.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_mdio_reg.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_mii_rx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_mii_tx_if_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_rx_sync.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_sgmii_clk_cntl.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_colision_detect.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_rx_fifo_rd.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_rx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_sgmii.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_sgmii_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_tx_converter.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_1000_base_x.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_1000_base_x_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_pcs.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_pcs_strx_gx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_rx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_top_tx.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_reset_sequencer.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_reset_ctrl_lego.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_xcvr_resync.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_gxb_aligned_rxsync.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_eth_tse_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_eth_tse_std_synchronizer_bundle.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_eth_tse_ptp_std_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_false_path_marker.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_reset_synchronizer.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_clock_crosser.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_13.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_24.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_34.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_opt_1246.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_opt_14_44.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_a_fifo_opt_36_10.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_gray_cnt.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_sdpm_altsyncram.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_altsyncram_dpm_fifo.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_bin_cnt.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog -sv "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ph_calculator.sv" -L altera_common_sv_packages -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_sdpm_gen.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x10.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x10.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x10_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x14.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x14.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x14_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x2.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x2.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x2_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x23.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x23.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x23_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x36.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x36.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x36_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x40.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x40.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x40_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_dec_x30.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x30.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_enc_x30_wrapper.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/mentor/altera_tse_ecc_status_crosser.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
+ vlog "$IP_DIR/../altera_eth_tse_pcs_pma_nf_phyip_180/sim/altera_std_synchronizer_nocut.v" -work altera_eth_tse_pcs_pma_nf_phyip_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/hdllib.cfg
similarity index 70%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/hdllib.cfg
index 14e02053d5240acae9c43e5170e86f713fc0cd5c..37eeea420586c91ae99ab0d51d5bc775c2eb8b77 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_phyip_170
-hdl_library_clause_name = altera_eth_tse_pcs_pma_nf_phyip_170
+hdl_lib_name = ip_arria10_e1sg_altera_eth_tse_pcs_pma_nf_phyip_180
+hdl_library_clause_name = altera_eth_tse_pcs_pma_nf_phyip_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_eth_tse_pcs_pma_nf_phyip_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/compile_ip.tcl
similarity index 71%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/compile_ip.tcl
index e6fc09b1ffd8249ec775a36c577905c9963d9067..555b4b1dc1acfb37562276564adaf388a2748b87 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/compile_ip.tcl
@@ -28,14 +28,14 @@
#vlib ./work/ ;# Assume library work already exist
-vmap altera_iopll_170 ./work/
+vmap altera_iopll_180 ./work/
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_iopll_170/sim/ip_arria10_e1sg_pll_clk25_altera_iopll_170_7lq52ua.vo" -work altera_iopll_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk25/sim"
+ vlog "$IP_DIR/../altera_iopll_180/sim/ip_arria10_e1sg_pll_clk25_altera_iopll_180_fp6fpla.vo" -work altera_iopll_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_iopll_170/sim/ip_arria10_e1sg_pll_clk125_altera_iopll_170_3a4ewza.vo" -work altera_iopll_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk125/sim"
+ vlog "$IP_DIR/../altera_iopll_180/sim/ip_arria10_e1sg_pll_clk125_altera_iopll_180_abkdtja.vo" -work altera_iopll_180
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vlog "$IP_DIR/../altera_iopll_170/sim/ip_arria10_e1sg_pll_clk200_altera_iopll_170_bqwoevq.vo" -work altera_iopll_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk200sim"
+ vlog "$IP_DIR/../altera_iopll_180/sim/ip_arria10_e1sg_pll_clk200_altera_iopll_180_qkytlfy.vo" -work altera_iopll_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/hdllib.cfg
similarity index 64%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/hdllib.cfg
index d75309def40467ad136aec37d367b6a3c33688eb..cd252f68f6b28d98d5fbc0fd5431ecccac466b12 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_iopll_170
-hdl_library_clause_name = altera_iopll_170
+hdl_lib_name = ip_arria10_e1sg_altera_iopll_180
+hdl_library_clause_name = altera_iopll_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_iopll_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
similarity index 84%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
index 4a89f0d42387b190ff75804bb93f3d4d8f1d906d..cbcb8e1c93c8a0bc05fcade73c1db535bddc2cb5 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
@@ -30,8 +30,8 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap altera_ip_col_if_170 ./work/
+vmap altera_ip_col_if_180 ./work/
- vlog "$IP_DIR/../altera_ip_col_if_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_ip_col_if_170_bnb3mmy.v" -work altera_ip_col_if_170
+ vlog "$IP_DIR/../altera_ip_col_if_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_ip_col_if_180_bnb3mmy.v" -work altera_ip_col_if_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
similarity index 62%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
index 540bef90d6fe2a9db186358879b1354089256691..3ba5bffd7c613ab3460c0c1bbba5dea87232e7c0 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_ip_col_if_170
-hdl_library_clause_name = altera_ip_col_if_170
+hdl_lib_name = ip_arria10_e1sg_altera_ip_col_if_180
+hdl_library_clause_name = altera_ip_col_if_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/hdllib.cfg
deleted file mode 100644
index 58633386cd5c011ca51c43a592fc2c92e01a7cbb..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/hdllib.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_jtag_dc_streaming_170
-hdl_library_clause_name = altera_jtag_dc_streaming_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim =
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/compile_ip.tcl
-
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/compile_ip.tcl
similarity index 62%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/compile_ip.tcl
index 827770ab5410a4b9ce90c1685f98731eaf76311b..8ef738a50d0a4127a5c7061e6b62699208add475 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/compile_ip.tcl
@@ -30,16 +30,16 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap altera_jtag_dc_streaming_170 ./work/
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_jtag_interface.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_jtag_dc_streaming.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_jtag_sld_node.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_jtag_streaming.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_clock_crosser.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_std_synchronizer_nocut.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_pipeline_base.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_idle_remover.v" -work altera_jtag_dc_streaming_170
- vlog "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_idle_inserter.v" -work altera_jtag_dc_streaming_170
- vlog -sv "$IP_DIR/../altera_jtag_dc_streaming_170/sim/altera_avalon_st_pipeline_stage.sv" -work altera_jtag_dc_streaming_170
+vmap altera_jtag_dc_streaming_180 ./work/
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_jtag_interface.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_jtag_dc_streaming.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_jtag_sld_node.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_jtag_streaming.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_clock_crosser.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_std_synchronizer_nocut.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_pipeline_base.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_idle_remover.v" -work altera_jtag_dc_streaming_180
+ vlog "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_idle_inserter.v" -work altera_jtag_dc_streaming_180
+ vlog -sv "$IP_DIR/../altera_jtag_dc_streaming_180/sim/altera_avalon_st_pipeline_stage.sv" -work altera_jtag_dc_streaming_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..9ab2d1bf1181f09457185a3c2c3c31397b7f9184
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/hdllib.cfg
@@ -0,0 +1,16 @@
+hdl_lib_name = ip_arria10_e1sg_altera_jtag_dc_streaming_180
+hdl_library_clause_name = altera_jtag_dc_streaming_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_jtag_dc_streaming_180/compile_ip.tcl
+
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/compile_ip.tcl
deleted file mode 100644
index 9c08ddd0b0b8dc2753ce3e774680fda0f5b231d1..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/compile_ip.tcl
+++ /dev/null
@@ -1,34 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altera_lvds_170 ./work/
- vcom "$IP_DIR/../altera_lvds_170/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_170_m5pqrlq.vhd" -work altera_lvds_170
- vcom "$IP_DIR/../altera_lvds_170/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_170_o42lhkq.vhd" -work altera_lvds_170
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..b2c37f6a32e1cb0541a0684ee65e98fbdc317b23
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/compile_ip.tcl
@@ -0,0 +1,34 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
+vmap altera_lvds_180 ./work/
+ vcom "$IP_DIR/../altera_lvds_180/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_180_og2byry.vhd" -work altera_lvds_180
+ vcom "$IP_DIR/../altera_lvds_180/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_180_zfbfxeq.vhd" -work altera_lvds_180
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/hdllib.cfg
similarity index 54%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/hdllib.cfg
index 5aafdf155e3fe629c525162641215ac1638449ad..c9f081b5e9ab2420e0ff9abfd97dbfa7984e8743 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/hdllib.cfg
@@ -1,7 +1,7 @@
-hdl_lib_name = ip_arria10_e1sg_altera_lvds_170
-hdl_library_clause_name = altera_lvds_170
+hdl_lib_name = ip_arria10_e1sg_altera_lvds_180
+hdl_library_clause_name = altera_lvds_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_lvds_core20_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_lvds_core20_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/compile_ip.tcl
deleted file mode 100644
index d6fd3f2e14567879a72f9fe7bc969c1f0c239f16..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/compile_ip.tcl
+++ /dev/null
@@ -1,39 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altera_lvds_core20_170 ./work/
-
-
- vlog -sv "$IP_DIR/../altera_lvds_core20_170/sim/mentor/altera_lvds_core20.sv" -work altera_lvds_core20_170
- vlog "$IP_DIR/../altera_lvds_core20_170/sim/mentor/altera_lvds_core20_pll.v" -work altera_lvds_core20_170
- vcom "$IP_DIR/../altera_lvds_core20_170/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_core20_170_qagiwoa.vhd" -work altera_lvds_core20_170
- vlog -sv "$IP_DIR/../altera_lvds_core20_170/sim/mentor/altera_lvds_core20.sv" -work altera_lvds_core20_170
- vlog "$IP_DIR/../altera_lvds_core20_170/sim/mentor/altera_lvds_core20_pll.v" -work altera_lvds_core20_170
- vcom "$IP_DIR/../altera_lvds_core20_170/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_core20_170_o4ldvbi.vhd" -work altera_lvds_core20_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..007e68b3552f5b8ba2ab72cda7fdb9201be82d00
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/compile_ip.tcl
@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
+vmap altera_lvds_core20_180 ./work/
+
+ vlog -sv "$IP_DIR/../altera_lvds_core20_180/sim/mentor/altera_lvds_core20.sv" -work altera_lvds_core20_180
+ vlog "$IP_DIR/../altera_lvds_core20_180/sim/mentor/altera_lvds_core20_pll.v" -work altera_lvds_core20_180
+ vcom "$IP_DIR/../altera_lvds_core20_180/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_core20_180_5a5vzei.vhd" -work altera_lvds_core20_180
+ vlog -sv "$IP_DIR/../altera_lvds_core20_180/sim/mentor/altera_lvds_core20.sv" -work altera_lvds_core20_180
+ vlog "$IP_DIR/../altera_lvds_core20_180/sim/mentor/altera_lvds_core20_pll.v" -work altera_lvds_core20_180
+ vcom "$IP_DIR/../altera_lvds_core20_180/sim/ip_arria10_e1sg_tse_sgmii_lvds_altera_lvds_core20_180_kmpu4hy.vhd" -work altera_lvds_core20_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/hdllib.cfg
similarity index 61%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/hdllib.cfg
index a72e4c297c86cd067dce135fa623c5eb45c8e1ba..7c32b3d8096cb666f8cd6647647cf80f5da0055d 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_lvds_core20_170
-hdl_library_clause_name = altera_lvds_core20_170
+hdl_lib_name = ip_arria10_e1sg_altera_lvds_core20_180
+hdl_library_clause_name = altera_lvds_core20_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_lvds_core20_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/compile_ip.tcl
index 70d87057853e17c9886dbca92e4558b716acc0b6..35e558134d0ba248367ca538034ed85615fad1ab 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/compile_ip.tcl
@@ -28,9 +28,9 @@
#vlib ./work/ ;# Assume library work already exist
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
-vmap altera_merlin_master_translator_170 ./work/
+vmap altera_merlin_master_translator_180 ./work/
- vlog -sv "$IP_DIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_170
+ vlog -sv "$IP_DIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/hdllib.cfg
similarity index 70%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/hdllib.cfg
index 1f2a23c00eaea07409b423479743715cd60d1ff1..2b22aa3b9bab2038ce187766a3eeed776b5dc003 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_merlin_master_translator_170
-hdl_library_clause_name = altera_merlin_master_translator_170
+hdl_lib_name = ip_arria10_e1sg_altera_merlin_master_translator_180
+hdl_library_clause_name = altera_merlin_master_translator_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_master_translator_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/compile_ip.tcl
similarity index 87%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/compile_ip.tcl
index 567760279868e9026fcf36f79a9c420434b47708..8e0c1568b518869cea072ae96e89b1b586c5d40e 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/compile_ip.tcl
@@ -29,8 +29,8 @@
#vlib ./work/ ;# Assume library work already exist
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
-vmap altera_merlin_slave_translator_170 ./work/
+vmap altera_merlin_slave_translator_180 ./work/
- vlog -sv "$IP_DIR/../altera_merlin_slave_translator_170/sim/mentor/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_170
+ vlog -sv "$IP_DIR/../altera_merlin_slave_translator_180/sim/mentor/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/hdllib.cfg
similarity index 56%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/hdllib.cfg
index ef9b259c5ff1a3aa044ac8c6b3e8eeb37fa88283..91f77c91d4b20c333d22748539109255b9ec0980 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_merlin_slave_translator_170
-hdl_library_clause_name = altera_merlin_slave_translator_170
+hdl_lib_name = ip_arria10_e1sg_altera_merlin_slave_translator_180
+hdl_library_clause_name = altera_merlin_slave_translator_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_merlin_slave_translator_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/compile_ip.tcl
deleted file mode 100644
index a2cfe1b1c15db6e782ce50ffc26a97bdf61f6cce..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/compile_ip.tcl
+++ /dev/null
@@ -1,46 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-#
-vmap altera_mm_interconnect_170 ./work/
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_3gbam2q.vhd" -work altera_mm_interconnect_170
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_170_lcqbbfq.vhd" -work altera_mm_interconnect_170
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
- vcom "$IP_DIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..5079b120b623ef648fc60acbe22f4903539cce71
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/compile_ip.tcl
@@ -0,0 +1,45 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+#
+
+vmap altera_mm_interconnect_180 ./work/
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_ibrpcbq.vhd" -work altera_mm_interconnect_180
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_mm_interconnect_180_mtvmp4i.vhd" -work altera_mm_interconnect_180
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd" -work altera_mm_interconnect_180
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/hdllib.cfg
similarity index 56%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/hdllib.cfg
index f08778a0208c0c258c17e2375d8699df74d3c166..73f5fa237c14155ceb1562acc27f9bc2365ad5b7 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/hdllib.cfg
@@ -1,7 +1,7 @@
-hdl_lib_name = ip_arria10_e1sg_altera_mm_interconnect_170
-hdl_library_clause_name = altera_mm_interconnect_170
+hdl_lib_name = ip_arria10_e1sg_altera_mm_interconnect_180
+hdl_library_clause_name = altera_mm_interconnect_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_170 ip_arria10_e1sg_altera_merlin_slave_translator_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_merlin_slave_translator_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_mm_interconnect_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/hdllib.cfg
deleted file mode 100644
index fed8c35d6ca2b458e6af524df5870e7bad3a81d3..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/hdllib.cfg
+++ /dev/null
@@ -1,15 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_remote_update_170
-hdl_library_clause_name = altera_remote_update_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_remote_update_core_170
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/compile_ip.tcl
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/compile_ip.tcl
similarity index 85%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/compile_ip.tcl
index 57ddfbe2f490dfa51e418e0228fbed40f18428d8..9501b499a48ffc02fda0766728a39867d88192e5 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/compile_ip.tcl
@@ -29,9 +29,9 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_remote_update/sim"
-vmap altera_remote_update_170 ./work/
+vmap altera_remote_update_180 ./work/
- vcom "$IP_DIR/../altera_remote_update_170/sim/ip_arria10_e1sg_remote_update_altera_remote_update_170_hsvaqga.vhd" -work altera_remote_update_170
+ vcom "$IP_DIR/../altera_remote_update_180/sim/ip_arria10_e1sg_remote_update_altera_remote_update_180_oxfb6sq.vhd" -work altera_remote_update_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..699861d08871f499d913760cc635f80cf95fce69
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/hdllib.cfg
@@ -0,0 +1,15 @@
+hdl_lib_name = ip_arria10_e1sg_altera_remote_update_180
+hdl_library_clause_name = altera_remote_update_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_remote_update_core_180
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_180/compile_ip.tcl
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/compile_ip.tcl
similarity index 86%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/compile_ip.tcl
index f9ee62340106fdf6b6f698c583a8115b773faa25..11bc0e4488a765e20b8f411acf03eb0427925476 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/compile_ip.tcl
@@ -29,12 +29,12 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_remote_update/sim"
-vmap altera_remote_update_core_170 ./work/
+vmap altera_remote_update_core_180 ./work/
- vlog "$IP_DIR/../altera_remote_update_core_170/sim/mentor/altera_remote_update_core.sv" -work altera_remote_update_core_170
+ vlog "$IP_DIR/../altera_remote_update_core_180/sim/mentor/altera_remote_update_core.sv" -work altera_remote_update_core_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/hdllib.cfg
similarity index 57%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/hdllib.cfg
index ef449921eb509296d6c7b5cda971164613d316fb..92dcbaea09fc47c3e4c54fa832a508ad6a2001b6 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_remote_update_core_170
-hdl_library_clause_name = altera_remote_update_core_170
+hdl_lib_name = ip_arria10_e1sg_altera_remote_update_core_180
+hdl_library_clause_name = altera_remote_update_core_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -9,4 +9,4 @@ synth_files =
test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_remote_update_core_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/hdllib.cfg
deleted file mode 100644
index 2bf3f307467bf0b53b5663fe7a044f50a215b74b..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/hdllib.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_reset_controller_170
-hdl_library_clause_name = altera_reset_controller_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim =
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl
-
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/compile_ip.tcl
similarity index 82%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/compile_ip.tcl
index 2ec6c185829409452174ebab6558eacc7aaef3a6..3677b0d802b257e01957060a0d8d60ab837c1e06 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/compile_ip.tcl
@@ -29,9 +29,9 @@
#vlib ./work/ ;# Assume library work already exist
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
-vmap altera_reset_controller_170 ./work/
+vmap altera_reset_controller_180 ./work/
- vlog "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_170
- vlog "$IP_DIR/../altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v" -work altera_reset_controller_170
+ vlog "$IP_DIR/../altera_reset_controller_180/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_180
+ vlog "$IP_DIR/../altera_reset_controller_180/sim/mentor/altera_reset_synchronizer.v" -work altera_reset_controller_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..048e59748f41635bcb9512ae33b540ae59b466aa
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/hdllib.cfg
@@ -0,0 +1,16 @@
+hdl_lib_name = ip_arria10_e1sg_altera_reset_controller_180
+hdl_library_clause_name = altera_reset_controller_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_reset_controller_180/compile_ip.tcl
+
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/compile_ip.tcl
similarity index 72%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/compile_ip.tcl
index fca02130c30b522bc09f6eddaef10189c44efc90..71be275f7fec509f9843550d70be6af80de45e1d 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/compile_ip.tcl
@@ -29,27 +29,27 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_pll_10g/sim"
vmap altera_common_sv_packages ./work/
-vmap altera_xcvr_atx_pll_a10_170 ./work/
+vmap altera_xcvr_atx_pll_a10_180 ./work/
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_avmm_h.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/a10_xcvr_atx_pll.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_atx_pll_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/a10_xcvr_atx_pll.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_170/sim/alt_xcvr_atx_pll_rcfg_opt_logic_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_170
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/a10_avmm_h.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_atx_pll_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/a10_xcvr_atx_pll.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_pll_embedded_debug.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_pll_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/alt_xcvr_atx_pll_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/a10_xcvr_atx_pll.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/mentor/alt_xcvr_pll_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_180_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_atx_pll_a10_180/sim/alt_xcvr_atx_pll_rcfg_opt_logic_3gt7q7a.sv" -L altera_common_sv_packages -work altera_xcvr_atx_pll_a10_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/hdllib.cfg
similarity index 59%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/hdllib.cfg
index db46806823bd89d278e67d87196878b91c1c3dbc..595a260842eec6a10f6cce32b8b94699306e5160 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_xcvr_atx_pll_a10_170
-hdl_library_clause_name = altera_xcvr_atx_pll_a10_170
+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_atx_pll_a10_180
+hdl_library_clause_name = altera_xcvr_atx_pll_a10_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_atx_pll_a10_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/compile_ip.tcl
similarity index 51%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/compile_ip.tcl
index 8ea648de469ed6c222dde0217e63fef541ea9c53..de3daa636de26cea6160d610e6abf7cc20d85452 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/compile_ip.tcl
@@ -29,22 +29,22 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_xgmii_mac_clocks/sim"
-vmap altera_xcvr_fpll_a10_170 ./work/
+vmap altera_xcvr_fpll_a10_180 ./work/
#pll_xgmii_mac_clocks
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/twentynm_xcvr_avmm.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/twentynm_xcvr_avmm.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_resync.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_resync.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/altera_xcvr_fpll_a10.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/altera_xcvr_fpll_a10.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/a10_avmm_h.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_native_avmm_nf.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/alt_xcvr_pll_avmm_csr.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_170/sim/mentor/alt_xcvr_pll_avmm_csr.sv" -work altera_xcvr_fpll_a10_170
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/twentynm_xcvr_avmm.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/mentor/twentynm_xcvr_avmm.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/alt_xcvr_resync.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/mentor/alt_xcvr_resync.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/altera_xcvr_fpll_a10.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/mentor/altera_xcvr_fpll_a10.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/a10_avmm_h.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/alt_xcvr_native_avmm_nf.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/alt_xcvr_pll_avmm_csr.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/mentor/alt_xcvr_pll_embedded_debug.sv" -work altera_xcvr_fpll_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_fpll_a10_180/sim/mentor/alt_xcvr_pll_avmm_csr.sv" -work altera_xcvr_fpll_a10_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/hdllib.cfg
similarity index 60%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/hdllib.cfg
index fbcddbb6b9e60f55b5c5c9ec042ab2316c3e83de..06f182471af951ce942b9aacb024d1315fa19bf0 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_altera_xcvr_fpll_a10_170
-hdl_library_clause_name = altera_xcvr_fpll_a10_170
+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_fpll_a10_180
+hdl_library_clause_name = altera_xcvr_fpll_a10_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -11,7 +11,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_fpll_a10_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl
deleted file mode 100644
index 25fed105f6248b36ddcdb4477b99c9deeb6832f0..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl
+++ /dev/null
@@ -1,98 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-
-vmap altera_xcvr_native_a10_170 ./work/
-vmap altera_common_sv_packages ./work/
-
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-# common dependencies
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_pcs.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_pma.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/twentynm_xcvr_native.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_pcs.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_pma.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/mentor/twentynm_xcvr_native.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/a10_avmm_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_pipe_retry.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_prbs_accum.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_odi_accel.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_pcie_dfe_params_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_commands_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_functions_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_program.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_cpu.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/pcie_mgmt_master.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/altera_xcvr_native_pcie_dfe_ip.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/reconfig/altera_xcvr_native_a10_reconfig_parameters.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r_48
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_170_otmjdta.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_otmjdta.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r_24
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_170_edf7tdy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_edf7tdy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r_12
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_170_uyp7wca.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_uyp7wca.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r_4
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_170_5bntvuq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_5bntvuq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r_3
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_170_exiqljq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_exiqljq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# phy_10gbase_r
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_170_s7t4kxy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_s7t4kxy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
-
-# tse_sgmii_gx
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/generated/sim"
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/ip_arria10_e1sg_tse_sgmii_gx_altera_xcvr_native_a10_170_q6y47ey.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
- vlog -sv "$IP_DIR/../altera_xcvr_native_a10_170/sim/alt_xcvr_native_rcfg_opt_logic_q6y47ey.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_170
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/hdllib.cfg
deleted file mode 100644
index 96fde27cdff0dbd5fc1cca407adf30a44e89a767..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/hdllib.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_xcvr_native_a10_170
-hdl_library_clause_name = altera_xcvr_native_a10_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim =
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_170/compile_ip.tcl
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..52b59ba51f260ca5b8e1125f695ee47a6c97f242
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/compile_ip.tcl
@@ -0,0 +1,98 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+vmap altera_xcvr_native_a10_180 ./work/
+vmap altera_common_sv_packages ./work/
+
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_48//sim"
+
+# common dependencies
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/altera_xcvr_native_a10_functions_h.sv" -work altera_common_sv_packages
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/alt_xcvr_resync.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/alt_xcvr_arbiter.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/twentynm_pcs.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/twentynm_pma.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/twentynm_xcvr_native.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/twentynm_pcs.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/twentynm_pma.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/twentynm_xcvr_avmm.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/mentor/twentynm_xcvr_native.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/a10_avmm_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_pipe_retry.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_avmm_csr.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_prbs_accum.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_odi_accel.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_arb.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/altera_xcvr_native_pcie_dfe_params_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/pcie_mgmt_commands_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/pcie_mgmt_functions_h.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/pcie_mgmt_program.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/pcie_mgmt_cpu.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/pcie_mgmt_master.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/altera_xcvr_native_pcie_dfe_ip.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/reconfig/altera_xcvr_native_a10_reconfig_parameters.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r_48
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_180_otmjdta.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_otmjdta.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r_24
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_180_edf7tdy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_edf7tdy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r_12
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_180_uyp7wca.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_uyp7wca.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r_4
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_180_5bntvuq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_5bntvuq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r_3
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_180_exiqljq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_exiqljq.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# phy_10gbase_r
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_180_s7t4kxy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_s7t4kxy.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+
+# tse_sgmii_gx
+#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/generated/sim"
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/ip_arria10_e1sg_tse_sgmii_gx_altera_xcvr_native_a10_180_q6y47ey.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
+ vlog -sv "$IP_DIR/../altera_xcvr_native_a10_180/sim/alt_xcvr_native_rcfg_opt_logic_q6y47ey.sv" -L altera_common_sv_packages -work altera_xcvr_native_a10_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..eb5db3082a4b3930a9ea7375cadc8d1603538fca
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/hdllib.cfg
@@ -0,0 +1,16 @@
+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_native_a10_180
+hdl_library_clause_name = altera_xcvr_native_a10_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_native_a10_180/compile_ip.tcl
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/hdllib.cfg
deleted file mode 100644
index eedb9c51bd0e8f966791754164558e028dcf1426..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/hdllib.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
-hdl_lib_name = ip_arria10_e1sg_altera_xcvr_reset_control_170
-hdl_library_clause_name = altera_xcvr_reset_control_170
-hdl_lib_uses_synth =
-hdl_lib_uses_sim =
-hdl_lib_technology = ip_arria10_e1sg
-
-synth_files =
-
-test_bench_files =
-
-
-[modelsim_project_file]
-modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/compile_ip.tcl
similarity index 72%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/compile_ip.tcl
index d6ceb0f5c9c6c05adee3d2488f2fae5cde015c18..efa554752b5b63b0f851024a8b4d08322d0964c4 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/compile_ip.tcl
@@ -29,16 +29,16 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_1/sim"
-vmap altera_xcvr_reset_control_170 ./work/
+vmap altera_xcvr_reset_control_180 ./work/
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_functions.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_functions.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_resync.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_resync.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/alt_xcvr_reset_counter.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_170
- vlog -sv "$IP_DIR/../altera_xcvr_reset_control_170/sim/mentor/alt_xcvr_reset_counter.sv" -work altera_xcvr_reset_control_170
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/altera_xcvr_functions.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/mentor/altera_xcvr_functions.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/alt_xcvr_resync.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/mentor/alt_xcvr_resync.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/alt_xcvr_reset_counter.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/mentor/altera_xcvr_reset_control.sv" -work altera_xcvr_reset_control_180
+ vlog -sv "$IP_DIR/../altera_xcvr_reset_control_180/sim/mentor/alt_xcvr_reset_counter.sv" -work altera_xcvr_reset_control_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..fe27ceef663f34a181c37534217f083153ea9d5c
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/hdllib.cfg
@@ -0,0 +1,16 @@
+hdl_lib_name = ip_arria10_e1sg_altera_xcvr_reset_control_180
+hdl_library_clause_name = altera_xcvr_reset_control_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_xcvr_reset_control_180/compile_ip.tcl
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl
deleted file mode 100644
index c5e00ff4d4048e4a6b374099d3da0405dbb3c1da..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl
+++ /dev/null
@@ -1,40 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (C) 2017
-# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
-# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-#------------------------------------------------------------------------------
-
-# This file is based on generated file mentor/msim_setup.tcl.
-# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
-# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
-# - replace QSYS_SIMDIR by IP_DIR
-# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
-
-#vlib ./work/ ;# Assume library work already exist
-#
-
-
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
-vmap channel_adapter_170 ./work/
-
- vlog -sv "$IP_DIR/../channel_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_170_bsi6toa.sv" -work channel_adapter_170
- vlog -sv "$IP_DIR/../channel_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_170_xbvi4ny.sv" -work channel_adapter_170
-
-
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..1a9afe12391e5cf7f444637ea4e807d215fb7c66
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/compile_ip.tcl
@@ -0,0 +1,40 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+#
+
+
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+
+vmap channel_adapter_180 ./work/
+
+ vlog -sv "$IP_DIR/../channel_adapter_180/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_180_kn2anua.sv" -work channel_adapter_180
+ vlog -sv "$IP_DIR/../channel_adapter_180/sim/ip_arria10_e1sg_ddr4_8g_1600_channel_adapter_180_wjhhrui.sv" -work channel_adapter_180
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/hdllib.cfg
similarity index 62%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/hdllib.cfg
index eebe788ab1ab82f06d0bb80dc1c65c2f1ed59caa..553bb719ff1707b0b57f6d5102ec0cfac0e1ec79 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_channel_adapter_170
-hdl_library_clause_name = channel_adapter_170
+hdl_lib_name = ip_arria10_e1sg_channel_adapter_180
+hdl_library_clause_name = channel_adapter_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/channel_adapter_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/compile_ip.tcl
similarity index 84%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/compile_ip.tcl
index c96a664efa58ad5ccf52c66b95f87220b93d9a87..d0311d5b15da9a9e386885effc08df8f3e2f7f1f 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/compile_ip.tcl
@@ -30,10 +30,10 @@
#
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
-vmap timing_adapter_170 ./work/
+vmap timing_adapter_180 ./work/
- vlog -sv "$IP_DIR/../timing_adapter_170/sim/ip_arria10_e1sg_ddr4_8g_1600_timing_adapter_170_osazali.sv" -work timing_adapter_170
+ vlog -sv "$IP_DIR/../timing_adapter_180/sim/ip_arria10_e1sg_ddr4_8g_1600_timing_adapter_180_osazali.sv" -work timing_adapter_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/hdllib.cfg
similarity index 63%
rename from libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/hdllib.cfg
rename to libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/hdllib.cfg
index 4633fb177d9ecea8e48d40cf06f04a3cb6aad243..342089f106b5e0e44d6519ee855b20169b767440 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/hdllib.cfg
@@ -1,5 +1,5 @@
-hdl_lib_name = ip_arria10_e1sg_timing_adapter_170
-hdl_library_clause_name = timing_adapter_170
+hdl_lib_name = ip_arria10_e1sg_timing_adapter_180
+hdl_library_clause_name = timing_adapter_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -10,7 +10,7 @@ test_bench_files =
[modelsim_project_file]
modelsim_compile_ip_files =
- $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_170/compile_ip.tcl
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/timing_adapter_180/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10_e1sg/clkbuf_global/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/clkbuf_global/compile_ip.tcl
index 252951861f9ca3ab5b35776197e58612f0661aa8..1dd44233827b9024d1843aefddae3c100fd659ca 100644
--- a/libraries/technology/ip_arria10_e1sg/clkbuf_global/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/clkbuf_global/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_clkbuf_global/sim"
vcom "$IP_DIR/ip_arria10_e1sg_clkbuf_global.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
index acc0049b6de697a30ae63d3410b188da272c2f4c..2fb36c8f2837d83cd6a14e4d60c6d4860790171a 100644
--- a/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/clkbuf_global/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_clkbuf_global
-hdl_library_clause_name = ip_arria10_e1sg_clkbuf_global_altclkctrl_170
+hdl_library_clause_name = ip_arria10_e1sg_clkbuf_global_altclkctrl_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altclkctrl_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altclkctrl_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_clkbuf_global.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_clkbuf_global/ip_arria10_e1sg_clkbuf_global.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
index f9948fbc5e3c7baca8ad5b3306ddd48f0f972c16..ba381883b7ff53eea294476ed4c7964f385da470 100644
--- a/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
@@ -29,8 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-vmap altmult_complex_170 ./work/
- #vlog "$IP_DIR/../altmult_complex_170/sim/ip_arria10_e1sg_complex_mult_altmult_complex_170_myrk3hi.v" -work altmult_complex_170
- vlog "$IP_DIR/../altmult_complex_170/synth/ip_arria10_e1sg_complex_mult_altmult_complex_170_myrk3hi.v" -work altmult_complex_170
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_complex_mult/sim"
+vmap altmult_complex_180 ./work/
+ vlog "$IP_DIR/../altmult_complex_180/synth/ip_arria10_e1sg_complex_mult_altmult_complex_180_nkpx3mi.v" -work altmult_complex_180
#vlog "$IP_DIR/ip_arria10_e1sg_complex_mult_bb.v"
diff --git a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
index 0fb297e058a1801aa075f5cf34ab828dc0e4f2bc..f2340e9c0b3396191ab668270c2b03239dae0973 100644
--- a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
@@ -1,5 +1,5 @@
hdl_lib_name = ip_arria10_e1sg_complex_mult
-hdl_library_clause_name = ip_arria10_e1sg_complex_mult_altmult_complex_170
+hdl_library_clause_name = ip_arria10_e1sg_complex_mult_altmult_complex_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_complex_mult.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/ddio/compile_ip.tcl
index 0cf7bb1d96d0e205fed5846d44f758f7996d0d20..6cff9fd980fabad075b1f9b189a6cc18ee680546 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddio/compile_ip.tcl
@@ -34,29 +34,29 @@ set IPMODEL "SIM";
if {$IPMODEL=="PHY"} {
# OUTDATED AND NOT USED!!
# This file is based on Qsys-generated file msim_setup.tcl.
- set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/"
+ set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddio_in_1/sim"
#vlib ./work/ ;# Assume library work already exists
- vmap ip_arria10_ddio_in_1_altera_gpio_core_150 ./work/
- vmap ip_arria10_ddio_in_1_altera_gpio_150 ./work/
- vmap ip_arria10_ddio_out_1_altera_gpio_core_150 ./work/
- vmap ip_arria10_ddio_out_1_altera_gpio_150 ./work/
+ vmap ip_arria10_ddio_in_1_altera_gpio_core_180 ./work/
+ vmap ip_arria10_ddio_in_1_altera_gpio_180 ./work/
- # Quartus QIP uses the libraries, so map these here to work/ to be able to use these libraries also in simulation.
- # However by instantiating the compenents as components instead of as entities it is not necessary to know the
- # library in simulation. Therefore these lines can be commented:
- #vmap ip_arria10_ddio_in_1 ./work/
- #vmap ip_arria10_ddio_out_1 ./work/
+ vlog -sv "$IP_DIR/../altera_gpio_core_180/sim/mentor/altera_gpio.sv" -work ip_arria10_ddio_in_1_altera_gpio_core_180
- vlog -sv "$IP_DIR/../altera_gpio_core_150/sim/mentor/altera_gpio.sv" -work ip_arria10_ddio_in_1_altera_gpio_core_150
- vlog -sv "$IP_DIR/../altera_gpio_core_150/sim/mentor/altera_gpio.sv" -work ip_arria10_ddio_out_1_altera_gpio_core_150
-
- vcom "$IP_DIR/../altera_gpio_150/sim/ip_arria10_ddio_in_1_altera_gpio_150_v2653ny.vhd" -work ip_arria10_ddio_in_1_altera_gpio_150
+ vcom "$IP_DIR/../altera_gpio_180/sim/ip_arria10_ddio_in_1_altera_gpio_180_umwov7y.vhd" -work ip_arria10_ddio_in_1_altera_gpio_180
vcom "$IP_DIR/ip_arria10_ddio_in_1.vhd"
+
+
+ set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddio_out_1/sim"
+
+ #vlib ./work/ ;# Assume library work already exists
+ vmap ip_arria10_ddio_out_1_altera_gpio_core_180 ./work/
+ vmap ip_arria10_ddio_out_1_altera_gpio_180 ./work/
- vcom "$IP_DIR/../altera_gpio_150/sim/ip_arria10_ddio_out_1_altera_gpio_150_26jftvi.vhd" -work ip_arria10_ddio_out_1_altera_gpio_150
- vcom "$IP_DIR/ip_arria10_ddio_out_1.vhd"
+ vlog -sv "$IP_DIR/../altera_gpio_core_180/sim/mentor/altera_gpio.sv" -work ip_arria10_ddio_out_1_altera_gpio_core_180
+ vcom "$IP_DIR/../altera_gpio_180/sim/ip_arria10_ddio_out_1_altera_gpio_180_c3jcq7i.vhd" -work ip_arria10_ddio_out_1_altera_gpio_180
+ vcom "$IP_DIR/ip_arria10_ddio_out_1.vhd"
+
} else {
# This file uses a behavioral model because the PHY model does not compile OK, see README.txt.
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
index 0da02d5cf99cabf3ac466884b5bc9c4c6d105c35..f37749c422e32c23f900ed357a53554405a8294e 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddio/hdllib.cfg
@@ -18,8 +18,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddio_in_1.qip
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddio_out_1.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddio_in_1/ip_arria10_e1sg_ddio_in_1.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddio_out_1/ip_arria10_e1sg_ddio_out_1.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/compile_ip.tcl
index 557a2cee6bc6ef567b2f7ba444044d119032baad..2b12ee54636a8be29c114ecce7ad906af56f3f2a 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/compile_ip.tcl
@@ -29,7 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
-
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
vcom "$IP_DIR/ip_arria10_e1sg_ddr4_4g_1600.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
index 710e1fb69caf0027cbe50a21396ebc375519fd94..bdfae1a527ec7360a9b635fadaad450739db397a 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
@@ -22,12 +22,12 @@
# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
- file copy -force $IP_DIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_seq_cal.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_170_6dhhhti_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_cal.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_params_synth.hex ./
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
index 342197bd9f5c0c79cfc4d4867f92b925379dab5f..53a802adb6f922eec4493a399ba2b15520732403 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_ddr4_4g_1600
-hdl_library_clause_name = ip_arria10_e1sg_ddr4_4g_1600_altera_emif_170
+hdl_library_clause_name = ip_arria10_e1sg_ddr4_4g_1600_altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_emif_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_emif_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/ip_arria10_e1sg_ddr4_4g_1600.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/compile_ip.tcl
index 70199c12f6c36eea29ee6b84339a3e62126d02a9..b66ce87ea766c71e152a06af1aa5a8e4ab02839f 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
vcom "$IP_DIR/ip_arria10_e1sg_ddr4_4g_2000.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
index 2063dbbb243b56e93f416e79f3e6ed35e7b412ff..071b89b37c141a229d86cf908135def66a7ce972 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
@@ -22,7 +22,7 @@
# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
index 2d3e4f44fa47b54e543b56ee27c95a9e547e5e63..e3f92714a83dcba04450a80ee38d3241bf2d002a 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_ddr4_4g_2000
-hdl_library_clause_name = ip_arria10_e1sg_ddr4_4g_2000_altera_emif_170
+hdl_library_clause_name = ip_arria10_e1sg_ddr4_4g_2000_altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_170 ip_arria10_e1sg_altera_emif_cal_slave_nf_170 ip_arria10_e1sg_altera_avalon_onchip_memory2_170 ip_arria10_e1sg_altera_mm_interconnect_170 ip_arria10_e1sg_altera_reset_controller_170 ip_arria10_e1sg_altera_emif_arch_nf_170 ip_arria10_e1sg_altera_emif_170 ip_arria10_e1sg_altera_avalon_mm_bridge_170 ip_arria10_e1sg_altera_merlin_slave_translator_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_emif_cal_slave_nf_180 ip_arria10_e1sg_altera_avalon_onchip_memory2_180 ip_arria10_e1sg_altera_mm_interconnect_180 ip_arria10_e1sg_altera_reset_controller_180 ip_arria10_e1sg_altera_emif_arch_nf_180 ip_arria10_e1sg_altera_emif_180 ip_arria10_e1sg_altera_avalon_mm_bridge_180 ip_arria10_e1sg_altera_merlin_slave_translator_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/ip_arria10_e1sg_ddr4_4g_2000.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/compile_ip.tcl
index 529636a9ca1830f8688fe7fd4c8fe436d7f5bef2..a8eaa493ac3393b0bbebdb602f4899e53c37fb39 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
vcom "$IP_DIR/ip_arria10_e1sg_ddr4_8g_1600.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
index 68e998bc99a6721279bace4a6dd4474f78e47d3e..b8807be1cbac9e867a056e1109fc3b78eb58830b 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
@@ -22,7 +22,7 @@
# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
index 7a50076c7e8a975530c1058de870bf69eda9b285..c56d4e91ac0ae8415517841e40cfc662afa4abe5 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_ddr4_8g_1600
-hdl_library_clause_name = ip_arria10_e1sg_ddr4_8g_1600_altera_emif_170
+hdl_library_clause_name = ip_arria10_e1sg_ddr4_8g_1600_altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_170 ip_arria10_e1sg_altera_emif_cal_slave_nf_170 ip_arria10_e1sg_altera_avalon_onchip_memory2_170 ip_arria10_e1sg_altera_mm_interconnect_170 ip_arria10_e1sg_altera_reset_controller_170 ip_arria10_e1sg_altera_emif_arch_nf_170 ip_arria10_e1sg_altera_emif_170 ip_arria10_e1sg_altera_avalon_mm_bridge_170 ip_arria10_e1sg_altera_merlin_slave_translator_170 ip_arria10_e1sg_altera_avalon_sc_fifo_170 ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_170 ip_arria10_e1sg_altera_ip_col_if_170 ip_arria10_e1sg_altera_jtag_dc_streaming_170 ip_arria10_e1sg_alt_mem_if_jtag_master_170 ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_170 ip_arria10_e1sg_altera_avalon_packets_to_master_170 ip_arria10_e1sg_channel_adapter_170 ip_arria10_e1sg_timing_adapter_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_emif_cal_slave_nf_180 ip_arria10_e1sg_altera_avalon_onchip_memory2_180 ip_arria10_e1sg_altera_mm_interconnect_180 ip_arria10_e1sg_altera_reset_controller_180 ip_arria10_e1sg_altera_emif_arch_nf_180 ip_arria10_e1sg_altera_emif_180 ip_arria10_e1sg_altera_avalon_mm_bridge_180 ip_arria10_e1sg_altera_merlin_slave_translator_180 ip_arria10_e1sg_altera_avalon_sc_fifo_180 ip_arria10_e1sg_altera_avalon_st_packets_to_bytes_180 ip_arria10_e1sg_altera_ip_col_if_180 ip_arria10_e1sg_altera_jtag_dc_streaming_180 ip_arria10_e1sg_alt_mem_if_jtag_master_180 ip_arria10_e1sg_altera_avalon_st_bytes_to_packets_180 ip_arria10_e1sg_altera_avalon_packets_to_master_180 ip_arria10_e1sg_channel_adapter_180 ip_arria10_e1sg_timing_adapter_180
hdl_lib_technology = ip_arria10_e1sg
@@ -17,7 +17,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/ip_arria10_e1sg_ddr4_8g_1600.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/compile_ip.tcl
index 9fc229d78e74f11fa0041ffe90f0771e0825e9f2..73fa6f8f5cb184d7c358a03796294b5ce0f29bbe 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/generated/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
vcom "$IP_DIR/ip_arria10_e1sg_ddr4_8g_2400.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
index 668144a2846c594937bc0b1ccbba249873dce397..1c94289e4d03d0cd87864442dcd74619393057bb 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
@@ -22,7 +22,7 @@
# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
index fb483b95fe65b667f794c6bc1fe253b2bc94c0fe..a85380c61312ffdadf6d576ef01e280872adccea 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_ddr4_8g_2400
-hdl_library_clause_name = ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170
+hdl_library_clause_name = ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_170 ip_arria10_e1sg_altera_emif_cal_slave_nf_170 ip_arria10_e1sg_altera_avalon_onchip_memory2_170 ip_arria10_e1sg_altera_mm_interconnect_170 ip_arria10_e1sg_altera_reset_controller_170 ip_arria10_e1sg_altera_emif_arch_nf_170 ip_arria10_e1sg_altera_emif_170 ip_arria10_e1sg_altera_avalon_mm_bridge_170 ip_arria10_e1sg_altera_merlin_slave_translator_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_emif_cal_slave_nf_180 ip_arria10_e1sg_altera_avalon_onchip_memory2_180 ip_arria10_e1sg_altera_mm_interconnect_180 ip_arria10_e1sg_altera_reset_controller_180 ip_arria10_e1sg_altera_emif_arch_nf_180 ip_arria10_e1sg_altera_emif_180 ip_arria10_e1sg_altera_avalon_mm_bridge_180 ip_arria10_e1sg_altera_merlin_slave_translator_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd
index 234c2f8ba6e4771421fa9ae0df3191307f9db2ea..c1c448a2e8d62d3727d9275defe711306006ef43 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd
@@ -26,7 +26,7 @@ use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
-entity ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za is
+entity ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za is
generic (
INIT_FILE : STRING := "seq_cal_soft_m20k.hex"
);
@@ -47,10 +47,10 @@ entity ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za is
-- outputs:
signal readdata : OUT STD_LOGIC_VECTOR (31 DOWNTO 0)
);
-end entity ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za;
+end entity ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za;
-architecture europa of ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za is
+architecture europa of ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za is
component altsyncram is
GENERIC (
byte_size : NATURAL;
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v
index 3f6ff8327bfd2d6aa30da706fe24d5b76c252e64..3938f88f2beb5a2331d481cf308478fda0550b78 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v
@@ -18,7 +18,7 @@
// altera message_level Level1
// altera message_off 10034 10035 10036 10037 10230 10240 10030 13469 16735 16788
-module ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za (
+module ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za (
// inputs:
address,
byteenable,
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd
index 7d719887c92e484f997c62aecd522f0753c3fb40..afe8c847f6e19dffda7c1d53ce0a5d3ad1ee3bc3 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd
@@ -1,4 +1,4 @@
--- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd
+-- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd
-- This file was auto-generated from altera_emif_hw.tcl. If you edit it your changes
-- will probably be lost.
@@ -6,12 +6,12 @@
-- Generated using ACDS version 18.0 219
library IEEE;
-library altera_emif_arch_nf_170;
-library altera_emif_cal_slave_nf_170;
+library altera_emif_arch_nf_180;
+library altera_emif_cal_slave_nf_180;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
-entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
+entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa is
port (
amm_ready_0 : out std_logic; -- ctrl_amm_avalon_slave_0.waitrequest_n
amm_read_0 : in std_logic := '0'; -- .read
@@ -46,10 +46,10 @@ entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
local_cal_success : out std_logic; -- status_conduit_end.local_cal_success
local_cal_fail : out std_logic -- .local_cal_fail
);
-end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa;
+end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa;
-architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
- component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_cmp is
+architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_cmp is
generic (
PROTOCOL_ENUM : string := "PROTOCOL_DDR4";
PHY_TARGET_IS_ES : boolean := false;
@@ -1836,9 +1836,9 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
amm_byteenable_1 : in std_logic_vector(71 downto 0) := (others => 'X'); -- byteenable
amm_readdatavalid_1 : out std_logic -- readdatavalid
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_cmp;
- component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq_cmp is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq_cmp is
port (
avl_waitrequest : out std_logic; -- waitrequest
avl_readdata : out std_logic_vector(31 downto 0); -- readdata
@@ -1853,7 +1853,7 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
clk_clk : in std_logic := 'X'; -- clk
rst_reset : in std_logic := 'X' -- reset
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq_cmp;
signal arch_cal_slave_clk_clock_source_clk : std_logic; -- arch:cal_slave_clk -> [arch:cal_slave_clk_in, cal_slave_component:clk_clk]
signal arch_cal_slave_reset_n_reset_source_reset : std_logic; -- arch:cal_slave_reset_n -> [arch:cal_slave_reset_n_in, arch_cal_slave_reset_n_reset_source_reset:in]
@@ -1869,13 +1869,13 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa is
signal arch_cal_master_avalon_master_burstcount : std_logic; -- arch:cal_master_burstcount -> cal_slave_component:avl_burstcount
signal arch_cal_slave_reset_n_reset_source_reset_ports_inv : std_logic; -- arch_cal_slave_reset_n_reset_source_reset:inv -> cal_slave_component:rst_reset
- for arch : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_cmp
- use entity altera_emif_arch_nf_170.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i;
- for cal_slave_component : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq_cmp
- use entity altera_emif_cal_slave_nf_170.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq;
+ for arch : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_cmp
+ use entity altera_emif_arch_nf_180.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i;
+ for cal_slave_component : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq_cmp
+ use entity altera_emif_cal_slave_nf_180.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq;
begin
- arch : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_cmp
+ arch : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_cmp
generic map (
PROTOCOL_ENUM => "PROTOCOL_DDR4",
PHY_TARGET_IS_ES => false,
@@ -3663,7 +3663,7 @@ begin
amm_readdatavalid_1 => open -- (terminated)
);
- cal_slave_component : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq_cmp
+ cal_slave_component : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq_cmp
port map (
avl_waitrequest => arch_cal_master_avalon_master_waitrequest, -- avl.waitrequest
avl_readdata => arch_cal_master_avalon_master_readdata, -- .readdata
@@ -3681,4 +3681,4 @@ begin
arch_cal_slave_reset_n_reset_source_reset_ports_inv <= not arch_cal_slave_reset_n_reset_source_reset;
-end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa
+end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v
index c94f1549f5ba3e43d97299396bcb368d96dde25c..2bfc63446131f5365f1d2daca43972c47a95be71 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v
@@ -1,4 +1,4 @@
-// ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.v
+// ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v
// This file was auto-generated from altera_emif_hw.tcl. If you edit it your changes
// will probably be lost.
@@ -6,7 +6,7 @@
// Generated using ACDS version 18.0 219
`timescale 1 ps / 1 ps
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa (
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa (
output wire amm_ready_0, // ctrl_amm_avalon_slave_0.waitrequest_n
input wire amm_read_0, // .read
input wire amm_write_0, // .write
@@ -54,7 +54,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa (
wire [31:0] arch_cal_master_avalon_master_writedata; // arch:cal_master_write_data -> cal_slave_component:avl_writedata
wire arch_cal_master_avalon_master_burstcount; // arch:cal_master_burstcount -> cal_slave_component:avl_burstcount
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i #(
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i #(
.PROTOCOL_ENUM ("PROTOCOL_DDR4"),
.PHY_TARGET_IS_ES (0),
.PHY_TARGET_IS_ES2 (0),
@@ -1840,7 +1840,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa (
.amm_readdatavalid_1 () // (terminated),
);
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq cal_slave_component (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq cal_slave_component (
.avl_waitrequest (arch_cal_master_avalon_master_waitrequest), // output, width = 1, avl.waitrequest
.avl_readdata (arch_cal_master_avalon_master_readdata), // output, width = 32, .readdata
.avl_readdatavalid (arch_cal_master_avalon_master_readdatavalid), // output, width = 1, .readdatavalid
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd
index 7d03e2ee706ba2f5a6831520dae39b6c0a22f16b..21033b94a3ac26faabf022b164a2c1b8d0532e05 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd
@@ -2,7 +2,7 @@ library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
-entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i is
+entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i is
generic (
PROTOCOL_ENUM : string := "";
PHY_TARGET_IS_ES : boolean := false;
@@ -1789,10 +1789,10 @@ entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i is
dft_core_clk_buf_out : out std_logic_vector(1 downto 0);
dft_core_clk_locked : out std_logic_vector(1 downto 0)
);
-end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i;
+end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i;
-architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i is
- component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top is
+architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top is
generic (
PROTOCOL_ENUM : string := "";
PHY_TARGET_IS_ES : boolean := false;
@@ -3582,10 +3582,10 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i
dft_core_clk_buf_out : out std_logic_vector(1 downto 0);
dft_core_clk_locked : out std_logic_vector(1 downto 0)
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top;
begin
- arch_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top
+ arch_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top
generic map (
PROTOCOL_ENUM => PROTOCOL_ENUM,
PHY_TARGET_IS_ES => PHY_TARGET_IS_ES,
@@ -5092,9 +5092,9 @@ begin
PLL_C_CNT_PHASE_PS_STR_8 => PLL_C_CNT_PHASE_PS_STR_8,
PLL_C_CNT_DUTY_CYCLE_8 => PLL_C_CNT_DUTY_CYCLE_8,
PLL_C_CNT_OUT_EN_8 => PLL_C_CNT_OUT_EN_8,
- SEQ_SYNTH_PARAMS_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex",
- SEQ_SIM_PARAMS_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex",
- SEQ_CODE_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"
+ SEQ_SYNTH_PARAMS_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex",
+ SEQ_SIM_PARAMS_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex",
+ SEQ_CODE_HEX_FILENAME => "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
)
port map (
global_reset_n => global_reset_n,
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
index 967ccc83a94f3202a038f10b8cabccb6dba91162..ba4c6f793c4c31cd7cde88886e7fa09ce973a5bb 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
@@ -12,7 +12,7 @@
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux #(
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux #(
// Device parameters
parameter SILICON_REV = "",
parameter IS_HPS = 0,
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
index 1dad4789f065ab494ec6f113b6f28e888bb8d266..d1ff38f7ecc42ca013c342ea43f36064c529f7e3 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
@@ -16,7 +16,7 @@
// Top-level wrapper of 20nm hardened EMIF component.
//
///////////////////////////////////////////////////////////////////////////////
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top #(
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top #(
// Interface properties
parameter PROTOCOL_ENUM = "",
@@ -2638,7 +2638,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top #(
////////////////////////////////////////////////////////////////////////////
// I/O Aux
////////////////////////////////////////////////////////////////////////////
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux # (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux # (
.SILICON_REV (SILICON_REV),
.IS_HPS (IS_HPS),
.SEQ_CODE_HEX_FILENAME (SEQ_CODE_HEX_FILENAME),
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sdc b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sdc
index 512463930e247bd793c689bf1a5bd609ad04f290..d03f67dff3a1b1c4dbb331c519dceebbef3838e2 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sdc
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sdc
@@ -30,9 +30,9 @@
# ------------------------------------------- #
set script_dir [file dirname [info script]]
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ip_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl"
#--------------------------------------------#
# - - #
@@ -73,7 +73,7 @@ set debug 0
set_time_format -unit ns -decimal_places 3
# Determine if entity names are on
-set entity_names_on [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_are_entity_names_on ]
+set entity_names_on [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_are_entity_names_on ]
# ---------------------- #
# - - #
@@ -84,24 +84,24 @@ set entity_names_on [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt
# PLL multiplier to mem clk
regexp {([0-9\.]+) ps} $var(PLL_REF_CLK_FREQ_PS_STR) match var(PHY_REF_CLK_FREQ_PS)
regexp {([0-9\.]+) ps} $var(PLL_VCO_FREQ_PS_STR) match var(PHY_VCO_FREQ_PS)
-set pll_multiplier [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr $var(PHY_MEM_CLK_FREQ_MHZ)/$var(PHY_REF_CLK_FREQ_MHZ)] ]
+set pll_multiplier [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr $var(PHY_MEM_CLK_FREQ_MHZ)/$var(PHY_REF_CLK_FREQ_MHZ)] ]
set vco_multiplier [expr int($var(PHY_REF_CLK_FREQ_PS)/$var(PHY_VCO_FREQ_PS))]
# Half of memory clock cycle
-set half_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr $var(UI) / 2.0 ] ]
+set half_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr $var(UI) / 2.0 ] ]
# Half of reference clock
-set ref_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr $var(PHY_REF_CLK_FREQ_PS)/1000.0] ]
-set ref_half_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr $ref_period / 2.0 ] ]
+set ref_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr $var(PHY_REF_CLK_FREQ_PS)/1000.0] ]
+set ref_half_period [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr $ref_period / 2.0 ] ]
# Other clock periods
-set tCK_AFI [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(USER_CLK_RATIO) ] ]
-set tCK_C2P_P2C [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(C2P_P2C_CLK_RATIO) ] ]
-set tCK_PHY [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(PHY_HMC_CLK_RATIO) ] ]
+set tCK_AFI [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(USER_CLK_RATIO) ] ]
+set tCK_C2P_P2C [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(C2P_P2C_CLK_RATIO) ] ]
+set tCK_PHY [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr 1000.0/$var(PHY_MEM_CLK_FREQ_MHZ)*$var(PHY_HMC_CLK_RATIO) ] ]
# Asymmetric uncertainties on address and command paths
-set ac_min_delay [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr - $var(tIH) + $var(CA_TO_CK_BD_PKG_SKEW) ]]
-set ac_max_delay [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [ expr $var(tIS) + $var(CA_TO_CK_BD_PKG_SKEW) ]]
+set ac_min_delay [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr - $var(tIH) + $var(CA_TO_CK_BD_PKG_SKEW) ]]
+set ac_max_delay [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [ expr $var(tIS) + $var(CA_TO_CK_BD_PKG_SKEW) ]]
# ---------------------- #
# - - #
@@ -119,9 +119,9 @@ set ac_max_delay [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_
# - - #
# -------------------------------------------------------------------- #
-if { ! [ info exists ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sdc_cache ] } {
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_initialize_ddr_db ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ddr_db var
- set ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sdc_cache 1
+if { ! [ info exists ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sdc_cache ] } {
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_initialize_ddr_db ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ddr_db var
+ set ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sdc_cache 1
} else {
if { $debug } {
post_message -type info "SDC: reusing cached DDR DB"
@@ -136,12 +136,12 @@ if { ! [ info exists ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4
# - - #
# ------------------------------------------------------------- #
-set instances [ array names ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ddr_db ]
+set instances [ array names ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ddr_db ]
foreach { inst } $instances {
if { [ info exists pins ] } {
unset pins
}
- array set pins $ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ddr_db($inst)
+ array set pins $ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ddr_db($inst)
# ----------------------- #
# - - #
@@ -150,12 +150,12 @@ foreach { inst } $instances {
# ----------------------- #
# First determine if a reference clock has already been created (i.e. Reference clock sharing)
- set ref_clock_exists [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_does_ref_clk_exist $pins(pll_ref_clock) ]
+ set ref_clock_exists [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_does_ref_clk_exist $pins(pll_ref_clock) ]
if { $ref_clock_exists == 0 } {
# This is the reference clock used by the PLL to derive any other clock in the core
create_clock -period $ref_period -waveform [ list 0 $ref_half_period ] $pins(pll_ref_clock) -add -name ${inst}_ref_clock
}
- set pins(ref_clock_name) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name_from_pin_name $pins(pll_ref_clock)]
+ set pins(ref_clock_name) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_name_from_pin_name $pins(pll_ref_clock)]
# ------------------ #
# - - #
@@ -183,7 +183,7 @@ foreach { inst } $instances {
}
}
- set local_pll_vco_clk_${i_vco_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_pll_vco_clk_${i_vco_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $vco_clock \
-name "${inst}_vco_clk${suffix}" \
-source $pins(pll_ref_clock) \
@@ -212,7 +212,7 @@ foreach { inst } $instances {
# and there's no transfers within core fabric to analyze
if {! $var(IS_HPS)} {
- set local_pll_master_vco_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_pll_master_vco_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $pins(master_vco_clock) \
-name "${pins(master_instname)}_vco_clk" \
-source $pins(pll_ref_clock) \
@@ -229,7 +229,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(USER_CLK_RATIO)}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_usr_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usr_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -250,7 +250,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(USER_CLK_RATIO)}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_usr_clock_sec [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usr_clock_sec [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock_sec \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock_sec) \
@@ -271,7 +271,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(USER_CLK_RATIO) * 2}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_usr_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usr_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -292,7 +292,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(USER_CLK_RATIO) * 2}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_usr_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usr_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock_sec \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock_sec) \
@@ -317,7 +317,7 @@ foreach { inst } $instances {
}
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_afi_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_afi_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -342,7 +342,7 @@ foreach { inst } $instances {
}
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_afi_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_afi_half_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -362,7 +362,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(USER_CLK_RATIO)}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_core_dft_cpa_1_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_dft_cpa_1_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -385,7 +385,7 @@ foreach { inst } $instances {
set phase [expr { [lindex $var(PLL_C_CNT_PHASE_PS_STR_4) 0] * 360.0 / $var(PHY_VCO_FREQ_PS) / $var(pll_c4_cnt) } ]
set duty_cyc $var(PLL_C_CNT_DUTY_CYCLE_4)
- set local_cal_master_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_cal_master_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -410,7 +410,7 @@ foreach { inst } $instances {
set phase [expr { [lindex $var(PLL_C_CNT_PHASE_PS_STR_3) 0] * 360.0 / $var(PHY_VCO_FREQ_PS) / $var(pll_c3_cnt) } ]
set duty_cyc $var(PLL_C_CNT_DUTY_CYCLE_3)
- set local_cal_slave_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_cal_slave_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -427,7 +427,7 @@ foreach { inst } $instances {
# User-mode OCT Clock Constraint
set local_core_usermode_oct_clock ""
if {$pins(usermode_oct_clock) != ""} {
- set local_core_usermode_oct_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usermode_oct_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $pins(usermode_oct_clock) \
-name "${inst}_oct_clock" \
-source $pins(pll_ref_clock) \
@@ -441,7 +441,7 @@ foreach { inst } $instances {
}
if {$pins(usermode_oct_gated_clock) != ""} {
- set local_core_usermode_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usermode_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $pins(usermode_oct_gated_clock) \
-name "${inst}_oct_gated_clock" \
-source $pins(usermode_oct_clock) \
@@ -479,7 +479,7 @@ foreach { inst } $instances {
set phase [expr { [lindex $var(PLL_C_CNT_PHASE_PS_STR_${i_clk_cnt_num}) 0] * 360.0 / $var(PHY_VCO_FREQ_PS) / $var(pll_c${i_clk_cnt_num}_cnt) } ]
set duty_cyc $var(PLL_C_CNT_DUTY_CYCLE_${i_clk_cnt_num})
- set local_pll_extra_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_pll_extra_clock [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $master_core_clock \
-name "${pins(master_instname)}_${name}" \
-source $pins(master_vco_clock) \
@@ -493,7 +493,7 @@ foreach { inst } $instances {
# User-mode OCT Clock Constraint
set local_core_usermode_oct_clock ""
if {$pins(usermode_oct_clock) != ""} {
- set local_core_usermode_oct_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usermode_oct_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $pins(usermode_oct_clock) \
-name "${inst}_oct_clock" \
-source "$pins(usermode_oct_clock)|clk" \
@@ -507,7 +507,7 @@ foreach { inst } $instances {
}
if {$pins(usermode_oct_gated_clock) != ""} {
- set local_core_usermode_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_core_usermode_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $pins(usermode_oct_gated_clock) \
-name "${inst}_oct_gated_clock" \
-source $pins(usermode_oct_clock) \
@@ -534,7 +534,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(PHY_HMC_CLK_RATIO)}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_phy_clk_${i_phy_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_phy_clk_${i_phy_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $phy_clock \
-name "${inst}_phy_clk_${i_phy_clock}" \
-source [lindex $pins(pll_vco_clock) $i_phy_clock] \
@@ -550,7 +550,7 @@ foreach { inst } $instances {
set divide_by [expr {$var(PLL_VCO_TO_MEM_CLK_FREQ_RATIO) * $var(C2P_P2C_CLK_RATIO)}]
set phase [expr {$var(PLL_PHY_CLK_VCO_PHASE) * 45.0 / $divide_by}]
- set local_phy_clk_l_${i_phy_clock_l} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_phy_clk_l_${i_phy_clock_l} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target $phy_clock_l \
-name "${inst}_phy_clk_l_${i_phy_clock_l}" \
-source [lindex $pins(pll_vco_clock) $i_phy_clock_l] \
@@ -571,11 +571,11 @@ foreach { inst } $instances {
set i_wf_clock 0
foreach_in_collection wf_clock $write_fifo_clk {
- set vco_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_vco_clk_id $wf_clock var]
+ set vco_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_vco_clk_id $wf_clock var]
if {$vco_clock_id == -1} {
post_message -type critical_warning "Failed to find VCO clock"
} else {
- set local_wf_clk_${i_wf_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock \
+ set local_wf_clk_${i_wf_clock} [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock \
-target [get_node_info -name $wf_clock] \
-name "${inst}_wf_clk_${i_wf_clock}" \
-source [get_node_info -name $vco_clock_id] \
@@ -842,15 +842,15 @@ foreach { inst } $instances {
#################################
# Get P2C / C2P Multi-tile clock uncertainty
- set p2c_c2p_multi_tile_clock_uncertainty [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_clock_uncertainty $inst var]
+ set p2c_c2p_multi_tile_clock_uncertainty [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_p2c_c2p_clock_uncertainty $inst var]
# Get extra periphery clock uncertainty
set periphery_clock_uncertainty [list]
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_clock_uncertainty periphery_clock_uncertainty var
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_periphery_clock_uncertainty periphery_clock_uncertainty var
# Get Fitter overconstraints
if {$fit_flow == 1} {
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_overconstraints periphery_overconstraints_st periphery_overconstraints_mt var
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_periphery_overconstraints periphery_overconstraints_st periphery_overconstraints_mt var
} else {
set periphery_overconstraints_st [list 0.0 0.0 0.0 0.0]
set periphery_overconstraints_mt [list 0.0 0.0 0.0 0.0]
@@ -920,11 +920,11 @@ foreach { inst } $instances {
# Get extra core clock uncertainty
set core_clock_uncertainty [list]
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_clock_uncertainty core_clock_uncertainty var
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_clock_uncertainty core_clock_uncertainty var
# Get Fitter overconstraints
if {$fit_flow == 1} {
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_overconstraints core_overconstraints var
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_overconstraints core_overconstraints var
} else {
set core_overconstraints [list 0.0 0.0 0.0 0.0]
}
@@ -979,5 +979,5 @@ foreach { inst } $instances {
# - - #
# -------------------------- #
-add_ddr_report_command "source [list [file join [file dirname [info script]] ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename}_report_timing.tcl]]"
+add_ddr_report_command "source [list [file join [file dirname [info script]] ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename}_report_timing.tcl]]"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv
index 8c0c6908458c7929c67b32251623768849817b7a..ab316b7896abdc332e591eaa2c778608d8b8bd17 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv
@@ -1,4 +1,4 @@
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i #(
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i #(
parameter PROTOCOL_ENUM = "",
parameter PHY_TARGET_IS_ES = 0,
parameter PHY_TARGET_IS_ES2 = 0,
@@ -1786,7 +1786,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i #(
timeunit 1ns;
timeprecision 1ps;
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top # (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top # (
.PROTOCOL_ENUM (PROTOCOL_ENUM),
.PHY_TARGET_IS_ES (PHY_TARGET_IS_ES),
.PHY_TARGET_IS_ES2 (PHY_TARGET_IS_ES2),
@@ -3292,9 +3292,9 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i #(
.PLL_C_CNT_PHASE_PS_STR_8 (PLL_C_CNT_PHASE_PS_STR_8),
.PLL_C_CNT_DUTY_CYCLE_8 (PLL_C_CNT_DUTY_CYCLE_8),
.PLL_C_CNT_OUT_EN_8 (PLL_C_CNT_OUT_EN_8),
- .SEQ_SYNTH_PARAMS_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"),
- .SEQ_SIM_PARAMS_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"),
- .SEQ_CODE_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex")
+ .SEQ_SYNTH_PARAMS_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"),
+ .SEQ_SIM_PARAMS_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"),
+ .SEQ_CODE_HEX_FILENAME ("ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex")
) arch_inst (
.global_reset_n (global_reset_n),
.pll_ref_clk (pll_ref_clk),
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
index 967ccc83a94f3202a038f10b8cabccb6dba91162..ba4c6f793c4c31cd7cde88886e7fa09ce973a5bb 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv
@@ -12,7 +12,7 @@
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux #(
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux #(
// Device parameters
parameter SILICON_REV = "",
parameter IS_HPS = 0,
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl
index e085b35ece0f95e432d406febc3c1c24ef00b4bf..1d3770968b1dd456798d37e246adfa3fee036aef 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl
@@ -27,7 +27,7 @@ package require ::quartus::emif_timing_model
package require ::quartus::clock_uncertainty
-set ::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i
+set ::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i
set var(PROTOCOL) DDR4
set var(NUM_RANKS) 2
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl
index 8434daacac93a990c19c51070e2c019008ea16f8..a2635a8b8d0f8ee796a0e3b71bf82a1996938e07 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl
@@ -12,11 +12,11 @@
set script_dir [file dirname [info script]]
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_utils.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl"
load_package sdc_ext
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins { instname allpins var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_ddr_pins { instname allpins var_array_name} {
# We need to make a local copy of the allpins associative array
upvar allpins pins
upvar 1 $var_array_name var
@@ -47,7 +47,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
foreach_in_collection c $pins(pll_c0_periph_clock_id) {
lappend pins(pll_c0_periph_clock) [regsub -all {\\} [get_node_info -name $c] {\\\\}]
}
- set pins(pll_c0_periph_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_duplicate_names $pins(pll_c0_periph_clock)]
+ set pins(pll_c0_periph_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_duplicate_names $pins(pll_c0_periph_clock)]
# C1 output in the periphery
set pins(pll_c1_periph_clock) [list]
@@ -55,7 +55,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
foreach_in_collection c $pins(pll_c1_periph_clock_id) {
lappend pins(pll_c1_periph_clock) [regsub -all {\\} [get_node_info -name $c] {\\\\}]
}
- set pins(pll_c1_periph_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_duplicate_names $pins(pll_c1_periph_clock)]
+ set pins(pll_c1_periph_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_duplicate_names $pins(pll_c1_periph_clock)]
# VCO clock (used for the system clock)
set pins(vco_clock) [list]
@@ -63,7 +63,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
foreach_in_collection c $pins(vco_clock_id) {
lappend pins(vco_clock) [regsub -all {\\} [get_node_info -name $c] {\\\\}]
}
- set pins(vco_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_duplicate_names $pins(vco_clock)]
+ set pins(vco_clock) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_duplicate_names $pins(vco_clock)]
set pins(pll_vco_clock) $pins(vco_clock)
set pins(pll_phy_clock) $pins(pll_c1_periph_clock)
set pins(pll_phy_clock_l) $pins(pll_c0_periph_clock)
@@ -111,23 +111,23 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
}
set core_reset_sync_clock "_UNDEFINED_PIN_"
- set core_reset_sync_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_output_clock_id $sync_reset_reg "Usr clock" msg_list var]
+ set core_reset_sync_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_output_clock_id $sync_reset_reg "Usr clock" msg_list var]
if {$core_reset_sync_clock_id == -1} {
foreach {msg_type msg} $msg_list {
- post_message -type $msg_type "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: $msg"
+ post_message -type $msg_type "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: $msg"
}
- post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: Failed to find clock source for register $sync_reset_reg"
+ post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: Failed to find clock source for register $sync_reset_reg"
if {$var(PHY_CORE_CLKS_SHARING_ENUM) == "CORE_CLKS_SHARING_SLAVE"} {
- post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: This is a clock sharing SLAVE interface. Please ensure that the clks_sharing_master_out port of the master is connected to the clks_sharing_master_in port of the slave(s)."
+ post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: This is a clock sharing SLAVE interface. Please ensure that the clks_sharing_master_out port of the master is connected to the clks_sharing_master_in port of the slave(s)."
if {$cpa_idx > 0} {
- post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: This clock sharing slave interface uses a Ping-Pong PHY and has extra clock/reset requirements. Please ensure that the master interface is also a ping-pong interface. A ping-pong interface can act as clock sharing master for both ping-pong and non-ping-pong interfaces."
+ post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: This clock sharing slave interface uses a Ping-Pong PHY and has extra clock/reset requirements. Please ensure that the master interface is also a ping-pong interface. A ping-pong interface can act as clock sharing master for both ping-pong and non-ping-pong interfaces."
}
} else {
- post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: Please ensure that the register has not been removed or optimized away."
+ post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: Please ensure that the register has not been removed or optimized away."
}
} else {
- set core_reset_sync_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock_name $core_reset_sync_clock_id]
+ set core_reset_sync_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_pll_clock_name $core_reset_sync_clock_id]
}
if {[regexp {(^.*)\|arch\|arch_inst\|io_tiles_wrap_inst\|io_tiles_inst\|tile_gen\[([0-9])\].tile_ctrl_inst(.*)\|pa_core_clk_out\[[0-9]\]$} $core_reset_sync_clock matched pins(master_instname) tilegen_num tile_instnum] == 1} {
@@ -157,7 +157,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
if { $::TimeQuestInfo(nameofexecutable) == "quartus_map" || $::TimeQuestInfo(nameofexecutable) == "quartus_syn"} {
set vco_clock_name "_UNDEFINED_PIN_"
} else {
- set vco_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_vco_clk_id $core_reset_sync_clock_id var]
+ set vco_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_vco_clk_id $core_reset_sync_clock_id var]
set vco_clock_name [get_net_info -name [get_pin_info -net $vco_clock_id]]
}
if {$cpa_idx == 0} {
@@ -167,7 +167,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
}
} else {
- post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: Failed to find CPA outputs."
+ post_message -type error "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: Failed to find CPA outputs."
}
}
@@ -177,10 +177,10 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
set pll_master_user_clock_base [string range $pins(master_vco_clock) 0 [string last "|" $pins(master_vco_clock)] ]pll_inst|outclk
- set var(pll_c3_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_3) $var(PLL_C_CNT_LOW_3) $var(PLL_C_CNT_BYPASS_EN_3)]
+ set var(pll_c3_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_3) $var(PLL_C_CNT_LOW_3) $var(PLL_C_CNT_BYPASS_EN_3)]
set pins(master_cal_slave_clk) "$pll_master_user_clock_base\[3\]"
- set var(pll_c4_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_4) $var(PLL_C_CNT_LOW_4) $var(PLL_C_CNT_BYPASS_EN_4)]
+ set var(pll_c4_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_4) $var(PLL_C_CNT_LOW_4) $var(PLL_C_CNT_BYPASS_EN_4)]
set pins(master_cal_master_clk) "$pll_master_user_clock_base\[4\]"
}
@@ -209,9 +209,9 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
# 2.5 Find the reference clock input of the PLL
set pins(pll_cascade_in_id) [get_pins -compatibility_mode $pins(master_instname)|arch|arch_inst|pll_inst|pll_inst|pll_cascade_in]
- set pll_ref_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_input_clk_id $pins(pll_cascade_in_id) var]
+ set pll_ref_clock_id [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_input_clk_id $pins(pll_cascade_in_id) var]
if {$pll_ref_clock_id == -1} {
- post_message -type critical_warning "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl: Failed to find PLL reference clock"
+ post_message -type critical_warning "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl: Failed to find PLL reference clock"
} else {
set pll_ref_clock [get_node_info -name $pll_ref_clock_id]
}
@@ -255,9 +255,9 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
foreach {pin_type pattern} $patterns {
if {[string match "*|o" $pattern]} {
- set local_pins [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_names_in_collection [ get_fanouts $pattern ] ]
+ set local_pins [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_names_in_collection [ get_fanouts $pattern ] ]
} else {
- set local_pins [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_names_in_collection [ get_fanins $pattern ] ]
+ set local_pins [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_names_in_collection [ get_fanins $pattern ] ]
}
if {[llength $local_pins] == 0} {
@@ -284,35 +284,35 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins {
for {set i 0} {$i < $var(PLL_NUM_OF_EXTRA_CLKS)} {incr i} {
set i_cnt_num [expr $i + $var(pll_num_of_reserved_cnts)]
- set var(pll_c${i_cnt_num}_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_${i_cnt_num}) $var(PLL_C_CNT_LOW_${i_cnt_num}) $var(PLL_C_CNT_BYPASS_EN_${i_cnt_num})]
+ set var(pll_c${i_cnt_num}_cnt) [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_calculate_counter_value $var(PLL_C_CNT_HIGH_${i_cnt_num}) $var(PLL_C_CNT_LOW_${i_cnt_num}) $var(PLL_C_CNT_BYPASS_EN_${i_cnt_num})]
set pins(pll_extra_clk_${i}) "$pll_master_user_clock_base\[$i_cnt_num\]"
}
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_initialize_ddr_db { ddr_db_par var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_initialize_ddr_db { ddr_db_par var_array_name} {
upvar $ddr_db_par local_ddr_db
upvar 1 $var_array_name var
- global ::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename
+ global ::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename
global ::io_only_analysis
- post_sdc_message info "Initializing DDR database for CORE $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename"
- set instance_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_instance_list $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename]
+ post_sdc_message info "Initializing DDR database for CORE $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename"
+ set instance_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_instance_list $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename]
foreach instname $instance_list {
if {$::io_only_analysis == 0} {
- post_sdc_message info "Finding port-to-pin mapping for CORE: $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename INSTANCE: $instname"
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_ddr_pins $instname allpins var
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_verify_ddr_pins allpins var
+ post_sdc_message info "Finding port-to-pin mapping for CORE: $::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename INSTANCE: $instname"
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_ddr_pins $instname allpins var
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_verify_ddr_pins allpins var
}
set local_ddr_db($instname) [ array get allpins ]
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_verify_ddr_pins { pins_par var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_verify_ddr_pins { pins_par var_array_name} {
upvar 1 $var_array_name var
upvar $pins_par pins
@@ -354,7 +354,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_verify_ddr_pin
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_all_instances_dqs_pins { ddr_db_par } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_all_instances_dqs_pins { ddr_db_par } {
upvar $ddr_db_par local_ddr_db
set dqs_pins [ list ]
@@ -377,7 +377,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_all_instan
return $dqs_pins
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_calculate_counter_value { cnt_hi cnt_lo cnt_bypass } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_calculate_counter_value { cnt_hi cnt_lo cnt_bypass } {
if {$cnt_bypass} {
set result 1
} else {
@@ -386,12 +386,12 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_calculate_coun
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_input_clk_id { pll_inclk_id var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_input_clk_id { pll_inclk_id var_array_name} {
upvar 1 $var_array_name var
array set results_array [list]
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin_up_to_depth $pll_inclk_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_pin clock results_array $var(pll_inclock_search_depth)
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_fanin_up_to_depth $pll_inclk_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_pin clock results_array $var(pll_inclock_search_depth)
if {[array size results_array] == 1} {
set pin_id [lindex [array names results_array] 0]
set result $pin_id
@@ -403,7 +403,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_input_clk_
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_output_clock_id { pin_list pin_type msg_list_name var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_output_clock_id { pin_list pin_type msg_list_name var_array_name} {
upvar 1 $msg_list_name msg_list
upvar 1 $var_array_name var
set output_clock_id -1
@@ -419,11 +419,11 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_output_clo
} else {
lappend msg_list "warning" "Could not find all $pin_type pins"
}
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock $output_id_list $pin_type output_clock_id $var(pll_outclock_search_depth)
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_pll_clock $output_id_list $pin_type output_clock_id $var(pll_outclock_search_depth)
return $output_clock_id
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock { dest_id_list node_type clock_id_name search_depth} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_pll_clock { dest_id_list node_type clock_id_name search_depth} {
if {$clock_id_name != ""} {
upvar 1 $clock_id_name clock_id
}
@@ -431,7 +431,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock
array set clk_array [list]
foreach node_id $dest_id_list {
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin_up_to_depth $node_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_pll_clk clock clk_array $search_depth
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_fanin_up_to_depth $node_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_pll_clk clock clk_array $search_depth
}
if {[array size clk_array] == 1} {
set clock_id [lindex [array names clk_array] 0]
@@ -446,12 +446,12 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock
return $clk
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_vco_clk_id { wf_clock_id var_array_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_vco_clk_id { wf_clock_id var_array_name} {
upvar 1 $var_array_name var
array set results_array [list]
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin_up_to_depth $wf_clock_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_vco clock results_array $var(pll_vcoclock_search_depth)
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_fanin_up_to_depth $wf_clock_id ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_vco clock results_array $var(pll_vcoclock_search_depth)
if {[array size results_array] == 1} {
set pin_id [lindex [array names results_array] 0]
set result $pin_id
@@ -463,7 +463,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_vco_clk_id
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_pll_clk { node_id } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_pll_clk { node_id } {
set cell_id [get_node_info -cell $node_id]
if {$cell_id == ""} {
@@ -493,7 +493,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_p
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_vco { node_id } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_vco { node_id } {
set cell_id [get_node_info -cell $node_id]
if {$cell_id == ""} {
@@ -517,7 +517,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_v
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_does_ref_clk_exist { ref_clk_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_does_ref_clk_exist { ref_clk_name } {
set ref_clock_found 0
foreach_in_collection iclk [get_clocks -nowarn] {
@@ -537,7 +537,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_does_ref_clk_e
return $ref_clock_found
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_clock_uncertainty { instname var_array_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_p2c_c2p_clock_uncertainty { instname var_array_name } {
set success 1
set error_message ""
@@ -551,7 +551,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
set read_atom_netlist_error [regexp "ERROR" $read_atom_netlist_out]
if {$read_atom_netlist_error == 0} {
- if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_are_entity_names_on]} {
+ if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_are_entity_names_on]} {
regsub -all {\|} $instname "|*:" instname
}
regsub -all {\\} $instname {\\\\} instname
@@ -560,7 +560,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
# Find the IOPLLs
if {$success == 1} {
- if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_are_entity_names_on]} {
+ if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_are_entity_names_on]} {
set pll_atoms [get_atom_nodes -matching *${instname}|*:arch|*:arch_inst|*:pll_inst|* -type IOPLL]
} else {
set pll_atoms [get_atom_nodes -matching *${instname}|arch|arch_inst|pll_inst|* -type IOPLL]
@@ -646,7 +646,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
set mcnt [lindex $mcnt_list 0]
set bw [string toupper [lindex $bw_list 0]]
set cp_setting [lindex $cp_setting_list 0]
- set cp_current [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_cp_current_from_setting $cp_setting]
+ set cp_current [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_cp_current_from_setting $cp_setting]
set vco_period [lindex $vco_period_list 0]
if {[regexp {([0-9]+) ps} $vco_period matched vco_period] == 1} {
} else {
@@ -665,7 +665,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
if {$vco_period <= 1667} {
set HFR [get_clock_uncertainty_data NOM NOM NOM PLL OFFSET${mcnt} HFR $bw]
set LFD [get_clock_uncertainty_data NOM NOM NOM PLL OFFSET${mcnt} LFD $bw]
- set SPE [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_spe_from_cp_current $cp_current]
+ set SPE [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_spe_from_cp_current $cp_current]
} elseif {
($vco_period > 3572) ||
@@ -681,7 +681,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
set success 0
} else {
- set clk_uncertainty_params [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_alternate_clock_uncertainty_parameters $mcnt $bw $cp_current $vco_period]
+ set clk_uncertainty_params [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_alternate_clock_uncertainty_parameters $mcnt $bw $cp_current $vco_period]
set HFR [lindex $clk_uncertainty_params 0]
set LFD [lindex $clk_uncertainty_params 1]
set SPE [lindex $clk_uncertainty_params 2]
@@ -689,7 +689,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
if {$success == 1} {
set clock_uncertainty_sqrt [expr sqrt(($LFD/2)*($LFD/2) + ($LFD/2)*($LFD/2))]
- set clock_uncertainty [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr ($clock_uncertainty_sqrt + $SPE)*1e9]]
+ set clock_uncertainty [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr ($clock_uncertainty_sqrt + $SPE)*1e9]]
if {$debug} {
puts "HFR : $HFR"
@@ -718,7 +718,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_p2c_c2p_cl
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_cp_current_from_setting { cp_setting } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_cp_current_from_setting { cp_setting } {
set cp_current 0
@@ -743,7 +743,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_cp_current
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_spe_from_cp_current { cp_current } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_spe_from_cp_current { cp_current } {
set spe 147.0e-12
@@ -766,7 +766,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_spe_from_c
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_odv_reduction_factor {master_pll_location inst phyclk_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_odv_reduction_factor {master_pll_location inst phyclk_name} {
set odv_reduction_factor 0.0
set debug 0
@@ -810,7 +810,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_odv_reduct
return $odv_reduction_factor
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_a10_iopll_workaround_present {} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_a10_iopll_workaround_present {} {
set oscs [get_pins -nowarn -compatibility_mode *ALTERA_INSERTED_OSCILLATOR_FOR_IOPLL\|clkout]
set num_oscs 0
foreach_in_collection o $oscs {
@@ -823,18 +823,18 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_a10_iopll_
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_clock_uncertainty { results_array_name var_array_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_periphery_clock_uncertainty { results_array_name var_array_name } {
upvar 1 $results_array_name results
upvar 1 $var_array_name var
set speed_temp_grade [get_speedgrade_name]
- set c2p_setup [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF SETUP C2P]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
- set c2p_hold [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF HOLD C2P]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
- set p2c_setup [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF SETUP P2C]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
- set p2c_hold [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF HOLD P2C]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
+ set c2p_setup [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF SETUP C2P]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
+ set c2p_hold [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF HOLD C2P]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
+ set p2c_setup [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF SETUP P2C]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
+ set p2c_hold [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp [expr [get_clock_uncertainty_data 900MV $speed_temp_grade EMIF HOLD P2C]*1e9 + ($var(PHY_REF_CLK_JITTER_PS) - 10.0)/1000.0]]
- if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_a10_iopll_workaround_present]} {
+ if {[ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_a10_iopll_workaround_present]} {
set c2p_setup [expr $c2p_setup + 0.004]
set c2p_hold [expr $c2p_hold + 0.004]
set p2c_setup [expr $p2c_setup + 0.004]
@@ -844,7 +844,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_
set results [list $c2p_setup $c2p_hold $p2c_setup $p2c_hold]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_clock_uncertainty { results_array_name var_array_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_clock_uncertainty { results_array_name var_array_name } {
upvar 1 $results_array_name results
upvar 1 $var_array_name var
@@ -856,7 +856,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_clock
set results [list $c2c_same_setup $c2c_same_hold $c2c_diff_setup $c2c_diff_hold]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_overconstraints { results_array_name var_array_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_overconstraints { results_array_name var_array_name } {
upvar 1 $results_array_name results
upvar 1 $var_array_name var
@@ -865,7 +865,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_overc
set results [list $var(C2C_SAME_CLK_SETUP_OC_NS) $var(C2C_SAME_CLK_HOLD_OC_NS) $var(C2C_DIFF_CLK_SETUP_OC_NS) $var(C2C_DIFF_CLK_HOLD_OC_NS)]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_overconstraints { results_st_array_name results_mt_array_name var_array_name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_periphery_overconstraints { results_st_array_name results_mt_array_name var_array_name } {
upvar 1 $results_st_array_name results_st
upvar 1 $results_mt_array_name results_mt
upvar 1 $var_array_name var
@@ -878,7 +878,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_periphery_
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_duplicate_names { names_array } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_duplicate_names { names_array } {
set main_name ""
set duplicate_names [list]
@@ -906,7 +906,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_duplicate
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_alternate_clock_uncertainty_parameters { mcnt bw cp_current vco_period } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_alternate_clock_uncertainty_parameters { mcnt bw cp_current vco_period } {
set success 1
@@ -979,7 +979,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_alternate_
}
}
- set SPE [expr [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_spe_from_cp_current $cp_current] + 25e-12]
+ set SPE [expr [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_spe_from_cp_current $cp_current] + 25e-12]
if {$success == 0} {
set HFR 1000e-12
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_io_timing.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_io_timing.tcl
index 01e6f85fc0279bd9c5e223c4ded79ec1de89031d..24a679b751c0d87b93932b3f29b43a0c043e5d69 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_io_timing.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_io_timing.tcl
@@ -100,16 +100,16 @@ if {$report_not_loaded == 1} {
# Some useful functions
#############################################################
set script_dir [file dirname [info script]]
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ip_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_report_timing_core.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl"
if [ info exists ddr_db ] {
unset ddr_db
}
-ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_initialize_ddr_db ddr_db var
+ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_initialize_ddr_db ddr_db var
# If multiple instances of this core are present in the
@@ -132,9 +132,9 @@ foreach inst $instances {
set fname ""
set fbasename ""
if {[llength $instances] <= 1} {
- set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename}"
+ set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename}"
} else {
- set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename}_${inst_id}"
+ set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename}_${inst_id}"
}
#################################################################################
@@ -147,51 +147,51 @@ foreach inst $instances {
#######################################
# Read Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_capture_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_read_capture_analysis $opcname $inst pins var summary
#######################################
# Write Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_launch_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_launch_analysis $opcname $inst pins var summary
#######################################
# Address/command Analyses
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_ac_analysis $opcname $inst pins var summary
#######################################
# DQS Gating Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_gating_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_dqs_gating_analysis $opcname $inst pins var summary
#######################################
# Write Levelling Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_levelling_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_levelling_analysis $opcname $inst pins var summary
#######################################
# PHY Analyses
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_core_analysis $opcname $inst pins var summary
#######################################
# Print out the Summary Panel for this instance
- set summary [lsort -command ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_proc $summary]
+ set summary [lsort -command ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_proc $summary]
set f -1
set fname "${fbasename}_io_summary.csv"
set f [open $fname w]
- puts $f "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename} - Instance: $inst"
+ puts $f "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename} - Instance: $inst"
puts $f "Path, Setup Margin, Hold Margin"
- post_message -type info "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename} - Instance: $inst"
+ post_message -type info "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename} - Instance: $inst"
post_message -type info " setup hold"
set panel_name "$inst"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -229,10 +229,10 @@ foreach inst $instances {
set offset 53
}
if {$su != "--"} {
- set su [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp $su]
+ set su [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp $su]
}
if {$hold != "--"} {
- set hold [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp $hold]
+ set hold [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp $hold]
}
post_message -type $type [format "%-${offset}s | %6s %6s" $path $su $hold]
puts $f [format "\"%s\",%s,%s" $path $su $hold]
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing.tcl
index 076033dde0dea35f7c719cebce9570b99beef287..2eda1c968c3557ae514424a0a9ef88ef6755889b 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing.tcl
@@ -72,10 +72,10 @@ if { ! [timing_netlist_exist] } {
update_timing_netlist
set script_dir [file dirname [info script]]
- source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ip_parameters.tcl"
- source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_parameters.tcl"
- source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl"
- source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_report_timing_core.tcl"
+ source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl"
+ source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_parameters.tcl"
+ source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl"
+ source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl"
if { ! [timing_netlist_exist] } {
post_message -type error "Timing Netlist has not been created. Run the 'Update Timing Netlist' task first."
return 1
@@ -95,10 +95,10 @@ load_report
# Some useful functions
#############################################################
set script_dir [file dirname [info script]]
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_ip_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_parameters.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_pin_map.tcl"
-source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_report_timing_core.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_parameters.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl"
+source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl"
###############################################
# This is the main call to the netlist traversal routines
@@ -108,7 +108,7 @@ source "$script_dir/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i
if [ info exists ddr_db ] {
unset ddr_db
}
-ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_initialize_ddr_db ddr_db var
+ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_initialize_ddr_db ddr_db var
set old_active_clocks [get_active_clocks]
set_active_clocks [all_clocks]
@@ -133,9 +133,9 @@ foreach inst $instances {
set fname ""
set fbasename ""
if {[llength $instances] <= 1} {
- set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename}"
+ set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename}"
} else {
- set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename}_${inst_id}"
+ set fbasename "${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename}_${inst_id}"
}
#################################################################################
@@ -148,52 +148,52 @@ foreach inst $instances {
#######################################
# Read Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_capture_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_read_capture_analysis $opcname $inst pins var summary
#######################################
# Write Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_launch_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_launch_analysis $opcname $inst pins var summary
#######################################
# Address/command Analyses
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_ac_analysis $opcname $inst pins var summary
#######################################
# DQS Gating Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_gating_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_dqs_gating_analysis $opcname $inst pins var summary
#######################################
# Write Levelling Analysis
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_levelling_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_levelling_analysis $opcname $inst pins var summary
#######################################
# Analyses related to FPGA core
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_analysis $opcname $inst pins var summary
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_core_analysis $opcname $inst pins var summary
#######################################
# Print out the Summary Panel for this instance
- set summary [lsort -command ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_proc $summary]
+ set summary [lsort -command ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_proc $summary]
set f -1
set fname "${fbasename}_summary.csv"
- if { [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_operating_conditions_number] == 0 } {
+ if { [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_operating_conditions_number] == 0 } {
set f [open $fname w]
- puts $f "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename} - Instance: $inst"
+ puts $f "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename} - Instance: $inst"
puts $f "Path, Setup Margin, Hold Margin"
} else {
set f [open $fname a]
}
- post_message -type info "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_corename} - Instance: $inst"
+ post_message -type info "Core: ${::GLOBAL_ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_corename} - Instance: $inst"
post_message -type info " setup hold"
set panel_name "$inst"
set root_folder_name [get_current_timequest_report_folder]
@@ -230,10 +230,10 @@ foreach inst $instances {
incr total_failures
}
if {$su != "--"} {
- set su [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp $su]
+ set su [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp $su]
}
if {$hold != "--"} {
- set hold [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp $hold]
+ set hold [ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp $hold]
}
post_message -type $type [format "%-${offset}s | %6s %6s" $path $su $hold]
puts $f [format "\"%s\",%s,%s" $path $su $hold]
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl
index 86d469a33767798b0a828469fe2df69f03ac5ab7..f2a0bd81b8a9296ac149483ce6fd118253ee00a8 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl
@@ -14,7 +14,7 @@
#############################################################
# Read Timing Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_capture_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_read_capture_analysis {opcname inst pin_array_name var_array_name summary_name} {
set analysis_name "Read Capture"
@@ -38,47 +38,47 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_c
set summary [list]
set var(RD_UI) [expr $var(UI)/2]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_UI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_UI)]]
set var(RD_ISI) $var(RD_ISI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_ISI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_ISI)]]
set var(RD_SSI) $var(RD_SSI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SSI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_SSI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SSI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_SSI)]]
set var(RD_DQSQ) [expr $var(tDQSQ)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_DQSQ]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_DQSQ)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_DQSQ]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_DQSQ)]]
set var(RD_QH) [expr (1-$var(tQH)*2)*$var(tCK)/2]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_QH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_QH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_QH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_QH)]]
set var(RD_MPR) [expr ($var(WITH_MPR) == 1 ? -$var(RD_DQSQ)*$var(MPR_DQSQ)-$var(RD_QH)*$var(MPR_QH) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_MPR)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_MPR)]]
set var(RD_JITTER) $var(RD_JITTER)
set var(RD_JITTER_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(RD_JITTER_SENS_TO_PERIOD)])/1000.0]
if {$var(RD_JITTER_sens) > 0} {
set var(RD_JITTER) [expr $var(RD_JITTER) + $var(RD_JITTER_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_JITTER)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_JITTER)]]
set var(RD_DCD) $var(RD_DCD)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_DCD)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_DCD)]]
set var(RD_SH) $var(RD_SH)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_SH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_SH)]]
set var(RD_EOL) $var(RD_EOL)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_EOL)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_EOL)]]
set var(RD_CAL_UNC) [expr $var(RD_CALIBRATION_LOSS_OTHER)+($var(IS_DLL_ON) == 1 ? 0 : $var(RD_TEMP_CAL_LOSS_WO_DLL))+($var(OCT_RECAL) == 1 ? $var(RD_TEMP_CAL_LOSS_OCT_RECAL) : $var(RD_TEMP_CAL_LOSS_WO_OCT_RECAL))+(([string compare $var(PROTOCOL) "DDR4"] == 0) ? ($var(RDBI) == 1 ? 0 : $var(RD_DBI_EFFECT)) : (([string compare $var(PROTOCOL) "QDRIV"] == 0) ? ($var(RDBI) == 1 ? 0 : $var(RD_DBI_EFFECT)) : 0))+($var(IS_COMPONENT) == 1 ? ($var(TERMINATION_LESS_THAN_120) == 1 ? $var(TERMINATION_LOSS_DEVICE_60) : $var(TERMINATION_LOSS_DEVICE_120)) : ($var(TERMINATION_LESS_THAN_120) == 1 ? $var(TERMINATION_LOSS_DIMM_60) : $var(TERMINATION_LOSS_DIMM_120)))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_CAL_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_CAL_UNC)]]
set var(RD_SK_EFFECT) [expr ($var(BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_RD)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_SK_EFFECT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_SK_EFFECT)]]
set var(RD_MARGIN) [expr $var(RD_UI)-$var(RD_ISI)-$var(RD_SSI)-$var(RD_DQSQ)-$var(RD_QH)-$var(RD_MPR)-$var(RD_JITTER)-$var(RD_DCD)-$var(RD_SH)-$var(RD_EOL)-$var(RD_CAL_UNC)-$var(RD_SK_EFFECT)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(RD_MARGIN)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter RD_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(RD_MARGIN)]]
#######################################
#######################################
@@ -88,7 +88,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_c
set hold_slack [expr $var(RD_MARGIN)/2]
set panel_name "$inst $analysis_name"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -115,14 +115,14 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_read_c
add_row_to_table -id $panel_id $summary_line -fcolors $positive_fcolour
}
- lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $hold_slack]]
+ lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $hold_slack]]
}
#############################################################
# Write Timing Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_launch_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_launch_analysis {opcname inst pin_array_name var_array_name summary_name} {
set analysis_name "Write"
@@ -146,44 +146,44 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
set summary [list]
set var(WR_UI) [expr $var(UI)/2]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_UI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_UI)]]
set var(WR_ISI) $var(WR_ISI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_ISI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_ISI)]]
set var(WR_SSO) $var(WR_SSO)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_SSO)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_SSO)]]
set var(WR_DS) [expr $var(tDS)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DS]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_DS)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DS]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_DS)]]
set var(WR_DH) [expr $var(tDH)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_DH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_DH)]]
set var(WR_MPR) [expr ($var(WITH_MPR) == 1 ? -$var(WR_DS)*$var(MPR_DS) -$var(WR_DH)*$var(MPR_DH) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_MPR)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_MPR)]]
set var(WR_JITTER) $var(WR_JITTER)
set var(WR_JITTER_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(WR_JITTER_SENS_TO_PERIOD)])/1000.0]
if {$var(WR_JITTER_sens) > 0} {
set var(WR_JITTER) [expr $var(WR_JITTER) + $var(WR_JITTER_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_JITTER)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_JITTER)]]
set var(WR_DCD) $var(WR_DCD)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_DCD)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_DCD)]]
set var(WR_EOL) $var(WR_EOL)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_EOL)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_EOL)]]
set var(WR_CAL_UNC) [expr $var(WR_CALIBRATION_LOSS_OTHER)+($var(OCT_RECAL) == 1 ? $var(WR_TEMP_CAL_LOSS_OCT_RECAL) : $var(WR_TEMP_CAL_LOSS_WO_OCT_RECAL))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_CAL_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_CAL_UNC)]]
set var(WR_SK_EFFECT) [expr ($var(BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_WR)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_SK_EFFECT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_SK_EFFECT)]]
set var(WR_MARGIN) [expr $var(WR_UI)-$var(WR_ISI)-$var(WR_SSO)-$var(WR_DS)-$var(WR_DH)-$var(WR_MPR)-$var(WR_JITTER)-$var(WR_DCD)-$var(WR_EOL)-$var(WR_CAL_UNC)-$var(WR_SK_EFFECT)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WR_MARGIN)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WR_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WR_MARGIN)]]
#######################################
#######################################
@@ -192,7 +192,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
set hold_slack [expr $var(WR_MARGIN)/2]
set panel_name "$inst $analysis_name"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -219,13 +219,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
add_row_to_table -id $panel_id $summary_line -fcolors $positive_fcolour
}
- lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $hold_slack]]
+ lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $hold_slack]]
}
#############################################################
# Address/Command Timing Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_ac_analysis {opcname inst pin_array_name var_array_name summary_name} {
set analysis_name "Address/Command"
@@ -250,47 +250,47 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_ana
set summary [list]
set var(AC_UI) [expr (([string compare $var(PROTOCOL) "QDRIV"] == 0) ? $var(UI)/2 : (([string compare $var(PROTOCOL) "LPDDR3"] == 0) ? $var(UI)/2 : $var(UI)))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter AC_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(AC_UI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter AC_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(AC_UI)]]
set var(CA_ISI) $var(CA_ISI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_ISI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_ISI)]]
set var(CA_SSO) $var(CA_SSO)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_SSO)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_SSO)]]
set var(CA_IS) [expr $var(tIS)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_IS]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_IS)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_IS]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_IS)]]
set var(CA_IH) [expr $var(tIH)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_IH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_IH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_IH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_IH)]]
set var(CA_MPR) [expr ($var(WITH_CA_CALIB) == 1 ? ($var(NUM_RANKS) == 1 ? ($var(WITH_MPR) == 1 ? -$var(CA_IS)*$var(MPR_IS) - $var(CA_IH)*$var(MPR_IH) : 0) : 0) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_MPR)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_MPR)]]
set var(CA_JITTER) $var(CA_JITTER)
set var(CA_JITTER_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(CA_JITTER_SENS_TO_PERIOD)])/1000.0]
if {$var(CA_JITTER_sens) > 0} {
set var(CA_JITTER) [expr $var(CA_JITTER) + $var(CA_JITTER_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_JITTER)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_JITTER)]]
set var(CA_DCD) $var(CA_DCD)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_DCD)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_DCD)]]
set var(CA_EOL) $var(CA_EOL)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_EOL)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_EOL)]]
set var(CA_CAL_UNC) [expr ($var(WITH_CA_CALIB) == 1 ? $var(CA_CALIBRATION_LOSS_OTHER)+($var(OCT_RECAL) == 1 ? $var(CA_TEMP_CAL_LOSS_OCT_RECAL_CA_CAL) : $var(CA_TEMP_CAL_LOSS_WO_OCT_RECAL_CA_CAL)) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_CAL_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_CAL_UNC)]]
set var(CA_PVT) [expr ($var(WITH_CA_CALIB) == 1 ? 0 : $var(CA_CALIBRATION_LOSS_OTHER)+($var(OCT_RECAL) == 1 ? $var(CA_TEMP_CAL_LOSS_OCT_RECAL_WO_CA_CAL) : $var(CA_TEMP_CAL_LOSS_WO_OCT_RECAL_WO_CA_CAL)))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_PVT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_PVT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_PVT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_PVT)]]
set var(CA_SK_EFFECT) [expr ($var(WITH_CA_CALIB) == 1 ? ($var(CA_BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_CA) : ($var(CA_BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_CA_WO_CALIB)+$var(CA_BD_PKG_SKEW)+($var(CA_TO_CK_BD_PKG_SKEW) < 0 == 1 ? -2*$var(CA_TO_CK_BD_PKG_SKEW) : 2*$var(CA_TO_CK_BD_PKG_SKEW)))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_SK_EFFECT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_SK_EFFECT)]]
set var(CA_MARGIN) [expr $var(AC_UI)-$var(CA_ISI)-$var(CA_SSO)-$var(CA_IS)-$var(CA_IH)-$var(CA_MPR)-$var(CA_JITTER)-$var(CA_DCD)-$var(CA_EOL)-$var(CA_CAL_UNC)-$var(CA_PVT)-$var(CA_SK_EFFECT)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(CA_MARGIN)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter CA_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(CA_MARGIN)]]
#######################################
@@ -300,7 +300,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_ana
set hold_slack [expr $var(CA_MARGIN)/2]
set panel_name "$inst $analysis_name"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -327,13 +327,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_ac_ana
add_row_to_table -id $panel_id $summary_line -fcolors $positive_fcolour
}
- lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $hold_slack]]
+ lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $hold_slack]]
}
#############################################################
# DQS Gating Timing Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_gating_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_dqs_gating_analysis {opcname inst pin_array_name var_array_name summary_name} {
set analysis_name "DQS Gating"
@@ -363,51 +363,51 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_ga
set summary [list]
set var(DQSG_UI) [expr (([string compare $var(PROTOCOL) "DDR4"] == 0) ? ($var(X4) == 1 ? $var(UI) : 2*$var(UI)) : ((([string compare $var(PROTOCOL) "DDR3"] == 0) ? $var(UI)*0.8 : (([string compare $var(PROTOCOL) "LPDDR3"] == 0) ? $var(UI)*0.8 : $var(UI)))))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_UI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_UI)]]
set var(DQSG_ISI) $var(DQSG_ISI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_ISI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_ISI)]]
set var(DQSG_SSI) $var(DQSG_SSI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SSI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_SSI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SSI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_SSI)]]
set var(DQSG_DQSCK) [expr (([string compare $var(PROTOCOL) "LPDDR3"] == 0) ? $var(tDQSCK) : $var(tDQSCK)*2)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_DQSCK]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_DQSCK)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_DQSCK]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_DQSCK)]]
set var(DQSG_MPR) [expr ($var(WITH_MPR) == 1 ? -$var(DQSG_DQSCK)*$var(MPR_DQSCK) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_MPR)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_MPR)]]
set var(DQSG_JITTER) $var(DQSG_JITTER)
set var(DQSG_JITTER_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(DQSG_JITTER_SENS_TO_PERIOD)])/1000.0]
if {$var(DQSG_JITTER_sens) > 0} {
set var(DQSG_JITTER) [expr $var(DQSG_JITTER) + $var(DQSG_JITTER_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_JITTER)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_JITTER)]]
set var(DQSG_DCD) $var(DQSG_DCD)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_DCD)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_DCD)]]
set var(DQSG_EOL) $var(DQSG_EOL)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_EOL)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_EOL)]]
set var(DQSG_CAL_UNC) $var(DQSG_CAL_UNC)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_CAL_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_CAL_UNC)]]
set var(DQSG_TRK_UNC) $var(DQSG_TRK_UNC)
set var(DQSG_TRK_UNC_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(DQSG_TRKUNC_SENS_TO_PERIOD)])/1000.0]
if {$var(DQSG_TRK_UNC_sens) > 0} {
set var(DQSG_TRK_UNC) [expr $var(DQSG_TRK_UNC) + $var(DQSG_TRK_UNC_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_TRK_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_TRK_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_TRK_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_TRK_UNC)]]
set var(DQSG_SH) $var(DQSG_SH)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_SH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_SH)]]
set var(DQSG_SK_EFFECT) [expr ($var(BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_DQSG)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_SK_EFFECT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_SK_EFFECT)]]
set var(DQSG_MARGIN) [expr $var(DQSG_UI)-$var(DQSG_ISI)-$var(DQSG_SSI)-$var(DQSG_DQSCK)-$var(DQSG_MPR)-$var(DQSG_JITTER)-$var(DQSG_DCD)-$var(DQSG_EOL)-$var(DQSG_CAL_UNC)-$var(DQSG_TRK_UNC)-$var(DQSG_SH)-$var(DQSG_SK_EFFECT)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(DQSG_MARGIN)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter DQSG_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(DQSG_MARGIN)]]
#######################################
@@ -417,7 +417,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_ga
set hold_slack [expr $var(DQSG_MARGIN)/2]
set panel_name "$inst $analysis_name"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -444,13 +444,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_dqs_ga
add_row_to_table -id $panel_id $summary_line -fcolors $positive_fcolour
}
- lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $hold_slack]]
+ lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $hold_slack]]
}
#############################################################
# Write Levelling Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_levelling_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_write_levelling_analysis {opcname inst pin_array_name var_array_name summary_name} {
#######################################
# Need access to global variables
@@ -484,47 +484,47 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
set summary [list]
set var(WL_UI) [expr $var(UI)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_UI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_UI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_UI)]]
set var(WL_ISI) $var(WL_ISI)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_ISI)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_ISI]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_ISI)]]
set var(WL_SSO) $var(WL_SSO)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_SSO)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SSO]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_SSO)]]
set var(WL_MEM) [expr $var(tCK)*(1-2*[min [expr $var(tDQSS)] [expr (1-$var(tDSS)-$var(tDSH))/2]])]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MEM]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_MEM)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MEM]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_MEM)]]
set var(WL_MPR) [expr ($var(WITH_WL_CALIB) == 1 ? ($var(WITH_MPR) == 1 ? -$var(WL_MEM)*$var(MPR_DQSS) : 0) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_MPR)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MPR]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_MPR)]]
set var(WL_SH) [expr ($var(WITH_WL_M_CALIB) == 1 ? (1-$var(MPR_WLS))*$var(tWLS) + (1-$var(MPR_WLH))*$var(tWLH) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_SH)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SH]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_SH)]]
set var(WL_JITTER) $var(WL_JITTER)
set var(WL_JITTER_sens) [expr ([expr (($var(UI))*1000.0-$var(EXTRACTED_PERIOD))*$var(WL_JITTER_SENS_TO_PERIOD)])/1000.0]
if {$var(WL_JITTER_sens) > 0} {
set var(WL_JITTER) [expr $var(WL_JITTER) + $var(WL_JITTER_sens)]
}
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_JITTER)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_JITTER]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_JITTER)]]
set var(WL_DCD) $var(WL_DCD)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_DCD)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_DCD]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_DCD)]]
set var(WL_EOL) $var(WL_EOL)
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_EOL)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_EOL]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_EOL)]]
set var(WL_CAL_UNC) [expr ($var(WITH_WL_CALIB) == 1 ? $var(WL_CALIBRATION_LOSS_OTHER)+($var(OCT_RECAL) == 1 ? $var(WL_TEMP_CAL_LOSS_OCT_RECAL) : $var(WL_TEMP_CAL_LOSS_WO_OCT_RECAL)) : 0)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_CAL_UNC)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_CAL_UNC]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_CAL_UNC)]]
set var(WL_PVT) [expr ($var(WITH_WL_CALIB) == 1 ? 0 : $var(WL_CALIBRATION_LOSS_OTHER)+($var(OCT_RECAL) == 1 ? $var(WL_TEMP_CAL_LOSS_OCT_RECAL_WO_WL_CAL) : $var(WL_TEMP_CAL_LOSS_WO_OCT_RECAL_WO_WL_CAL)))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_PVT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_PVT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_PVT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_PVT)]]
set var(WL_SK_EFFECT) [expr ($var(WITH_WL_CALIB) == 1 ? ($var(BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_WL) : ($var(BD_PKG_SKEW)-$var(DEFAULT_BD_PKG_SKEW))*$var(BD_SK_SENS_WL_WO_CALIB)+$var(DQS_TO_CK_BOARD_SKEW)+$var(DQS_BOARD_SKEW))]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_SK_EFFECT)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_SK_EFFECT]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_SK_EFFECT)]]
set var(WL_MARGIN) [expr $var(WL_UI)-$var(WL_ISI)-$var(WL_SSO)-$var(WL_MEM)-$var(WL_MPR)-$var(WL_SH)-$var(WL_JITTER)-$var(WL_DCD)-$var(WL_EOL)-$var(WL_CAL_UNC)-$var(WL_PVT)-$var(WL_SK_EFFECT)]
- lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $var(WL_MARGIN)]]
+ lappend summary [list " [emiftcl_get_parameter_user_string -parameter WL_MARGIN]" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $var(WL_MARGIN)]]
#######################################
@@ -534,7 +534,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
set hold_slack [expr $var(WL_MARGIN)/2]
set panel_name "$inst $analysis_name"
- set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder]
+ set root_folder_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder]
if { ! [string match "${root_folder_name}*" $panel_name] } {
set panel_name "${root_folder_name}||$panel_name"
@@ -561,13 +561,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_write_
add_row_to_table -id $panel_id $summary_line -fcolors $positive_fcolour
}
- lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp $hold_slack]]
+ lappend global_summary [list $opcname 0 "$analysis_name ($opcname)" [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $setup_slack] [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp $hold_slack]]
}
################################################################
# Helper function to add a report_timing-based analysis section
################################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_timing_analysis {opcname inst var_array_name summary_name title from_clks to_clks from_nodes to_nodes } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_report_timing_analysis {opcname inst var_array_name summary_name title from_clks to_clks from_nodes to_nodes } {
#######################################
# Need access to global variables
@@ -610,7 +610,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_tim
# Other Core-Logic related Timing Analysis
#############################################################
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_c2p_p2c_report_timing_analysis {opcname inst pin_array_name var_array_name summary_name title from_clks to_clks from_nodes to_nodes p2c} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_c2p_p2c_report_timing_analysis {opcname inst pin_array_name var_array_name summary_name title from_clks to_clks from_nodes to_nodes p2c} {
#######################################
# Need access to global variables
@@ -672,7 +672,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_c2p_p2c_re
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_analysis {opcname inst pin_array_name var_array_name summary_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_perform_core_analysis {opcname inst pin_array_name var_array_name summary_name} {
#######################################
# Need access to global variables
@@ -705,7 +705,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_a
} else {
set master_instname $pins(master_instname)
- set coreclkname [list ${master_instname}_core_usr_* ${master_instname}_core_afi_* ${master_instname}_core_dft_* ${master_instname}_ref_clock ${master_instname}_core_nios_clk ${inst}_oct_clock ${inst}_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name_from_pin_name $pins(pll_ref_clock)]]
+ set coreclkname [list ${master_instname}_core_usr_* ${master_instname}_core_afi_* ${master_instname}_core_dft_* ${master_instname}_ref_clock ${master_instname}_core_nios_clk ${inst}_oct_clock ${inst}_oct_gated_clock [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_name_from_pin_name $pins(pll_ref_clock)]]
set coreclks [get_clocks -nowarn $coreclkname]
set phyclkname [list ${inst}_phy_*]
@@ -722,14 +722,14 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_a
# Core/periphery transfers
# Core-to-periphery
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_c2p_p2c_report_timing_analysis $opcname $inst $pin_array_name var global_summary "Core To Periphery" $coreclks $phyclks "*" $emif_regs 0]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_c2p_p2c_report_timing_analysis $opcname $inst $pin_array_name var global_summary "Core To Periphery" $coreclks $phyclks "*" $emif_regs 0]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
set removal_margin [min $removal_margin [lindex $res 3]]
# Periphery-to-core
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_c2p_p2c_report_timing_analysis $opcname $inst $pin_array_name var global_summary "Periphery To Core" $phyclks $coreclks $emif_regs "*" 1]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_c2p_p2c_report_timing_analysis $opcname $inst $pin_array_name var global_summary "Periphery To Core" $phyclks $coreclks $emif_regs "*" 1]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
@@ -740,21 +740,21 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_a
set_active_clocks [remove_from_collection [all_clocks] $phyclks]
# EMIF logic within FPGA core
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "Within Core" $coreclks $coreclks $emif_regs $emif_regs]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "Within Core" $coreclks $coreclks $emif_regs $emif_regs]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
set removal_margin [min $removal_margin [lindex $res 3]]
# Transfers between EMIF and user logic
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "IP to User Logic" "*" "*" $emif_regs $rest_regs]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "IP to User Logic" "*" "*" $emif_regs $rest_regs]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
set removal_margin [min $removal_margin [lindex $res 3]]
# Transfers between user and EMIF logic
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "User Logic to IP" "*" "*" $rest_regs $emif_regs]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "User Logic to IP" "*" "*" $rest_regs $emif_regs]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
@@ -762,7 +762,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_perform_core_a
# Transfers within non-EMIF logic (not reported by default since they are irrelevant to EMIF IP)
if {$var(DIAG_TIMING_REGTEST_MODE)} {
- set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "Within User Logic" $coreclks $coreclks $rest_regs $rest_regs]
+ set res [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_add_report_timing_analysis $opcname $inst var global_summary "Within User Logic" $coreclks $coreclks $rest_regs $rest_regs]
set setup_margin [min $setup_margin [lindex $res 0]]
set hold_margin [min $hold_margin [lindex $res 1]]
set recovery_margin [min $recovery_margin [lindex $res 2]]
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
index 1dad4789f065ab494ec6f113b6f28e888bb8d266..d1ff38f7ecc42ca013c342ea43f36064c529f7e3 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv
@@ -16,7 +16,7 @@
// Top-level wrapper of 20nm hardened EMIF component.
//
///////////////////////////////////////////////////////////////////////////////
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top #(
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top #(
// Interface properties
parameter PROTOCOL_ENUM = "",
@@ -2638,7 +2638,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top #(
////////////////////////////////////////////////////////////////////////////
// I/O Aux
////////////////////////////////////////////////////////////////////////////
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux # (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux # (
.SILICON_REV (SILICON_REV),
.IS_HPS (IS_HPS),
.SEQ_CODE_HEX_FILENAME (SEQ_CODE_HEX_FILENAME),
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl
index d2ee622fd2d48055607852f53c712c1fe91213db..10ee4834fd9d2739fe3f4ee982cbb613a69a94ce 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl
@@ -17,7 +17,7 @@ set script_dir [file dirname [info script]]
load_package sdc_ext
load_package design
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_index_in_collection { col j } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_index_in_collection { col j } {
set i 0
foreach_in_collection path $col {
if {$i == $j} {
@@ -29,13 +29,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_index_in_colle
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_to_pin_name_mapping {} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_to_pin_name_mapping {} {
set result [list]
set clocks_collection [get_clocks]
foreach_in_collection clock $clocks_collection {
set clock_name [get_clock_info -name $clock]
set clock_target [get_clock_info -targets $clock]
- set first_index [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_index_in_collection $clock_target 0]
+ set first_index [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_index_in_collection $clock_target 0]
set catch_exception_net [catch {get_net_info -name $first_index} pin_name_net]
if {$catch_exception_net == 0} {
lappend result [list $clock_name $pin_name_net]
@@ -60,8 +60,8 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_to_p
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name_from_pin_name { pin_name } {
- set table [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_to_pin_name_mapping]
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_name_from_pin_name { pin_name } {
+ set table [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_to_pin_name_mapping]
foreach entry $table {
if {[string compare [lindex [lindex [split $entry] 1] 0] $pin_name] == 0} {
return [lindex $entry 0]
@@ -72,7 +72,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_find_all_keepers { mystring } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_find_all_keepers { mystring } {
set allkeepers [get_keepers $mystring ]
foreach_in_collection keeper $allkeepers {
@@ -82,11 +82,11 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_find_all_keepe
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_round_3dp { x } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_round_3dp { x } {
return [expr { round($x * 1000) / 1000.0 } ]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_timequest_report_folder {} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_current_timequest_report_folder {} {
set catch_exception [catch {get_current_timequest_report_folder} error_message]
if {[regexp ERROR $error_message] == 1} {
@@ -96,27 +96,27 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_current_ti
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_timequest_name {hier_name} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_timequest_name {hier_name} {
set sta_name $hier_name
return $sta_name
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_are_entity_names_on { } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_are_entity_names_on { } {
return [set_project_mode -is_show_entity]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_instance_list {corename} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_instance_list {corename} {
global ::io_only_analysis
if {$::io_only_analysis == 1} {
set instance_list [list $corename]
} else {
- set full_instance_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_full_instance_list $corename]
+ set full_instance_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_full_instance_list $corename]
set instance_list [list]
foreach inst $full_instance_list {
- set sta_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_timequest_name $inst]
+ set sta_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_timequest_name $inst]
if {[lsearch $instance_list [escape_brackets $sta_name]] == -1} {
lappend instance_list $sta_name
}
@@ -126,7 +126,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_insta
return $instance_list
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_generated_clock {args} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_or_add_generated_clock {args} {
array set opts { /
-name "" /
-target "" /
@@ -143,13 +143,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_gen
return ""
}
- set clock_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name_from_pin_name $opts(-target)]
+ set clock_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_name_from_pin_name $opts(-target)]
if {[string compare -nocase $clock_name ""] == 0} {
set nets [get_nets $opts(-target) -nowarn]
if {[get_collection_size $nets] > 0} {
set pin_name [get_pin_info -name [get_net_info -pin $nets]]
- set clock_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_clock_name_from_pin_name $pin_name]
+ set clock_name [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_clock_name_from_pin_name $pin_name]
if {[string compare -nocase $clock_name ""] != 0} {
if {[regexp -nocase "lvds_clk" $pin_name] || [regexp -nocase "loaden" $pin_name] } {
@@ -183,7 +183,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_or_add_gen
return $clock_name
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_full_instance_list {corename} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_core_full_instance_list {corename} {
set instance_list [list]
@@ -209,7 +209,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_core_full_
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin_up_to_depth { node_id match_command edge_type results_array_name depth} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_fanin_up_to_depth { node_id match_command edge_type results_array_name depth} {
upvar 1 $results_array_name results
if {$depth < 0} {
@@ -224,12 +224,12 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin
set results($fanin_id) 1
} elseif {$depth == 0} {
} else {
- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_fanin_up_to_depth $fanin_id $match_command $edge_type results [expr {$depth - 1}]
+ ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_fanin_up_to_depth $fanin_id $match_command $edge_type results [expr {$depth - 1}]
}
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_pin { node_id } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_is_node_type_pin { node_id } {
set node_type [get_node_info -type $node_id]
if {$node_type == "port"} {
set result 1
@@ -239,7 +239,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_is_node_type_p
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_pll_clock_name { clock_id } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_pll_clock_name { clock_id } {
set clock_name [get_node_info -name $clock_id]
return $clock_name
@@ -253,7 +253,7 @@ proc post_sdc_message {msg_type msg} {
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_names_in_collection { col } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_names_in_collection { col } {
set res [list]
foreach_in_collection node $col {
lappend res [ get_node_info -name $node ]
@@ -261,11 +261,11 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_names_in_c
return $res
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_format_3dp { x } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_format_3dp { x } {
return [format %.3f $x]
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_colours { x y } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_colours { x y } {
set fcolour [list "black"]
if {$x < 0} {
@@ -302,7 +302,7 @@ proc max { a b } {
}
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collection { col attribute } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_max_in_collection { col attribute } {
set i 0
set max 0
foreach_in_collection path $col {
@@ -319,7 +319,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collect
return $max
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection { col attribute } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection { col attribute } {
set i 0
set min 0
foreach_in_collection path $col {
@@ -336,7 +336,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_to_clock { col attribute clock } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_to_clock { col attribute clock } {
set i 0
set min ERROR
foreach_in_collection path $col {
@@ -355,7 +355,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_from_clock { col attribute clock } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_from_clock { col attribute clock } {
set i 0
set min ERROR
foreach_in_collection path $col {
@@ -374,7 +374,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_to_name { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_to_name { col attribute name } {
set i 0
set min 0
foreach_in_collection path $col {
@@ -393,7 +393,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_from_name { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_from_name { col attribute name } {
set i 0
set min 0
foreach_in_collection path $col {
@@ -412,7 +412,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collection_to_name { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_max_in_collection_to_name { col attribute name } {
set i 0
set max 0
foreach_in_collection path $col {
@@ -431,7 +431,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collect
return $max
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collection_from_name { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_max_in_collection_from_name { col attribute name } {
set i 0
set max 0
foreach_in_collection path $col {
@@ -451,7 +451,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collect
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_to_name2 { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_to_name2 { col attribute name } {
set i 0
set min 0
foreach_in_collection path $col {
@@ -470,7 +470,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collection_from_name2 { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_min_in_collection_from_name2 { col attribute name } {
set i 0
set min 0
foreach_in_collection path $col {
@@ -489,7 +489,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_min_in_collect
return $min
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collection_to_name2 { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_max_in_collection_to_name2 { col attribute name } {
set i 0
set max 0
foreach_in_collection path $col {
@@ -508,7 +508,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collect
return $max
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collection_from_name2 { col attribute name } {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_max_in_collection_from_name2 { col attribute name } {
set i 0
set max 0
foreach_in_collection path $col {
@@ -527,7 +527,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_max_in_collect
return $max
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_proc {a b} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_sort_proc {a b} {
set idxs [list 1 2 0]
foreach i $idxs {
set ai [lindex $a $i]
@@ -541,7 +541,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_sort_proc {a b
return 0
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_gcd {p q} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_gcd {p q} {
set p [expr {abs($p)}]
set q [expr {abs($q)}]
while {$q != 0} {
@@ -552,7 +552,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_gcd {p q} {
return $p
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_path {atom_id atom_oport_id path} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_atom_path {atom_id atom_oport_id path} {
# Return list of {atom oterm_id} pairs by tracing the atom netlist starting from the given atom_id through the given path
# Path consists of list of {atom_type fanin|fanout|end <port_type> <-optional>}
set result [list]
@@ -575,9 +575,9 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_
set iport_fanin [get_atom_port_info -key fanin -node $atom_id -port_id $atom_iport -type iport]
set source_atom [lindex $iport_fanin 0]
set source_oterm [lindex $iport_fanin 1]
- set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_path $source_atom $source_oterm [lrange $path 1 end]]
+ set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_atom_path $source_atom $source_oterm [lrange $path 1 end]]
} elseif {$atom_optional == "-optional"} {
- set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_path $atom_id $atom_oport_id [lrange $path 1 end]]
+ set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_atom_path $atom_id $atom_oport_id [lrange $path 1 end]]
}
} elseif {$next_direction == "fanout"} {
set atom_oport [get_atom_oport_by_type -node $atom_id -type $port_type]
@@ -586,7 +586,7 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_
foreach dest $oport_fanout {
set dest_atom [lindex $dest 0]
set dest_iterm [lindex $dest 1]
- set fanout_result_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_path $dest_atom -1 [lrange $path 1 end]]
+ set fanout_result_list [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_atom_path $dest_atom -1 [lrange $path 1 end]]
foreach fanout_result $fanout_result_list {
if {[lsearch $result $fanout_result] == -1} {
lappend result $fanout_result
@@ -598,13 +598,13 @@ proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_
error "Unexpected path"
}
} elseif {$atom_optional == "-optional"} {
- set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_traverse_atom_path $atom_id $atom_oport_id [lrange $path 1 end]]
+ set result [ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_traverse_atom_path $atom_id $atom_oport_id [lrange $path 1 end]]
}
}
return $result
}
-proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_get_operating_conditions_number {} {
+proc ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_get_operating_conditions_number {} {
set cur_operating_condition [get_operating_conditions]
set counter 0
foreach_in_collection op [get_available_operating_conditions] {
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd
index 1c9592ec4466155933f2c363790aa3486f7fa924..e31430660249e3ee07bb89caca1b11ec144d47bc 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd
@@ -1,4 +1,4 @@
--- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd
+-- ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd
-- This file was auto-generated from altera_emif_cal_slave_nf_hw.tcl. If you edit it your changes
-- will probably be lost.
@@ -6,14 +6,14 @@
-- Generated using ACDS version 18.0 219
library IEEE;
-library altera_avalon_mm_bridge_170;
-library altera_avalon_onchip_memory2_170;
-library altera_mm_interconnect_170;
-library altera_reset_controller_170;
+library altera_avalon_mm_bridge_180;
+library altera_avalon_onchip_memory2_180;
+library altera_mm_interconnect_180;
+library altera_reset_controller_180;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
-entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq is
+entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq is
port (
avl_waitrequest : out std_logic; -- avl.waitrequest
avl_readdata : out std_logic_vector(31 downto 0); -- .readdata
@@ -28,9 +28,9 @@ entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq is
clk_clk : in std_logic := '0'; -- clk.clk
rst_reset : in std_logic := '0' -- rst.reset
);
-end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq;
+end entity ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq;
-architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq is
+architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq is
component altera_avalon_mm_bridge_cmp is
generic (
DATA_WIDTH : integer := 32;
@@ -69,7 +69,7 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_ef
);
end component altera_avalon_mm_bridge_cmp;
- component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za_cmp is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_cmp is
port (
clk : in std_logic := 'X'; -- clk
address : in std_logic_vector(11 downto 0) := (others => 'X'); -- address
@@ -84,9 +84,9 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_ef
reset_req : in std_logic := 'X'; -- reset_req
freeze : in std_logic := 'X' -- freeze
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_cmp;
- component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq_cmp is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq_cmp is
port (
clk_bridge_out_clk_clk : in std_logic := 'X'; -- clk
ioaux_master_bridge_m0_address : in std_logic_vector(15 downto 0) := (others => 'X'); -- address
@@ -109,7 +109,7 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_ef
ioaux_soft_ram_s1_clken : out std_logic; -- clken
ioaux_soft_ram_s1_debugaccess : out std_logic -- debugaccess
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq_cmp;
component altera_reset_controller_cmp is
generic (
@@ -198,13 +198,13 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_ef
signal rst_controller_reset_out_reset : std_logic; -- rst_controller:reset_out -> [ioaux_master_bridge:reset, ioaux_soft_ram:reset, mm_interconnect_0:ioaux_master_bridge_reset_reset_bridge_in_reset_reset]
for ioaux_master_bridge : altera_avalon_mm_bridge_cmp
- use entity altera_avalon_mm_bridge_170.altera_avalon_mm_bridge;
- for ioaux_soft_ram : ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za_cmp
- use entity altera_avalon_onchip_memory2_170.ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za;
- for mm_interconnect_0 : ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq_cmp
- use entity altera_mm_interconnect_170.ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq;
+ use entity altera_avalon_mm_bridge_180.altera_avalon_mm_bridge;
+ for ioaux_soft_ram : ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_cmp
+ use entity altera_avalon_onchip_memory2_180.ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za;
+ for mm_interconnect_0 : ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq_cmp
+ use entity altera_mm_interconnect_180.ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq;
for rst_controller : altera_reset_controller_cmp
- use entity altera_reset_controller_170.altera_reset_controller;
+ use entity altera_reset_controller_180.altera_reset_controller;
begin
ioaux_master_bridge : component altera_avalon_mm_bridge_cmp
@@ -244,7 +244,7 @@ begin
m0_response => "00" -- (terminated)
);
- ioaux_soft_ram : component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za_cmp
+ ioaux_soft_ram : component ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_cmp
port map (
clk => clk_clk, -- clk1.clk
address => mm_interconnect_0_ioaux_soft_ram_s1_address, -- s1.address
@@ -260,7 +260,7 @@ begin
freeze => '0' -- (terminated)
);
- mm_interconnect_0 : component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq_cmp
+ mm_interconnect_0 : component ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq_cmp
port map (
clk_bridge_out_clk_clk => clk_clk, -- clk_bridge_out_clk.clk
ioaux_master_bridge_m0_address => ioaux_master_bridge_m0_address, -- ioaux_master_bridge_m0.address
@@ -349,4 +349,4 @@ begin
reset_req_in15 => '0' -- (terminated)
);
-end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq
+end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v
index 87758bc506614b2d84b1fafc570d46515ba4d9ec..0bb8ce5697f3f4687dcbb367b8f4cb9e0a815ac6 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v
@@ -1,4 +1,4 @@
-// ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.v
+// ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v
// This file was auto-generated from altera_emif_cal_slave_nf_hw.tcl. If you edit it your changes
// will probably be lost.
@@ -6,7 +6,7 @@
// Generated using ACDS version 18.0 219
`timescale 1 ps / 1 ps
-module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq (
+module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq (
output wire avl_waitrequest, // avl.waitrequest
output wire [31:0] avl_readdata, // .readdata
output wire avl_readdatavalid, // .readdatavalid
@@ -76,7 +76,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq (
.m0_response (2'b00) // (terminated),
);
- ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za ioaux_soft_ram (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za ioaux_soft_ram (
.clk (clk_clk), // input, width = 1, clk1.clk
.address (mm_interconnect_0_ioaux_soft_ram_s1_address), // input, width = 12, s1.address
.debugaccess (mm_interconnect_0_ioaux_soft_ram_s1_debugaccess), // input, width = 1, .debugaccess
@@ -91,7 +91,7 @@ module ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq (
.freeze (1'b0) // (terminated),
);
- ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq mm_interconnect_0 (
+ ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq mm_interconnect_0 (
.clk_bridge_out_clk_clk (clk_clk), // input, width = 1, clk_bridge_out_clk.clk
.ioaux_master_bridge_m0_address (ioaux_master_bridge_m0_address), // input, width = 16, ioaux_master_bridge_m0.address
.ioaux_master_bridge_m0_waitrequest (ioaux_master_bridge_m0_waitrequest), // output, width = 1, .waitrequest
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd
index 29f3261816a3a91dd2e1a47710d39ab47efb7c18..c48c96703ed3f295c2a8e0d7c08babc2394daf4d 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd
@@ -1,4 +1,4 @@
--- ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd
+-- ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd
-- This file was auto-generated from altera_mm_interconnect_hw.tcl. If you edit it your changes
-- will probably be lost.
@@ -6,12 +6,12 @@
-- Generated using ACDS version 18.0 219
library IEEE;
-library altera_merlin_master_translator_170;
-library altera_merlin_slave_translator_170;
+library altera_merlin_master_translator_180;
+library altera_merlin_slave_translator_180;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
-entity ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq is
+entity ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq is
port (
clk_bridge_out_clk_clk : in std_logic := '0'; -- clk_bridge_out_clk.clk
ioaux_master_bridge_m0_address : in std_logic_vector(15 downto 0) := (others => '0'); -- ioaux_master_bridge_m0.address
@@ -34,9 +34,9 @@ entity ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq is
ioaux_soft_ram_s1_clken : out std_logic; -- .clken
ioaux_soft_ram_s1_debugaccess : out std_logic -- .debugaccess
);
-end entity ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq;
+end entity ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq;
-architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq is
+architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq is
component altera_merlin_master_translator_cmp is
generic (
AV_ADDRESS_W : integer := 32;
@@ -184,9 +184,9 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4
signal ioaux_master_bridge_m0_translator_avalon_universal_master_0_burstcount : std_logic_vector(2 downto 0); -- ioaux_master_bridge_m0_translator:uav_burstcount -> ioaux_soft_ram_s1_translator:uav_burstcount
for ioaux_master_bridge_m0_translator : altera_merlin_master_translator_cmp
- use entity altera_merlin_master_translator_170.altera_merlin_master_translator;
+ use entity altera_merlin_master_translator_180.altera_merlin_master_translator;
for ioaux_soft_ram_s1_translator : altera_merlin_slave_translator_cmp
- use entity altera_merlin_slave_translator_170.altera_merlin_slave_translator;
+ use entity altera_merlin_slave_translator_180.altera_merlin_slave_translator;
begin
ioaux_master_bridge_m0_translator : component altera_merlin_master_translator_cmp
@@ -321,4 +321,4 @@ begin
av_writeresponsevalid => '0' -- (terminated)
);
-end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq
+end architecture rtl; -- of ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v
index fba4a642a0cc2358b4719965c64a9569ae6f6b0c..ffcb896ab30f21e5948434dd9e50c8ecbd93da9b 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v
@@ -1,4 +1,4 @@
-// ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.v
+// ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v
// This file was auto-generated from altera_mm_interconnect_hw.tcl. If you edit it your changes
// will probably be lost.
@@ -6,7 +6,7 @@
// Generated using ACDS version 18.0 219
`timescale 1 ps / 1 ps
-module ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq (
+module ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq (
input wire clk_bridge_out_clk_clk, // clk_bridge_out_clk.clk
input wire [15:0] ioaux_master_bridge_m0_address, // ioaux_master_bridge_m0.address
output wire ioaux_master_bridge_m0_waitrequest, // .waitrequest
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.csv b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.csv
index 7928e6edff7a0a355586b2ce6419a54b2a84a78a..d8192e0ce31dbe5c542680026f1cf7435fcfc557 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.csv
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.csv
@@ -1,90 +1,90 @@
-# system info ip_arria10_e1sg_ddr4_8g_2400 on 2019.10.09.19:37:27
+# system info ip_arria10_e1sg_ddr4_8g_2400 on 2019.10.10.13:20:47
system_info:
name,value
DEVICE,10AX115S2F45E1SG
DEVICE_FAMILY,Arria 10
-GENERATION_ID,1570642646
+GENERATION_ID,0
#
#
-# Files generated for ip_arria10_e1sg_ddr4_8g_2400 on 2019.10.09.19:37:27
+# Files generated for ip_arria10_e1sg_ddr4_8g_2400 on 2019.10.10.13:20:47
files:
filepath,kind,attributes,module,is_top
sim/ip_arria10_e1sg_ddr4_8g_2400.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400,true
-altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v,VERILOG,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_oct.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v,VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/mem_array_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_readme.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i,false
-altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v,VERILOG,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy,false
-altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v,VERILOG,,altera_avalon_mm_bridge,false
-altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd,VHDL,,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy,false
-altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy,false
-altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki,false
-altera_reset_controller_170/sim/mentor/altera_reset_controller.v,VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v,VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/aldec/altera_reset_controller.v,VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/aldec/altera_reset_synchronizer.v,VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/cadence/altera_reset_controller.v,VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/cadence/altera_reset_synchronizer.v,VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/synopsys/altera_reset_controller.v,VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_reset_controller,false
-altera_reset_controller_170/sim/synopsys/altera_reset_synchronizer.v,VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_reset_controller,false
-altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv,SYSTEM_VERILOG,,altera_merlin_master_translator,false
-altera_merlin_slave_translator_170/sim/mentor/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_merlin_slave_translator,false
-altera_merlin_slave_translator_170/sim/aldec/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_merlin_slave_translator,false
-altera_merlin_slave_translator_170/sim/cadence/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_merlin_slave_translator,false
-altera_merlin_slave_translator_170/sim/synopsys/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_merlin_slave_translator,false
+altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_oct.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v,VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/mem_array_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv,SYSTEM_VERILOG,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_readme.txt,OTHER,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd,VHDL,,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i,false
+altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq,false
+altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v,VERILOG,,altera_avalon_mm_bridge,false
+altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd,VHDL,,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za,false
+altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex,HEX,,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za,false
+altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq,false
+altera_reset_controller_180/sim/mentor/altera_reset_controller.v,VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/mentor/altera_reset_synchronizer.v,VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/aldec/altera_reset_controller.v,VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/aldec/altera_reset_synchronizer.v,VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/cadence/altera_reset_controller.v,VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/cadence/altera_reset_synchronizer.v,VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/synopsys/altera_reset_controller.v,VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_reset_controller,false
+altera_reset_controller_180/sim/synopsys/altera_reset_synchronizer.v,VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_reset_controller,false
+altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv,SYSTEM_VERILOG,,altera_merlin_master_translator,false
+altera_merlin_slave_translator_180/sim/mentor/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,MENTOR_SPECIFIC,altera_merlin_slave_translator,false
+altera_merlin_slave_translator_180/sim/aldec/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,ALDEC_SPECIFIC,altera_merlin_slave_translator,false
+altera_merlin_slave_translator_180/sim/cadence/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,CADENCE_SPECIFIC,altera_merlin_slave_translator,false
+altera_merlin_slave_translator_180/sim/synopsys/altera_merlin_slave_translator.sv,SYSTEM_VERILOG_ENCRYPT,SYNOPSYS_SPECIFIC,altera_merlin_slave_translator,false
#
# Map from instance-path to kind of module
instances:
instancePath,module
-ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi
-ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i
-ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy
+ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa
+ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i
+ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component,ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq
ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_master_bridge,altera_avalon_mm_bridge
-ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_soft_ram,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy
-ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0,ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki
+ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_soft_ram,ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za
+ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0,ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq
ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_m0_translator,altera_merlin_master_translator
ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_soft_ram_s1_translator,altera_merlin_slave_translator
ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_controller,altera_reset_controller
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.html b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.html
index 6e86d237392ae225899699e5084fcc917387634d..8e2f841406a4411a4265e7257c992da84f3d696c 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.html
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.html
@@ -67,7 +67,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
</table>
<table class="blueBar">
<tr>
- <td class="l">2019.10.09.19:37:30</td>
+ <td class="l">2019.10.10.13:20:50</td>
<td class="r">Datasheet</td>
</tr>
</table>
@@ -85,19 +85,19 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<br/>All Components
<br/>  
<a href="#module_ddr4_inst"><b>ddr4_inst</b>
- </a> altera_emif 17.0
+ </a> altera_emif 18.0
<br/>  
<a href="#module_ddr4_inst_arch"><b>ddr4_inst_arch</b>
- </a> altera_emif_arch_nf 17.0
+ </a> altera_emif_arch_nf 18.0
<br/>  
<a href="#module_ddr4_inst_cal_slave_component"><b>ddr4_inst_cal_slave_component</b>
- </a> altera_emif_cal_slave_nf 17.0
+ </a> altera_emif_cal_slave_nf 18.0
<br/>  
<a href="#module_ddr4_inst_cal_slave_component_ioaux_master_bridge"><b>ddr4_inst_cal_slave_component_ioaux_master_bridge</b>
- </a> altera_avalon_mm_bridge 17.0
+ </a> altera_avalon_mm_bridge 18.0
<br/>  
<a href="#module_ddr4_inst_cal_slave_component_ioaux_soft_ram"><b>ddr4_inst_cal_slave_component_ioaux_soft_ram</b>
- </a> altera_avalon_onchip_memory2 17.0</span>
+ </a> altera_avalon_onchip_memory2 18.0</span>
</div>
</div>
<div style="width:100% ; height:10px"> </div>
@@ -161,7 +161,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst"> </a>
<div>
<hr/>
- <h2>ddr4_inst</h2>altera_emif v17.0
+ <h2>ddr4_inst</h2>altera_emif v18.0
<br/>
<br/>
<br/>
@@ -171,12830 +171,822 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<h2>Parameters</h2>
<table>
<tr>
- <td class="parametername">SYS_INFO_DEVICE_FAMILY</td>
- <td class="parametervalue">ARRIA10</td>
+ <td class="parametername">PROTOCOL_ENUM</td>
+ <td class="parametervalue">PROTOCOL_DDR4</td>
</tr>
<tr>
- <td class="parametername">SYS_INFO_DEVICE</td>
- <td class="parametervalue">10AX115S2F45E1SG</td>
+ <td class="parametername">PHY_FPGA_SPEEDGRADE_GUI</td>
+ <td class="parametervalue">E1 (Production) - change device under 'View'->'Device Family'</td>
</tr>
<tr>
- <td class="parametername">SYS_INFO_DEVICE_SPEEDGRADE</td>
- <td class="parametervalue">1</td>
+ <td class="parametername">PHY_RZQ</td>
+ <td class="parametervalue">240</td>
</tr>
<tr>
- <td class="parametername">FAMILY_ENUM</td>
- <td class="parametervalue">FAMILY_ARRIA10</td>
+ <td class="parametername">PLL_ADD_EXTRA_CLKS</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">TRAIT_SUPPORTS_VID</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">PHY_DDR4_CONFIG_ENUM</td>
+ <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
</tr>
<tr>
- <td class="parametername">PROTOCOL_ENUM</td>
- <td class="parametervalue">PROTOCOL_DDR4</td>
+ <td class="parametername">PHY_DDR4_USER_PING_PONG_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">IS_ED_SLAVE</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">PHY_DDR4_MEM_CLK_FREQ_MHZ</td>
+ <td class="parametervalue">1200.0</td>
</tr>
<tr>
- <td class="parametername">INTERNAL_TESTING_MODE</td>
+ <td class="parametername">PHY_DDR4_DEFAULT_REF_CLK_FREQ</td>
<td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">CAL_DEBUG_CLOCK_FREQUENCY</td>
- <td class="parametervalue">50000000</td>
+ <td class="parametername">PHY_DDR4_USER_REF_CLK_FREQ_MHZ</td>
+ <td class="parametervalue">25.0</td>
</tr>
<tr>
- <td class="parametername">SYS_INFO_UNIQUE_ID</td>
- <td class="parametervalue">ip_arria10_e1sg_ddr4_8g_2400_ddr4_inst</td>
+ <td class="parametername">PHY_DDR4_REF_CLK_JITTER_PS</td>
+ <td class="parametervalue">10.0</td>
</tr>
<tr>
- <td class="parametername">PREV_PROTOCOL_ENUM</td>
- <td class="parametervalue">PROTOCOL_DDR4</td>
+ <td class="parametername">PHY_DDR4_RATE_ENUM</td>
+ <td class="parametervalue">RATE_QUARTER</td>
</tr>
<tr>
- <td class="parametername">PHY_FPGA_SPEEDGRADE_GUI</td>
- <td class="parametervalue">E1 (Production) - change device under 'View'->'Device Family'</td>
+ <td class="parametername">PHY_DDR4_CORE_CLKS_SHARING_ENUM</td>
+ <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
</tr>
<tr>
- <td class="parametername">PHY_TARGET_SPEEDGRADE</td>
- <td class="parametervalue">E1</td>
+ <td class="parametername">PHY_DDR4_IO_VOLTAGE</td>
+ <td class="parametervalue">1.2</td>
</tr>
<tr>
- <td class="parametername">PHY_TARGET_IS_ES</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">PHY_DDR4_DEFAULT_IO</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">PHY_TARGET_IS_ES2</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">PHY_DDR4_USER_PERIODIC_OCT_RECAL_ENUM</td>
+ <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
</tr>
<tr>
- <td class="parametername">PHY_TARGET_IS_ES3</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">PHY_DDR4_AC_IO_STD_ENUM</td>
+ <td class="parametervalue">IO_STD_SSTL_12</td>
</tr>
<tr>
- <td class="parametername">PHY_TARGET_IS_PRODUCTION</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">PHY_DDR4_AC_MODE_ENUM</td>
+ <td class="parametervalue">OUT_OCT_40_CAL</td>
</tr>
<tr>
- <td class="parametername">PHY_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
+ <td class="parametername">PHY_DDR4_AC_SLEW_RATE_ENUM</td>
+ <td class="parametervalue">SLEW_RATE_FAST</td>
</tr>
<tr>
- <td class="parametername">PHY_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">PHY_DDR4_CK_IO_STD_ENUM</td>
+ <td class="parametervalue">IO_STD_SSTL_12</td>
</tr>
<tr>
- <td class="parametername">PHY_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
+ <td class="parametername">PHY_DDR4_CK_MODE_ENUM</td>
+ <td class="parametervalue">OUT_OCT_40_CAL</td>
</tr>
<tr>
- <td class="parametername">PHY_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
+ <td class="parametername">PHY_DDR4_CK_SLEW_RATE_ENUM</td>
+ <td class="parametervalue">SLEW_RATE_FAST</td>
</tr>
<tr>
- <td class="parametername">PHY_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
+ <td class="parametername">PHY_DDR4_DATA_IO_STD_ENUM</td>
+ <td class="parametervalue">IO_STD_POD_12</td>
</tr>
<tr>
- <td class="parametername">PHY_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
+ <td class="parametername">PHY_DDR4_DATA_OUT_MODE_ENUM</td>
+ <td class="parametervalue">OUT_OCT_34_CAL</td>
</tr>
<tr>
- <td class="parametername">PHY_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
+ <td class="parametername">PHY_DDR4_DATA_IN_MODE_ENUM</td>
+ <td class="parametervalue">IN_OCT_120_CAL</td>
</tr>
<tr>
- <td class="parametername">PHY_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">PHY_DDR4_STARTING_VREFIN</td>
+ <td class="parametervalue">61.0</td>
</tr>
<tr>
- <td class="parametername">PHY_AC_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">PHY_DDR4_PLL_REF_CLK_IO_STD_ENUM</td>
+ <td class="parametervalue">IO_STD_LVDS</td>
</tr>
<tr>
- <td class="parametername">PHY_CK_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">PHY_DDR4_RZQ_IO_STD_ENUM</td>
+ <td class="parametervalue">IO_STD_CMOS_12</td>
</tr>
<tr>
- <td class="parametername">PHY_DATA_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_FORMAT_ENUM</td>
+ <td class="parametervalue">MEM_FORMAT_SODIMM</td>
</tr>
<tr>
- <td class="parametername">PHY_RZQ</td>
- <td class="parametervalue">240</td>
+ <td class="parametername">MEM_DDR4_DQ_WIDTH</td>
+ <td class="parametervalue">72</td>
</tr>
<tr>
- <td class="parametername">PHY_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_DQ_PER_DQS</td>
+ <td class="parametervalue">8</td>
</tr>
<tr>
- <td class="parametername">PHY_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
+ <td class="parametername">MEM_DDR4_NUM_OF_DIMMS</td>
+ <td class="parametervalue">1</td>
</tr>
<tr>
- <td class="parametername">PLL_ADD_EXTRA_CLKS</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_RANKS_PER_DIMM</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">PLL_USER_NUM_OF_EXTRA_CLKS</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_CK_WIDTH</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_0</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_ROW_ADDR_WIDTH</td>
+ <td class="parametervalue">15</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_0</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_COL_ADDR_WIDTH</td>
+ <td class="parametervalue">10</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_0</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_BANK_ADDR_WIDTH</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_0</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_BANK_GROUP_WIDTH</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_0</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_DM_EN</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_0</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_ALERT_N_PLACEMENT_ENUM</td>
+ <td class="parametervalue">DDR4_ALERT_N_PLACEMENT_DATA_LANES</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_0</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_ALERT_N_DQS_GROUP</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_0</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_MIRROR_ADDRESSING_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_0</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_HIDE_ADV_MR_SETTINGS</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_1</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_TCL</td>
+ <td class="parametervalue">18</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_1</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_RTT_NOM_ENUM</td>
+ <td class="parametervalue">DDR4_RTT_NOM_ODT_DISABLED</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_1</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_ATCL_ENUM</td>
+ <td class="parametervalue">DDR4_ATCL_DISABLED</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_1</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_DRV_STR_ENUM</td>
+ <td class="parametervalue">DDR4_DRV_STR_RZQ_7</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_1</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_RTT_WR_ENUM</td>
+ <td class="parametervalue">DDR4_RTT_WR_ODT_DISABLED</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_1</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_WTCL</td>
+ <td class="parametervalue">18</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_1</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_RTT_PARK</td>
+ <td class="parametervalue">DDR4_RTT_PARK_ODT_DISABLED</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_1</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_WRITE_DBI</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_1</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_READ_DBI</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_2</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_DEFAULT_VREFOUT</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_2</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_VALUE</td>
+ <td class="parametervalue">60.0</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_2</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_RANGE</td>
+ <td class="parametervalue">DDR4_VREFDQ_TRAINING_RANGE_1</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_2</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_DQS_WIDTH</td>
+ <td class="parametervalue">9</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_2</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_CS_PER_DIMM</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_2</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_USE_DEFAULT_ODT</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_2</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODTN_1X1</td>
+ <td class="parametervalue">Rank 0</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_2</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT0_1X1</td>
+ <td class="parametervalue">off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_2</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_W_ODTN_1X1</td>
+ <td class="parametervalue">Rank 0</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_3</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT0_1X1</td>
+ <td class="parametervalue">on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_3</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_ODTN_2X2</td>
+ <td class="parametervalue">Rank 0,Rank 1</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_3</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT0_2X2</td>
+ <td class="parametervalue">off,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_3</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_R_ODT1_2X2</td>
+ <td class="parametervalue">on,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_3</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODTN_2X2</td>
+ <td class="parametervalue">Rank 0,Rank 1</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_3</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT0_2X2</td>
+ <td class="parametervalue">on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_3</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT1_2X2</td>
+ <td class="parametervalue">on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_3</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODTN_4X2</td>
+ <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_3</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT0_4X2</td>
+ <td class="parametervalue">off,off,on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_4</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT1_4X2</td>
+ <td class="parametervalue">on,on,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_4</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODTN_4X2</td>
+ <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_4</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT0_4X2</td>
+ <td class="parametervalue">off,off,on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_4</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_W_ODT1_4X2</td>
+ <td class="parametervalue">on,on,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_4</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_ODTN_4X4</td>
+ <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_4</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT0_4X4</td>
+ <td class="parametervalue">off,off,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_4</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT1_4X4</td>
+ <td class="parametervalue">off,off,on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_4</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT2_4X4</td>
+ <td class="parametervalue">off,off,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_4</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_ODT3_4X4</td>
+ <td class="parametervalue">on,on,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_5</td>
- <td class="parametervalue">100.0</td>
+ <td class="parametername">MEM_DDR4_W_ODTN_4X4</td>
+ <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_5</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT0_4X4</td>
+ <td class="parametervalue">on,on,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_5</td>
- <td class="parametervalue">100.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT1_4X4</td>
+ <td class="parametervalue">off,off,on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_5</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_W_ODT2_4X4</td>
+ <td class="parametervalue">off,off,on,on</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_5</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_ODT3_4X4</td>
+ <td class="parametervalue">on,on,off,off</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_5</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_R_DERIVED_ODTN</td>
+ <td class="parametervalue">Rank 0,Rank 1,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_5</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_DERIVED_ODT0</td>
+ <td class="parametervalue">(Drive) RZQ/7 (34 Ohm),ODT Disabled,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_5</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_DERIVED_ODT1</td>
+ <td class="parametervalue">ODT Disabled,(Drive) RZQ/7 (34 Ohm),-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_5</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_R_DERIVED_ODT2</td>
+ <td class="parametervalue">-,-,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_6</td>
- <td class="parametervalue">100.0</td>
+ <td class="parametername">MEM_DDR4_R_DERIVED_ODT3</td>
+ <td class="parametervalue">-,-,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_6</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_DERIVED_ODTN</td>
+ <td class="parametervalue">Rank 0,Rank 1,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_6</td>
- <td class="parametervalue">100.0</td>
+ <td class="parametername">MEM_DDR4_W_DERIVED_ODT0</td>
+ <td class="parametervalue">(Park) Park ODT off,ODT Disabled,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_6</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_W_DERIVED_ODT1</td>
+ <td class="parametervalue">ODT Disabled,(Park) Park ODT off,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_6</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_DERIVED_ODT2</td>
+ <td class="parametervalue">-,-,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_6</td>
- <td class="parametervalue">0.0</td>
+ <td class="parametername">MEM_DDR4_W_DERIVED_ODT3</td>
+ <td class="parametervalue">-,-,-,-</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_6</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_SPEEDBIN_ENUM</td>
+ <td class="parametervalue">DDR4_SPEEDBIN_2400</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_6</td>
- <td class="parametervalue">50.0</td>
+ <td class="parametername">MEM_DDR4_TIS_PS</td>
+ <td class="parametervalue">60</td>
</tr>
<tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_7</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_8</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_VCO_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_NUM_OF_EXTRA_CLKS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_5</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_6</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_7</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_8</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">133.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_IO_VOLTAGE</td>
- <td class="parametervalue">1.5</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_SSTL_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_40_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_SSTL_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_40_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_POD_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_34_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">IN_OCT_120_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_STARTING_VREFIN</td>
- <td class="parametervalue">61.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_LVDS</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_CMOS_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">633.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_RATE_ENUM</td>
- <td class="parametervalue">RATE_HALF</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_IO_VOLTAGE</td>
- <td class="parametervalue">1.5</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">533.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_RATE_ENUM</td>
- <td class="parametervalue">RATE_HALF</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_IO_VOLTAGE</td>
- <td class="parametervalue">1.8</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_ONLY</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">800.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">MEM_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_SODIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_READ_LATENCY</td>
- <td class="parametervalue">18.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_WRITE_LATENCY</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_BURST_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DATA_MASK_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_HAS_SIM_SUPPORT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_DATA_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_NUM_OF_READ_GROUPS</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_NUM_OF_WRITE_GROUPS</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_UDIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RANKS_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CKE_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DISCRETE_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_HIDE_ADV_MR_SETTINGS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RDIMM_CONFIG</td>
- <td class="parametervalue">0000000000000000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_LRDIMM_EXTENDED_CONFIG</td>
- <td class="parametervalue">0x000000000000000000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ALERT_N_PLACEMENT_ENUM</td>
- <td class="parametervalue">DDR3_ALERT_N_PLACEMENT_AC_LANES</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ALERT_N_DQS_GROUP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQS_WIDTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CS_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ADDR_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_AC_PAR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DQS_WIDTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_ADDR_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR3</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ADDRESS_MIRROR_BITVEC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BL_ENUM</td>
- <td class="parametervalue">DDR3_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BT_ENUM</td>
- <td class="parametervalue">DDR3_BT_SEQUENTIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ASR_ENUM</td>
- <td class="parametervalue">DDR3_ASR_MANUAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SRT_ENUM</td>
- <td class="parametervalue">DDR3_SRT_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_PD_ENUM</td>
- <td class="parametervalue">DDR3_PD_OFF</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DRV_STR_ENUM</td>
- <td class="parametervalue">DDR3_DRV_STR_RZQ_6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DLL_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR3_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR3_RTT_WR_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_WTCL</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ATCL_ENUM</td>
- <td class="parametervalue">DDR3_ATCL_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TCL</td>
- <td class="parametervalue">7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT2_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT2_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODTN</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT0</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT1</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT2</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT3</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODTN</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT0</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT1</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT2</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT3</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">DDR3_SPEEDBIN_2133</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIS_PS</td>
- <td class="parametervalue">60</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIS_AC_MV</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIH_PS</td>
- <td class="parametervalue">95</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDS_PS</td>
- <td class="parametervalue">53</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDS_AC_MV</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDH_PS</td>
- <td class="parametervalue">55</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSQ_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCK_PS</td>
- <td class="parametervalue">180</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSS_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TQSH_CYC</td>
- <td class="parametervalue">0.4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDSH_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWLS_PS</td>
- <td class="parametervalue">125.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWLH_PS</td>
- <td class="parametervalue">125.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDSS_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TMRD_CK_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRAS_NS</td>
- <td class="parametervalue">33.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRCD_NS</td>
- <td class="parametervalue">13.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRP_NS</td>
- <td class="parametervalue">13.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TREFI_US</td>
- <td class="parametervalue">7.8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRFC_NS</td>
- <td class="parametervalue">160.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWTR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TFAW_NS</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRRD_CYC</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRTP_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TINIT_CK</td>
- <td class="parametervalue">499</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDS</td>
- <td class="parametervalue">450</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDM</td>
- <td class="parametervalue">900</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDL</td>
- <td class="parametervalue">1200</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRAS_CYC</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRCD_CYC</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRP_CYC</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRFC_CYC</td>
- <td class="parametervalue">171</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWR_CYC</td>
- <td class="parametervalue">16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TFAW_CYC</td>
- <td class="parametervalue">27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TREFI_CYC</td>
- <td class="parametervalue">8320</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CFG_GEN_SBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CFG_GEN_DBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_SODIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CHIP_ID_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RANKS_PER_DIMM</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CKE_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">15</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BANK_GROUP_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_PAR_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_PLACEMENT_ENUM</td>
- <td class="parametervalue">DDR4_ALERT_N_PLACEMENT_DATA_LANES</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_DQS_GROUP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_AC_LANE</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_AC_PIN</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DISCRETE_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_HIDE_ADV_MR_SETTINGS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BL_ENUM</td>
- <td class="parametervalue">DDR4_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BT_ENUM</td>
- <td class="parametervalue">DDR4_BT_SEQUENTIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCL</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR4_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DLL_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ATCL_ENUM</td>
- <td class="parametervalue">DDR4_ATCL_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DRV_STR_ENUM</td>
- <td class="parametervalue">DDR4_DRV_STR_RZQ_7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ASR_ENUM</td>
- <td class="parametervalue">DDR4_ASR_MANUAL_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR4_RTT_WR_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WTCL</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_CRC</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_GEARDOWN</td>
- <td class="parametervalue">DDR4_GEARDOWN_HR</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_PER_DRAM_ADDR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_SENSOR_READOUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_FINE_GRANULARITY_REFRESH</td>
- <td class="parametervalue">DDR4_FINE_REFRESH_FIXED_1X</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MPR_READ_FORMAT</td>
- <td class="parametervalue">DDR4_MPR_READ_FORMAT_SERIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MAX_POWERDOWN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_CONTROLLED_RFSH_RANGE</td>
- <td class="parametervalue">DDR4_TEMP_CONTROLLED_RFSH_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_CONTROLLED_RFSH_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_INTERNAL_VREFDQ_MONITOR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CAL_MODE</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SELF_RFSH_ABORT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_PREAMBLE_TRAINING</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_PREAMBLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_PREAMBLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_AC_PARITY_LATENCY</td>
- <td class="parametervalue">DDR4_AC_PARITY_LATENCY_DISABLE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ODT_IN_POWERDOWN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_PARK</td>
- <td class="parametervalue">DDR4_RTT_PARK_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_AC_PERSISTENT_ERROR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_DBI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_DBI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DEFAULT_VREFOUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_VALUE</td>
- <td class="parametervalue">60.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_RANGE</td>
- <td class="parametervalue">DDR4_VREFDQ_TRAINING_RANGE_1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CA_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CA_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CS_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CS_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CKE_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CKE_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_ODT_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_ODT_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_WR_RZQ_3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_PARK_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_PARK_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_DQ_DRV_ENUM</td>
- <td class="parametervalue">DDR4_DB_DRV_STR_RZQ_7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_137_RCD_CA_DRV</td>
- <td class="parametervalue">101</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_138_RCD_CK_DRV</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_140_DRAM_VREFDQ_R0</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_141_DRAM_VREFDQ_R1</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_142_DRAM_VREFDQ_R2</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_143_DRAM_VREFDQ_R3</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_144_DB_VREFDQ</td>
- <td class="parametervalue">37</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_145_DB_MDQ_DRV</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_148_DRAM_DRV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_149_DRAM_RTT_WR_NOM</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_152_DRAM_RTT_PARK</td>
- <td class="parametervalue">39</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_133_RCD_DB_VENDOR_LSB</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_134_RCD_DB_VENDOR_MSB</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_135_RCD_REV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_139_DB_REV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_ODT_LESS_BS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_ODT_LESS_BS_PARK_OHM</td>
- <td class="parametervalue">240</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQS_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CS_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CS_PER_DIMM</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CKE_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ODT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ADDR_WIDTH</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_VALUE</td>
- <td class="parametervalue">60.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_RANGE</td>
- <td class="parametervalue">DDR4_VREFDQ_TRAINING_RANGE_1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_RANGE_DISP</td>
- <td class="parametervalue">Range 2 - 45% to 77.5%</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_DQS_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CS_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CKE_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_ODT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_BANK_GROUP_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CHIP_ID_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_ADDR_WIDTH</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR0</td>
- <td class="parametervalue">2112</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR1</td>
- <td class="parametervalue">65537</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR2</td>
- <td class="parametervalue">131120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR3</td>
- <td class="parametervalue">197120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR4</td>
- <td class="parametervalue">262144</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR5</td>
- <td class="parametervalue">328736</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR6</td>
- <td class="parametervalue">394327</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RDIMM_CONFIG</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_EXTENDED_CONFIG</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ADDRESS_MIRROR_BITVEC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_PARITY_CONTROL_WORD</td>
- <td class="parametervalue">13</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_COMMAND_LATENCY</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT2_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT2_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODTN</td>
- <td class="parametervalue">Rank 0,Rank 1,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT0</td>
- <td class="parametervalue">(Drive) RZQ/7 (34 Ohm),ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT1</td>
- <td class="parametervalue">ODT Disabled,(Drive) RZQ/7 (34 Ohm),-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT2</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT3</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODTN</td>
- <td class="parametervalue">Rank 0,Rank 1,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT0</td>
- <td class="parametervalue">(Nominal) ODT Disabled,ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT1</td>
- <td class="parametervalue">ODT Disabled,(Nominal) ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT2</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT3</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">4194308</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">33</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">33</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPEEDBIN_ENUM</td>
- <td class="parametervalue">DDR4_SPEEDBIN_2400</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIS_PS</td>
- <td class="parametervalue">60</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIS_AC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIH_PS</td>
- <td class="parametervalue">95</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIH_DC_MV</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDIVW_TOTAL_UI</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VDIVW_TOTAL</td>
- <td class="parametervalue">136</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSQ_UI</td>
- <td class="parametervalue">0.16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQH_UI</td>
- <td class="parametervalue">0.76</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDVWP_UI</td>
- <td class="parametervalue">0.72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCK_PS</td>
- <td class="parametervalue">180</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSS_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQSH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDSH_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDSS_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWLS_PS</td>
- <td class="parametervalue">122.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWLH_PS</td>
- <td class="parametervalue">122.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TMRD_CK_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRAS_NS</td>
- <td class="parametervalue">33.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRCD_NS</td>
- <td class="parametervalue">14.06</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRP_NS</td>
- <td class="parametervalue">14.06</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TREFI_US</td>
- <td class="parametervalue">7.8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_NS</td>
- <td class="parametervalue">160.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWTR_L_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWTR_S_CYC</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_NS</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_L_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_S_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCCD_L_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCCD_S_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_DLR_NS</td>
- <td class="parametervalue">90.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_DLR_CYC</td>
- <td class="parametervalue">16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_DLR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDIVW_DJ_CYC</td>
- <td class="parametervalue">0.1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSQ_PS</td>
- <td class="parametervalue">66</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TINIT_CK</td>
- <td class="parametervalue">600000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDS</td>
- <td class="parametervalue">450</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDM</td>
- <td class="parametervalue">900</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDL</td>
- <td class="parametervalue">1200</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRAS_CYC</td>
- <td class="parametervalue">40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRCD_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRP_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_CYC</td>
- <td class="parametervalue">192</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWR_CYC</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRTP_CYC</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_CYC</td>
- <td class="parametervalue">30</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TREFI_CYC</td>
- <td class="parametervalue">9360</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_CMD_LATENCY</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_DLR_CYC</td>
- <td class="parametervalue">108</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CFG_GEN_SBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CFG_GEN_DBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_VREFDQ_VALUE</td>
- <td class="parametervalue">1D</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DATA_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_ADDR_WIDTH</td>
- <td class="parametervalue">19</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BL</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DATA_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_N_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_N_PER_DEVICE</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_CQ_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_K_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TWL_CYC</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_SPEEDBIN_ENUM</td>
- <td class="parametervalue">QDR2_SPEEDBIN_633</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TRL_CYC</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TSA_NS</td>
- <td class="parametervalue">0.23</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_THA_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TSD_NS</td>
- <td class="parametervalue">0.23</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_THD_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQD_NS</td>
- <td class="parametervalue">0.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQDOH_NS</td>
- <td class="parametervalue">-0.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_INTERNAL_JITTER_NS</td>
- <td class="parametervalue">0.08</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQH_NS</td>
- <td class="parametervalue">0.71</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCCQO_NS</td>
- <td class="parametervalue">0.45</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_PORT_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_ADDR_WIDTH</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CK_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_AC_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DATA_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_PU_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">QDR4_OUTPUT_DRIVE_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">QDR4_OUTPUT_DRIVE_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DATA_INV_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_ADDR_INV_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_QK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DINV_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_USE_ADDR_PARITY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_PORT_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_QK_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DK_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DINV_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_BL</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TRL_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TWL_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_SPEEDBIN_ENUM</td>
- <td class="parametervalue">QDR4_SPEEDBIN_2133</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TISH_PS</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TQKQ_MAX_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TQH_CYC</td>
- <td class="parametervalue">0.4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKDK_MAX_PS</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKDK_MIN_PS</td>
- <td class="parametervalue">-150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKQK_MAX_PS</td>
- <td class="parametervalue">225</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TASH_PS</td>
- <td class="parametervalue">170</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCSH_PS</td>
- <td class="parametervalue">170</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_DEVICE</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_ADDR_WIDTH</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_BL</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_CONFIG_ENUM</td>
- <td class="parametervalue">RLD2_CONFIG_TRC_8_TRL_8_TWL_9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DRIVE_IMPEDENCE_ENUM</td>
- <td class="parametervalue">RLD2_DRIVE_IMPEDENCE_INTERNAL_50</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_ODT_MODE_ENUM</td>
- <td class="parametervalue">RLD2_ODT_ON</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_QK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TRC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TRL</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TWL</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_MR</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_SPEEDBIN_ENUM</td>
- <td class="parametervalue">RLD2_SPEEDBIN_18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_REFRESH_INTERVAL_US</td>
- <td class="parametervalue">0.24</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKH_CYC</td>
- <td class="parametervalue">0.45</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKH_HCYC</td>
- <td class="parametervalue">0.9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TAS_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TAH_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TDS_NS</td>
- <td class="parametervalue">0.17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TDH_NS</td>
- <td class="parametervalue">0.17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKQ_MAX_NS</td>
- <td class="parametervalue">0.12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKQ_MIN_NS</td>
- <td class="parametervalue">-0.12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKDK_MAX_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKDK_MIN_NS</td>
- <td class="parametervalue">-0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKQK_MAX_NS</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEPTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_ADDR_WIDTH</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_BL</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DATA_LATENCY_MODE_ENUM</td>
- <td class="parametervalue">RLD3_DL_RL16_WL17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_T_RC_MODE_ENUM</td>
- <td class="parametervalue">RLD3_TRC_9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">RLD3_OUTPUT_DRIVE_40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_ODT_MODE_ENUM</td>
- <td class="parametervalue">RLD3_ODT_40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_AREF_PROTOCOL_ENUM</td>
- <td class="parametervalue">RLD3_AREF_BAC</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_WRITE_PROTOCOL_ENUM</td>
- <td class="parametervalue">RLD3_WRITE_1BANK</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_QK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DM_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">RLD3_SPEEDBIN_093E</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDS_PS</td>
- <td class="parametervalue">-30</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDH_PS</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TQKQ_MAX_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKDK_MAX_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKDK_MIN_CYC</td>
- <td class="parametervalue">-0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKQK_MAX_PS</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIS_PS</td>
- <td class="parametervalue">85</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIH_PS</td>
- <td class="parametervalue">65</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQ_WIDTH</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">15</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR3</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR11</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_BL</td>
- <td class="parametervalue">LPDDR3_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DATA_LATENCY</td>
- <td class="parametervalue">LPDDR3_DL_RL12_WL6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DRV_STR</td>
- <td class="parametervalue">LPDDR3_DRV_STR_40D_40U</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQODT</td>
- <td class="parametervalue">LPDDR3_DQODT_DISABLE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_PDODT</td>
- <td class="parametervalue">LPDDR3_PDODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_WLSELECT</td>
- <td class="parametervalue">Set A</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NWR</td>
- <td class="parametervalue">LPDDR3_NWR_NWR12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_2X2</td>
- <td class="parametervalue">off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT1_2X2</td>
- <td class="parametervalue">off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT1_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT2_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT3_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT2_4X4</td>
- <td class="parametervalue">on,on,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT3_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODTN</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT0</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT1</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT2</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT3</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODTN</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT0</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT1</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT2</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT3</td>
- <td class="parametervalue">,,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">LPDDR3_SPEEDBIN_1600</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIS_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIH_PS</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDS_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDH_PS</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSQ_PS</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDL</td>
- <td class="parametervalue">614</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSS_CYC</td>
- <td class="parametervalue">1.25</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TQSH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDSH_CYC</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWLS_PS</td>
- <td class="parametervalue">175.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWLH_PS</td>
- <td class="parametervalue">175.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDSS_CYC</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TMRR_CK_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TMRW_CK_CYC</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRAS_NS</td>
- <td class="parametervalue">42.5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRCD_NS</td>
- <td class="parametervalue">18.75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRP_NS</td>
- <td class="parametervalue">18.75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TREFI_US</td>
- <td class="parametervalue">3.9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRFC_NS</td>
- <td class="parametervalue">210.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWTR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TFAW_NS</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRRD_CYC</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRTP_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TINIT_CK</td>
- <td class="parametervalue">499</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDS</td>
- <td class="parametervalue">220</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDM</td>
- <td class="parametervalue">511</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCK_PS</td>
- <td class="parametervalue">5500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRAS_CYC</td>
- <td class="parametervalue">34</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRCD_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRP_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRFC_CYC</td>
- <td class="parametervalue">168</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWR_CYC</td>
- <td class="parametervalue">12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TFAW_CYC</td>
- <td class="parametervalue">40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TREFI_CYC</td>
- <td class="parametervalue">3120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRL_CYC</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWL_CYC</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">1.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">5.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RCLK_SLEW_RATE</td>
- <td class="parametervalue">8.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RDATA_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_ISI_NS</td>
- <td class="parametervalue">0.22</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RCLK_ISI_NS</td>
- <td class="parametervalue">0.22</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WCLK_ISI_NS</td>
- <td class="parametervalue">0.078</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RDATA_ISI_NS</td>
- <td class="parametervalue">0.155</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WDATA_ISI_NS</td>
- <td class="parametervalue">0.16</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_K_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_Q_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_D_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_TO_K_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_MAX_K_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_K_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_IS_SKEW_WITHIN_QK_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_PKG_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_DK_TO_CK_SKEW_NS</td>
- <td class="parametervalue">-0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_BETWEEN_DK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_MAX_DK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RCLK_SLEW_RATE</td>
- <td class="parametervalue">5.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_IS_SKEW_WITHIN_QK_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_PKG_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_DK_TO_CK_SKEW_NS</td>
- <td class="parametervalue">-0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_BETWEEN_DK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_MAX_DK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">7.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">DDR3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ECC_AUTO_CORRECTION_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_STARVE_LIMIT</td>
- <td class="parametervalue">63</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">DDR4_CTRL_ADDR_ORDER_CS_R_B_C_BG</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ECC_AUTO_CORRECTION_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_STARVE_LIMIT</td>
- <td class="parametervalue">63</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_MAX_BURST_COUNT</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_ENABLE_POWER_OF_TWO_BUS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_SYMBOL_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_MAX_BURST_COUNT</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_ENABLE_POWER_OF_TWO_BUS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_ADD_RAW_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_ADD_WAR_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_SYMBOL_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">11</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD2_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">RLD3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">LPDDR3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_STARVE_LIMIT</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_REGTEST_MODE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TIMING_REGTEST_MODE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SYNTH_FOR_SIM</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_FAST_SIM_OVERRIDE</td>
- <td class="parametervalue">FAST_SIM_OVERRIDE_DEFAULT</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SEQ_RESET_AUTO_RELEASE</td>
- <td class="parametervalue">avl</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DB_RESET_AUTO_RELEASE</td>
- <td class="parametervalue">avl_release</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_VERBOSE_IOAUX</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ECLIPSE_DEBUG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_VJI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_JTAG_UART</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_JTAG_UART_HEX</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_HPS_EMIF_DEBUG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SOFT_NIOS_MODE</td>
- <td class="parametervalue">SOFT_NIOS_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SOFT_NIOS_CLOCK_FREQUENCY</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_RS232_UART</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RS232_UART_BAUDRATE</td>
- <td class="parametervalue">57600</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_ADD_TEST_EMIFS</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_SEPARATE_RESETS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPOSE_DFT_SIGNALS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXTRA_CONFIGS</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_BOARD_DELAY_MODEL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BOARD_DELAY_CONFIG_STR</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_AVL_2_EXPORT_CFG_INTERFACE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_AVL_2_NUM_CFG_INTERFACES</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_PLL_REF_CLK_OUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_PLL_LOCKED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">SHORT_QSYS_INTERFACE_NAMES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXT_DOCS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_FAST_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_SOFT_M20K</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_CHECKER_SKIP_TG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CA_LEVEL_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_FULL_CAL_ON_RESET</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ENABLE_MICRON_AP</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_CA_LEVEL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_CA_DESKEW</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_VREF_CAL</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_FULL_CAL_ON_RESET</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SKIP_VREF_CAL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_SKIP_CA_LEVEL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_SKIP_CA_DESKEW</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">UNKNOWN</td>
- </tr>
- <tr>
- <td class="parametername">generateLegacySim</td>
- <td class="parametervalue">false</td>
- </tr>
- </table>
- </td>
- </tr>
- </table>  
- <table class="flowbox">
- <tr>
- <td class="parametersbox">
- <h2>Software Assignments</h2>(none)</td>
- </tr>
- </table>
- </div>
- <a name="module_ddr4_inst_arch"> </a>
- <div>
- <hr/>
- <h2>ddr4_inst_arch</h2>altera_emif_arch_nf v17.0
- <br/>
- <div class="greydiv">
- <table class="connectionboxes">
- <tr>
- <td></td>
- <td></td>
- <td class="main" rowspan="8">ddr4_inst_arch</td>
- <td class="from">cal_slave_clk_clock_source  </td>
- <td class="neighbor" rowspan="2">
- <a href="#module_ddr4_inst_cal_slave_component_clk_bridge">ddr4_inst_cal_slave_component_clk_bridge</a>
- </td>
- </tr>
- <tr>
- <td></td>
- <td></td>
- <td class="to">  in_clk</td>
- </tr>
- <tr style="height:6px">
- <td></td>
- </tr>
- <tr>
- <td></td>
- <td></td>
- <td class="from">cal_slave_reset_n_reset_source  </td>
- <td class="neighbor" rowspan="2">
- <a href="#module_ddr4_inst_cal_slave_component_rst_bridge">ddr4_inst_cal_slave_component_rst_bridge</a>
- </td>
- </tr>
- <tr>
- <td></td>
- <td></td>
- <td class="to">  in_reset</td>
- </tr>
- <tr style="height:6px">
- <td></td>
- </tr>
- <tr>
- <td></td>
- <td></td>
- <td class="from">cal_master_avalon_master  </td>
- <td class="neighbor" rowspan="2">
- <a href="#module_ddr4_inst_cal_slave_component_ioaux_master_bridge">ddr4_inst_cal_slave_component_ioaux_master_bridge</a>
- </td>
- </tr>
- <tr>
- <td></td>
- <td></td>
- <td class="to">  s0</td>
- </tr>
- </table>
- </div>
- <br/>
- <br/>
- <table class="flowbox">
- <tr>
- <td class="parametersbox">
- <h2>Parameters</h2>
- <table>
- <tr>
- <td class="parametername">SYS_INFO_DEVICE_FAMILY</td>
- <td class="parametervalue">Arria 10</td>
- </tr>
- <tr>
- <td class="parametername">SYS_INFO_DEVICE</td>
- <td class="parametervalue">10AX115S2F45E1SG</td>
- </tr>
- <tr>
- <td class="parametername">SYS_INFO_DEVICE_SPEEDGRADE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">FAMILY_ENUM</td>
- <td class="parametervalue">FAMILY_ARRIA10</td>
- </tr>
- <tr>
- <td class="parametername">TRAIT_SUPPORTS_VID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PROTOCOL_ENUM</td>
- <td class="parametervalue">PROTOCOL_DDR4</td>
- </tr>
- <tr>
- <td class="parametername">IS_ED_SLAVE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">INTERNAL_TESTING_MODE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CAL_DEBUG_CLOCK_FREQUENCY</td>
- <td class="parametervalue">50000000</td>
- </tr>
- <tr>
- <td class="parametername">SYS_INFO_UNIQUE_ID</td>
- <td class="parametervalue">ip_arria10_e1sg_ddr4_8g_2400_ddr4_inst</td>
- </tr>
- <tr>
- <td class="parametername">PREV_PROTOCOL_ENUM</td>
- <td class="parametervalue">PROTOCOL_DDR4</td>
- </tr>
- <tr>
- <td class="parametername">PHY_FPGA_SPEEDGRADE_GUI</td>
- <td class="parametervalue">E1 (Production) - change device under 'View'->'Device Family'</td>
- </tr>
- <tr>
- <td class="parametername">PHY_TARGET_SPEEDGRADE</td>
- <td class="parametervalue">E1</td>
- </tr>
- <tr>
- <td class="parametername">PHY_TARGET_IS_ES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_TARGET_IS_ES2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_TARGET_IS_ES3</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_TARGET_IS_PRODUCTION</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_AC_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_CK_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DATA_CALIBRATED_OCT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RZQ</td>
- <td class="parametervalue">240</td>
- </tr>
- <tr>
- <td class="parametername">PHY_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PLL_ADD_EXTRA_CLKS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PLL_USER_NUM_OF_EXTRA_CLKS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_0</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_0</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_0</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_1</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_1</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_1</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_3</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_4</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_5</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_5</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_5</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_6</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_6</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_6</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_7</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_8</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_PHASE_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_VCO_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_NUM_OF_EXTRA_CLKS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_5</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_6</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_7</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_8</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PLL_EXTRA_CLK_ACTUAL_PHASE_PS_8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">133.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_IO_VOLTAGE</td>
- <td class="parametervalue">1.5</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR3_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1200.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_SSTL_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_40_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_SSTL_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_40_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_POD_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">OUT_OCT_34_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">IN_OCT_120_CAL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_STARTING_VREFIN</td>
- <td class="parametervalue">61.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_LVDS</td>
- </tr>
- <tr>
- <td class="parametername">PHY_DDR4_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">IO_STD_CMOS_12</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">633.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_RATE_ENUM</td>
- <td class="parametervalue">RATE_HALF</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_IO_VOLTAGE</td>
- <td class="parametervalue">1.5</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR2_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_QDR4_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_SOFT_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">533.333</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_RATE_ENUM</td>
- <td class="parametervalue">RATE_HALF</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_IO_VOLTAGE</td>
- <td class="parametervalue">1.8</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD2_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_ONLY</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">1066.667</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_RLD3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CONFIG_ENUM</td>
- <td class="parametervalue">CONFIG_PHY_AND_HARD_CTRL</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_MEM_CLK_FREQ_MHZ</td>
- <td class="parametervalue">800.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DEFAULT_REF_CLK_FREQ</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_REF_CLK_JITTER_PS</td>
- <td class="parametervalue">10.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_RATE_ENUM</td>
- <td class="parametervalue">RATE_QUARTER</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</td>
- <td class="parametervalue">CORE_CLKS_SHARING_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_IO_VOLTAGE</td>
- <td class="parametervalue">1.2</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DEFAULT_IO</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_HPS_ENABLE_EARLY_RELEASE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PERIODIC_OCT_RECAL_ENUM</td>
- <td class="parametervalue">PERIODIC_OCT_RECAL_AUTO</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_REF_CLK_FREQ_MHZ</td>
- <td class="parametervalue">-1.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_PING_PONG_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_USER_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AC_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_CK_SLEW_RATE_ENUM</td>
- <td class="parametervalue">SLEW_RATE_FAST</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_OUT_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_DATA_IN_MODE_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_AUTO_STARTING_VREFIN_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_STARTING_VREFIN</td>
- <td class="parametervalue">70.0</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_PLL_REF_CLK_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">PHY_LPDDR3_RZQ_IO_STD_ENUM</td>
- <td class="parametervalue">unset</td>
- </tr>
- <tr>
- <td class="parametername">MEM_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_SODIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_READ_LATENCY</td>
- <td class="parametervalue">18.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_WRITE_LATENCY</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_BURST_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DATA_MASK_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_HAS_SIM_SUPPORT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_DATA_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_NUM_OF_READ_GROUPS</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_TTL_NUM_OF_WRITE_GROUPS</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_UDIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RANKS_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CKE_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DISCRETE_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_HIDE_ADV_MR_SETTINGS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RDIMM_CONFIG</td>
- <td class="parametervalue">0000000000000000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_LRDIMM_EXTENDED_CONFIG</td>
- <td class="parametervalue">0x000000000000000000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ALERT_N_PLACEMENT_ENUM</td>
- <td class="parametervalue">DDR3_ALERT_N_PLACEMENT_AC_LANES</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ALERT_N_DQS_GROUP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DQS_WIDTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CS_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ADDR_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_AC_PAR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DQS_WIDTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_ADDR_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TTL_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_MR3</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ADDRESS_MIRROR_BITVEC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BL_ENUM</td>
- <td class="parametervalue">DDR3_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_BT_ENUM</td>
- <td class="parametervalue">DDR3_BT_SEQUENTIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ASR_ENUM</td>
- <td class="parametervalue">DDR3_ASR_MANUAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SRT_ENUM</td>
- <td class="parametervalue">DDR3_SRT_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_PD_ENUM</td>
- <td class="parametervalue">DDR3_PD_OFF</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DRV_STR_ENUM</td>
- <td class="parametervalue">DDR3_DRV_STR_RZQ_6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_DLL_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR3_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR3_RTT_WR_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_WTCL</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_ATCL_ENUM</td>
- <td class="parametervalue">DDR3_ATCL_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TCL</td>
- <td class="parametervalue">7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT2_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT2_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODTN</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT0</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT1</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT2</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_R_DERIVED_ODT3</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODTN</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT0</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT1</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT2</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_W_DERIVED_ODT3</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">DDR3_SPEEDBIN_2133</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIS_PS</td>
- <td class="parametervalue">60</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIS_AC_MV</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIH_PS</td>
- <td class="parametervalue">95</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDS_PS</td>
- <td class="parametervalue">53</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDS_AC_MV</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDH_PS</td>
- <td class="parametervalue">55</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSQ_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCK_PS</td>
- <td class="parametervalue">180</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSS_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TQSH_CYC</td>
- <td class="parametervalue">0.4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDSH_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWLS_PS</td>
- <td class="parametervalue">125.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWLH_PS</td>
- <td class="parametervalue">125.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDSS_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TMRD_CK_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRAS_NS</td>
- <td class="parametervalue">33.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRCD_NS</td>
- <td class="parametervalue">13.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRP_NS</td>
- <td class="parametervalue">13.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TREFI_US</td>
- <td class="parametervalue">7.8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRFC_NS</td>
- <td class="parametervalue">160.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWTR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TFAW_NS</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRRD_CYC</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRTP_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TINIT_CK</td>
- <td class="parametervalue">499</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDS</td>
- <td class="parametervalue">450</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDM</td>
- <td class="parametervalue">900</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TDQSCKDL</td>
- <td class="parametervalue">1200</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRAS_CYC</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRCD_CYC</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRP_CYC</td>
- <td class="parametervalue">14</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TRFC_CYC</td>
- <td class="parametervalue">171</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TWR_CYC</td>
- <td class="parametervalue">16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TFAW_CYC</td>
- <td class="parametervalue">27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_TREFI_CYC</td>
- <td class="parametervalue">8320</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CFG_GEN_SBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR3_CFG_GEN_DBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_SODIMM</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CHIP_ID_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RANKS_PER_DIMM</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CKE_PER_DIMM</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">15</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BANK_GROUP_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_PAR_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_PLACEMENT_ENUM</td>
- <td class="parametervalue">DDR4_ALERT_N_PLACEMENT_DATA_LANES</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_DQS_GROUP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_AC_LANE</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ALERT_N_AC_PIN</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DISCRETE_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MIRROR_ADDRESSING_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_HIDE_ADV_MR_SETTINGS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BL_ENUM</td>
- <td class="parametervalue">DDR4_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_BT_ENUM</td>
- <td class="parametervalue">DDR4_BT_SEQUENTIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCL</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR4_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DLL_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ATCL_ENUM</td>
- <td class="parametervalue">DDR4_ATCL_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DRV_STR_ENUM</td>
- <td class="parametervalue">DDR4_DRV_STR_RZQ_7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ASR_ENUM</td>
- <td class="parametervalue">DDR4_ASR_MANUAL_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR4_RTT_WR_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WTCL</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_CRC</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_GEARDOWN</td>
- <td class="parametervalue">DDR4_GEARDOWN_HR</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_PER_DRAM_ADDR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_SENSOR_READOUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_FINE_GRANULARITY_REFRESH</td>
- <td class="parametervalue">DDR4_FINE_REFRESH_FIXED_1X</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MPR_READ_FORMAT</td>
- <td class="parametervalue">DDR4_MPR_READ_FORMAT_SERIAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MAX_POWERDOWN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_CONTROLLED_RFSH_RANGE</td>
- <td class="parametervalue">DDR4_TEMP_CONTROLLED_RFSH_NORMAL</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TEMP_CONTROLLED_RFSH_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_INTERNAL_VREFDQ_MONITOR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CAL_MODE</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SELF_RFSH_ABORT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_PREAMBLE_TRAINING</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_PREAMBLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_PREAMBLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_AC_PARITY_LATENCY</td>
- <td class="parametervalue">DDR4_AC_PARITY_LATENCY_DISABLE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ODT_IN_POWERDOWN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RTT_PARK</td>
- <td class="parametervalue">DDR4_RTT_PARK_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_AC_PERSISTENT_ERROR</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_DBI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_READ_DBI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DEFAULT_VREFOUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_VALUE</td>
- <td class="parametervalue">60.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USER_VREFDQ_TRAINING_RANGE</td>
- <td class="parametervalue">DDR4_VREFDQ_TRAINING_RANGE_1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CA_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CA_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CS_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CS_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_CKE_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_CKE_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_ODT_IBT_ENUM</td>
- <td class="parametervalue">DDR4_RCD_ODT_IBT_100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_NOM_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_NOM_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_WR_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_WR_RZQ_3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_RTT_PARK_ENUM</td>
- <td class="parametervalue">DDR4_DB_RTT_PARK_ODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DB_DQ_DRV_ENUM</td>
- <td class="parametervalue">DDR4_DB_DRV_STR_RZQ_7</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_137_RCD_CA_DRV</td>
- <td class="parametervalue">101</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_138_RCD_CK_DRV</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_140_DRAM_VREFDQ_R0</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_141_DRAM_VREFDQ_R1</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_142_DRAM_VREFDQ_R2</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_143_DRAM_VREFDQ_R3</td>
- <td class="parametervalue">29</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_144_DB_VREFDQ</td>
- <td class="parametervalue">37</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_145_DB_MDQ_DRV</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_148_DRAM_DRV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_149_DRAM_RTT_WR_NOM</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_152_DRAM_RTT_PARK</td>
- <td class="parametervalue">39</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_133_RCD_DB_VENDOR_LSB</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_134_RCD_DB_VENDOR_MSB</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_135_RCD_REV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPD_139_DB_REV</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_ODT_LESS_BS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_ODT_LESS_BS_PARK_OHM</td>
- <td class="parametervalue">240</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_DQS_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CS_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CS_PER_DIMM</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CKE_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ODT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ADDR_WIDTH</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_VALUE</td>
- <td class="parametervalue">60.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_RANGE</td>
- <td class="parametervalue">DDR4_VREFDQ_TRAINING_RANGE_1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VREFDQ_TRAINING_RANGE_DISP</td>
- <td class="parametervalue">Range 2 - 45% to 77.5%</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_DQS_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CS_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CKE_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_ODT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_BANK_GROUP_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_CHIP_ID_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_ADDR_WIDTH</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_RM_WIDTH</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_DIMMS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TTL_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR0</td>
- <td class="parametervalue">2112</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR1</td>
- <td class="parametervalue">65537</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR2</td>
- <td class="parametervalue">131120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR3</td>
- <td class="parametervalue">197120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR4</td>
- <td class="parametervalue">262144</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR5</td>
- <td class="parametervalue">328736</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_MR6</td>
- <td class="parametervalue">394327</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RDIMM_CONFIG</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_EXTENDED_CONFIG</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_ADDRESS_MIRROR_BITVEC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_PARITY_CONTROL_WORD</td>
- <td class="parametervalue">13</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_RCD_COMMAND_LATENCY</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_2X2</td>
- <td class="parametervalue">on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_4X2</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_4X2</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_4X2</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT2_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT2_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_ODT3_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODTN</td>
- <td class="parametervalue">Rank 0,Rank 1,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT0</td>
- <td class="parametervalue">(Drive) RZQ/7 (34 Ohm),ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT1</td>
- <td class="parametervalue">ODT Disabled,(Drive) RZQ/7 (34 Ohm),-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT2</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_R_DERIVED_ODT3</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODTN</td>
- <td class="parametervalue">Rank 0,Rank 1,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT0</td>
- <td class="parametervalue">(Nominal) ODT Disabled,ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT1</td>
- <td class="parametervalue">ODT Disabled,(Nominal) ODT Disabled,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT2</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_W_DERIVED_ODT3</td>
- <td class="parametervalue">-,-,-,-</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">4194308</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">33</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">33</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_SPEEDBIN_ENUM</td>
- <td class="parametervalue">DDR4_SPEEDBIN_2400</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIS_PS</td>
- <td class="parametervalue">60</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIS_AC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIH_PS</td>
- <td class="parametervalue">95</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TIH_DC_MV</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDIVW_TOTAL_UI</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_VDIVW_TOTAL</td>
- <td class="parametervalue">136</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSQ_UI</td>
- <td class="parametervalue">0.16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQH_UI</td>
- <td class="parametervalue">0.76</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDVWP_UI</td>
- <td class="parametervalue">0.72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCK_PS</td>
- <td class="parametervalue">180</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSS_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQSH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDSH_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDSS_CYC</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWLS_PS</td>
- <td class="parametervalue">122.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWLH_PS</td>
- <td class="parametervalue">122.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TMRD_CK_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRAS_NS</td>
- <td class="parametervalue">33.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRCD_NS</td>
- <td class="parametervalue">14.06</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRP_NS</td>
- <td class="parametervalue">14.06</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TREFI_US</td>
- <td class="parametervalue">7.8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_NS</td>
- <td class="parametervalue">160.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWTR_L_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWTR_S_CYC</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_NS</td>
- <td class="parametervalue">25.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_L_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_S_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCCD_L_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TCCD_S_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_DLR_NS</td>
- <td class="parametervalue">90.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_DLR_CYC</td>
- <td class="parametervalue">16</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRRD_DLR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDIVW_DJ_CYC</td>
- <td class="parametervalue">0.1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSQ_PS</td>
- <td class="parametervalue">66</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TINIT_CK</td>
- <td class="parametervalue">600000</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDS</td>
- <td class="parametervalue">450</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDM</td>
- <td class="parametervalue">900</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TDQSCKDL</td>
- <td class="parametervalue">1200</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRAS_CYC</td>
- <td class="parametervalue">40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRCD_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRP_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_CYC</td>
- <td class="parametervalue">192</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TWR_CYC</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRTP_CYC</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TFAW_CYC</td>
- <td class="parametervalue">30</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TREFI_CYC</td>
- <td class="parametervalue">9360</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_WRITE_CMD_LATENCY</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_TRFC_DLR_CYC</td>
- <td class="parametervalue">108</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CFG_GEN_SBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_CFG_GEN_DBE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_DDR4_LRDIMM_VREFDQ_VALUE</td>
- <td class="parametervalue">1D</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DATA_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_ADDR_WIDTH</td>
- <td class="parametervalue">19</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BL</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_DATA_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_N_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_BWS_N_PER_DEVICE</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_CQ_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_K_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TWL_CYC</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_SPEEDBIN_ENUM</td>
- <td class="parametervalue">QDR2_SPEEDBIN_633</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TRL_CYC</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TSA_NS</td>
- <td class="parametervalue">0.23</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_THA_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TSD_NS</td>
- <td class="parametervalue">0.23</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_THD_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQD_NS</td>
- <td class="parametervalue">0.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQDOH_NS</td>
- <td class="parametervalue">-0.09</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_INTERNAL_JITTER_NS</td>
- <td class="parametervalue">0.08</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCQH_NS</td>
- <td class="parametervalue">0.71</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR2_TCCQO_NS</td>
- <td class="parametervalue">0.45</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_PORT_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_ADDR_WIDTH</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CK_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_AC_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DATA_ODT_MODE_ENUM</td>
- <td class="parametervalue">QDR4_ODT_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_PU_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">QDR4_OUTPUT_DRIVE_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">QDR4_OUTPUT_DRIVE_25_PCT</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DATA_INV_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_ADDR_INV_ENA</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_WIDTH</td>
- <td class="parametervalue">72</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_QK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DINV_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_USE_ADDR_PARITY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DQ_PER_PORT_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_QK_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DK_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_DINV_PER_PORT_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_BL</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TRL_CYC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TWL_CYC</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_CR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_SPEEDBIN_ENUM</td>
- <td class="parametervalue">QDR4_SPEEDBIN_2133</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TISH_PS</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TQKQ_MAX_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TQH_CYC</td>
- <td class="parametervalue">0.4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKDK_MAX_PS</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKDK_MIN_PS</td>
- <td class="parametervalue">-150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCKQK_MAX_PS</td>
- <td class="parametervalue">225</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TASH_PS</td>
- <td class="parametervalue">170</td>
- </tr>
- <tr>
- <td class="parametername">MEM_QDR4_TCSH_PS</td>
- <td class="parametervalue">170</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_DEVICE</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_ADDR_WIDTH</td>
- <td class="parametervalue">21</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_BL</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_CONFIG_ENUM</td>
- <td class="parametervalue">RLD2_CONFIG_TRC_8_TRL_8_TWL_9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DRIVE_IMPEDENCE_ENUM</td>
- <td class="parametervalue">RLD2_DRIVE_IMPEDENCE_INTERNAL_50</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_ODT_MODE_ENUM</td>
- <td class="parametervalue">RLD2_ODT_ON</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_QK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TRC</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TRL</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TWL</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_MR</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_SPEEDBIN_ENUM</td>
- <td class="parametervalue">RLD2_SPEEDBIN_18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_REFRESH_INTERVAL_US</td>
- <td class="parametervalue">0.24</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKH_CYC</td>
- <td class="parametervalue">0.45</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKH_HCYC</td>
- <td class="parametervalue">0.9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TAS_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TAH_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TDS_NS</td>
- <td class="parametervalue">0.17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TDH_NS</td>
- <td class="parametervalue">0.17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKQ_MAX_NS</td>
- <td class="parametervalue">0.12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TQKQ_MIN_NS</td>
- <td class="parametervalue">-0.12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKDK_MAX_NS</td>
- <td class="parametervalue">0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKDK_MIN_NS</td>
- <td class="parametervalue">-0.3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD2_TCKQK_MAX_NS</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_WIDTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEPTH_EXPANDED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_DEVICE</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_ADDR_WIDTH</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_BL</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DATA_LATENCY_MODE_ENUM</td>
- <td class="parametervalue">RLD3_DL_RL16_WL17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_T_RC_MODE_ENUM</td>
- <td class="parametervalue">RLD3_TRC_9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_OUTPUT_DRIVE_MODE_ENUM</td>
- <td class="parametervalue">RLD3_OUTPUT_DRIVE_40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_ODT_MODE_ENUM</td>
- <td class="parametervalue">RLD3_ODT_40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_AREF_PROTOCOL_ENUM</td>
- <td class="parametervalue">RLD3_AREF_BAC</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_WRITE_PROTOCOL_ENUM</td>
- <td class="parametervalue">RLD3_WRITE_1BANK</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEVICE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DEVICE_DEPTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_WIDTH</td>
- <td class="parametervalue">36</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_RD_GROUP</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DQ_PER_WR_GROUP</td>
- <td class="parametervalue">18</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_QK_WIDTH</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DK_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_DM_WIDTH</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">RLD3_SPEEDBIN_093E</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDS_PS</td>
- <td class="parametervalue">-30</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDH_PS</td>
- <td class="parametervalue">5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TQKQ_MAX_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKDK_MAX_CYC</td>
- <td class="parametervalue">0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKDK_MIN_CYC</td>
- <td class="parametervalue">-0.27</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TCKQK_MAX_PS</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIS_PS</td>
- <td class="parametervalue">85</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIH_PS</td>
- <td class="parametervalue">65</td>
- </tr>
- <tr>
- <td class="parametername">MEM_RLD3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQ_WIDTH</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DISCRETE_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CK_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DM_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ROW_ADDR_WIDTH</td>
- <td class="parametervalue">15</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_COL_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_BANK_ADDR_WIDTH</td>
- <td class="parametervalue">3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DM_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CS_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CKE_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ODT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_ADDR_WIDTH</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQ_PER_DQS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_FORMAT_ENUM</td>
- <td class="parametervalue">MEM_FORMAT_DISCRETE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR1</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR2</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR3</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_MR11</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_BL</td>
- <td class="parametervalue">LPDDR3_BL_BL8</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DATA_LATENCY</td>
- <td class="parametervalue">LPDDR3_DL_RL12_WL6</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DRV_STR</td>
- <td class="parametervalue">LPDDR3_DRV_STR_40D_40U</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_DQODT</td>
- <td class="parametervalue">LPDDR3_DQODT_DISABLE</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_PDODT</td>
- <td class="parametervalue">LPDDR3_PDODT_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_WLSELECT</td>
- <td class="parametervalue">Set A</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NWR</td>
- <td class="parametervalue">LPDDR3_NWR_NWR12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NUM_OF_LOGICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_NUM_OF_PHYSICAL_RANKS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_USE_DEFAULT_ODT</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_1X1</td>
- <td class="parametervalue">off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_1X1</td>
- <td class="parametervalue">Rank 0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_1X1</td>
- <td class="parametervalue">on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_2X2</td>
- <td class="parametervalue">off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT1_2X2</td>
- <td class="parametervalue">off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_2X2</td>
- <td class="parametervalue">Rank 0,Rank 1</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_2X2</td>
- <td class="parametervalue">on,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT1_2X2</td>
- <td class="parametervalue">off,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT0_4X4</td>
- <td class="parametervalue">off,off,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT1_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT2_4X4</td>
- <td class="parametervalue">on,on,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_ODT3_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODTN_4X4</td>
- <td class="parametervalue">Rank 0,Rank 1,Rank 2,Rank 3</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT0_4X4</td>
- <td class="parametervalue">on,on,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT1_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT2_4X4</td>
- <td class="parametervalue">on,on,on,on</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_ODT3_4X4</td>
- <td class="parametervalue">off,off,off,off</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODTN</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT0</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT1</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT2</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_R_DERIVED_ODT3</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODTN</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT0</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT1</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT2</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_W_DERIVED_ODT3</td>
- <td class="parametervalue">,</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SEQ_ODT_TABLE_LO</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SEQ_ODT_TABLE_HI</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_READ_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_WRITE_ODT_CHIP</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_READ_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_CTRL_CFG_WRITE_ODT_RANK</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_SPEEDBIN_ENUM</td>
- <td class="parametervalue">LPDDR3_SPEEDBIN_1600</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIS_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIH_PS</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TIH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDS_PS</td>
- <td class="parametervalue">75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDS_AC_MV</td>
- <td class="parametervalue">150</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDH_PS</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDH_DC_MV</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSQ_PS</td>
- <td class="parametervalue">135</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TQH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDL</td>
- <td class="parametervalue">614</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSS_CYC</td>
- <td class="parametervalue">1.25</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TQSH_CYC</td>
- <td class="parametervalue">0.38</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDSH_CYC</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWLS_PS</td>
- <td class="parametervalue">175.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWLH_PS</td>
- <td class="parametervalue">175.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDSS_CYC</td>
- <td class="parametervalue">0.2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TINIT_US</td>
- <td class="parametervalue">500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TMRR_CK_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TMRW_CK_CYC</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRAS_NS</td>
- <td class="parametervalue">42.5</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRCD_NS</td>
- <td class="parametervalue">18.75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRP_NS</td>
- <td class="parametervalue">18.75</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TREFI_US</td>
- <td class="parametervalue">3.9</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRFC_NS</td>
- <td class="parametervalue">210.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWR_NS</td>
- <td class="parametervalue">15.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWTR_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TFAW_NS</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRRD_CYC</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRTP_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TINIT_CK</td>
- <td class="parametervalue">499</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCK_DERV_PS</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDS</td>
- <td class="parametervalue">220</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCKDM</td>
- <td class="parametervalue">511</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TDQSCK_PS</td>
- <td class="parametervalue">5500</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRAS_CYC</td>
- <td class="parametervalue">34</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRCD_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRP_CYC</td>
- <td class="parametervalue">17</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRFC_CYC</td>
- <td class="parametervalue">168</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWR_CYC</td>
- <td class="parametervalue">12</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TFAW_CYC</td>
- <td class="parametervalue">40</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TREFI_CYC</td>
- <td class="parametervalue">3120</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TRL_CYC</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">MEM_LPDDR3_TWL_CYC</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">1.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">5.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RCLK_SLEW_RATE</td>
- <td class="parametervalue">8.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RDATA_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_AC_ISI_NS</td>
- <td class="parametervalue">0.22</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RCLK_ISI_NS</td>
- <td class="parametervalue">0.22</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WCLK_ISI_NS</td>
- <td class="parametervalue">0.078</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_RDATA_ISI_NS</td>
- <td class="parametervalue">0.155</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_WDATA_ISI_NS</td>
- <td class="parametervalue">0.16</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_DDR4_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.18</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_K_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_Q_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_D_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_TO_K_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_MAX_K_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_K_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_Q_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_D_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR2_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_IS_SKEW_WITHIN_QK_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_PKG_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_DK_TO_CK_SKEW_NS</td>
- <td class="parametervalue">-0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_BETWEEN_DK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_MAX_DK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RCLK_SLEW_RATE</td>
- <td class="parametervalue">5.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_QDR4_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.094</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.031</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.063</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_IS_SKEW_WITHIN_QK_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_PKG_BRD_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_DK_TO_CK_SKEW_NS</td>
- <td class="parametervalue">-0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_BETWEEN_DK_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_MAX_DK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">7.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">3.5</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_WITHIN_QK_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_RLD3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USE_DEFAULT_SLEW_RATES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USE_DEFAULT_ISI_VALUES</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_USER_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_IS_SKEW_WITHIN_DQS_DESKEWED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_IS_SKEW_WITHIN_AC_DESKEWED</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_DQS_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_BETWEEN_DIMMS_NS</td>
- <td class="parametervalue">0.05</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_BETWEEN_DQS_NS</td>
- <td class="parametervalue">0.02</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_TO_CK_SKEW_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_MAX_CK_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_MAX_DQS_DELAY_NS</td>
- <td class="parametervalue">0.6</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TIS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TIH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TDS_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_TDH_DERATING_PS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_CK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WCLK_SLEW_RATE</td>
- <td class="parametervalue">4.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WDATA_SLEW_RATE</td>
- <td class="parametervalue">2.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_AC_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WCLK_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_RDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_WDATA_ISI_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_WITHIN_DQS_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">BOARD_LPDDR3_SKEW_WITHIN_AC_NS</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">DDR3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_ECC_AUTO_CORRECTION_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_STARVE_LIMIT</td>
- <td class="parametervalue">63</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">DDR4_CTRL_ADDR_ORDER_CS_R_B_C_BG</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ECC_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_ECC_AUTO_CORRECTION_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_STARVE_LIMIT</td>
- <td class="parametervalue">63</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_DDR4_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_MAX_BURST_COUNT</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_ENABLE_POWER_OF_TWO_BUS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR2_AVL_SYMBOL_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_MAX_BURST_COUNT</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_ENABLE_POWER_OF_TWO_BUS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_ADD_RAW_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_ADD_WAR_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_AVL_SYMBOL_WIDTH</td>
- <td class="parametervalue">9</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">4</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</td>
- <td class="parametervalue">11</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD2_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_RLD3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">RLD3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AVL_PROTOCOL_ENUM</td>
- <td class="parametervalue">CTRL_AVL_PROTOCOL_MM</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_SELF_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_POWER_DOWN_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_POWER_DOWN_CYCS</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_USER_REFRESH_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_USER_PRIORITY_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_AUTO_PRECHARGE_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_ADDR_ORDER_ENUM</td>
- <td class="parametervalue">LPDDR3_CTRL_ADDR_ORDER_CS_R_B_C</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_REORDER_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_STARVE_LIMIT</td>
- <td class="parametervalue">10</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_MMR_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">CTRL_LPDDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_REGTEST_MODE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TIMING_REGTEST_MODE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SYNTH_FOR_SIM</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_FAST_SIM_OVERRIDE</td>
- <td class="parametervalue">FAST_SIM_OVERRIDE_DEFAULT</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SEQ_RESET_AUTO_RELEASE</td>
- <td class="parametervalue">avl</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DB_RESET_AUTO_RELEASE</td>
- <td class="parametervalue">avl_release</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_VERBOSE_IOAUX</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ECLIPSE_DEBUG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_VJI</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_JTAG_UART</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_JTAG_UART_HEX</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_HPS_EMIF_DEBUG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SOFT_NIOS_MODE</td>
- <td class="parametervalue">SOFT_NIOS_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SOFT_NIOS_CLOCK_FREQUENCY</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_RS232_UART</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RS232_UART_BAUDRATE</td>
- <td class="parametervalue">57600</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_ADD_TEST_EMIFS</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_SEPARATE_RESETS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPOSE_DFT_SIGNALS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXTRA_CONFIGS</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_BOARD_DELAY_MODEL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BOARD_DELAY_CONFIG_STR</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_AVL_2_EXPORT_CFG_INTERFACE</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_AVL_2_NUM_CFG_INTERFACES</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_PLL_REF_CLK_OUT</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_PLL_LOCKED</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">SHORT_QSYS_INTERFACE_NAMES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXT_DOCS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_FAST_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_USE_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_ENABLE_SOFT_M20K</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_SIM_CHECKER_SKIP_TG</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CA_LEVEL_EN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_FULL_CAL_ON_RESET</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR3_CAL_ENABLE_MICRON_AP</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_CA_LEVEL</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_CA_DESKEW</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_SKIP_VREF_CAL</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ADDR0</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ADDR1</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_ENABLE_NON_DES</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_DDR4_CAL_FULL_CAL_ON_RESET</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR2_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_QDR4_SKIP_VREF_CAL</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TIS_AC_MV</td>
+ <td class="parametervalue">100</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
+ <td class="parametername">MEM_DDR4_TIH_PS</td>
+ <td class="parametervalue">95</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
+ <td class="parametername">MEM_DDR4_TIH_DC_MV</td>
+ <td class="parametervalue">75</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TDIVW_TOTAL_UI</td>
+ <td class="parametervalue">0.2</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
+ <td class="parametername">MEM_DDR4_VDIVW_TOTAL</td>
+ <td class="parametervalue">136</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TDQSQ_UI</td>
+ <td class="parametervalue">0.16</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_TQH_UI</td>
+ <td class="parametervalue">0.76</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
+ <td class="parametername">MEM_DDR4_TDVWP_UI</td>
+ <td class="parametervalue">0.72</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TDQSCK_PS</td>
+ <td class="parametervalue">180</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TDQSS_CYC</td>
+ <td class="parametervalue">0.27</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TQSH_CYC</td>
+ <td class="parametervalue">0.38</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TDSH_CYC</td>
+ <td class="parametervalue">0.18</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TDSS_CYC</td>
+ <td class="parametervalue">0.18</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TWLS_CYC</td>
+ <td class="parametervalue">0.13</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TWLH_CYC</td>
+ <td class="parametervalue">0.13</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
+ <td class="parametername">MEM_DDR4_TINIT_US</td>
+ <td class="parametervalue">500</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_TG_BE_PATTERN_LENGTH</td>
+ <td class="parametername">MEM_DDR4_TMRD_CK_CYC</td>
<td class="parametervalue">8</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TRAS_NS</td>
+ <td class="parametervalue">33.0</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD2_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TRCD_NS</td>
+ <td class="parametervalue">14.06</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
+ <td class="parametername">MEM_DDR4_TRP_NS</td>
+ <td class="parametervalue">14.06</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
+ <td class="parametername">MEM_DDR4_TREFI_US</td>
+ <td class="parametervalue">7.8</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TRFC_NS</td>
+ <td class="parametervalue">160.0</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
+ <td class="parametername">MEM_DDR4_TWR_NS</td>
+ <td class="parametervalue">15.0</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TWTR_L_CYC</td>
+ <td class="parametervalue">4</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">MEM_DDR4_TWTR_S_CYC</td>
+ <td class="parametervalue">2</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
+ <td class="parametername">MEM_DDR4_TFAW_NS</td>
+ <td class="parametervalue">25.0</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TRRD_L_CYC</td>
+ <td class="parametervalue">5</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TRRD_S_CYC</td>
+ <td class="parametervalue">4</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">MEM_DDR4_TCCD_L_CYC</td>
+ <td class="parametervalue">5</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">MEM_DDR4_TCCD_S_CYC</td>
+ <td class="parametervalue">4</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_BYPASS_REPEAT_STAGE</td>
+ <td class="parametername">BOARD_DDR4_USE_DEFAULT_ISI_VALUES</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_BYPASS_STRESS_STAGE</td>
+ <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">DIAG_RLD3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_SEPARATE_READ_WRITE_ITFS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_RLD3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_SIM_CAL_MODE_ENUM</td>
- <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EXPORT_SEQ_AVALON_SLAVE</td>
- <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
+ <td class="parametername">BOARD_DDR4_PKG_BRD_SKEW_WITHIN_DQS_NS</td>
+ <td class="parametervalue">0.02</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</td>
+ <td class="parametername">BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED</td>
<td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_NUM_OF_SLAVES</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_ISSP_EN</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS</td>
+ <td class="parametervalue">0.02</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_INTERFACE_ID</td>
- <td class="parametervalue">0</td>
+ <td class="parametername">BOARD_DDR4_DQS_TO_CK_SKEW_NS</td>
+ <td class="parametervalue">0.02</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_EFFICIENCY_MONITOR</td>
- <td class="parametervalue">EFFMON_MODE_DISABLED</td>
+ <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS</td>
+ <td class="parametervalue">0.05</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_USE_TG_AVL_2</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">BOARD_DDR4_SKEW_BETWEEN_DQS_NS</td>
+ <td class="parametervalue">0.02</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_ABSTRACT_PHY</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">BOARD_DDR4_AC_TO_CK_SKEW_NS</td>
+ <td class="parametervalue">0.0</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_DEFAULT_PATTERN</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">BOARD_DDR4_MAX_CK_DELAY_NS</td>
+ <td class="parametervalue">0.6</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_USER_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">BOARD_DDR4_MAX_DQS_DELAY_NS</td>
+ <td class="parametervalue">0.6</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_REPEAT_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">BOARD_DDR4_AC_ISI_NS</td>
+ <td class="parametervalue">0.22</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_BYPASS_STRESS_STAGE</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">BOARD_DDR4_RCLK_ISI_NS</td>
+ <td class="parametervalue">0.22</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_INFI_TG2_ERR_TEST</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">BOARD_DDR4_WCLK_ISI_NS</td>
+ <td class="parametervalue">0.078</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_TG_DATA_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
+ <td class="parametername">BOARD_DDR4_RDATA_ISI_NS</td>
+ <td class="parametervalue">0.155</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_TG_BE_PATTERN_LENGTH</td>
- <td class="parametervalue">8</td>
+ <td class="parametername">BOARD_DDR4_WDATA_ISI_NS</td>
+ <td class="parametervalue">0.16</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_SEPARATE_READ_WRITE_ITFS</td>
+ <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_EN</td>
<td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_EX_DESIGN_SEPARATE_RZQS</td>
- <td class="parametervalue">false</td>
+ <td class="parametername">CTRL_DDR4_AUTO_POWER_DOWN_CYCS</td>
+ <td class="parametervalue">32</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_SKIP_CA_LEVEL</td>
+ <td class="parametername">CTRL_DDR4_USER_REFRESH_EN</td>
<td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">DIAG_LPDDR3_SKIP_CA_DESKEW</td>
+ <td class="parametername">CTRL_DDR4_USER_PRIORITY_EN</td>
<td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_GEN_SIM</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_GEN_SIM</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">CTRL_DDR4_AUTO_PRECHARGE_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">CTRL_DDR4_ADDR_ORDER_ENUM</td>
+ <td class="parametervalue">DDR4_CTRL_ADDR_ORDER_CS_R_B_C_BG</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
+ <td class="parametername">CTRL_DDR4_ECC_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">CTRL_DDR4_ECC_AUTO_CORRECTION_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">CTRL_DDR4_REORDER_EN</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
+ <td class="parametername">CTRL_DDR4_STARVE_LIMIT</td>
+ <td class="parametervalue">63</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SIM</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">CTRL_DDR4_MMR_EN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
+ <td class="parametername">CTRL_DDR4_WR_TO_RD_SAME_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">CTRL_DDR4_RD_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_DDR4_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">CTRL_DDR4_RD_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
+ <td class="parametername">CTRL_DDR4_WR_TO_WR_DIFF_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_GEN_SIM</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">CTRL_DDR4_WR_TO_RD_DIFF_CHIP_DELTA_CYCS</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_GEN_SYNTH</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">DIAG_SOFT_NIOS_MODE</td>
+ <td class="parametervalue">SOFT_NIOS_MODE_DISABLED</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
+ <td class="parametername">DIAG_TG_AVL_2_EXPORT_CFG_INTERFACE</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_EXPORT_PLL_LOCKED</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR2_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">SHORT_QSYS_INTERFACE_NAMES</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
+ <td class="parametername">DIAG_DDR4_SIM_CAL_MODE_ENUM</td>
+ <td class="parametervalue">SIM_CAL_MODE_SKIP</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_GEN_SIM</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE</td>
+ <td class="parametervalue">CAL_DEBUG_EXPORT_MODE_DISABLED</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_GEN_SYNTH</td>
+ <td class="parametername">DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
- </tr>
- <tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES</td>
+ <td class="parametervalue">1</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_QDR4_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_EX_DESIGN_ISSP_EN</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
+ <td class="parametername">DIAG_DDR4_INTERFACE_ID</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_GEN_SIM</td>
- <td class="parametervalue">true</td>
+ <td class="parametername">DIAG_DDR4_EFFICIENCY_MONITOR</td>
+ <td class="parametervalue">EFFMON_MODE_DISABLED</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_GEN_SYNTH</td>
+ <td class="parametername">DIAG_DDR4_SIM_VERBOSE</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
+ <td class="parametername">DIAG_DDR4_USE_TG_AVL_2</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_ABSTRACT_PHY</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD2_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_BYPASS_DEFAULT_PATTERN</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_SEL_DESIGN</td>
- <td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
+ <td class="parametername">DIAG_DDR4_BYPASS_USER_STAGE</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_GEN_SIM</td>
+ <td class="parametername">DIAG_DDR4_BYPASS_REPEAT_STAGE</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_GEN_SYNTH</td>
+ <td class="parametername">DIAG_DDR4_BYPASS_STRESS_STAGE</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_HDL_FORMAT</td>
- <td class="parametervalue">HDL_FORMAT_VERILOG</td>
+ <td class="parametername">DIAG_DDR4_SKIP_CA_LEVEL</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_TARGET_DEV_KIT</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_SKIP_CA_DESKEW</td>
+ <td class="parametervalue">false</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_RLD3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">DIAG_DDR4_SKIP_VREF_CAL</td>
+ <td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_SEL_DESIGN</td>
+ <td class="parametername">EX_DESIGN_GUI_DDR4_SEL_DESIGN</td>
<td class="parametervalue">AVAIL_EX_DESIGNS_GEN_DESIGN</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_GEN_SIM</td>
+ <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SIM</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_GEN_SYNTH</td>
+ <td class="parametername">EX_DESIGN_GUI_DDR4_GEN_SYNTH</td>
<td class="parametervalue">true</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_HDL_FORMAT</td>
+ <td class="parametername">EX_DESIGN_GUI_DDR4_HDL_FORMAT</td>
<td class="parametervalue">HDL_FORMAT_VERILOG</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_TARGET_DEV_KIT</td>
+ <td class="parametername">EX_DESIGN_GUI_DDR4_TARGET_DEV_KIT</td>
<td class="parametervalue">TARGET_DEV_KIT_NONE</td>
</tr>
<tr>
- <td class="parametername">EX_DESIGN_GUI_LPDDR3_PREV_PRESET</td>
- <td class="parametervalue">TARGET_DEV_KIT_NONE</td>
+ <td class="parametername">deviceFamily</td>
+ <td class="parametervalue">UNKNOWN</td>
+ </tr>
+ <tr>
+ <td class="parametername">generateLegacySim</td>
+ <td class="parametervalue">false</td>
</tr>
+ </table>
+ </td>
+ </tr>
+ </table>  
+ <table class="flowbox">
+ <tr>
+ <td class="parametersbox">
+ <h2>Software Assignments</h2>(none)</td>
+ </tr>
+ </table>
+ </div>
+ <a name="module_ddr4_inst_arch"> </a>
+ <div>
+ <hr/>
+ <h2>ddr4_inst_arch</h2>altera_emif_arch_nf v18.0
+ <br/>
+ <div class="greydiv">
+ <table class="connectionboxes">
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="main" rowspan="8">ddr4_inst_arch</td>
+ <td class="from">cal_slave_clk_clock_source  </td>
+ <td class="neighbor" rowspan="2">
+ <a href="#module_ddr4_inst_cal_slave_component_clk_bridge">ddr4_inst_cal_slave_component_clk_bridge</a>
+ </td>
+ </tr>
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="to">  in_clk</td>
+ </tr>
+ <tr style="height:6px">
+ <td></td>
+ </tr>
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="from">cal_slave_reset_n_reset_source  </td>
+ <td class="neighbor" rowspan="2">
+ <a href="#module_ddr4_inst_cal_slave_component_rst_bridge">ddr4_inst_cal_slave_component_rst_bridge</a>
+ </td>
+ </tr>
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="to">  in_reset</td>
+ </tr>
+ <tr style="height:6px">
+ <td></td>
+ </tr>
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="from">cal_master_avalon_master  </td>
+ <td class="neighbor" rowspan="2">
+ <a href="#module_ddr4_inst_cal_slave_component_ioaux_master_bridge">ddr4_inst_cal_slave_component_ioaux_master_bridge</a>
+ </td>
+ </tr>
+ <tr>
+ <td></td>
+ <td></td>
+ <td class="to">  s0</td>
+ </tr>
+ </table>
+ </div>
+ <br/>
+ <br/>
+ <table class="flowbox">
+ <tr>
+ <td class="parametersbox">
+ <h2>Parameters</h2>
+ <table>
<tr>
<td class="parametername">SILICON_REV</td>
<td class="parametervalue">20nm5</td>
@@ -18071,6 +6063,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">PORT_CLKS_SHARING_SLAVE_IN_WIDTH</td>
<td class="parametervalue">32</td>
</tr>
+ <tr>
+ <td class="parametername">PORT_CLKS_SHARING_SLAVE_OUT_WIDTH</td>
+ <td class="parametervalue">32</td>
+ </tr>
<tr>
<td class="parametername">PORT_AFI_RLAT_WIDTH</td>
<td class="parametervalue">6</td>
@@ -18925,7 +6921,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst_cal_slave_component"> </a>
<div>
<hr/>
- <h2>ddr4_inst_cal_slave_component</h2>altera_emif_cal_slave_nf v17.0
+ <h2>ddr4_inst_cal_slave_component</h2>altera_emif_cal_slave_nf v18.0
<br/>
<br/>
<br/>
@@ -18946,22 +6942,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">SOFT_RAM_HEXFILE</td>
<td class="parametervalue">../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</td>
</tr>
- <tr>
- <td class="parametername">AUTO_DEVICE_FAMILY</td>
- <td class="parametervalue">ARRIA10</td>
- </tr>
- <tr>
- <td class="parametername">AUTO_DEVICE</td>
- <td class="parametervalue">10AX115S2F45E1SG</td>
- </tr>
- <tr>
- <td class="parametername">AUTO_DEVICE_SPEEDGRADE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">Arria 10</td>
- </tr>
<tr>
<td class="parametername">generateLegacySim</td>
<td class="parametervalue">false</td>
@@ -18980,7 +6960,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst_cal_slave_component_clk_bridge"> </a>
<div>
<hr/>
- <h2>ddr4_inst_cal_slave_component_clk_bridge</h2>altera_clock_bridge v17.0
+ <h2>ddr4_inst_cal_slave_component_clk_bridge</h2>altera_clock_bridge v18.0
<br/>
<div class="greydiv">
<table class="connectionboxes">
@@ -19066,7 +7046,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst_cal_slave_component_rst_bridge"> </a>
<div>
<hr/>
- <h2>ddr4_inst_cal_slave_component_rst_bridge</h2>altera_reset_bridge v17.0
+ <h2>ddr4_inst_cal_slave_component_rst_bridge</h2>altera_reset_bridge v18.0
<br/>
<div class="greydiv">
<table class="connectionboxes">
@@ -19135,8 +7115,8 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametervalue">0</td>
</tr>
<tr>
- <td class="parametername">AUTO_CLK_CLOCK_RATE</td>
- <td class="parametervalue">-1</td>
+ <td class="parametername">SYNC_RESET</td>
+ <td class="parametervalue">0</td>
</tr>
<tr>
<td class="parametername">deviceFamily</td>
@@ -19160,7 +7140,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst_cal_slave_component_ioaux_master_bridge"> </a>
<div>
<hr/>
- <h2>ddr4_inst_cal_slave_component_ioaux_master_bridge</h2>altera_avalon_mm_bridge v17.0
+ <h2>ddr4_inst_cal_slave_component_ioaux_master_bridge</h2>altera_avalon_mm_bridge v18.0
<br/>
<div class="greydiv">
<table class="connectionboxes">
@@ -19232,10 +7212,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">ADDRESS_WIDTH</td>
<td class="parametervalue">16</td>
</tr>
- <tr>
- <td class="parametername">SYSINFO_ADDR_WIDTH</td>
- <td class="parametervalue">14</td>
- </tr>
<tr>
<td class="parametername">USE_AUTO_ADDRESS_WIDTH</td>
<td class="parametervalue">0</td>
@@ -19244,18 +7220,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">AUTO_ADDRESS_WIDTH</td>
<td class="parametervalue">14</td>
</tr>
- <tr>
- <td class="parametername">HDL_ADDR_WIDTH</td>
- <td class="parametervalue">16</td>
- </tr>
<tr>
<td class="parametername">ADDRESS_UNITS</td>
<td class="parametervalue">SYMBOLS</td>
</tr>
- <tr>
- <td class="parametername">BURSTCOUNT_WIDTH</td>
- <td class="parametervalue">1</td>
- </tr>
<tr>
<td class="parametername">MAX_BURST_SIZE</td>
<td class="parametervalue">1</td>
@@ -19280,6 +7248,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">USE_RESPONSE</td>
<td class="parametervalue">0</td>
</tr>
+ <tr>
+ <td class="parametername">SYNC_RESET</td>
+ <td class="parametervalue">0</td>
+ </tr>
<tr>
<td class="parametername">deviceFamily</td>
<td class="parametervalue">UNKNOWN</td>
@@ -19302,7 +7274,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_ddr4_inst_cal_slave_component_ioaux_soft_ram"> </a>
<div>
<hr/>
- <h2>ddr4_inst_cal_slave_component_ioaux_soft_ram</h2>altera_avalon_onchip_memory2 v17.0
+ <h2>ddr4_inst_cal_slave_component_ioaux_soft_ram</h2>altera_avalon_onchip_memory2 v18.0
<br/>
<div class="greydiv">
<table class="connectionboxes">
@@ -19361,10 +7333,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">dataWidth</td>
<td class="parametervalue">32</td>
</tr>
- <tr>
- <td class="parametername">dataWidth2</td>
- <td class="parametervalue">32</td>
- </tr>
<tr>
<td class="parametername">dualPort</td>
<td class="parametervalue">false</td>
@@ -19373,10 +7341,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">enableDiffWidth</td>
<td class="parametervalue">false</td>
</tr>
- <tr>
- <td class="parametername">derived_enableDiffWidth</td>
- <td class="parametervalue">false</td>
- </tr>
<tr>
<td class="parametername">initMemContent</td>
<td class="parametervalue">true</td>
@@ -19401,22 +7365,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">readDuringWriteMode</td>
<td class="parametervalue">DONT_CARE</td>
</tr>
- <tr>
- <td class="parametername">simAllowMRAMContentsFile</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">simMemInitOnlyFilename</td>
- <td class="parametervalue">0</td>
- </tr>
<tr>
<td class="parametername">singleClockOperation</td>
<td class="parametervalue">false</td>
</tr>
- <tr>
- <td class="parametername">derived_singleClockOperation</td>
- <td class="parametervalue">false</td>
- </tr>
<tr>
<td class="parametername">slave1Latency</td>
<td class="parametervalue">1</td>
@@ -19429,10 +7381,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">useNonDefaultInitFile</td>
<td class="parametervalue">true</td>
</tr>
- <tr>
- <td class="parametername">copyInitFile</td>
- <td class="parametervalue">true</td>
- </tr>
<tr>
<td class="parametername">useShallowMemBlocks</td>
<td class="parametervalue">false</td>
@@ -19449,46 +7397,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametername">resetrequest_enabled</td>
<td class="parametervalue">false</td>
</tr>
- <tr>
- <td class="parametername">autoInitializationFileName</td>
- <td class="parametervalue">altera_emif_cal_slave_nf_ioaux_soft_ram</td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">ARRIA10</td>
- </tr>
- <tr>
- <td class="parametername">deviceFeatures</td>
- <td class="parametervalue">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</td>
- </tr>
- <tr>
- <td class="parametername">derived_set_addr_width</td>
- <td class="parametervalue">12</td>
- </tr>
- <tr>
- <td class="parametername">derived_set_addr_width2</td>
- <td class="parametervalue">12</td>
- </tr>
- <tr>
- <td class="parametername">derived_set_data_width</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">derived_set_data_width2</td>
- <td class="parametervalue">32</td>
- </tr>
- <tr>
- <td class="parametername">derived_gui_ram_block_type</td>
- <td class="parametervalue">Automatic</td>
- </tr>
- <tr>
- <td class="parametername">derived_is_hardcopy</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">derived_init_file_name</td>
- <td class="parametervalue">../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</td>
- </tr>
<tr>
<td class="parametername">generateLegacySim</td>
<td class="parametervalue">false</td>
@@ -19570,7 +7478,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<table class="blueBar">
<tr>
<td class="l">generation took 0.00 seconds</td>
- <td class="r">rendering took 0.19 seconds</td>
+ <td class="r">rendering took 0.04 seconds</td>
</tr>
</table>
</body>
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsimc b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsimc
index 4cc2f6fe59f3d0d310e13c28823002c2aa47d13e..d3eaba7535717c273c2f024fc93f9cd207550433 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsimc
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsimc
@@ -5,15 +5,15 @@
<parameters></parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.insertDefaultSlave</name>
+ <name>$system.qsys_mm.insertDefaultSlave</name>
<value>FALSE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>1</value>
</interconnectAssignment>
</interconnectAssignments>
@@ -1269,6 +1269,10 @@
<name>CTRL_QDR4_AVL_SYMBOL_WIDTH</name>
<value>9</value>
</parameter>
+ <parameter>
+ <name>CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC</name>
+ <value>4</value>
+ </parameter>
<parameter>
<name>CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</name>
<value>4</value>
@@ -1277,6 +1281,10 @@
<name>CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</name>
<value>11</value>
</parameter>
+ <parameter>
+ <name>CTRL_REORDER_EN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>CTRL_RLD2_AVL_PROTOCOL_ENUM</name>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -1357,6 +1365,10 @@
<name>DIAG_DDR3_CAL_FULL_CAL_ON_RESET</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_CA_LEVEL_EN</name>
<value>false</value>
@@ -1365,6 +1377,10 @@
<name>DIAG_DDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1401,6 +1417,10 @@
<name>DIAG_DDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1453,6 +1473,10 @@
<name>DIAG_DDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1489,6 +1513,10 @@
<name>DIAG_DDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -1545,6 +1573,10 @@
<name>DIAG_EXPORT_PLL_REF_CLK_OUT</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -1597,6 +1629,10 @@
<name>DIAG_FAST_SIM_OVERRIDE</name>
<value>FAST_SIM_OVERRIDE_DEFAULT</value>
</parameter>
+ <parameter>
+ <name>DIAG_HMC_HRC</name>
+ <value>auto</value>
+ </parameter>
<parameter>
<name>DIAG_INFI_TG2_ERR_TEST</name>
<value>false</value>
@@ -1629,6 +1665,10 @@
<name>DIAG_LPDDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -1665,6 +1705,10 @@
<name>DIAG_LPDDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -1709,6 +1753,10 @@
<name>DIAG_QDR2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1745,6 +1793,10 @@
<name>DIAG_QDR2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1781,6 +1833,10 @@
<name>DIAG_QDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1817,6 +1873,10 @@
<name>DIAG_QDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_SKIP_VREF_CAL</name>
<value>false</value>
@@ -1857,6 +1917,10 @@
<name>DIAG_RLD2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1893,6 +1957,10 @@
<name>DIAG_RLD2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1925,10 +1993,22 @@
<name>DIAG_RLD3_BYPASS_USER_STAGE</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_LEVEL_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1965,6 +2045,10 @@
<name>DIAG_RLD3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1997,6 +2081,10 @@
<name>DIAG_SIM_REGTEST_MODE</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_SIM_VERBOSE_LEVEL</name>
+ <value>5</value>
+ </parameter>
<parameter>
<name>DIAG_SOFT_NIOS_CLOCK_FREQUENCY</name>
<value>100</value>
@@ -3025,6 +3113,14 @@
<name>MEM_DDR4_HIDE_ADV_MR_SETTINGS</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_IN_PCT</name>
+ <value>61.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_OUT_PCT</name>
+ <value>50.0</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_INTERNAL_VREFDQ_MONITOR</name>
<value>false</value>
@@ -3569,13 +3665,21 @@
<name>MEM_DDR4_TTL_RM_WIDTH</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLH_CYC</name>
+ <value>0.13</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_TWLH_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLS_CYC</name>
+ <value>0.13</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWLS_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWR_CYC</name>
@@ -3643,11 +3747,11 @@
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT0</name>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT1</name>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT2</name>
@@ -4161,6 +4265,10 @@
<name>MEM_LPDDR3_W_ODTN_4X4</name>
<value>Rank 0,Rank 1,Rank 2,Rank 3</value>
</parameter>
+ <parameter>
+ <name>MEM_NUM_OF_DATA_ENDPOINTS</name>
+ <value>2</value>
+ </parameter>
<parameter>
<name>MEM_NUM_OF_LOGICAL_RANKS</name>
<value>2</value>
@@ -4277,6 +4385,10 @@
<name>MEM_QDR4_ADDR_WIDTH</name>
<value>21</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_AVL_CHNLS</name>
+ <value>8</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_BL</name>
<value>2</value>
@@ -4353,6 +4465,10 @@
<name>MEM_QDR4_FORMAT_ENUM</name>
<value>MEM_FORMAT_DISCRETE</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_MEM_TYPE_ENUM</name>
+ <value>MEM_XP</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</name>
<value>QDR4_OUTPUT_DRIVE_25_PCT</value>
@@ -4369,6 +4485,10 @@
<name>MEM_QDR4_QK_WIDTH</name>
<value>4</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_SKIP_ODT_SWEEPING</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_SPEEDBIN_ENUM</name>
<value>QDR4_SPEEDBIN_2133</value>
@@ -4765,6 +4885,10 @@
<name>PHY_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DATA_CALIBRATED_OCT</name>
<value>true</value>
@@ -4817,6 +4941,10 @@
<name>PHY_DDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -4977,6 +5105,10 @@
<name>PHY_DDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR4_DATA_IN_MODE_ENUM</name>
<value>IN_OCT_120_CAL</value>
@@ -5145,6 +5277,10 @@
<name>PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_LPDDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5313,6 +5449,10 @@
<name>PHY_QDR2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5473,6 +5613,10 @@
<name>PHY_QDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR4_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5645,6 +5789,10 @@
<name>PHY_RLD2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5805,6 +5953,10 @@
<name>PHY_RLD3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -6385,6 +6537,10 @@
<name>SYS_INFO_DEVICE</name>
<value>10AX115S2F45E1SG</value>
</parameter>
+ <parameter>
+ <name>SYS_INFO_DEVICE_DIE_REVISIONS</name>
+ <value></value>
+ </parameter>
<parameter>
<name>SYS_INFO_DEVICE_FAMILY</name>
<value>Arria 10</value>
@@ -6404,18 +6560,18 @@
</parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>0</value>
</interconnectAssignment>
</interconnectAssignments>
<className>altera_emif</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ddr4_inst</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa</uniqueName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst</path>
@@ -7697,6 +7853,10 @@
<name>CTRL_QDR4_AVL_SYMBOL_WIDTH</name>
<value>9</value>
</parameter>
+ <parameter>
+ <name>CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC</name>
+ <value>4</value>
+ </parameter>
<parameter>
<name>CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</name>
<value>4</value>
@@ -7705,6 +7865,10 @@
<name>CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</name>
<value>11</value>
</parameter>
+ <parameter>
+ <name>CTRL_REORDER_EN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>CTRL_RLD2_AVL_PROTOCOL_ENUM</name>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -7809,6 +7973,10 @@
<name>DIAG_DDR3_CAL_FULL_CAL_ON_RESET</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_CA_LEVEL_EN</name>
<value>false</value>
@@ -7817,6 +7985,10 @@
<name>DIAG_DDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -7853,6 +8025,10 @@
<name>DIAG_DDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -7905,6 +8081,10 @@
<name>DIAG_DDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -7941,6 +8121,10 @@
<name>DIAG_DDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -7997,6 +8181,10 @@
<name>DIAG_EXPORT_PLL_REF_CLK_OUT</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -8049,6 +8237,10 @@
<name>DIAG_FAST_SIM_OVERRIDE</name>
<value>FAST_SIM_OVERRIDE_DEFAULT</value>
</parameter>
+ <parameter>
+ <name>DIAG_HMC_HRC</name>
+ <value>auto</value>
+ </parameter>
<parameter>
<name>DIAG_INFI_TG2_ERR_TEST</name>
<value>false</value>
@@ -8081,6 +8273,10 @@
<name>DIAG_LPDDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -8117,6 +8313,10 @@
<name>DIAG_LPDDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -8161,6 +8361,10 @@
<name>DIAG_QDR2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -8197,6 +8401,10 @@
<name>DIAG_QDR2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -8233,6 +8441,10 @@
<name>DIAG_QDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -8269,6 +8481,10 @@
<name>DIAG_QDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_SKIP_VREF_CAL</name>
<value>false</value>
@@ -8309,6 +8525,10 @@
<name>DIAG_RLD2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -8345,6 +8565,10 @@
<name>DIAG_RLD2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -8377,10 +8601,22 @@
<name>DIAG_RLD3_BYPASS_USER_STAGE</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_LEVEL_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -8417,6 +8653,10 @@
<name>DIAG_RLD3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -8449,6 +8689,10 @@
<name>DIAG_SIM_REGTEST_MODE</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_SIM_VERBOSE_LEVEL</name>
+ <value>5</value>
+ </parameter>
<parameter>
<name>DIAG_SOFT_NIOS_CLOCK_FREQUENCY</name>
<value>100</value>
@@ -9597,6 +9841,14 @@
<name>MEM_DDR4_HIDE_ADV_MR_SETTINGS</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_IN_PCT</name>
+ <value>61.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_OUT_PCT</name>
+ <value>50.0</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_INTERNAL_VREFDQ_MONITOR</name>
<value>false</value>
@@ -10141,13 +10393,21 @@
<name>MEM_DDR4_TTL_RM_WIDTH</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLH_CYC</name>
+ <value>0.13</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_TWLH_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLS_CYC</name>
+ <value>0.13</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWLS_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWR_CYC</name>
@@ -10215,11 +10475,11 @@
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT0</name>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT1</name>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT2</name>
@@ -10733,6 +10993,10 @@
<name>MEM_LPDDR3_W_ODTN_4X4</name>
<value>Rank 0,Rank 1,Rank 2,Rank 3</value>
</parameter>
+ <parameter>
+ <name>MEM_NUM_OF_DATA_ENDPOINTS</name>
+ <value>2</value>
+ </parameter>
<parameter>
<name>MEM_NUM_OF_LOGICAL_RANKS</name>
<value>2</value>
@@ -10849,6 +11113,10 @@
<name>MEM_QDR4_ADDR_WIDTH</name>
<value>21</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_AVL_CHNLS</name>
+ <value>8</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_BL</name>
<value>2</value>
@@ -10925,6 +11193,10 @@
<name>MEM_QDR4_FORMAT_ENUM</name>
<value>MEM_FORMAT_DISCRETE</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_MEM_TYPE_ENUM</name>
+ <value>MEM_XP</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</name>
<value>QDR4_OUTPUT_DRIVE_25_PCT</value>
@@ -10941,6 +11213,10 @@
<name>MEM_QDR4_QK_WIDTH</name>
<value>4</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_SKIP_ODT_SWEEPING</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_SPEEDBIN_ENUM</name>
<value>QDR4_SPEEDBIN_2133</value>
@@ -11353,6 +11629,10 @@
<name>PHY_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DATA_CALIBRATED_OCT</name>
<value>true</value>
@@ -11405,6 +11685,10 @@
<name>PHY_DDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -11565,6 +11849,10 @@
<name>PHY_DDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR4_DATA_IN_MODE_ENUM</name>
<value>IN_OCT_120_CAL</value>
@@ -11741,6 +12029,10 @@
<name>PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_LPDDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -11913,6 +12205,10 @@
<name>PHY_QDR2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -12073,6 +12369,10 @@
<name>PHY_QDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR4_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -12245,6 +12545,10 @@
<name>PHY_RLD2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -12405,6 +12709,10 @@
<name>PHY_RLD3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -14621,6 +14929,10 @@
<name>PORT_CLKS_SHARING_SLAVE_IN_WIDTH</name>
<value>32</value>
</parameter>
+ <parameter>
+ <name>PORT_CLKS_SHARING_SLAVE_OUT_WIDTH</name>
+ <value>32</value>
+ </parameter>
<parameter>
<name>PORT_CTRL_AMM_ADDRESS_WIDTH</name>
<value>27</value>
@@ -18117,6 +18429,10 @@
<name>SYS_INFO_DEVICE</name>
<value>10AX115S2F45E1SG</value>
</parameter>
+ <parameter>
+ <name>SYS_INFO_DEVICE_DIE_REVISIONS</name>
+ <value></value>
+ </parameter>
<parameter>
<name>SYS_INFO_DEVICE_FAMILY</name>
<value>Arria 10</value>
@@ -18708,16 +19024,33 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_emif_arch_nf</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i</uniqueName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_slave_clk_clock_source/arch.cal_slave_clk_in_clock_sink</name>
<end>arch/cal_slave_clk_in_clock_sink</end>
<start>arch/cal_slave_clk_clock_source</start>
@@ -18725,43 +19058,107 @@
<incidentConnection>
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
+ <end>cal_slave_component/clk</end>
+ <start>arch/cal_slave_clk_clock_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
+ <end>cal_slave_component/rst</end>
+ <start>arch/cal_slave_reset_n_reset_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>defaultConnection</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
</parameter>
<parameter>
<name>interconnectType</name>
<value>STANDARD</value>
</parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
+ </parameter>
+ <parameter>
+ <name>baseAddress</name>
+ <value>0x0000</value>
+ </parameter>
+ <parameter>
+ <name>maximumAdditionalLatency</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
+ </parameter>
+ <parameter>
+ <name>arbitrationPriority</name>
+ <value>1</value>
+ </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -18771,38 +19168,33 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_master_avalon_master/cal_slave_component.avl</name>
<end>cal_slave_component/avl</end>
<start>arch/cal_master_avalon_master</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_slave_reset_n_reset_source/arch.cal_slave_reset_n_in_reset_sink</name>
<end>arch/cal_slave_reset_n_in_reset_sink</end>
<start>arch/cal_slave_reset_n_reset_source</start>
</incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
- <end>cal_slave_component/clk</end>
- <start>arch/cal_slave_clk_clock_source</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
- <end>cal_slave_component/rst</end>
- <start>arch/cal_slave_reset_n_reset_source</start>
- </incidentConnection>
</incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch</path>
</instanceData>
@@ -18827,26 +19219,94 @@
</parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>0</value>
</interconnectAssignment>
</interconnectAssignments>
<className>altera_emif_cal_slave_nf</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>cal_slave_component</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq</uniqueName>
<nonce>0</nonce>
<incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
+ <end>cal_slave_component/clk</end>
+ <start>arch/cal_slave_clk_clock_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
+ <end>cal_slave_component/rst</end>
+ <start>arch/cal_slave_reset_n_reset_source</start>
+ </incidentConnection>
<incidentConnection>
<parameters>
<parameter>
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -18859,10 +19319,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -18871,16 +19327,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -18890,212 +19346,364 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_master_avalon_master/cal_slave_component.avl</name>
<end>cal_slave_component/avl</end>
<start>arch/cal_master_avalon_master</start>
</incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
- <end>cal_slave_component/clk</end>
- <start>arch/cal_slave_clk_clock_source</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
- <end>cal_slave_component/rst</end>
- <start>arch/cal_slave_reset_n_reset_source</start>
- </incidentConnection>
</incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component</path>
</instanceData>
<children>
<node>
- <instanceKey xsi:type="xs:string">ioaux_master_bridge</instanceKey>
+ <instanceKey xsi:type="xs:string">rst_controller</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>ADDRESS_UNITS</name>
- <value>SYMBOLS</value>
+ <name>ADAPT_RESET_REQUEST</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>ADDRESS_WIDTH</name>
- <value>16</value>
+ <name>MIN_RST_ASSERTION_TIME</name>
+ <value>3</value>
</parameter>
<parameter>
- <name>AUTO_ADDRESS_WIDTH</name>
- <value>14</value>
+ <name>NUM_RESET_INPUTS</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>BURSTCOUNT_WIDTH</name>
+ <name>OUTPUT_RESET_SYNC_EDGES</name>
+ <value>deassert</value>
+ </parameter>
+ <parameter>
+ <name>RESET_REQUEST_PRESENT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>RESET_REQ_EARLY_DSRT_TIME</name>
<value>1</value>
</parameter>
<parameter>
- <name>DATA_WIDTH</name>
- <value>32</value>
+ <name>RESET_REQ_WAIT_TIME</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>HDL_ADDR_WIDTH</name>
- <value>16</value>
+ <name>SYNC_DEPTH</name>
+ <value>2</value>
</parameter>
<parameter>
- <name>LINEWRAPBURSTS</name>
+ <name>USE_RESET_REQUEST_IN0</name>
<value>0</value>
</parameter>
<parameter>
- <name>MAX_BURST_SIZE</name>
- <value>1</value>
+ <name>USE_RESET_REQUEST_IN1</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>MAX_PENDING_RESPONSES</name>
- <value>4</value>
+ <name>USE_RESET_REQUEST_IN10</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>PIPELINE_COMMAND</name>
- <value>1</value>
+ <name>USE_RESET_REQUEST_IN11</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>PIPELINE_RESPONSE</name>
- <value>1</value>
+ <name>USE_RESET_REQUEST_IN12</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>SYMBOL_WIDTH</name>
- <value>8</value>
+ <name>USE_RESET_REQUEST_IN13</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>SYSINFO_ADDR_WIDTH</name>
- <value>14</value>
+ <name>USE_RESET_REQUEST_IN14</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>USE_AUTO_ADDRESS_WIDTH</name>
+ <name>USE_RESET_REQUEST_IN15</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_RESPONSE</name>
+ <name>USE_RESET_REQUEST_IN2</name>
<value>0</value>
</parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_avalon_mm_bridge</className>
- <version>17.0</version>
- <name>ioaux_master_bridge</name>
- <uniqueName>altera_avalon_mm_bridge</uniqueName>
- <fixedName>altera_avalon_mm_bridge</fixedName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters>
- <parameter>
- <name>defaultConnection</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
- </parameter>
- <parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
- </parameter>
- <parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN3</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN4</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN5</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN6</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN7</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN8</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN9</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_INPUT</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_reset_controller</className>
+ <version>18.0</version>
+ <name>rst_controller</name>
+ <uniqueName>altera_reset_controller</uniqueName>
+ <fixedName>altera_reset_controller</fixedName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>rst_controller/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>clockResetSysInfo</name>
<value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>ioaux_master_bridge/reset</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
<parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
- <start>ioaux_master_bridge/m0</start>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>rst_controller/reset_in0</end>
+ <start>rst_bridge/out_reset</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
- <end>ioaux_master_bridge/clk</end>
- <start>clk_bridge/out_clk</start>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <start>rst_controller/reset_out</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <end>ioaux_master_bridge/reset</end>
+ <version>18.0</version>
+ <end>ioaux_soft_ram/reset1</end>
<start>rst_controller/reset_out</start>
</incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_master_bridge</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_controller</path>
</instanceData>
<children></children>
</node>
<node>
- <instanceKey xsi:type="xs:string">mm_interconnect_0</instanceKey>
+ <instanceKey xsi:type="xs:string">ioaux_master_bridge</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>COMPOSE_CONTENTS</name>
- <value>add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};</value>
+ <name>ADDRESS_UNITS</name>
+ <value>SYMBOLS</value>
</parameter>
- </parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <parameter>
+ <name>ADDRESS_WIDTH</name>
+ <value>16</value>
+ </parameter>
+ <parameter>
+ <name>AUTO_ADDRESS_WIDTH</name>
+ <value>14</value>
+ </parameter>
+ <parameter>
+ <name>BURSTCOUNT_WIDTH</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>DATA_WIDTH</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>HDL_ADDR_WIDTH</name>
+ <value>16</value>
+ </parameter>
+ <parameter>
+ <name>LINEWRAPBURSTS</name>
<value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
- <className>altera_mm_interconnect</className>
- <version>17.0</version>
- <name>mm_interconnect_0</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki</uniqueName>
+ </parameter>
+ <parameter>
+ <name>MAX_BURST_SIZE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>MAX_PENDING_RESPONSES</name>
+ <value>4</value>
+ </parameter>
+ <parameter>
+ <name>PIPELINE_COMMAND</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>PIPELINE_RESPONSE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>SYMBOL_WIDTH</name>
+ <value>8</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>SYSINFO_ADDR_WIDTH</name>
+ <value>14</value>
+ </parameter>
+ <parameter>
+ <name>USE_AUTO_ADDRESS_WIDTH</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESPONSE</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_avalon_mm_bridge</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge</name>
+ <uniqueName>altera_avalon_mm_bridge</uniqueName>
+ <fixedName>altera_avalon_mm_bridge</fixedName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
+ <end>ioaux_master_bridge/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <version>18.0</version>
+ <end>ioaux_master_bridge/reset</end>
<start>rst_controller/reset_out</start>
</incidentConnection>
<incidentConnection>
@@ -19104,6 +19712,26 @@
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -19116,10 +19744,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -19128,16 +19752,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -19147,511 +19771,637 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<end>mm_interconnect_0/ioaux_master_bridge_m0</end>
<start>ioaux_master_bridge/m0</start>
</incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>mm_interconnect_0/clk_bridge_out_clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_master_bridge</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">clk_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>DERIVED_CLOCK_RATE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>EXPLICIT_CLOCK_RATE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>NUM_CLOCK_OUTPUTS</name>
+ <value>1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_clock_bridge</className>
+ <version>18.0</version>
+ <name>clk_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_180_kcm3w7a</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
<incidentConnection>
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
+ <end>ioaux_master_bridge/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>rst_controller/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>clockResetSysInfo</name>
<value></value>
</parameter>
<parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <end>ioaux_soft_ram/s1</end>
- <start>mm_interconnect_0/ioaux_soft_ram_s1</start>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/clk_bridge_out_clk</end>
+ <start>clk_bridge/out_clk</start>
</incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0</path>
- </instanceData>
- <children>
- <node>
- <instanceKey xsi:type="xs:string">clk_bridge_out_clk_clock_bridge</instanceKey>
- <instanceData xsi:type="data">
+ <incidentConnection>
<parameters>
<parameter>
- <name>DERIVED_CLOCK_RATE</name>
- <value>0</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>EXPLICIT_CLOCK_RATE</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>NUM_CLOCK_OUTPUTS</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_clock_bridge</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_170_wbcrk5i</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
- <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
- <end>ioaux_master_bridge_m0_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
- <end>ioaux_soft_ram_s1_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.clk_bridge_out_clk_clock_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">ioaux_master_bridge_reset_reset_bridge</instanceKey>
- <instanceData xsi:type="data">
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
+ <end>ioaux_soft_ram/clk1</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.clk_bridge</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">rst_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>ACTIVE_LOW_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>NUM_RESET_OUTPUTS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>SYNCHRONOUS_EDGES</name>
+ <value>none</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_reset_bridge</className>
+ <version>18.0</version>
+ <name>rst_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_180_ddebq5q</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
<parameters>
<parameter>
- <name>ACTIVE_LOW_RESET</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>NUM_RESET_OUTPUTS</name>
- <value>1</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>SYNCHRONOUS_EDGES</name>
- <value>deassert</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_reset_bridge</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_170_iv4agsa</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
- <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
- <end>ioaux_soft_ram_s1_translator/reset</end>
- <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
- <end>ioaux_master_bridge_m0_translator/reset</end>
- <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_reset_reset_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">ioaux_soft_ram_s1_translator</instanceKey>
- <instanceData xsi:type="data">
+ <className>reset</className>
+ <version>18.0</version>
+ <end>rst_controller/reset_in0</end>
+ <start>rst_bridge/out_reset</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_bridge</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">mm_interconnect_0</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>COMPOSE_CONTENTS</name>
+ <value>add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {SYNC_RESET} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNC_RESET} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments>
+ <interconnectAssignment>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
+ <value>HANDSHAKE</value>
+ </interconnectAssignment>
+ <interconnectAssignment>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
+ <value>0</value>
+ </interconnectAssignment>
+ </interconnectAssignments>
+ <className>altera_mm_interconnect</className>
+ <version>18.0</version>
+ <name>mm_interconnect_0</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
<parameters>
<parameter>
- <name>AV_ADDRESSGROUP</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_ADDRESS_SYMBOLS</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_ADDRESS_W</name>
- <value>12</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>AV_ALWAYSBURSTMAXBURST</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_BITS_PER_SYMBOL</name>
- <value>8</value>
- </parameter>
- <parameter>
- <name>AV_BURSTBOUNDARIES</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_BURSTCOUNT_SYMBOLS</name>
- <value>0</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/clk_bridge_out_clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_BURSTCOUNT_W</name>
- <value>1</value>
+ <name>defaultConnection</name>
+ <value>false</value>
</parameter>
<parameter>
- <name>AV_BYTEENABLE_W</name>
- <value>4</value>
+ <name>syncResets</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>AV_CONSTANT_BURST_BEHAVIOR</name>
- <value>0</value>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
</parameter>
<parameter>
- <name>AV_DATA_HOLD</name>
- <value>0</value>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
</parameter>
<parameter>
- <name>AV_DATA_HOLD_CYCLES</name>
- <value>0</value>
+ <name>domainAlias</name>
+ <value></value>
</parameter>
<parameter>
- <name>AV_DATA_W</name>
- <value>32</value>
+ <name>addressWidthSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>AV_INTERLEAVEBURSTS</name>
- <value>0</value>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
</parameter>
<parameter>
- <name>AV_ISBIGENDIAN</name>
- <value>0</value>
+ <name>baseAddress</name>
+ <value>0x0000</value>
</parameter>
<parameter>
- <name>AV_LINEWRAPBURSTS</name>
+ <name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
<parameter>
- <name>AV_MAX_PENDING_READ_TRANSACTIONS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>AV_MAX_PENDING_WRITE_TRANSACTIONS</name>
- <value>0</value>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
</parameter>
<parameter>
- <name>AV_READLATENCY</name>
+ <name>arbitrationPriority</name>
<value>1</value>
</parameter>
<parameter>
- <name>AV_READ_WAIT</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_READ_WAIT_CYCLES</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_REGISTERINCOMINGSIGNALS</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_REGISTEROUTGOINGSIGNALS</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_SETUP_WAIT</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_SETUP_WAIT_CYCLES</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>AV_SYMBOLS_PER_WORD</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>AV_TIMING_UNITS</name>
- <value>1</value>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>AV_WRITE_WAIT</name>
- <value>0</value>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_WRITE_WAIT_CYCLES</name>
- <value>0</value>
+ <name>addressMapSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>CHIPSELECT_THROUGH_READLATENCY</name>
- <value>0</value>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>avalon</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
+ <start>ioaux_master_bridge/m0</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>CLOCK_RATE</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>UAV_ADDRESSGROUP</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>UAV_ADDRESS_W</name>
- <value>16</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>UAV_BURSTCOUNT_W</name>
- <value>3</value>
+ <name>defaultConnection</name>
+ <value>false</value>
</parameter>
<parameter>
- <name>UAV_BYTEENABLE_W</name>
- <value>4</value>
+ <name>syncResets</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>UAV_CONSTANT_BURST_BEHAVIOR</name>
- <value>0</value>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
</parameter>
<parameter>
- <name>UAV_DATA_W</name>
- <value>32</value>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
</parameter>
<parameter>
- <name>USE_ADDRESS</name>
- <value>1</value>
+ <name>domainAlias</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_AV_CLKEN</name>
- <value>1</value>
+ <name>addressWidthSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_BEGINBURSTTRANSFER</name>
- <value>0</value>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
</parameter>
<parameter>
- <name>USE_BEGINTRANSFER</name>
- <value>0</value>
+ <name>baseAddress</name>
+ <value>0x0000</value>
</parameter>
<parameter>
- <name>USE_BURSTCOUNT</name>
+ <name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_BYTEENABLE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>USE_CHIPSELECT</name>
- <value>1</value>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
</parameter>
<parameter>
- <name>USE_DEBUGACCESS</name>
+ <name>arbitrationPriority</name>
<value>1</value>
</parameter>
<parameter>
- <name>USE_LOCK</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_OUTPUTENABLE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_READ</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_READDATA</name>
- <value>1</value>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>USE_READDATAVALID</name>
- <value>0</value>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>USE_READRESPONSE</name>
- <value>0</value>
+ <name>addressMapSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_UAV_CLKEN</name>
- <value>0</value>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>avalon</className>
+ <version>18.0</version>
+ <end>ioaux_soft_ram/s1</end>
+ <start>mm_interconnect_0/ioaux_soft_ram_s1</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0</path>
+ </instanceData>
+ <children>
+ <node>
+ <instanceKey xsi:type="xs:string">clk_bridge_out_clk_clock_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
<parameter>
- <name>USE_WAITREQUEST</name>
+ <name>DERIVED_CLOCK_RATE</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_WRITE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>USE_WRITEBYTEENABLE</name>
+ <name>EXPLICIT_CLOCK_RATE</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_WRITEDATA</name>
+ <name>NUM_CLOCK_OUTPUTS</name>
<value>1</value>
</parameter>
- <parameter>
- <name>USE_WRITERESPONSE</name>
- <value>0</value>
- </parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_merlin_slave_translator</className>
- <version>17.0</version>
- <name>ioaux_soft_ram_s1_translator</name>
- <uniqueName>altera_merlin_slave_translator</uniqueName>
- <fixedName>altera_merlin_slave_translator</fixedName>
+ <className>altera_clock_bridge</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_180_kcm3w7a</uniqueName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
+ <end>ioaux_master_bridge_m0_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
- <parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
+ <end>ioaux_soft_ram_s1_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
<value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
+ <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.clk_bridge_out_clk_clock_bridge</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">ioaux_master_bridge_reset_reset_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>ACTIVE_LOW_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>NUM_RESET_OUTPUTS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>SYNCHRONOUS_EDGES</name>
+ <value>deassert</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_reset_bridge</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_180_ddebq5q</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
- <end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
- <start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
+ <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
- <end>ioaux_soft_ram_s1_translator/reset</end>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
+ <end>ioaux_master_bridge_m0_translator/reset</end>
<start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
- <end>ioaux_soft_ram_s1_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
+ <end>ioaux_soft_ram_s1_translator/reset</end>
+ <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
</incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_soft_ram_s1_translator</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_reset_reset_bridge</path>
</instanceData>
<children></children>
</node>
<node>
- <instanceKey xsi:type="xs:string">ioaux_master_bridge_m0_translator</instanceKey>
+ <instanceKey xsi:type="xs:string">ioaux_soft_ram_s1_translator</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
@@ -19660,11 +20410,11 @@
</parameter>
<parameter>
<name>AV_ADDRESS_SYMBOLS</name>
- <value>1</value>
+ <value>0</value>
</parameter>
<parameter>
<name>AV_ADDRESS_W</name>
- <value>16</value>
+ <value>12</value>
</parameter>
<parameter>
<name>AV_ALWAYSBURSTMAXBURST</name>
@@ -19698,6 +20448,10 @@
<name>AV_DATA_HOLD</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>AV_DATA_HOLD_CYCLES</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>AV_DATA_W</name>
<value>32</value>
@@ -19716,16 +20470,24 @@
</parameter>
<parameter>
<name>AV_MAX_PENDING_READ_TRANSACTIONS</name>
- <value>64</value>
+ <value>1</value>
</parameter>
<parameter>
- <name>AV_READLATENCY</name>
+ <name>AV_MAX_PENDING_WRITE_TRANSACTIONS</name>
<value>0</value>
</parameter>
<parameter>
- <name>AV_READ_WAIT</name>
+ <name>AV_READLATENCY</name>
<value>1</value>
</parameter>
+ <parameter>
+ <name>AV_READ_WAIT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_READ_WAIT_CYCLES</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>AV_REGISTERINCOMINGSIGNALS</name>
<value>0</value>
@@ -19738,14 +20500,34 @@
<name>AV_SETUP_WAIT</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>AV_SETUP_WAIT_CYCLES</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>AV_SYMBOLS_PER_WORD</name>
<value>4</value>
</parameter>
+ <parameter>
+ <name>AV_TIMING_UNITS</name>
+ <value>1</value>
+ </parameter>
<parameter>
<name>AV_WRITE_WAIT</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>AV_WRITE_WAIT_CYCLES</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>CHIPSELECT_THROUGH_READLATENCY</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>CLOCK_RATE</name>
+ <value>1</value>
+ </parameter>
<parameter>
<name>SYNC_RESET</name>
<value>0</value>
@@ -19762,14 +20544,26 @@
<name>UAV_BURSTCOUNT_W</name>
<value>3</value>
</parameter>
+ <parameter>
+ <name>UAV_BYTEENABLE_W</name>
+ <value>4</value>
+ </parameter>
<parameter>
<name>UAV_CONSTANT_BURST_BEHAVIOR</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>UAV_DATA_W</name>
+ <value>32</value>
+ </parameter>
<parameter>
<name>USE_ADDRESS</name>
<value>1</value>
</parameter>
+ <parameter>
+ <name>USE_AV_CLKEN</name>
+ <value>1</value>
+ </parameter>
<parameter>
<name>USE_BEGINBURSTTRANSFER</name>
<value>0</value>
@@ -19780,7 +20574,7 @@
</parameter>
<parameter>
<name>USE_BURSTCOUNT</name>
- <value>1</value>
+ <value>0</value>
</parameter>
<parameter>
<name>USE_BYTEENABLE</name>
@@ -19788,11 +20582,7 @@
</parameter>
<parameter>
<name>USE_CHIPSELECT</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_CLKEN</name>
- <value>0</value>
+ <value>1</value>
</parameter>
<parameter>
<name>USE_DEBUGACCESS</name>
@@ -19802,9 +20592,13 @@
<name>USE_LOCK</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>USE_OUTPUTENABLE</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>USE_READ</name>
- <value>1</value>
+ <value>0</value>
</parameter>
<parameter>
<name>USE_READDATA</name>
@@ -19812,20 +20606,28 @@
</parameter>
<parameter>
<name>USE_READDATAVALID</name>
- <value>1</value>
+ <value>0</value>
</parameter>
<parameter>
<name>USE_READRESPONSE</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>USE_UAV_CLKEN</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>USE_WAITREQUEST</name>
- <value>1</value>
+ <value>0</value>
</parameter>
<parameter>
<name>USE_WRITE</name>
<value>1</value>
</parameter>
+ <parameter>
+ <name>USE_WRITEBYTEENABLE</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>USE_WRITEDATA</name>
<value>1</value>
@@ -19834,13 +20636,17 @@
<name>USE_WRITERESPONSE</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>WAITREQUEST_ALLOWANCE</name>
+ <value>0</value>
+ </parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_merlin_master_translator</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_m0_translator</name>
- <uniqueName>altera_merlin_master_translator</uniqueName>
- <fixedName>altera_merlin_master_translator</fixedName>
+ <className>altera_merlin_slave_translator</className>
+ <version>18.0</version>
+ <name>ioaux_soft_ram_s1_translator</name>
+ <uniqueName>altera_merlin_slave_translator</uniqueName>
+ <fixedName>altera_merlin_slave_translator</fixedName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
@@ -19849,6 +20655,26 @@
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -19861,10 +20687,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -19873,16 +20695,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -19892,297 +20714,385 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
<end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
<start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
- <end>ioaux_master_bridge_m0_translator/clk</end>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
+ <end>ioaux_soft_ram_s1_translator/clk</end>
<start>clk_bridge_out_clk_clock_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
- <end>ioaux_master_bridge_m0_translator/reset</end>
- <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_m0_translator</path>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
+ <end>ioaux_soft_ram_s1_translator/reset</end>
+ <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_soft_ram_s1_translator</path>
</instanceData>
<children></children>
</node>
- </children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">clk_bridge</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>DERIVED_CLOCK_RATE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>EXPLICIT_CLOCK_RATE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>NUM_CLOCK_OUTPUTS</name>
- <value>1</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_clock_bridge</className>
- <version>17.0</version>
- <name>clk_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_170_wbcrk5i</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
- <end>ioaux_soft_ram/clk1</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>rst_controller/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>mm_interconnect_0/clk_bridge_out_clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
- <end>ioaux_master_bridge/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.clk_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">rst_controller</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>ADAPT_RESET_REQUEST</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>MIN_RST_ASSERTION_TIME</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>NUM_RESET_INPUTS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>OUTPUT_RESET_SYNC_EDGES</name>
- <value>deassert</value>
- </parameter>
- <parameter>
- <name>RESET_REQUEST_PRESENT</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>RESET_REQ_EARLY_DSRT_TIME</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>RESET_REQ_WAIT_TIME</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>SYNC_DEPTH</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN10</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN11</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN12</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN13</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN14</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN15</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN2</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN3</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN5</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN6</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_INPUT</name>
- <value>0</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_reset_controller</className>
- <version>17.0</version>
- <name>rst_controller</name>
- <uniqueName>altera_reset_controller</uniqueName>
- <fixedName>altera_reset_controller</fixedName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>rst_controller/reset_in0</end>
- <start>rst_bridge/out_reset</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>rst_controller/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_soft_ram/reset1</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_master_bridge/reset</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_controller</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">rst_bridge</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>ACTIVE_LOW_RESET</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>NUM_RESET_OUTPUTS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>SYNCHRONOUS_EDGES</name>
- <value>none</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST</name>
- <value>0</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_reset_bridge</className>
- <version>17.0</version>
- <name>rst_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_170_iv4agsa</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
+ <node>
+ <instanceKey xsi:type="xs:string">ioaux_master_bridge_m0_translator</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>AV_ADDRESSGROUP</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_ADDRESS_SYMBOLS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>AV_ADDRESS_W</name>
+ <value>16</value>
+ </parameter>
+ <parameter>
+ <name>AV_ALWAYSBURSTMAXBURST</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_BITS_PER_SYMBOL</name>
+ <value>8</value>
+ </parameter>
+ <parameter>
+ <name>AV_BURSTBOUNDARIES</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_BURSTCOUNT_SYMBOLS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_BURSTCOUNT_W</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>AV_BYTEENABLE_W</name>
+ <value>4</value>
+ </parameter>
+ <parameter>
+ <name>AV_CONSTANT_BURST_BEHAVIOR</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_DATA_HOLD</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_DATA_W</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>AV_INTERLEAVEBURSTS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_ISBIGENDIAN</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_LINEWRAPBURSTS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_MAX_PENDING_READ_TRANSACTIONS</name>
+ <value>64</value>
+ </parameter>
+ <parameter>
+ <name>AV_READLATENCY</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_READ_WAIT</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>AV_REGISTERINCOMINGSIGNALS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_REGISTEROUTGOINGSIGNALS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_SETUP_WAIT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_SYMBOLS_PER_WORD</name>
+ <value>4</value>
+ </parameter>
+ <parameter>
+ <name>AV_WRITE_WAIT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>UAV_ADDRESSGROUP</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>UAV_ADDRESS_W</name>
+ <value>16</value>
+ </parameter>
+ <parameter>
+ <name>UAV_BURSTCOUNT_W</name>
+ <value>3</value>
+ </parameter>
+ <parameter>
+ <name>UAV_CONSTANT_BURST_BEHAVIOR</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_ADDRESS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_BEGINBURSTTRANSFER</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_BEGINTRANSFER</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_BURSTCOUNT</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_BYTEENABLE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_CHIPSELECT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_CLKEN</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_DEBUGACCESS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_LOCK</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_READ</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READDATA</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READDATAVALID</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READRESPONSE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_WAITREQUEST</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITEDATA</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITERESPONSE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>WAITREQUEST_ALLOWANCE</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>rst_controller/reset_in0</end>
- <start>rst_bridge/out_reset</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_bridge</path>
- </instanceData>
- <children></children>
+ <className>altera_merlin_master_translator</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_m0_translator</name>
+ <uniqueName>altera_merlin_master_translator</uniqueName>
+ <fixedName>altera_merlin_master_translator</fixedName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>defaultConnection</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
+ </parameter>
+ <parameter>
+ <name>baseAddress</name>
+ <value>0x0000</value>
+ </parameter>
+ <parameter>
+ <name>maximumAdditionalLatency</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
+ </parameter>
+ <parameter>
+ <name>arbitrationPriority</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>avalon</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
+ <end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
+ <start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
+ <end>ioaux_master_bridge_m0_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
+ <end>ioaux_master_bridge_m0_translator/reset</end>
+ <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_m0_translator</path>
+ </instanceData>
+ <children></children>
+ </node>
+ </children>
</node>
<node>
<instanceKey xsi:type="xs:string">ioaux_soft_ram</instanceKey>
@@ -20254,7 +21164,7 @@
</parameter>
<parameter>
<name>deviceFeatures</name>
- <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
+ <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
</parameter>
<parameter>
<name>dualPort</name>
@@ -20331,25 +21241,55 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_avalon_onchip_memory2</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_soft_ram</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za</uniqueName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
<end>ioaux_soft_ram/clk1</end>
<start>clk_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
+ <version>18.0</version>
<end>ioaux_soft_ram/reset1</end>
<start>rst_controller/reset_out</start>
</incidentConnection>
@@ -20359,6 +21299,26 @@
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -20371,10 +21331,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -20383,16 +21339,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -20402,7 +21358,7 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<end>ioaux_soft_ram/s1</end>
<start>mm_interconnect_0/ioaux_soft_ram_s1</start>
</incidentConnection>
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsynthc b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsynthc
index b25da7c0903d4b79e75be248091a80e0a82b7094..9dd2c4fff9f41e39c92384d8b2f4c802975434fb 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsynthc
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qgsynthc
@@ -5,15 +5,15 @@
<parameters></parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.insertDefaultSlave</name>
+ <name>$system.qsys_mm.insertDefaultSlave</name>
<value>FALSE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>1</value>
</interconnectAssignment>
</interconnectAssignments>
@@ -1269,6 +1269,10 @@
<name>CTRL_QDR4_AVL_SYMBOL_WIDTH</name>
<value>9</value>
</parameter>
+ <parameter>
+ <name>CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC</name>
+ <value>4</value>
+ </parameter>
<parameter>
<name>CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</name>
<value>4</value>
@@ -1277,6 +1281,10 @@
<name>CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</name>
<value>11</value>
</parameter>
+ <parameter>
+ <name>CTRL_REORDER_EN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>CTRL_RLD2_AVL_PROTOCOL_ENUM</name>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -1357,6 +1365,10 @@
<name>DIAG_DDR3_CAL_FULL_CAL_ON_RESET</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_CA_LEVEL_EN</name>
<value>false</value>
@@ -1365,6 +1377,10 @@
<name>DIAG_DDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1401,6 +1417,10 @@
<name>DIAG_DDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1453,6 +1473,10 @@
<name>DIAG_DDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1489,6 +1513,10 @@
<name>DIAG_DDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -1545,6 +1573,10 @@
<name>DIAG_EXPORT_PLL_REF_CLK_OUT</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -1597,6 +1629,10 @@
<name>DIAG_FAST_SIM_OVERRIDE</name>
<value>FAST_SIM_OVERRIDE_DEFAULT</value>
</parameter>
+ <parameter>
+ <name>DIAG_HMC_HRC</name>
+ <value>auto</value>
+ </parameter>
<parameter>
<name>DIAG_INFI_TG2_ERR_TEST</name>
<value>false</value>
@@ -1629,6 +1665,10 @@
<name>DIAG_LPDDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -1665,6 +1705,10 @@
<name>DIAG_LPDDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -1709,6 +1753,10 @@
<name>DIAG_QDR2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1745,6 +1793,10 @@
<name>DIAG_QDR2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1781,6 +1833,10 @@
<name>DIAG_QDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1817,6 +1873,10 @@
<name>DIAG_QDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_SKIP_VREF_CAL</name>
<value>false</value>
@@ -1857,6 +1917,10 @@
<name>DIAG_RLD2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1893,6 +1957,10 @@
<name>DIAG_RLD2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1925,10 +1993,22 @@
<name>DIAG_RLD3_BYPASS_USER_STAGE</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_LEVEL_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -1965,6 +2045,10 @@
<name>DIAG_RLD3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -1997,6 +2081,10 @@
<name>DIAG_SIM_REGTEST_MODE</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_SIM_VERBOSE_LEVEL</name>
+ <value>5</value>
+ </parameter>
<parameter>
<name>DIAG_SOFT_NIOS_CLOCK_FREQUENCY</name>
<value>100</value>
@@ -3025,6 +3113,14 @@
<name>MEM_DDR4_HIDE_ADV_MR_SETTINGS</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_IN_PCT</name>
+ <value>61.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_OUT_PCT</name>
+ <value>50.0</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_INTERNAL_VREFDQ_MONITOR</name>
<value>false</value>
@@ -3569,13 +3665,21 @@
<name>MEM_DDR4_TTL_RM_WIDTH</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLH_CYC</name>
+ <value>0.13</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_TWLH_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLS_CYC</name>
+ <value>0.13</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWLS_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWR_CYC</name>
@@ -3643,11 +3747,11 @@
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT0</name>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT1</name>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT2</name>
@@ -4161,6 +4265,10 @@
<name>MEM_LPDDR3_W_ODTN_4X4</name>
<value>Rank 0,Rank 1,Rank 2,Rank 3</value>
</parameter>
+ <parameter>
+ <name>MEM_NUM_OF_DATA_ENDPOINTS</name>
+ <value>2</value>
+ </parameter>
<parameter>
<name>MEM_NUM_OF_LOGICAL_RANKS</name>
<value>2</value>
@@ -4277,6 +4385,10 @@
<name>MEM_QDR4_ADDR_WIDTH</name>
<value>21</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_AVL_CHNLS</name>
+ <value>8</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_BL</name>
<value>2</value>
@@ -4353,6 +4465,10 @@
<name>MEM_QDR4_FORMAT_ENUM</name>
<value>MEM_FORMAT_DISCRETE</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_MEM_TYPE_ENUM</name>
+ <value>MEM_XP</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</name>
<value>QDR4_OUTPUT_DRIVE_25_PCT</value>
@@ -4369,6 +4485,10 @@
<name>MEM_QDR4_QK_WIDTH</name>
<value>4</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_SKIP_ODT_SWEEPING</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_SPEEDBIN_ENUM</name>
<value>QDR4_SPEEDBIN_2133</value>
@@ -4765,6 +4885,10 @@
<name>PHY_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DATA_CALIBRATED_OCT</name>
<value>true</value>
@@ -4817,6 +4941,10 @@
<name>PHY_DDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -4977,6 +5105,10 @@
<name>PHY_DDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR4_DATA_IN_MODE_ENUM</name>
<value>IN_OCT_120_CAL</value>
@@ -5145,6 +5277,10 @@
<name>PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_LPDDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5313,6 +5449,10 @@
<name>PHY_QDR2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5473,6 +5613,10 @@
<name>PHY_QDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR4_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5645,6 +5789,10 @@
<name>PHY_RLD2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -5805,6 +5953,10 @@
<name>PHY_RLD3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -6385,6 +6537,10 @@
<name>SYS_INFO_DEVICE</name>
<value>10AX115S2F45E1SG</value>
</parameter>
+ <parameter>
+ <name>SYS_INFO_DEVICE_DIE_REVISIONS</name>
+ <value></value>
+ </parameter>
<parameter>
<name>SYS_INFO_DEVICE_FAMILY</name>
<value>Arria 10</value>
@@ -6404,18 +6560,18 @@
</parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>0</value>
</interconnectAssignment>
</interconnectAssignments>
<className>altera_emif</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ddr4_inst</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa</uniqueName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst</path>
@@ -6440,26 +6596,94 @@
</parameters>
<interconnectAssignments>
<interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
<value>HANDSHAKE</value>
</interconnectAssignment>
<interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
<value>0</value>
</interconnectAssignment>
</interconnectAssignments>
<className>altera_emif_cal_slave_nf</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>cal_slave_component</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq</uniqueName>
<nonce>0</nonce>
<incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
+ <end>cal_slave_component/clk</end>
+ <start>arch/cal_slave_clk_clock_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
+ <end>cal_slave_component/rst</end>
+ <start>arch/cal_slave_reset_n_reset_source</start>
+ </incidentConnection>
<incidentConnection>
<parameters>
<parameter>
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -6472,10 +6696,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -6484,16 +6704,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -6503,125 +6723,343 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_master_avalon_master/cal_slave_component.avl</name>
<end>cal_slave_component/avl</end>
<start>arch/cal_master_avalon_master</start>
</incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
- <end>cal_slave_component/clk</end>
- <start>arch/cal_slave_clk_clock_source</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
- <end>cal_slave_component/rst</end>
- <start>arch/cal_slave_reset_n_reset_source</start>
- </incidentConnection>
</incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component</path>
</instanceData>
<children>
<node>
- <instanceKey xsi:type="xs:string">mm_interconnect_0</instanceKey>
+ <instanceKey xsi:type="xs:string">clk_bridge</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>COMPOSE_CONTENTS</name>
- <value>add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};</value>
+ <name>DERIVED_CLOCK_RATE</name>
+ <value>0</value>
</parameter>
- </parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>qsys_mm.maxAdditionalLatency</name>
+ <parameter>
+ <name>EXPLICIT_CLOCK_RATE</name>
<value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
- <className>altera_mm_interconnect</className>
- <version>17.0</version>
- <name>mm_interconnect_0</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki</uniqueName>
+ </parameter>
+ <parameter>
+ <name>NUM_CLOCK_OUTPUTS</name>
+ <value>1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_clock_bridge</className>
+ <version>18.0</version>
+ <name>clk_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_180_kcm3w7a</uniqueName>
<nonce>0</nonce>
<incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
<incidentConnection>
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
+ <name>clockRateSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
+ <end>ioaux_master_bridge/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>rst_controller/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>domainAlias</name>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
<value></value>
</parameter>
<parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
- <start>ioaux_master_bridge/m0</start>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/clk_bridge_out_clk</end>
+ <start>clk_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
- <end>mm_interconnect_0/clk_bridge_out_clk</end>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
+ <end>ioaux_soft_ram/clk1</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.clk_bridge</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">ioaux_soft_ram</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>allowInSystemMemoryContentEditor</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>autoInitializationFileName</name>
+ <value>altera_emif_cal_slave_nf_ioaux_soft_ram</value>
+ </parameter>
+ <parameter>
+ <name>blockType</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>copyInitFile</name>
+ <value>true</value>
+ </parameter>
+ <parameter>
+ <name>dataWidth</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>dataWidth2</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>derived_enableDiffWidth</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>derived_gui_ram_block_type</name>
+ <value>Automatic</value>
+ </parameter>
+ <parameter>
+ <name>derived_init_file_name</name>
+ <value>../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</value>
+ </parameter>
+ <parameter>
+ <name>derived_is_hardcopy</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>derived_set_addr_width</name>
+ <value>12</value>
+ </parameter>
+ <parameter>
+ <name>derived_set_addr_width2</name>
+ <value>12</value>
+ </parameter>
+ <parameter>
+ <name>derived_set_data_width</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>derived_set_data_width2</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>derived_singleClockOperation</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>deviceFamily</name>
+ <value>Arria 10</value>
+ </parameter>
+ <parameter>
+ <name>deviceFeatures</name>
+ <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
+ </parameter>
+ <parameter>
+ <name>dualPort</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>ecc_enabled</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>enPRInitMode</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>enableDiffWidth</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>initMemContent</name>
+ <value>true</value>
+ </parameter>
+ <parameter>
+ <name>initializationFileName</name>
+ <value>../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</value>
+ </parameter>
+ <parameter>
+ <name>instanceID</name>
+ <value>NONE</value>
+ </parameter>
+ <parameter>
+ <name>memorySize</name>
+ <value>16383</value>
+ </parameter>
+ <parameter>
+ <name>readDuringWriteMode</name>
+ <value>DONT_CARE</value>
+ </parameter>
+ <parameter>
+ <name>resetrequest_enabled</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>simAllowMRAMContentsFile</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>simMemInitOnlyFilename</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>singleClockOperation</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>slave1Latency</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>slave2Latency</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>useNonDefaultInitFile</name>
+ <value>true</value>
+ </parameter>
+ <parameter>
+ <name>useShallowMemBlocks</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>writable</name>
+ <value>false</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_avalon_onchip_memory2</className>
+ <version>18.0</version>
+ <name>ioaux_soft_ram</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>ioaux_soft_ram/reset1</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
+ <end>ioaux_soft_ram/clk1</end>
<start>clk_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
@@ -6630,6 +7068,26 @@
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -6642,10 +7100,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -6654,16 +7108,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -6673,340 +7127,459 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<end>ioaux_soft_ram/s1</end>
<start>mm_interconnect_0/ioaux_soft_ram_s1</start>
</incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_soft_ram</path>
</instanceData>
- <children>
- <node>
- <instanceKey xsi:type="xs:string">clk_bridge_out_clk_clock_bridge</instanceKey>
- <instanceData xsi:type="data">
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">rst_controller</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>ADAPT_RESET_REQUEST</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>MIN_RST_ASSERTION_TIME</name>
+ <value>3</value>
+ </parameter>
+ <parameter>
+ <name>NUM_RESET_INPUTS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>OUTPUT_RESET_SYNC_EDGES</name>
+ <value>deassert</value>
+ </parameter>
+ <parameter>
+ <name>RESET_REQUEST_PRESENT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>RESET_REQ_EARLY_DSRT_TIME</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>RESET_REQ_WAIT_TIME</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_DEPTH</name>
+ <value>2</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN0</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN1</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN10</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN11</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN12</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN13</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN14</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN15</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN2</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN3</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN4</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN5</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN6</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN7</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN8</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_IN9</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_RESET_REQUEST_INPUT</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_reset_controller</className>
+ <version>18.0</version>
+ <name>rst_controller</name>
+ <uniqueName>altera_reset_controller</uniqueName>
+ <fixedName>altera_reset_controller</fixedName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
<parameters>
<parameter>
- <name>DERIVED_CLOCK_RATE</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>EXPLICIT_CLOCK_RATE</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>NUM_CLOCK_OUTPUTS</name>
- <value>1</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_clock_bridge</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_170_wbcrk5i</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
- <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
- <end>ioaux_master_bridge_m0_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
- <end>ioaux_soft_ram_s1_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.clk_bridge_out_clk_clock_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">ioaux_master_bridge_m0_translator</instanceKey>
- <instanceData xsi:type="data">
+ <className>clock</className>
+ <version>18.0</version>
+ <end>rst_controller/clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
<parameters>
<parameter>
- <name>AV_ADDRESSGROUP</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_ADDRESS_SYMBOLS</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_ADDRESS_W</name>
- <value>16</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>ioaux_master_bridge/reset</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_ALWAYSBURSTMAXBURST</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_BITS_PER_SYMBOL</name>
- <value>8</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_BURSTBOUNDARIES</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>rst_controller/reset_in0</end>
+ <start>rst_bridge/out_reset</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_BURSTCOUNT_SYMBOLS</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_BURSTCOUNT_W</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_BYTEENABLE_W</name>
- <value>4</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_CONSTANT_BURST_BEHAVIOR</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_DATA_HOLD</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_DATA_W</name>
- <value>32</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>ioaux_soft_ram/reset1</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_controller</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">mm_interconnect_0</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>COMPOSE_CONTENTS</name>
+ <value>add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {SYNC_RESET} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNC_RESET} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments>
+ <interconnectAssignment>
+ <name>$system.qsys_mm.clockCrossingAdapter</name>
+ <value>HANDSHAKE</value>
+ </interconnectAssignment>
+ <interconnectAssignment>
+ <name>$system.qsys_mm.maxAdditionalLatency</name>
+ <value>0</value>
+ </interconnectAssignment>
+ </interconnectAssignments>
+ <className>altera_mm_interconnect</className>
+ <version>18.0</version>
+ <name>mm_interconnect_0</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_INTERLEAVEBURSTS</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_ISBIGENDIAN</name>
- <value>0</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_LINEWRAPBURSTS</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>AV_MAX_PENDING_READ_TRANSACTIONS</name>
- <value>64</value>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/clk_bridge_out_clk</end>
+ <start>clk_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_READLATENCY</name>
- <value>0</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_READ_WAIT</name>
- <value>1</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>AV_REGISTERINCOMINGSIGNALS</name>
- <value>0</value>
+ <name>clockResetSysInfo</name>
+ <value></value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <start>rst_controller/reset_out</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>AV_REGISTEROUTGOINGSIGNALS</name>
- <value>0</value>
+ <name>defaultConnection</name>
+ <value>false</value>
</parameter>
<parameter>
- <name>AV_SETUP_WAIT</name>
- <value>0</value>
+ <name>syncResets</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>AV_SYMBOLS_PER_WORD</name>
- <value>4</value>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
</parameter>
<parameter>
- <name>AV_WRITE_WAIT</name>
- <value>0</value>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
</parameter>
<parameter>
- <name>SYNC_RESET</name>
- <value>0</value>
+ <name>domainAlias</name>
+ <value></value>
</parameter>
<parameter>
- <name>UAV_ADDRESSGROUP</name>
- <value>0</value>
+ <name>addressWidthSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>UAV_ADDRESS_W</name>
- <value>16</value>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
</parameter>
<parameter>
- <name>UAV_BURSTCOUNT_W</name>
- <value>3</value>
+ <name>baseAddress</name>
+ <value>0x0000</value>
</parameter>
<parameter>
- <name>UAV_CONSTANT_BURST_BEHAVIOR</name>
+ <name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_ADDRESS</name>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
+ </parameter>
+ <parameter>
+ <name>arbitrationPriority</name>
<value>1</value>
</parameter>
<parameter>
- <name>USE_BEGINBURSTTRANSFER</name>
- <value>0</value>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>USE_BEGINTRANSFER</name>
- <value>0</value>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>USE_BURSTCOUNT</name>
- <value>1</value>
+ <name>addressMapSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_BYTEENABLE</name>
- <value>1</value>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
</parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>avalon</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
+ <start>ioaux_master_bridge/m0</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
<parameter>
- <name>USE_CHIPSELECT</name>
- <value>0</value>
+ <name>defaultConnection</name>
+ <value>false</value>
</parameter>
<parameter>
- <name>USE_CLKEN</name>
- <value>0</value>
+ <name>syncResets</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>USE_DEBUGACCESS</name>
- <value>1</value>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
</parameter>
<parameter>
- <name>USE_LOCK</name>
- <value>0</value>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
</parameter>
<parameter>
- <name>USE_READ</name>
- <value>1</value>
+ <name>domainAlias</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_READDATA</name>
- <value>1</value>
+ <name>addressWidthSysInfo</name>
+ <value></value>
</parameter>
<parameter>
- <name>USE_READDATAVALID</name>
- <value>1</value>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
</parameter>
<parameter>
- <name>USE_READRESPONSE</name>
+ <name>baseAddress</name>
+ <value>0x0000</value>
+ </parameter>
+ <parameter>
+ <name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_WAITREQUEST</name>
- <value>1</value>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
</parameter>
<parameter>
- <name>USE_WRITE</name>
+ <name>arbitrationPriority</name>
<value>1</value>
</parameter>
<parameter>
- <name>USE_WRITEDATA</name>
- <value>1</value>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
</parameter>
<parameter>
- <name>USE_WRITERESPONSE</name>
- <value>0</value>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_merlin_master_translator</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_m0_translator</name>
- <uniqueName>altera_merlin_master_translator</uniqueName>
- <fixedName>altera_merlin_master_translator</fixedName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters>
- <parameter>
- <name>defaultConnection</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
- </parameter>
- <parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
- </parameter>
- <parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
- <parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
- </parameter>
- <parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
- <parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
- </parameter>
- <parameter>
- <name>domainAlias</name>
- <value></value>
- </parameter>
- <parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
- <end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
- <start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
- <end>ioaux_master_bridge_m0_translator/clk</end>
- <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
- <end>ioaux_master_bridge_m0_translator/reset</end>
- <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_m0_translator</path>
- </instanceData>
- <children></children>
- </node>
+ <className>avalon</className>
+ <version>18.0</version>
+ <end>ioaux_soft_ram/s1</end>
+ <start>mm_interconnect_0/ioaux_soft_ram_s1</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0</path>
+ </instanceData>
+ <children>
<node>
<instanceKey xsi:type="xs:string">ioaux_soft_ram_s1_translator</instanceKey>
<instanceData xsi:type="data">
@@ -7133,6 +7706,10 @@
</parameter>
<parameter>
<name>CLOCK_RATE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
<value>0</value>
</parameter>
<parameter>
@@ -7239,10 +7816,14 @@
<name>USE_WRITERESPONSE</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>WAITREQUEST_ALLOWANCE</name>
+ <value>0</value>
+ </parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_merlin_slave_translator</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_soft_ram_s1_translator</name>
<uniqueName>altera_merlin_slave_translator</uniqueName>
<fixedName>altera_merlin_slave_translator</fixedName>
@@ -7254,6 +7835,26 @@
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -7266,10 +7867,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -7278,16 +7875,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -7297,31 +7894,168 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
<end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
<start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
+ <end>ioaux_soft_ram_s1_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
<end>ioaux_soft_ram_s1_translator/reset</end>
<start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
</incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_soft_ram_s1_translator</path>
+ </instanceData>
+ <children></children>
+ </node>
+ <node>
+ <instanceKey xsi:type="xs:string">clk_bridge_out_clk_clock_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
+ <parameter>
+ <name>DERIVED_CLOCK_RATE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>EXPLICIT_CLOCK_RATE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>NUM_CLOCK_OUTPUTS</name>
+ <value>1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>altera_clock_bridge</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_180_kcm3w7a</uniqueName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
+ <end>ioaux_master_bridge_m0_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_soft_ram_s1_translator.clk</name>
<end>ioaux_soft_ram_s1_translator/clk</end>
<start>clk_bridge_out_clk_clock_bridge/out_clk</start>
</incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
+ <end>ioaux_master_bridge_reset_reset_bridge/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_soft_ram_s1_translator</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.clk_bridge_out_clk_clock_bridge</path>
</instanceData>
<children></children>
</node>
@@ -7341,6 +8075,10 @@
<name>SYNCHRONOUS_EDGES</name>
<value>deassert</value>
</parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
<parameter>
<name>USE_RESET_REQUEST</name>
<value>0</value>
@@ -7348,36 +8086,79 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_reset_bridge</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>ioaux_master_bridge_reset_reset_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_170_iv4agsa</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_180_ddebq5q</uniqueName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_reset_reset_bridge.clk</name>
<end>ioaux_master_bridge_reset_reset_bridge/clk</end>
<start>clk_bridge_out_clk_clock_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
- <end>ioaux_soft_ram_s1_translator/reset</end>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
+ <end>ioaux_master_bridge_m0_translator/reset</end>
<start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
- <end>ioaux_master_bridge_m0_translator/reset</end>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_soft_ram_s1_translator.reset</name>
+ <end>ioaux_soft_ram_s1_translator/reset</end>
<start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
</incidentConnection>
</incidentConnections>
@@ -7385,642 +8166,581 @@
</instanceData>
<children></children>
</node>
- </children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">rst_bridge</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>ACTIVE_LOW_RESET</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>NUM_RESET_OUTPUTS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>SYNCHRONOUS_EDGES</name>
- <value>none</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST</name>
- <value>0</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_reset_bridge</className>
- <version>17.0</version>
- <name>rst_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_170_iv4agsa</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>rst_controller/reset_in0</end>
- <start>rst_bridge/out_reset</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">ioaux_master_bridge</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>ADDRESS_UNITS</name>
- <value>SYMBOLS</value>
- </parameter>
- <parameter>
- <name>ADDRESS_WIDTH</name>
- <value>16</value>
- </parameter>
- <parameter>
- <name>AUTO_ADDRESS_WIDTH</name>
- <value>14</value>
- </parameter>
- <parameter>
- <name>BURSTCOUNT_WIDTH</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>DATA_WIDTH</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>HDL_ADDR_WIDTH</name>
- <value>16</value>
- </parameter>
- <parameter>
- <name>LINEWRAPBURSTS</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>MAX_BURST_SIZE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>MAX_PENDING_RESPONSES</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>PIPELINE_COMMAND</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>PIPELINE_RESPONSE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>SYMBOL_WIDTH</name>
- <value>8</value>
- </parameter>
- <parameter>
- <name>SYSINFO_ADDR_WIDTH</name>
- <value>14</value>
- </parameter>
- <parameter>
- <name>USE_AUTO_ADDRESS_WIDTH</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESPONSE</name>
- <value>0</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_avalon_mm_bridge</className>
- <version>17.0</version>
- <name>ioaux_master_bridge</name>
- <uniqueName>altera_avalon_mm_bridge</uniqueName>
- <fixedName>altera_avalon_mm_bridge</fixedName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
+ <node>
+ <instanceKey xsi:type="xs:string">ioaux_master_bridge_m0_translator</instanceKey>
+ <instanceData xsi:type="data">
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
+ <name>AV_ADDRESSGROUP</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
+ <name>AV_ADDRESS_SYMBOLS</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
+ <name>AV_ADDRESS_W</name>
+ <value>16</value>
</parameter>
<parameter>
- <name>maximumAdditionalLatency</name>
+ <name>AV_ALWAYSBURSTMAXBURST</name>
<value>0</value>
</parameter>
<parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
+ <name>AV_BITS_PER_SYMBOL</name>
+ <value>8</value>
</parameter>
<parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
+ <name>AV_BURSTBOUNDARIES</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>arbitrationPriority</name>
+ <name>AV_BURSTCOUNT_SYMBOLS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_BURSTCOUNT_W</name>
<value>1</value>
</parameter>
<parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>AV_BYTEENABLE_W</name>
+ <value>4</value>
</parameter>
<parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ <name>AV_CONSTANT_BURST_BEHAVIOR</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>domainAlias</name>
- <value></value>
+ <name>AV_DATA_HOLD</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
+ <name>AV_DATA_W</name>
+ <value>32</value>
+ </parameter>
+ <parameter>
+ <name>AV_INTERLEAVEBURSTS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_ISBIGENDIAN</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_LINEWRAPBURSTS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_MAX_PENDING_READ_TRANSACTIONS</name>
+ <value>64</value>
+ </parameter>
+ <parameter>
+ <name>AV_READLATENCY</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_READ_WAIT</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>AV_REGISTERINCOMINGSIGNALS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_REGISTEROUTGOINGSIGNALS</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_SETUP_WAIT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>AV_SYMBOLS_PER_WORD</name>
+ <value>4</value>
+ </parameter>
+ <parameter>
+ <name>AV_WRITE_WAIT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>SYNC_RESET</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>UAV_ADDRESSGROUP</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>UAV_ADDRESS_W</name>
+ <value>16</value>
+ </parameter>
+ <parameter>
+ <name>UAV_BURSTCOUNT_W</name>
+ <value>3</value>
+ </parameter>
+ <parameter>
+ <name>UAV_CONSTANT_BURST_BEHAVIOR</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_ADDRESS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_BEGINBURSTTRANSFER</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_BEGINTRANSFER</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_BURSTCOUNT</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_BYTEENABLE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_CHIPSELECT</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_CLKEN</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_DEBUGACCESS</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_LOCK</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_READ</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READDATA</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READDATAVALID</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_READRESPONSE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>USE_WAITREQUEST</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITE</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITEDATA</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>USE_WRITERESPONSE</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>WAITREQUEST_ALLOWANCE</name>
+ <value>0</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
- <start>ioaux_master_bridge/m0</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
- <end>ioaux_master_bridge/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_master_bridge/reset</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_master_bridge</path>
- </instanceData>
- <children></children>
- </node>
- <node>
- <instanceKey xsi:type="xs:string">clk_bridge</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>DERIVED_CLOCK_RATE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>EXPLICIT_CLOCK_RATE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>NUM_CLOCK_OUTPUTS</name>
- <value>1</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_clock_bridge</className>
- <version>17.0</version>
- <name>clk_bridge</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_clock_bridge_170_wbcrk5i</uniqueName>
- <nonce>0</nonce>
- <incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
- <end>ioaux_soft_ram/clk1</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>rst_controller/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <end>mm_interconnect_0/clk_bridge_out_clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
- <end>ioaux_master_bridge/clk</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- </incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.clk_bridge</path>
- </instanceData>
- <children></children>
+ <className>altera_merlin_master_translator</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_m0_translator</name>
+ <uniqueName>altera_merlin_master_translator</uniqueName>
+ <fixedName>altera_merlin_master_translator</fixedName>
+ <nonce>0</nonce>
+ <incidentConnections>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>defaultConnection</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
+ </parameter>
+ <parameter>
+ <name>baseAddress</name>
+ <value>0x0000</value>
+ </parameter>
+ <parameter>
+ <name>maximumAdditionalLatency</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
+ </parameter>
+ <parameter>
+ <name>arbitrationPriority</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>avalon</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0</name>
+ <end>ioaux_soft_ram_s1_translator/avalon_universal_slave_0</end>
+ <start>ioaux_master_bridge_m0_translator/avalon_universal_master_0</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>clk_bridge_out_clk_clock_bridge.out_clk/ioaux_master_bridge_m0_translator.clk</name>
+ <end>ioaux_master_bridge_m0_translator/clk</end>
+ <start>clk_bridge_out_clk_clock_bridge/out_clk</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge_reset_reset_bridge.out_reset/ioaux_master_bridge_m0_translator.reset</name>
+ <end>ioaux_master_bridge_m0_translator/reset</end>
+ <start>ioaux_master_bridge_reset_reset_bridge/out_reset</start>
+ </incidentConnection>
+ </incidentConnections>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.mm_interconnect_0.ioaux_master_bridge_m0_translator</path>
+ </instanceData>
+ <children></children>
+ </node>
+ </children>
</node>
<node>
- <instanceKey xsi:type="xs:string">ioaux_soft_ram</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>allowInSystemMemoryContentEditor</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>autoInitializationFileName</name>
- <value>altera_emif_cal_slave_nf_ioaux_soft_ram</value>
- </parameter>
- <parameter>
- <name>blockType</name>
- <value>AUTO</value>
- </parameter>
- <parameter>
- <name>copyInitFile</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>dataWidth</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>dataWidth2</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>derived_enableDiffWidth</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>derived_gui_ram_block_type</name>
- <value>Automatic</value>
- </parameter>
- <parameter>
- <name>derived_init_file_name</name>
- <value>../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</value>
- </parameter>
- <parameter>
- <name>derived_is_hardcopy</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>derived_set_addr_width</name>
- <value>12</value>
- </parameter>
- <parameter>
- <name>derived_set_addr_width2</name>
- <value>12</value>
- </parameter>
- <parameter>
- <name>derived_set_data_width</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>derived_set_data_width2</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>derived_singleClockOperation</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>deviceFamily</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>deviceFeatures</name>
- <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
- </parameter>
- <parameter>
- <name>dualPort</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>ecc_enabled</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>enPRInitMode</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>enableDiffWidth</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>initMemContent</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>initializationFileName</name>
- <value>../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex</value>
- </parameter>
- <parameter>
- <name>instanceID</name>
- <value>NONE</value>
- </parameter>
- <parameter>
- <name>memorySize</name>
- <value>16383</value>
- </parameter>
- <parameter>
- <name>readDuringWriteMode</name>
- <value>DONT_CARE</value>
- </parameter>
- <parameter>
- <name>resetrequest_enabled</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>simAllowMRAMContentsFile</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>simMemInitOnlyFilename</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>singleClockOperation</name>
- <value>false</value>
- </parameter>
+ <instanceKey xsi:type="xs:string">rst_bridge</instanceKey>
+ <instanceData xsi:type="data">
+ <parameters>
<parameter>
- <name>slave1Latency</name>
- <value>1</value>
+ <name>ACTIVE_LOW_RESET</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>slave2Latency</name>
+ <name>NUM_RESET_OUTPUTS</name>
<value>1</value>
</parameter>
<parameter>
- <name>useNonDefaultInitFile</name>
- <value>true</value>
+ <name>SYNCHRONOUS_EDGES</name>
+ <value>none</value>
</parameter>
<parameter>
- <name>useShallowMemBlocks</name>
- <value>false</value>
+ <name>SYNC_RESET</name>
+ <value>0</value>
</parameter>
<parameter>
- <name>writable</name>
- <value>false</value>
+ <name>USE_RESET_REQUEST</name>
+ <value>0</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_avalon_onchip_memory2</className>
- <version>17.0</version>
- <name>ioaux_soft_ram</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy</uniqueName>
+ <className>altera_reset_bridge</className>
+ <version>18.0</version>
+ <name>rst_bridge</name>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_reset_bridge_180_ddebq5q</uniqueName>
<nonce>0</nonce>
<incidentConnections>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>clk_bridge.out_clk/ioaux_soft_ram.clk1</name>
- <end>ioaux_soft_ram/clk1</end>
- <start>clk_bridge/out_clk</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_soft_ram/reset1</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
<incidentConnection>
<parameters>
<parameter>
- <name>defaultConnection</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>interconnectResetSource</name>
- <value>DEFAULT</value>
- </parameter>
- <parameter>
- <name>baseAddress</name>
- <value>0x0000</value>
- </parameter>
- <parameter>
- <name>maximumAdditionalLatency</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
- <parameter>
- <name>burstAdapterImplementation</name>
- <value>GENERIC_CONVERTER</value>
- </parameter>
- <parameter>
- <name>arbitrationPriority</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>enableEccProtection</name>
- <value>FALSE</value>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>clockResetSysInfo</name>
<value></value>
</parameter>
- <parameter>
- <name>insertDefaultSlave</name>
- <value>FALSE</value>
- </parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>avalon</className>
- <version>17.0</version>
- <end>ioaux_soft_ram/s1</end>
- <start>mm_interconnect_0/ioaux_soft_ram_s1</start>
+ <className>reset</className>
+ <version>18.0</version>
+ <end>rst_controller/reset_in0</end>
+ <start>rst_bridge/out_reset</start>
</incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_soft_ram</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_bridge</path>
</instanceData>
<children></children>
</node>
<node>
- <instanceKey xsi:type="xs:string">rst_controller</instanceKey>
+ <instanceKey xsi:type="xs:string">ioaux_master_bridge</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>ADAPT_RESET_REQUEST</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>MIN_RST_ASSERTION_TIME</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>NUM_RESET_INPUTS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>OUTPUT_RESET_SYNC_EDGES</name>
- <value>deassert</value>
+ <name>ADDRESS_UNITS</name>
+ <value>SYMBOLS</value>
</parameter>
<parameter>
- <name>RESET_REQUEST_PRESENT</name>
- <value>0</value>
+ <name>ADDRESS_WIDTH</name>
+ <value>16</value>
</parameter>
<parameter>
- <name>RESET_REQ_EARLY_DSRT_TIME</name>
- <value>1</value>
+ <name>AUTO_ADDRESS_WIDTH</name>
+ <value>14</value>
</parameter>
<parameter>
- <name>RESET_REQ_WAIT_TIME</name>
+ <name>BURSTCOUNT_WIDTH</name>
<value>1</value>
</parameter>
<parameter>
- <name>SYNC_DEPTH</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN10</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN11</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN12</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>USE_RESET_REQUEST_IN13</name>
- <value>0</value>
+ <name>DATA_WIDTH</name>
+ <value>32</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN14</name>
- <value>0</value>
+ <name>HDL_ADDR_WIDTH</name>
+ <value>16</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN15</name>
+ <name>LINEWRAPBURSTS</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN2</name>
- <value>0</value>
+ <name>MAX_BURST_SIZE</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN3</name>
- <value>0</value>
+ <name>MAX_PENDING_RESPONSES</name>
+ <value>4</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN4</name>
- <value>0</value>
+ <name>PIPELINE_COMMAND</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN5</name>
- <value>0</value>
+ <name>PIPELINE_RESPONSE</name>
+ <value>1</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN6</name>
- <value>0</value>
+ <name>SYMBOL_WIDTH</name>
+ <value>8</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN7</name>
+ <name>SYNC_RESET</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN8</name>
- <value>0</value>
+ <name>SYSINFO_ADDR_WIDTH</name>
+ <value>14</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_IN9</name>
+ <name>USE_AUTO_ADDRESS_WIDTH</name>
<value>0</value>
</parameter>
<parameter>
- <name>USE_RESET_REQUEST_INPUT</name>
+ <name>USE_RESPONSE</name>
<value>0</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_reset_controller</className>
- <version>17.0</version>
- <name>rst_controller</name>
- <uniqueName>altera_reset_controller</uniqueName>
- <fixedName>altera_reset_controller</fixedName>
+ <className>altera_avalon_mm_bridge</className>
+ <version>18.0</version>
+ <name>ioaux_master_bridge</name>
+ <uniqueName>altera_avalon_mm_bridge</uniqueName>
+ <fixedName>altera_avalon_mm_bridge</fixedName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>rst_controller/reset_in0</end>
- <start>rst_bridge/out_reset</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
- <end>rst_controller/clk</end>
+ <version>18.0</version>
+ <name>clk_bridge.out_clk/ioaux_master_bridge.clk</name>
+ <end>ioaux_master_bridge/clk</end>
<start>clk_bridge/out_clk</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_soft_ram/reset1</end>
- <start>rst_controller/reset_out</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>reset</className>
- <version>17.0</version>
- <end>mm_interconnect_0/ioaux_master_bridge_reset_reset_bridge_in_reset</end>
+ <version>18.0</version>
+ <end>ioaux_master_bridge/reset</end>
<start>rst_controller/reset_out</start>
</incidentConnection>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>defaultConnection</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>interconnectResetSource</name>
+ <value>DEFAULT</value>
+ </parameter>
+ <parameter>
+ <name>baseAddress</name>
+ <value>0x0000</value>
+ </parameter>
+ <parameter>
+ <name>maximumAdditionalLatency</name>
+ <value>0</value>
+ </parameter>
+ <parameter>
+ <name>burstAdapterImplementation</name>
+ <value>GENERIC_CONVERTER</value>
+ </parameter>
+ <parameter>
+ <name>arbitrationPriority</name>
+ <value>1</value>
+ </parameter>
+ <parameter>
+ <name>enableEccProtection</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>insertDefaultSlave</name>
+ <value>FALSE</value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <end>ioaux_master_bridge/reset</end>
- <start>rst_controller/reset_out</start>
+ <className>avalon</className>
+ <version>18.0</version>
+ <end>mm_interconnect_0/ioaux_master_bridge_m0</end>
+ <start>ioaux_master_bridge/m0</start>
</incidentConnection>
</incidentConnections>
- <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.rst_controller</path>
+ <path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.cal_slave_component.ioaux_master_bridge</path>
</instanceData>
<children></children>
</node>
@@ -9302,6 +10022,10 @@
<name>CTRL_QDR4_AVL_SYMBOL_WIDTH</name>
<value>9</value>
</parameter>
+ <parameter>
+ <name>CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC</name>
+ <value>4</value>
+ </parameter>
<parameter>
<name>CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC</name>
<value>4</value>
@@ -9310,6 +10034,10 @@
<name>CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC</name>
<value>11</value>
</parameter>
+ <parameter>
+ <name>CTRL_REORDER_EN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>CTRL_RLD2_AVL_PROTOCOL_ENUM</name>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -9414,6 +10142,10 @@
<name>DIAG_DDR3_CAL_FULL_CAL_ON_RESET</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_CA_LEVEL_EN</name>
<value>false</value>
@@ -9422,6 +10154,10 @@
<name>DIAG_DDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -9458,6 +10194,10 @@
<name>DIAG_DDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -9510,6 +10250,10 @@
<name>DIAG_DDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -9546,6 +10290,10 @@
<name>DIAG_DDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_DDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_DDR4_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -9602,6 +10350,10 @@
<name>DIAG_EXPORT_PLL_REF_CLK_OUT</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -9654,6 +10406,10 @@
<name>DIAG_FAST_SIM_OVERRIDE</name>
<value>FAST_SIM_OVERRIDE_DEFAULT</value>
</parameter>
+ <parameter>
+ <name>DIAG_HMC_HRC</name>
+ <value>auto</value>
+ </parameter>
<parameter>
<name>DIAG_INFI_TG2_ERR_TEST</name>
<value>false</value>
@@ -9686,6 +10442,10 @@
<name>DIAG_LPDDR3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER</name>
<value>false</value>
@@ -9722,6 +10482,10 @@
<name>DIAG_LPDDR3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_LPDDR3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_LPDDR3_SKIP_CA_DESKEW</name>
<value>false</value>
@@ -9766,6 +10530,10 @@
<name>DIAG_QDR2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -9802,6 +10570,10 @@
<name>DIAG_QDR2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -9838,6 +10610,10 @@
<name>DIAG_QDR4_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -9874,6 +10650,10 @@
<name>DIAG_QDR4_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_QDR4_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_QDR4_SKIP_VREF_CAL</name>
<value>false</value>
@@ -9914,6 +10694,10 @@
<name>DIAG_RLD2_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -9950,6 +10734,10 @@
<name>DIAG_RLD2_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD2_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD2_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -9982,10 +10770,22 @@
<name>DIAG_RLD3_BYPASS_USER_STAGE</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_DESKEW_EN</name>
+ <value>false</value>
+ </parameter>
+ <parameter>
+ <name>DIAG_RLD3_CA_LEVEL_EN</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EFFICIENCY_MONITOR</name>
<value>EFFMON_MODE_DISABLED</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER</name>
<value>true</value>
@@ -10022,6 +10822,10 @@
<name>DIAG_RLD3_SIM_CAL_MODE_ENUM</name>
<value>SIM_CAL_MODE_SKIP</value>
</parameter>
+ <parameter>
+ <name>DIAG_RLD3_SIM_VERBOSE</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>DIAG_RLD3_TG_BE_PATTERN_LENGTH</name>
<value>8</value>
@@ -10054,6 +10858,10 @@
<name>DIAG_SIM_REGTEST_MODE</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>DIAG_SIM_VERBOSE_LEVEL</name>
+ <value>5</value>
+ </parameter>
<parameter>
<name>DIAG_SOFT_NIOS_CLOCK_FREQUENCY</name>
<value>100</value>
@@ -11202,6 +12010,14 @@
<name>MEM_DDR4_HIDE_ADV_MR_SETTINGS</name>
<value>true</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_IN_PCT</name>
+ <value>61.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_IDEAL_VREF_OUT_PCT</name>
+ <value>50.0</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_INTERNAL_VREFDQ_MONITOR</name>
<value>false</value>
@@ -11746,13 +12562,21 @@
<name>MEM_DDR4_TTL_RM_WIDTH</name>
<value>0</value>
</parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLH_CYC</name>
+ <value>0.13</value>
+ </parameter>
<parameter>
<name>MEM_DDR4_TWLH_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
+ </parameter>
+ <parameter>
+ <name>MEM_DDR4_TWLS_CYC</name>
+ <value>0.13</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWLS_PS</name>
- <value>122.0</value>
+ <value>0.0</value>
</parameter>
<parameter>
<name>MEM_DDR4_TWR_CYC</name>
@@ -11820,11 +12644,11 @@
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT0</name>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT1</name>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
</parameter>
<parameter>
<name>MEM_DDR4_W_DERIVED_ODT2</name>
@@ -12338,6 +13162,10 @@
<name>MEM_LPDDR3_W_ODTN_4X4</name>
<value>Rank 0,Rank 1,Rank 2,Rank 3</value>
</parameter>
+ <parameter>
+ <name>MEM_NUM_OF_DATA_ENDPOINTS</name>
+ <value>2</value>
+ </parameter>
<parameter>
<name>MEM_NUM_OF_LOGICAL_RANKS</name>
<value>2</value>
@@ -12454,6 +13282,10 @@
<name>MEM_QDR4_ADDR_WIDTH</name>
<value>21</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_AVL_CHNLS</name>
+ <value>8</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_BL</name>
<value>2</value>
@@ -12530,6 +13362,10 @@
<name>MEM_QDR4_FORMAT_ENUM</name>
<value>MEM_FORMAT_DISCRETE</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_MEM_TYPE_ENUM</name>
+ <value>MEM_XP</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM</name>
<value>QDR4_OUTPUT_DRIVE_25_PCT</value>
@@ -12546,6 +13382,10 @@
<name>MEM_QDR4_QK_WIDTH</name>
<value>4</value>
</parameter>
+ <parameter>
+ <name>MEM_QDR4_SKIP_ODT_SWEEPING</name>
+ <value>true</value>
+ </parameter>
<parameter>
<name>MEM_QDR4_SPEEDBIN_ENUM</name>
<value>QDR4_SPEEDBIN_2133</value>
@@ -12958,6 +13798,10 @@
<name>PHY_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DATA_CALIBRATED_OCT</name>
<value>true</value>
@@ -13010,6 +13854,10 @@
<name>PHY_DDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -13170,6 +14018,10 @@
<name>PHY_DDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_DDR4_DATA_IN_MODE_ENUM</name>
<value>IN_OCT_120_CAL</value>
@@ -13346,6 +14198,10 @@
<name>PHY_LPDDR3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_LPDDR3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -13518,6 +14374,10 @@
<name>PHY_QDR2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -13678,6 +14538,10 @@
<name>PHY_QDR4_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_QDR4_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -13850,6 +14714,10 @@
<name>PHY_RLD2_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD2_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -14010,6 +14878,10 @@
<name>PHY_RLD3_CORE_CLKS_SHARING_ENUM</name>
<value>CORE_CLKS_SHARING_DISABLED</value>
</parameter>
+ <parameter>
+ <name>PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT</name>
+ <value>false</value>
+ </parameter>
<parameter>
<name>PHY_RLD3_DATA_IN_MODE_ENUM</name>
<value>unset</value>
@@ -16226,6 +17098,10 @@
<name>PORT_CLKS_SHARING_SLAVE_IN_WIDTH</name>
<value>32</value>
</parameter>
+ <parameter>
+ <name>PORT_CLKS_SHARING_SLAVE_OUT_WIDTH</name>
+ <value>32</value>
+ </parameter>
<parameter>
<name>PORT_CTRL_AMM_ADDRESS_WIDTH</name>
<value>27</value>
@@ -19722,6 +20598,10 @@
<name>SYS_INFO_DEVICE</name>
<value>10AX115S2F45E1SG</value>
</parameter>
+ <parameter>
+ <name>SYS_INFO_DEVICE_DIE_REVISIONS</name>
+ <value></value>
+ </parameter>
<parameter>
<name>SYS_INFO_DEVICE_FAMILY</name>
<value>Arria 10</value>
@@ -20313,26 +21193,133 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_emif_arch_nf</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch</name>
- <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i</uniqueName>
+ <uniqueName>ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i</uniqueName>
<nonce>0</nonce>
<incidentConnections>
<incidentConnection>
- <parameters></parameters>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
<interconnectAssignments></interconnectAssignments>
<className>clock</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_slave_clk_clock_source/arch.cal_slave_clk_in_clock_sink</name>
<end>arch/cal_slave_clk_in_clock_sink</end>
<start>arch/cal_slave_clk_clock_source</start>
</incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>clockRateSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>clock</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
+ <end>cal_slave_component/clk</end>
+ <start>arch/cal_slave_clk_clock_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
+ <end>cal_slave_component/rst</end>
+ <start>arch/cal_slave_reset_n_reset_source</start>
+ </incidentConnection>
+ <incidentConnection>
+ <parameters>
+ <parameter>
+ <name>resetDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockDomainSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>clockResetSysInfo</name>
+ <value></value>
+ </parameter>
+ </parameters>
+ <interconnectAssignments></interconnectAssignments>
+ <className>reset</className>
+ <version>18.0</version>
+ <name>arch.cal_slave_reset_n_reset_source/arch.cal_slave_reset_n_in_reset_sink</name>
+ <end>arch/cal_slave_reset_n_in_reset_sink</end>
+ <start>arch/cal_slave_reset_n_reset_source</start>
+ </incidentConnection>
<incidentConnection>
<parameters>
<parameter>
<name>defaultConnection</name>
<value>false</value>
</parameter>
+ <parameter>
+ <name>syncResets</name>
+ <value>FALSE</value>
+ </parameter>
+ <parameter>
+ <name>clockCrossingAdapter</name>
+ <value>AUTO</value>
+ </parameter>
+ <parameter>
+ <name>interconnectType</name>
+ <value>STANDARD</value>
+ </parameter>
+ <parameter>
+ <name>domainAlias</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>addressWidthSysInfo</name>
+ <value></value>
+ </parameter>
<parameter>
<name>interconnectResetSource</name>
<value>DEFAULT</value>
@@ -20345,10 +21332,6 @@
<name>maximumAdditionalLatency</name>
<value>0</value>
</parameter>
- <parameter>
- <name>clockCrossingAdapter</name>
- <value>AUTO</value>
- </parameter>
<parameter>
<name>burstAdapterImplementation</name>
<value>GENERIC_CONVERTER</value>
@@ -20357,16 +21340,16 @@
<name>arbitrationPriority</name>
<value>1</value>
</parameter>
- <parameter>
- <name>interconnectType</name>
- <value>STANDARD</value>
- </parameter>
<parameter>
<name>enableEccProtection</name>
<value>FALSE</value>
</parameter>
<parameter>
- <name>domainAlias</name>
+ <name>slaveDataWidthSysInfo</name>
+ <value>-1</value>
+ </parameter>
+ <parameter>
+ <name>addressMapSysInfo</name>
<value></value>
</parameter>
<parameter>
@@ -20376,38 +21359,11 @@
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>avalon</className>
- <version>17.0</version>
+ <version>18.0</version>
<name>arch.cal_master_avalon_master/cal_slave_component.avl</name>
<end>cal_slave_component/avl</end>
<start>arch/cal_master_avalon_master</start>
</incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>arch.cal_slave_reset_n_reset_source/arch.cal_slave_reset_n_in_reset_sink</name>
- <end>arch/cal_slave_reset_n_in_reset_sink</end>
- <start>arch/cal_slave_reset_n_reset_source</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>clock</className>
- <version>17.0</version>
- <name>arch.cal_slave_clk_clock_source/cal_slave_component.clk</name>
- <end>cal_slave_component/clk</end>
- <start>arch/cal_slave_clk_clock_source</start>
- </incidentConnection>
- <incidentConnection>
- <parameters></parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>reset</className>
- <version>17.0</version>
- <name>arch.cal_slave_reset_n_reset_source/cal_slave_component.rst</name>
- <end>cal_slave_component/rst</end>
- <start>arch/cal_slave_reset_n_reset_source</start>
- </incidentConnection>
</incidentConnections>
<path>ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch</path>
</instanceData>
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qip b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qip
index 86d14bae6543ed5f4e369829519b2e5042449be4..a2f6abc6216b9d08ea7664372e10dde8184fc1ed 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qip
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qip
@@ -1,8 +1,10 @@
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOOL_NAME "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOOL_VERSION "17.0.2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOOL_VERSION "18.0"
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOOL_VENDOR_NAME "Intel Corporation"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TOP_LEVEL_COMPONENT_NAME "altera_emif"
set_global_assignment -library "ip_arria10_e1sg_ddr4_8g_2400" -name SOPCINFO_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_ddr4_8g_2400.sopcinfo"]
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name SLD_INFO "QSYS_NAME ip_arria10_e1sg_ddr4_8g_2400 HAS_SOPCINFO 1 GENERATION_ID 1570642650"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name SLD_INFO "QSYS_NAME ip_arria10_e1sg_ddr4_8g_2400 HAS_SOPCINFO 1 GENERATION_ID 0"
set_global_assignment -library "ip_arria10_e1sg_ddr4_8g_2400" -name MISC_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_ddr4_8g_2400.cmp"]
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TARGETED_DEVICE_FAMILY "Arria 10"
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_TARGETED_PART_TRAIT "part.SUPPORTS_VID::0"
@@ -10,5486 +12,4984 @@ set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria1
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_QSYS_MODE "STANDALONE"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_global_assignment -library "ip_arria10_e1sg_ddr4_8g_2400" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_ddr4_8g_2400.qsys"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "LVDS" -to "pll_ref_clk"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "DIFFERENTIAL" -to "pll_ref_clk"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V" -to "oct_rzqin"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ck[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ck[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ck_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ck_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_a[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_a[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_act_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_act_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_act_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_ba[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ba[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ba[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_ba[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ba[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_ba[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_bg[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_bg[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_bg[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_bg[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_bg[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_bg[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_cke[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cke[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_cke[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_cke[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cke[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_cke[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_cs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_cs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_odt[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_odt[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_odt[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_odt[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_odt[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_odt[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V" -to "mem_reset_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "OFF" -to "mem_reset_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_reset_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "SSTL-12" -to "mem_par[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_par[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SLEW_RATE "1" -to "mem_par[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V" -to "mem_alert_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "OFF" -to "mem_alert_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_alert_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[9]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[10]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[11]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[12]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[13]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[14]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[15]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[16]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[17]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[17]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[17]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[17]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[17]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[18]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[18]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[18]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[18]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[18]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[19]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[19]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[19]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[19]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[19]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[20]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[20]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[20]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[20]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[20]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[21]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[21]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[21]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[21]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[21]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[22]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[22]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[22]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[22]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[22]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[23]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[23]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[23]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[23]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[23]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[24]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[24]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[24]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[24]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[24]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[25]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[25]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[25]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[25]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[25]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[26]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[26]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[26]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[26]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[26]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[27]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[27]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[27]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[27]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[27]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[28]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[28]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[28]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[28]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[28]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[29]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[29]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[29]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[29]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[29]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[30]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[30]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[30]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[30]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[30]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[31]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[31]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[31]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[31]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[31]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[32]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[32]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[32]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[32]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[32]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[33]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[33]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[33]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[33]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[33]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[34]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[34]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[34]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[34]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[34]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[35]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[35]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[35]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[35]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[35]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[36]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[36]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[36]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[36]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[36]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[37]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[37]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[37]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[37]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[37]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[38]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[38]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[38]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[38]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[38]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[39]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[39]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[39]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[39]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[39]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[40]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[40]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[40]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[40]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[40]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[41]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[41]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[41]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[41]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[41]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[42]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[42]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[42]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[42]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[42]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[43]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[43]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[43]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[43]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[43]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[44]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[44]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[44]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[44]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[44]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[45]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[45]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[45]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[45]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[45]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[46]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[46]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[46]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[46]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[46]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[47]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[47]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[47]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[47]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[47]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[48]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[48]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[48]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[48]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[48]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[49]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[49]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[49]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[49]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[49]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[50]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[50]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[50]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[50]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[50]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[51]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[51]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[51]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[51]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[51]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[52]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[52]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[52]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[52]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[52]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[53]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[53]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[53]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[53]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[53]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[54]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[54]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[54]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[54]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[54]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[55]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[55]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[55]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[55]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[55]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[56]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[56]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[56]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[56]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[56]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[57]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[57]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[57]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[57]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[57]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[58]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[58]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[58]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[58]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[58]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[59]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[59]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[59]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[59]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[59]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[60]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[60]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[60]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[60]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[60]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[61]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[61]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[61]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[61]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[61]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[62]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[62]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[62]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[62]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[62]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[63]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[63]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[63]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[63]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[63]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[64]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[64]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[64]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[64]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[64]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[65]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[65]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[65]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[65]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[65]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[66]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[66]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[66]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[66]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[66]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[67]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[67]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[67]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[67]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[67]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[68]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[68]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[68]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[68]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[68]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[69]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[69]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[69]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[69]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[69]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[70]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[70]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[70]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[70]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[70]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dq[71]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[71]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[71]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[71]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[71]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[0]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[1]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[2]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[3]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[4]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[5]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[6]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[7]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[8]"
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[8]"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl9hcmNoX25mXzE3MF9hczN5ZjNp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_DISPLAY_NAME "RU1JRiBDb3JlIENvbXBvbmVudCBmb3IgMjBubSBGYW1pbGllcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_INTERNAL "On"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIEV4dGVybmFsIE1lbW9yeSBJbnRlcmZhY2UgQ29yZSBDb21wb25lbnQgZm9yIDIwbm0gRmFtaWxpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX0ZBTUlMWQ==::QXJyaWEgMTA=::UEFSQU1fU1lTX0lORk9fREVWSUNFX0ZBTUlMWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNF::MTBBWDExNVMyRjQ1RTFTRw==::UEFSQU1fU1lTX0lORk9fREVWSUNFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX1NQRUVER1JBREU=::MQ==::UEFSQU1fU1lTX0lORk9fREVWSUNFX1NQRUVER1JBREVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RkFNSUxZX0VOVU0=::RkFNSUxZX0FSUklBMTA=::UEFSQU1fRkFNSUxZX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VFJBSVRfU1VQUE9SVFNfVklE::MA==::UEFSQU1fVFJBSVRfU1VQUE9SVFNfVklEX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJPVE9DT0xfRU5VTQ==::UFJPVE9DT0xfRERSNA==::UHJvdG9jb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SVNfRURfU0xBVkU=::ZmFsc2U=::UEFSQU1fSVNfRURfU0xBVkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SU5URVJOQUxfVEVTVElOR19NT0RF::ZmFsc2U=::UEFSQU1fSU5URVJOQUxfVEVTVElOR19NT0RFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWQ==::NTAwMDAwMDA=::UEFSQU1fQ0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fVU5JUVVFX0lE::aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9kZHI0X2luc3Q=::UEFSQU1fU1lTX0lORk9fVU5JUVVFX0lEX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJFVl9QUk9UT0NPTF9FTlVN::UFJPVE9DT0xfRERSNA==::UEFSQU1fUFJFVl9QUk9UT0NPTF9FTlVNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0ZQR0FfU1BFRURHUkFERV9HVUk=::RTEgKFByb2R1Y3Rpb24pIC0gY2hhbmdlIGRldmljZSB1bmRlciAnVmlldyctPidEZXZpY2UgRmFtaWx5Jw==::U3BlZWQgZ3JhZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9TUEVFREdSQURF::RTE=::UEFSQU1fUEhZX1RBUkdFVF9TUEVFREdSQURFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUw==::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzI=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzM=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19QUk9EVUNUSU9O::dHJ1ZQ==::UEFSQU1fUEhZX1RBUkdFVF9JU19QUk9EVUNUSU9OX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0NPTkZJR19FTlVN::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JBVEVfRU5VTQ==::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX01FTV9DTEtfRlJFUV9NSFo=::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfRlJFUV9NSFo=::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfSklUVEVSX1BT::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VOVU0=::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0FDX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0FDX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0NLX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NLX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1Q=::dHJ1ZQ==::UEFSQU1fUEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1RfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JaUQ==::MjQw::UlpRIHJlc2lzdG9y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0hQU19FTkFCTEVfRUFSTFlfUkVMRUFTRQ==::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJfUEVSSU9ESUNfT0NUX1JFQ0FMX0VOVU0=::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0FERF9FWFRSQV9DTEtT::ZmFsc2U=::U3BlY2lmeSBhZGRpdGlvbmFsIGNvcmUgY2xvY2tzIGJhc2VkIG9uIGV4aXN0aW5nIFBMTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1VTRVJfTlVNX09GX0VYVFJBX0NMS1M=::MA==::TnVtYmVyIG9mIGFkZGl0aW9uYWwgY29yZSBjbG9ja3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzA=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzA=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8w::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzA=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8w::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzE=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzE=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8x::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzE=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzFfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8x::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzI=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzI=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8y::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzI=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8y::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzM=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzM=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8z::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzM=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8z::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzQ=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzQ=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzQ=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzRfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzU=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzU=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzU=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzY=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzY=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzY=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzZfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzc=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzc=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzc=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzdfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzg=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzg=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzg=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19DTEtfRlJFUV9NSFo=::MTIwMC4w::UEFSQU1fUExMX1ZDT19DTEtfRlJFUV9NSFpfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX05VTV9PRl9FWFRSQV9DTEtT::MA==::UEFSQU1fUExMX05VTV9PRl9FWFRSQV9DTEtTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNQ==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNg==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNw==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOA==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MTMzLjMzMw==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIw::MA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIx::OA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVT::dHJ1ZQ==::UEFSQU1fUEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfTUVNX0NMS19GUkVRX01IWg==::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19GUkVRX01IWg==::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JT19TVERfRU5VTQ==::SU9fU1REX1BPRF8xMg==::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9PVVRfTU9ERV9FTlVN::T1VUX09DVF8zNF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JTl9NT0RFX0VOVU0=::SU5fT0NUXzEyMF9DQUw=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfU1RBUlRJTkdfVlJFRklO::NjEuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::SU9fU1REX0xWRFM=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUlpRX0lPX1NURF9FTlVN::SU9fU1REX0NNT1NfMTI=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfTUVNX0NMS19GUkVRX01IWg==::NjMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfTUVNX0NMS19GUkVRX01IWg==::NTMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSU9fVk9MVEFHRQ==::MS44::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9PTkxZ::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT05GSUdfRU5VTQ==::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19NRU1fQ0xLX0ZSRVFfTUha::ODAwLjA=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX1JFRl9DTEtfRlJFUQ==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JFRl9DTEtfRlJFUV9NSFo=::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0pJVFRFUl9QUw==::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SQVRFX0VOVU0=::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FTlVN::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19JT19WT0xUQUdF::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX0lP::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19IUFNfRU5BQkxFX0VBUkxZX1JFTEVBU0U=::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BFUklPRElDX09DVF9SRUNBTF9FTlVN::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfT1VUX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU5fTU9ERV9FTlVN::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FVVE9fU1RBUlRJTkdfVlJFRklOX0VO::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1NUQVJUSU5HX1ZSRUZJTg==::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BMTF9SRUZfQ0xLX0lPX1NURF9FTlVN::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JaUV9JT19TVERfRU5VTQ==::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0ZPUk1BVF9FTlVN::TUVNX0ZPUk1BVF9TT0RJTU0=::UEFSQU1fTUVNX0ZPUk1BVF9FTlVNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JFQURfTEFURU5DWQ==::MTguMA==::UEFSQU1fTUVNX1JFQURfTEFURU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1dSSVRFX0xBVEVOQ1k=::MTg=::UEFSQU1fTUVNX1dSSVRFX0xBVEVOQ1lfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0JVUlNUX0xFTkdUSA==::OA==::UEFSQU1fTUVNX0JVUlNUX0xFTkdUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0RBVEFfTUFTS19FTg==::dHJ1ZQ==::UEFSQU1fTUVNX0RBVEFfTUFTS19FTl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0hBU19TSU1fU1VQUE9SVA==::dHJ1ZQ==::UEFSQU1fTUVNX0hBU19TSU1fU1VQUE9SVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9EQVRBX1dJRFRI::NzI=::UEFSQU1fTUVNX1RUTF9EQVRBX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFM=::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBT::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9VRElNTQ==::TWVtb3J5IGZvcm1hdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkFOS1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk9XX0FERFJfV0lEVEg=::MTQ=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkRJTU1fQ09ORklH::MDAwMDAwMDAwMDAwMDAwMA==::RERSMyBSRElNTS9MUkRJTU0gY29udHJvbCB3b3Jkcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTFJESU1NX0VYVEVOREVEX0NPTkZJRw==::MHgwMDAwMDAwMDAwMDAwMDAwMDA=::RERSMyBMUkRJTU0gYWRkaXRpb25hbCBjb250cm9sIHdvcmRz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSM19BTEVSVF9OX1BMQUNFTUVOVF9BQ19MQU5FUw==::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFTX1dJRFRI::OA==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfQ1NfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfQ0tFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfT0RUX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfT0RUX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUl9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUNfUEFSX0VO::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQUNfUEFSX0VOX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRU19XSURUSA==::OA==::UEFSQU1fTUVNX0REUjNfVFRMX0RRU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjNfVFRMX0RRX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RNX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0RNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NTX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NTX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLRV9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLRV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX09EVF9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX09EVF9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSA==::Mw==::UEFSQU1fTUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0FERFJfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjNfVFRMX1JNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9ESU1NU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIw::MA==::UEFSQU1fTUVNX0REUjNfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIx::MA==::UEFSQU1fTUVNX0REUjNfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIy::MA==::UEFSQU1fTUVNX0REUjNfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIz::MA==::UEFSQU1fTUVNX0REUjNfTVIzX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkxfRU5VTQ==::RERSM19CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQlRfRU5VTQ==::RERSM19CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVNSX0VOVU0=::RERSM19BU1JfTUFOVUFM::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1JUX0VOVU0=::RERSM19TUlRfTk9STUFM::U2VsZi1yZWZyZXNoIHRlbXBlcmF0dXJl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUERfRU5VTQ==::RERSM19QRF9PRkY=::RExMIHByZWNoYXJnZSBwb3dlciBkb3du"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFJWX1NUUl9FTlVN::RERSM19EUlZfU1RSX1JaUV82::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX05PTV9FTlVN::RERSM19SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX1dSX0VOVU0=::RERSM19SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV1RDTA==::Ng==::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVRDTF9FTlVN::RERSM19BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVENM::Nw==::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzFYMQ==::UmFuayAw::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzFYMQ==::UmFuayAw::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVE4=::LA==::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDA=::LA==::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDE=::LA==::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDI=::LA==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDM=::LA==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVE4=::LA==::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDA=::LA==::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDE=::LA==::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDI=::LA==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDM=::LA==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9MTw==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9MT19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1BFRURCSU5fRU5VTQ==::RERSM19TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX0FDX01W::MTM1::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX1BT::NTM=::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX0FDX01W::MTM1::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX1BT::NTU=::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1FfUFM=::NzU=::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFIX0NZQw==::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX1BT::MTgw::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFTSF9DWUM=::MC40::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTSF9DWUM=::MC4xOA==::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMU19QUw==::MTI1LjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMSF9QUw==::MTI1LjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTU19DWUM=::MC4xOA==::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfVVM=::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVE1SRF9DS19DWUM=::NA==::dE1SRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19OUw==::MzMuMA==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9OUw==::MTMuMDk=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX05T::MTMuMDk=::dFJQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfVVM=::Ny44::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX05T::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdUUl9DWUM=::NA==::dFdUUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19OUw==::MjUuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJSRF9DWUM=::Ng==::dFJSRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJUUF9DWUM=::OA==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfQ0s=::NDk5::UEFSQU1fTUVNX0REUjNfVElOSVRfQ0tfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjNfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19DWUM=::MzY=::UEFSQU1fTUVNX0REUjNfVFJBU19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9DWUM=::MTQ=::UEFSQU1fTUVNX0REUjNfVFJDRF9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX0NZQw==::MTQ=::UEFSQU1fTUVNX0REUjNfVFJQX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19DWUM=::MTcx::UEFSQU1fTUVNX0REUjNfVFJGQ19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX0NZQw==::MTY=::UEFSQU1fTUVNX0REUjNfVFdSX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19DWUM=::Mjc=::UEFSQU1fTUVNX0REUjNfVEZBV19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfQ1lD::ODMyMA==::UEFSQU1fTUVNX0REUjNfVFJFRklfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9TQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9EQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9TT0RJTU0=::TWVtb3J5IGZvcm1hdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0hJUF9JRF9XSURUSA==::MA==::Q2hpcCBJRCB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkFOS1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tfV0lEVEg=::Mg==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk9XX0FERFJfV0lEVEg=::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19BRERSX1dJRFRI::Mg==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19HUk9VUF9XSURUSA==::Mg==::QmFuayBncm91cCB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRE1fRU4=::dHJ1ZQ==::RGF0YSBtYXNr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfUEFSX0VO::dHJ1ZQ==::RW5hYmxlIEFMRVJUIy9QQVIgcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSNF9BTEVSVF9OX1BMQUNFTUVOVF9EQVRBX0xBTkVT::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19MQU5F::MA==::QWRkcmVzcy9jb21tYW5kIEkvTyBsYW5lIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19QSU4=::MA==::UGluIGluZGV4IG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkxfRU5VTQ==::RERSNF9CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQlRfRU5VTQ==::RERSNF9CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENM::MTg=::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX05PTV9FTlVN::RERSNF9SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVRDTF9FTlVN::RERSNF9BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFJWX1NUUl9FTlVN::RERSNF9EUlZfU1RSX1JaUV83::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVNSX0VOVU0=::RERSNF9BU1JfTUFOVUFMX05PUk1BTA==::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1dSX0VOVU0=::RERSNF9SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1RDTA==::MTg=::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ1JD::ZmFsc2U=::V3JpdGUgQ1JDIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfR0VBUkRPV04=::RERSNF9HRUFSRE9XTl9IUg==::RERSNCBnZWFyZG93biBtb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUEVSX0RSQU1fQUREUg==::ZmFsc2U=::UGVyLURSQU0gYWRkcmVzc2FiaWxpdHk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9TRU5TT1JfUkVBRE9VVA==::ZmFsc2U=::VGVtcGVyYXR1cmUgc2Vuc29yIHJlYWRvdXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRklORV9HUkFOVUxBUklUWV9SRUZSRVNI::RERSNF9GSU5FX1JFRlJFU0hfRklYRURfMVg=::RmluZSBncmFudWxhcml0eSByZWZyZXNo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVBSX1JFQURfRk9STUFU::RERSNF9NUFJfUkVBRF9GT1JNQVRfU0VSSUFM::TVBSIHJlYWQgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUFYX1BPV0VSRE9XTg==::ZmFsc2U=::TWF4aW11bSBwb3dlciBkb3duIG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfUkFOR0U=::RERSNF9URU1QX0NPTlRST0xMRURfUkZTSF9OT1JNQUw=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfRU5B::ZmFsc2U=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSU5URVJOQUxfVlJFRkRRX01PTklUT1I=::ZmFsc2U=::SW50ZXJuYWwgVnJlZkRRIG1vbml0b3I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0FMX01PREU=::MA==::Q1MgdG8gQWRkci9DTUQgTGF0ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VMRl9SRlNIX0FCT1JU::ZmFsc2U=::U2VsZiByZWZyZXNoIGFib3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRV9UUkFJTklORw==::ZmFsc2U=::UmVhZCBwcmVhbWJsZSB0cmFpbmluZyBtb2RlIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRQ==::MQ==::UmVhZCBwcmVhbWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfUFJFQU1CTEU=::MQ==::V3JpdGUgcHJlYW1ibGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEFSSVRZX0xBVEVOQ1k=::RERSNF9BQ19QQVJJVFlfTEFURU5DWV9ESVNBQkxF::QWRkci9DTUQgcGFyaXR5IGxhdGVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX0lOX1BPV0VSRE9XTg==::dHJ1ZQ==::T0RUIGlucHV0IGJ1ZmZlciBkdXJpbmcgcG93ZXJkb3duIG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1BBUks=::RERSNF9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::UlRUIFBBUks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEVSU0lTVEVOVF9FUlJPUg==::ZmFsc2U=::QWRkci9DTUQgcGVyc2lzdGVudCBlcnJvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfREJJ::ZmFsc2U=::V3JpdGUgREJJ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9EQkk=::ZmFsc2U=::UmVhZCBEQkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREVGQVVMVF9WUkVGT1VU::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZkRRIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfVkFMVUU=::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfUkFOR0U=::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NBX0lCVF9FTlVN::RERSNF9SQ0RfQ0FfSUJUXzEwMA==::UkNEIENBIElucHV0IEJ1cyBUZXJtaW5hdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NTX0lCVF9FTlVN::RERSNF9SQ0RfQ1NfSUJUXzEwMA==::UkNEIERDU1szOjBdX24gSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NLRV9JQlRfRU5VTQ==::RERSNF9SQ0RfQ0tFX0lCVF8xMDA=::UkNEIERDS0UgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX09EVF9JQlRfRU5VTQ==::RERSNF9SQ0RfT0RUX0lCVF8xMDA=::UkNEIERPRFQgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX05PTV9FTlVN::RERSNF9EQl9SVFRfTk9NX09EVF9ESVNBQkxFRA==::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX05PTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1dSX0VOVU0=::RERSNF9EQl9SVFRfV1JfUlpRXzM=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1dS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1BBUktfRU5VTQ==::RERSNF9EQl9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1BBUks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfRFFfRFJWX0VOVU0=::RERSNF9EQl9EUlZfU1RSX1JaUV83::REIgSG9zdCBJbnRlcmZhY2UgRFEgRHJpdmVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzN19SQ0RfQ0FfRFJW::MTAx::U1BEIEJ5dGUgMTM3IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDb21tYW5kL0FkZHJlc3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOF9SQ0RfQ0tfRFJW::NQ==::U1BEIEJ5dGUgMTM4IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MF9EUkFNX1ZSRUZEUV9SMA==::Mjk=::U1BEIEJ5dGUgMTQwIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MV9EUkFNX1ZSRUZEUV9SMQ==::Mjk=::U1BEIEJ5dGUgMTQxIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0Ml9EUkFNX1ZSRUZEUV9SMg==::Mjk=::U1BEIEJ5dGUgMTQyIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0M19EUkFNX1ZSRUZEUV9SMw==::Mjk=::U1BEIEJ5dGUgMTQzIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NF9EQl9WUkVGRFE=::Mzc=::U1BEIEJ5dGUgMTQ0IC0gREIgVnJlZkRRIGZvciBEUkFNIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NV9EQl9NRFFfRFJW::MjE=::U1BEIEJ5dGUgMTQ1LTE0NyAtIERCIE1EUSBEcml2ZSBTdHJlbmd0aCBhbmQgUlRU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OF9EUkFNX0RSVg==::MA==::U1BEIEJ5dGUgMTQ4IC0gRFJBTSBEcml2ZSBTdHJlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OV9EUkFNX1JUVF9XUl9OT00=::MjA=::U1BEIEJ5dGUgMTQ5LTE1MSAtIERSQU0gT0RUIChSVFRfV1IgYW5kIFJUVF9OT00p"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE1Ml9EUkFNX1JUVF9QQVJL::Mzk=::U1BEIEJ5dGUgMTUyLTE1NCAtIERSQU0gT0RUIChSVFRfUEFSSyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzM19SQ0RfREJfVkVORE9SX0xTQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKExTQik="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNF9SQ0RfREJfVkVORE9SX01TQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKE1TQik="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNV9SQ0RfUkVW::MA==::UkNEIFJldmlzaW9uIE51bWJlcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOV9EQl9SRVY=::MA==::REIgUmV2aXNpb24gTnVtYmVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JT::dHJ1ZQ==::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hN::MjQw::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFTX1dJRFRI::OQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfQ1NfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfQ0tFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfT0RUX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUl9XSURUSA==::MTc=::UEFSQU1fTUVNX0REUjRfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1M=::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1ZBTFVF::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdF::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdFX0RJU1A=::UmFuZ2UgMiAtIDQ1JSB0byA3Ny41JQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRU19XSURUSA==::OQ==::UEFSQU1fTUVNX0REUjRfVFRMX0RRU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjRfVFRMX0RRX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NTX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NTX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLRV9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLRV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX09EVF9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX09EVF9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEg=::MA==::UEFSQU1fTUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0FERFJfV0lEVEg=::MTc=::UEFSQU1fTUVNX0REUjRfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjRfVFRMX1JNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9ESU1NU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIw::MjExMg==::UEFSQU1fTUVNX0REUjRfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIx::NjU1Mzc=::UEFSQU1fTUVNX0REUjRfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIy::MTMxMTIw::UEFSQU1fTUVNX0REUjRfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIz::MTk3MTIw::UEFSQU1fTUVNX0REUjRfTVIzX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI0::MjYyMTQ0::UEFSQU1fTUVNX0REUjRfTVI0X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI1::MzI4NzM2::UEFSQU1fTUVNX0REUjRfTVI1X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI2::Mzk0MzI3::UEFSQU1fTUVNX0REUjRfTVI2X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkQ=::MTM=::UEFSQU1fTUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkRfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWQ==::MQ==::UEFSQU1fTUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzFYMQ==::UmFuayAw::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzFYMQ==::UmFuayAw::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDA=::KERyaXZlKSBSWlEvNyAoMzQgT2htKSxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChEcml2ZSkgUlpRLzcgKDM0IE9obSksLSwt::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDA=::KE5vbWluYWwpIE9EVCBEaXNhYmxlZCxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChOb21pbmFsKSBPRFQgRGlzYWJsZWQsLSwt::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9MTw==::NDE5NDMwOA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9MT19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BFRURCSU5fRU5VTQ==::RERSNF9TUEVFREJJTl8yNDAw::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX0FDX01W::MTAw::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX0RDX01W::NzU=::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfVE9UQUxfVUk=::MC4y::VGRpVldfdG90YWw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVkRJVldfVE9UQUw=::MTM2::VmRpVldfdG90YWw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfVUk=::MC4xNg==::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX1VJ::MC43Ng==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERWV1BfVUk=::MC43Mg==::dERWV3A="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX1BT::MTgw::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFTSF9DWUM=::MC4zOA==::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTSF9DWUM=::MC4xOA==::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTU19DWUM=::MC4xOA==::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19QUw==::MTIyLjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9QUw==::MTIyLjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfVVM=::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVE1SRF9DS19DWUM=::OA==::dE1SRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19OUw==::MzMuMA==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9OUw==::MTQuMDY=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX05T::MTQuMDY=::dFJQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfVVM=::Ny44::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX05T::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9MX0NZQw==::NA==::dFdUUl9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9TX0NZQw==::Mg==::dFdUUl9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19OUw==::MjUuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9MX0NZQw==::NQ==::dFJSRF9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9TX0NZQw==::NA==::dFJSRF9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9MX0NZQw==::NQ==::dENDRF9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9TX0NZQw==::NA==::dENDRF9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfTlM=::OTAuMA==::dFJGQ19kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19ETFJfQ1lD::MTY=::dEZBV19kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9ETFJfQ1lD::NA==::dFJSRF9kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfREpfQ1lD::MC4x::UEFSQU1fTUVNX0REUjRfVERJVldfREpfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfUFM=::NjY=::UEFSQU1fTUVNX0REUjRfVERRU1FfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX0NZQw==::MC4zOA==::UEFSQU1fTUVNX0REUjRfVFFIX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfQ0s=::NjAwMDAw::UEFSQU1fTUVNX0REUjRfVElOSVRfQ0tfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjRfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19DWUM=::NDA=::UEFSQU1fTUVNX0REUjRfVFJBU19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9DWUM=::MTc=::UEFSQU1fTUVNX0REUjRfVFJDRF9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX0NZQw==::MTc=::UEFSQU1fTUVNX0REUjRfVFJQX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19DWUM=::MTky::UEFSQU1fTUVNX0REUjRfVFJGQ19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX0NZQw==::MTg=::UEFSQU1fTUVNX0REUjRfVFdSX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJUUF9DWUM=::OQ==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19DWUM=::MzA=::UEFSQU1fTUVNX0REUjRfVEZBV19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfQ1lD::OTM2MA==::UEFSQU1fTUVNX0REUjRfVFJFRklfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ01EX0xBVEVOQ1k=::NQ==::V3JpdGUgQ01EIGxhdGVuY3kgZm9yIENSQy9ETSBlbmFibGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfQ1lD::MTA4::UEFSQU1fTUVNX0REUjRfVFJGQ19ETFJfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9TQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9EQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRQ==::MUQ=::UEFSQU1fTUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9QRVJfREVWSUNF::MzY=::RGF0YSB3aWR0aCBwZXIgZGV2aWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQUREUl9XSURUSA==::MTk=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX0VO::dHJ1ZQ==::RW5hYmxlIEJXUyMgcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjJfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjJfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9XSURUSA==::MzY=::RGF0YSB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fV0lEVEg=::NA==::QldTIyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fUEVSX0RFVklDRQ==::NA==::UEFSQU1fTUVNX1FEUjJfQldTX05fUEVSX0RFVklDRV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQ1FfV0lEVEg=::MQ==::Q1Egd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfS19XSURUSA==::MQ==::SyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFdMX0NZQw==::MQ==::dFdM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfU1BFRURCSU5fRU5VTQ==::UURSMl9TUEVFREJJTl82MzM=::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFJMX0NZQw==::Mi41::dFJM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNBX05T::MC4yMw==::dFNB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhBX05T::MC4xOA==::dEhB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNEX05T::MC4yMw==::dFNE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhEX05T::MC4xOA==::dEhE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRF9OUw==::MC4wOQ==::dENRRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRE9IX05T::LTAuMDk=::dENRRE9I"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfSU5URVJOQUxfSklUVEVSX05T::MC4wOA==::SW50ZXJuYWwgSml0dGVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRSF9OUw==::MC43MQ==::dENRSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENDUU9fTlM=::MC40NQ==::dENDUU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ0tfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChDbG9jayk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUNfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChBZGRyZXNzL0NvbW1hbmQp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9PRFRfTU9ERV9FTlVN::UURSNF9PRFRfMjVfUENU::T0RUIChEYXRhKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUFVfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLXVwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUERfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLWRvd24p"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9JTlZfRU5B::ZmFsc2U=::RGF0YSBidXMgaW52ZXJzaW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9JTlZfRU5B::ZmFsc2U=::QWRkcmVzcyBidXMgaW52ZXJzaW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjRfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfV0lEVEg=::NzI=::UEFSQU1fTUVNX1FEUjRfRFFfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfUUtfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfREtfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9XSURUSA==::NA==::UEFSQU1fTUVNX1FEUjRfRElOVl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVVNFX0FERFJfUEFSSVRZ::ZmFsc2U=::VXNlIGFkZHJlc3MgcGFyaXR5IGJpdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfV0lEVEg=::MzY=::RFFBIC8gRFFCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfUEVSX1BPUlRfV0lEVEg=::Mg==::UUtBIC8gUUtCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfUEVSX1BPUlRfV0lEVEg=::Mg==::REtBIC8gREtCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9QRVJfUE9SVF9XSURUSA==::Mg==::RElOVkEgLyBESU5WQiB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQkw=::Mg==::UEFSQU1fTUVNX1FEUjRfQkxfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFJMX0NZQw==::OA==::UEFSQU1fTUVNX1FEUjRfVFJMX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFdMX0NZQw==::NQ==::UEFSQU1fTUVNX1FEUjRfVFdMX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iw::MA==::UEFSQU1fTUVNX1FEUjRfQ1IwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Ix::MA==::UEFSQU1fTUVNX1FEUjRfQ1IxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iy::MA==::UEFSQU1fTUVNX1FEUjRfQ1IyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU1BFRURCSU5fRU5VTQ==::UURSNF9TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVElTSF9QUw==::MTUw::dElTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFIX0NZQw==::MC40::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUFYX1BT::MTUw::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUlOX1BT::LTE1MA==::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLUUtfTUFYX1BT::MjI1::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVEFTSF9QUw==::MTcw::dEFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENTSF9QUw==::MTcw::dENTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX0RFVklDRQ==::OQ==::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ09ORklHX0VOVU0=::UkxEMl9DT05GSUdfVFJDXzhfVFJMXzhfVFdMXzk=::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFJJVkVfSU1QRURFTkNFX0VOVU0=::UkxEMl9EUklWRV9JTVBFREVOQ0VfSU5URVJOQUxfNTA=::RHJpdmUgSW1wZWRhbmNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfT0RUX01PREVfRU5VTQ==::UkxEMl9PRFRfT04=::T24tRGllIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDJfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfV0lEVEg=::OQ==::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUUtfV0lEVEg=::MQ==::UUsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREtfV0lEVEg=::MQ==::REsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX1JMRDJfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJD::OA==::UEFSQU1fTUVNX1JMRDJfVFJDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJM::OA==::UEFSQU1fTUVNX1JMRDJfVFJMX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFdM::OQ==::UEFSQU1fTUVNX1JMRDJfVFdMX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfTVI=::MA==::UEFSQU1fTUVNX1JMRDJfTVJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfU1BFRURCSU5fRU5VTQ==::UkxEMl9TUEVFREJJTl8xOA==::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUkVGUkVTSF9JTlRFUlZBTF9VUw==::MC4yNA==::UmVmcmVzaCBJbnRlcnZhbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLSF9DWUM=::MC40NQ==::dENLSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLSF9IQ1lD::MC45::dFFLSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFTX05T::MC4z::dEFT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFIX05T::MC4z::dEFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERTX05T::MC4xNw==::dERT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERIX05T::MC4xNw==::dERI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NQVhfTlM=::MC4xMg==::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NSU5fTlM=::LTAuMTI=::dFFLUV9taW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUFYX05T::MC4z::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUlOX05T::LTAuMw==::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLUUtfTUFYX05T::MC4y::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVQVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIGRlcHRoIGV4cGFuc2lvbiB1c2luZyB0d2luIGRpZSBwYWNrYWdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQUREUl9XSURUSA==::MjA=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkFOS19BRERSX1dJRFRI::NA==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkw=::Mg==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREFUQV9MQVRFTkNZX01PREVfRU5VTQ==::UkxEM19ETF9STDE2X1dMMTc=::RGF0YSBMYXRlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVF9SQ19NT0RFX0VOVU0=::UkxEM19UUkNfOQ==::dFJD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UkxEM19PVVRQVVRfRFJJVkVfNDA=::T3V0cHV0IGRyaXZl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT0RUX01PREVfRU5VTQ==::UkxEM19PRFRfNDA=::T0RU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQVJFRl9QUk9UT0NPTF9FTlVN::UkxEM19BUkVGX0JBQw==::QVJFRiBwcm90b2NvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV1JJVEVfUFJPVE9DT0xfRU5VTQ==::UkxEM19XUklURV8xQkFOSw==::V3JpdGUgcHJvdG9jb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDNfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfV0lEVEg=::MzY=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfUUtfV0lEVEg=::NA==::UUsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREtfV0lEVEg=::Mg==::REsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fV0lEVEg=::Mg==::UEFSQU1fTUVNX1JMRDNfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIw::MA==::UEFSQU1fTUVNX1JMRDNfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIx::MA==::UEFSQU1fTUVNX1JMRDNfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIy::MA==::UEFSQU1fTUVNX1JMRDNfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfU1BFRURCSU5fRU5VTQ==::UkxEM19TUEVFREJJTl8wOTNF::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX1BT::LTMw::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX0FDX01W::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX1BT::NQ==::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFIX0NZQw==::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUFYX0NZQw==::MC4yNw==::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUlOX0NZQw==::LTAuMjc=::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLUUtfTUFYX1BT::MTM1::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX1BT::ODU=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX0FDX01W::MTUw::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX1BT::NjU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9XSURUSA==::MzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ESVNDUkVURV9DU19XSURUSA==::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS19XSURUSA==::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9FTg==::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ST1dfQUREUl9XSURUSA==::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DT0xfQUREUl9XSURUSA==::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CQU5LX0FERFJfV0lEVEg=::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUVNfV0lEVEg=::MQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19ETV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DU19XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19DU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS0VfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19DS0VfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19PRFRfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19PRFRfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19BRERSX1dJRFRI::MTA=::UEFSQU1fTUVNX0xQRERSM19BRERSX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9QRVJfRFFT::OA==::UEFSQU1fTUVNX0xQRERSM19EUV9QRVJfRFFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19GT1JNQVRfRU5VTQ==::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX0xQRERSM19GT1JNQVRfRU5VTV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjE=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjFfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjI=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjM=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjEx::MA==::UEFSQU1fTUVNX0xQRERSM19NUjExX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CTA==::TFBERFIzX0JMX0JMOA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EQVRBX0xBVEVOQ1k=::TFBERFIzX0RMX1JMMTJfV0w2::RGF0YSBsYXRlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUlZfU1RS::TFBERFIzX0RSVl9TVFJfNDBEXzQwVQ==::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUU9EVA==::TFBERFIzX0RRT0RUX0RJU0FCTEU=::RFEgT0RU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19QRE9EVA==::TFBERFIzX1BET0RUX0RJU0FCTEVE::UG93ZXIgZG93biBPRFQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XTFNFTEVDVA==::U2V0IEE=::V0wgc2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OV1I=::TFBERFIzX05XUl9OV1IxMg==::bldSIGN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19VU0VfREVGQVVMVF9PRFQ=::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fMVgx::UmFuayAw::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMVgx::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fMVgx::UmFuayAw::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMVgx::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fMlgy::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMlgy::b2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfMlgy::b2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fMlgy::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMlgy::b24sb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfMlgy::b2ZmLG9u::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fNFg0::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfNFg0::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDJfNFg0::b24sb24sb2ZmLG9mZg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fNFg0::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfNFg0::b24sb24sb24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDJfNFg0::b24sb24sb24sb24=::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUTg==::LA==::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMA==::LA==::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMQ==::LA==::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMg==::LA==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMw==::LA==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUTg==::LA==::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMA==::LA==::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMQ==::LA==::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMg==::LA==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMw==::LA==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xP::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xPX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJ::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQ::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5L::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5LX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TUEVFREJJTl9FTlVN::TFBERFIzX1NQRUVEQklOXzE2MDA=::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfUFM=::NzU=::dElTQ0EgKGJhc2Up"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfQUNfTVY=::MTUw::dElTQ0EgKGJhc2UpIEFDIGxldmVs"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfUFM=::MTAw::dElIQ0EgKGJhc2Up"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfRENfTVY=::MTAw::dElIQ0EgKGJhc2UpIERDIGxldmVs"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfUFM=::NzU=::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfQUNfTVY=::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfUFM=::MTAw::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfRENfTVY=::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTUV9QUw==::MTM1::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUUhfQ1lD::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETA==::NjE0::dERRU0NLREw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTU19DWUM=::MS4yNQ==::dERRU1MgKG1heCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUVNIX0NZQw==::MC4zOA==::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNIX0NZQw==::MC4y::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xTX1BT::MTc1LjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xIX1BT::MTc1LjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNTX0NZQw==::MC4y::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9VUw==::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJSX0NLX0NZQw==::NA==::dE1SUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJXX0NLX0NZQw==::MTA=::dE1SVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX05T::NDIuNQ==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX05T::MTguNzU=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfTlM=::MTguNzU=::dFJQcGI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9VUw==::My45::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX05T::MjEwLjA=::dFJGQ2Fi"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfTlM=::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1RSX0NZQw==::NA==::dFdUUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX05T::NTAuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlJEX0NZQw==::Mg==::dFJSRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlRQX0NZQw==::NA==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9DSw==::NDk5::UEFSQU1fTUVNX0xQRERSM19USU5JVF9DS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfREVSVl9QUw==::Mg==::UEFSQU1fTUVNX0xQRERSM19URFFTQ0tfREVSVl9QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tEUw==::MjIw::dERRU0NLRFM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETQ==::NTEx::dERRU0NLRE0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfUFM=::NTUwMA==::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX0NZQw==::MzQ=::UEFSQU1fTUVNX0xQRERSM19UUkFTX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX0NZQw==::MTc=::UEFSQU1fTUVNX0xQRERSM19UUkNEX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfQ1lD::MTc=::UEFSQU1fTUVNX0xQRERSM19UUlBfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX0NZQw==::MTY4::UEFSQU1fTUVNX0xQRERSM19UUkZDX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfQ1lD::MTI=::UEFSQU1fTUVNX0xQRERSM19UV1JfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX0NZQw==::NDA=::UEFSQU1fTUVNX0xQRERSM19URkFXX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9DWUM=::MzEyMA==::UEFSQU1fTUVNX0xQRERSM19UUkVGSV9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkxfQ1lD::MTA=::UEFSQU1fTUVNX0xQRERSM19UUkxfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xfQ1lD::Ng==::UEFSQU1fTUVNX0xQRERSM19UV0xfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0NLX1NMRVdfUkFURQ==::Mi4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX1NMRVdfUkFURQ==::MS4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX1NMRVdfUkFURQ==::NS4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX0lTSV9OUw==::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX0lTSV9OUw==::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlM=::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX1NMRVdfUkFURQ==::OC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9TTEVXX1JBVEU=::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19JU0lfTlM=::MC4yMg==::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX0lTSV9OUw==::MC4yMg==::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX0lTSV9OUw==::MC4wNzg=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9JU0lfTlM=::MC4xNTU=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9JU0lfTlM=::MC4xNg==::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4xOA==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0tfU0xFV19SQVRF::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfU0xFV19SQVRF::Mi4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::Sy9LIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBRIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9RX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUSBncm91cCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9EX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRCBncm91cCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fUV9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fRF9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX1FfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUSBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0RfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRCBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19UT19LX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9NQVhfS19ERUxBWV9OUw==::MC42::TWF4aW11bSBLIGRlbGF5IHRvIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9LX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX1NMRVdfUkFURQ==::NC4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9TTEVXX1JBVEU=::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX0lTSV9OUw==::MC4w::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX0lTSV9OUw==::MC4w::Sy9LIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBRIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfSVNJX05T::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfSVNJX05T::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX1NMRVdfUkFURQ==::NS4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX1NMRVdfUkFURQ==::Ny4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9TTEVXX1JBVEU=::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVM=::dHJ1ZQ==::UEFSQU1fQk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX0lTSV9WQUxVRVM=::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfSVNJX05T::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19JU0lfTlM=::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19JU0lfTlM=::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfSVNJX05T::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfSVNJX05T::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0RRU19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0FDX0RFU0tFV0VE::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0RRU19UT19DS19TS0VXX05T::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9ESU1NU19OUw==::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1RPX0NLX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9DS19ERUxBWV9OUw==::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9EUVNfREVMQVlfTlM=::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gZGV2aWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0NLX1NMRVdfUkFURQ==::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfSVNJX05T::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfSVNJX05T::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OUw==::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05T::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9FQ0NfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9FQ0NfRU5fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9NTVJfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9NTVJfRU5fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9BVVRPX1BSRUNIQVJHRV9FTg==::ZmFsc2U=::UEFSQU1fQ1RSTF9BVVRPX1BSRUNIQVJHRV9FTl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9VU0VSX1BSSU9SSVRZX0VO::ZmFsc2U=::UEFSQU1fQ1RSTF9VU0VSX1BSSU9SSVRZX0VOX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FERFJfT1JERVJfRU5VTQ==::RERSM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FERFJfT1JERVJfRU5VTQ==::RERSNF9DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0NfQkc=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCByZWFkLWFmdGVyLXdyaXRlIHR1cm5hcm91bmQgdGltZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9XQVJfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCB3cml0ZS1hZnRlci1yZWFkIHR1cm5hcm91bmQgdGltZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQw==::NA==::UEFSQU1fQ1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQw==::MTE=::UEFSQU1fQ1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FERFJfT1JERVJfRU5VTQ==::UkxEM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVZMX1BST1RPQ09MX0VOVU0=::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU0VMRl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0NZQ1M=::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9QUklPUklUWV9FTg==::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QUkVDSEFSR0VfRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQUREUl9PUkRFUl9FTlVN::TFBERFIzX0NUUkxfQUREUl9PUkRFUl9DU19SX0JfQw==::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkVPUkRFUl9FTg==::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU1RBUlZFX0xJTUlU::MTA=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfTU1SX0VO::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fUkVHVEVTVF9NT0RF::ZmFsc2U=::U2ltdWxhdGlvbiByZWd0ZXN0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19USU1JTkdfUkVHVEVTVF9NT0RF::ZmFsc2U=::VGltaW5nIHJlZ3Rlc3QgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TWU5USF9GT1JfU0lN::ZmFsc2U=::U3ludGhlc2l6ZSBmb3Igc2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTV9PVkVSUklERQ==::RkFTVF9TSU1fT1ZFUlJJREVfREVGQVVMVA==::RmFzdCBzaW11bGF0aW9uIG92ZXJyaWRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNF::YXZs::UEFSQU1fRElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0U=::YXZsX3JlbGVhc2U=::UEFSQU1fRElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0VfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19WRVJCT1NFX0lPQVVY::ZmFsc2U=::U2hvdyB2ZXJib3NlIElPQVVYIGRlYnVnIG1lc3NhZ2Vz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FQ0xJUFNFX0RFQlVH::ZmFsc2U=::RW5hYmxlIEVjbGlwc2UgZGVidWdnaW5n"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfVkpJ::ZmFsc2U=::RXhwb3J0IFZpcnR1YWwgSlRBRyBJbnRlcmZhY2UgKFZKSSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJU::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJUX0hFWA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBoZXhmaWxlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSFBTX0VNSUZfREVCVUc=::ZmFsc2U=::RW5hYmxlIFVBUlQgZm9yIEhQUyBFTUlGIERlYnVn"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfTU9ERQ==::U09GVF9OSU9TX01PREVfRElTQUJMRUQ=::VXNlIFNvZnQgTklPUyBQcm9jZXNzb3IgZm9yIE9uLUNoaXAgRGVidWc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfQ0xPQ0tfRlJFUVVFTkNZ::MTAw::Q2FsaWJyYXRpb24gUHJvY2Vzc29yIEV4dGVybmFsIENsb2NrIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfUlMyMzJfVUFSVA==::ZmFsc2U=::VXNlIGFuIFJTMjMyIFVBUlQgZm9yIFNvZnQgTklPUyBDYWxpYnJhdGlvbiBQcm9jZXNzb3IgZGVidWcgb3V0cHV0IChyZXF1aXJlcyBjb2RlIGNoYW5nZSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19SUzIzMl9VQVJUX0JBVURSQVRF::NTc2MDA=::UlMyMzIgVUFSVCBTcGVlZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUkVTRVRT::ZmFsc2U=::VXNlIGEgc2VwYXJhdGUgZ2xvYmFsIHJlc2V0IHNpZ25hbCBmb3IgZXZlcnkgaW50ZXJmYWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPU0VfREZUX1NJR05BTFM=::ZmFsc2U=::RXhwb3NlIHRlc3QgYW5kIGRlYnVnIHNpZ25hbHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQk9BUkRfREVMQVlfTU9ERUw=::ZmFsc2U=::VXNlIGJvYXJkIGRlbGF5IG1vZGVsIGR1cmluZyBzaW11bGF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9FWFBPUlRfQ0ZHX0lOVEVSRkFDRQ==::ZmFsc2U=::RXhwb3J0IFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9OVU1fQ0ZHX0lOVEVSRkFDRVM=::MA==::TnVtYmVyIG9mIFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VU::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX0xPQ0tFRA==::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX0xPQ0tFRF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0hPUlRfUVNZU19JTlRFUkZBQ0VfTkFNRVM=::ZmFsc2U=::VXNlIHNob3J0IFFzeXMgaW50ZXJmYWNlIG5hbWVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFRfRE9DUw==::ZmFsc2U=::UEFSQU1fRElBR19FWFRfRE9DU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0FMX01PREVfRU5VTQ==::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9TTEFWRQ==::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9NQVNURVI=::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fTlVNX09GX1NMQVZFUw==::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fSVNTUF9FTg==::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19JTlRFUkZBQ0VfSUQ=::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FRkZJQ0lFTkNZX01PTklUT1I=::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTQ==::dHJ1ZQ==::UEFSQU1fRElBR19GQVNUX1NJTV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfVEdfQVZMXzI=::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19JTkZJX1RHMl9FUlJfVEVTVA==::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::UEFSQU1fRElBR19VU0VfQUJTVFJBQ1RfUEhZX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19EQVRBX1BBVFRFUk5fTEVOR1RI::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19CRV9QQVRURVJOX0xFTkdUSA==::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfREVGQVVMVF9QQVRURVJO::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfVVNFUl9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfUkVQRUFUX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfU1RSRVNTX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfU09GVF9NMjBL::dHJ1ZQ==::UEFSQU1fRElBR19FTkFCTEVfU09GVF9NMjBLX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RH::ZmFsc2U=::UEFSQU1fRElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RHX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRUw==::dHJ1ZQ==::UEFSQU1fRElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbiAoZXhwZXJpbWVudGFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTUlDUk9OX0FQ::ZmFsc2U=::RW5hYmxlIE1pY3JvbiBBdXRvbWF0YSBDYWxpYnJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfTEVWRUw=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfREVTS0VX::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfVlJFRl9DQUw=::dHJ1ZQ==::U2tpcCBWUkVGIGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NLSVBfVlJFRl9DQUw=::ZmFsc2U=::U2tpcCBWUkVGX2luIGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX0NBTF9NT0RFX0VOVU0=::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fU0xBVkU=::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fTUFTVEVS::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX05VTV9PRl9TTEFWRVM=::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX0lTU1BfRU4=::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5URVJGQUNFX0lE::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRUZGSUNJRU5DWV9NT05JVE9S::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVVNFX1RHX0FWTF8y::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX0RFRkFVTFRfUEFUVEVSTg==::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1VTRVJfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1JFUEVBVF9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1NUUkVTU19TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5GSV9URzJfRVJSX1RFU1Q=::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfREFUQV9QQVRURVJOX0xFTkdUSA==::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfQkVfUEFUVEVSTl9MRU5HVEg=::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0VQQVJBVEVfUkVBRF9XUklURV9JVEZT::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVM=::ZmFsc2U=::UEFSQU1fRElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9MRVZFTA==::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9ERVNLRVc=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU0lN::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU0lNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU1lOVEg=::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU1lOVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfU0VMX0RFU0lHTg==::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NJTQ==::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NZTlRI::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfSERMX0ZPUk1BVA==::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfVEFSR0VUX0RFVl9LSVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfUFJFVl9QUkVTRVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0lMSUNPTl9SRVY=::MjBubTU=::U0lMSUNPTl9SRVY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SVNfSFBT::ZmFsc2U=::SVNfSFBT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SVNfVklE::ZmFsc2U=::SVNfVklE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VVNFUl9DTEtfUkFUSU8=::NA==::VVNFUl9DTEtfUkFUSU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "QzJQX1AyQ19DTEtfUkFUSU8=::NA==::QzJQX1AyQ19DTEtfUkFUSU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0hNQ19DTEtfUkFUSU8=::Mg==::UEhZX0hNQ19DTEtfUkFUSU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19BQlNUUkFDVF9QSFlfV0xBVA==::OQ==::RElBR19BQlNUUkFDVF9QSFlfV0xBVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19BQlNUUkFDVF9QSFlfUkxBVA==::MTg=::RElBR19BQlNUUkFDVF9QSFlfUkxBVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19DUEFfT1VUXzFfRU4=::ZmFsc2U=::RElBR19DUEFfT1VUXzFfRU4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQ1BBX0xPQ0s=::ZmFsc2U=::RElBR19VU0VfQ1BBX0xPQ0s="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RFFTX0JVU19NT0RFX0VOVU0=::RFFTX0JVU19NT0RFX1g4X1g5::RFFTX0JVU19NT0RFX0VOVU0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "QUNfUElOX01BUF9TQ0hFTUU=::dXNlXzBfMV8yXzNfbGFuZQ==::QUNfUElOX01BUF9TQ0hFTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TlVNX09GX0hNQ19QT1JUUw==::MQ==::TlVNX09GX0hNQ19QT1JUUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::SE1DX0FWTF9QUk9UT0NPTF9FTlVN"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX0NUUkxfRElNTV9UWVBF::c29kaW1t::SE1DX0NUUkxfRElNTV9UWVBF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UkVHSVNURVJfQUZJ::dHJ1ZQ==::UkVHSVNURVJfQUZJ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX0NQVV9DTEtfRElWSURF::Mg==::U0VRX1NZTlRIX0NQVV9DTEtfRElWSURF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX0NBTF9DTEtfRElWSURF::OA==::U0VRX1NZTlRIX0NBTF9DTEtfRElWSURF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9DUFVfQ0xLX0RJVklERQ==::MQ==::U0VRX1NJTV9DUFVfQ0xLX0RJVklERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9DQUxfQ0xLX0RJVklERQ==::MzI=::U0VRX1NJTV9DQUxfQ0xLX0RJVklERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX09TQ19GUkVRX01IWg==::NDUw::U0VRX1NZTlRIX09TQ19GUkVRX01IWg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9PU0NfRlJFUV9NSFo=::MjM5MA==::U0VRX1NJTV9PU0NfRlJFUV9NSFo="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TlVNX09GX1JUTF9USUxFUw==::NA==::TlVNX09GX1JUTF9USUxFUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX1JEQVRBX1RJTEVfSU5ERVg=::MA==::UFJJX1JEQVRBX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX1JEQVRBX0xBTkVfSU5ERVg=::MA==::UFJJX1JEQVRBX0xBTkVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX1dEQVRBX1RJTEVfSU5ERVg=::MA==::UFJJX1dEQVRBX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX1dEQVRBX0xBTkVfSU5ERVg=::MA==::UFJJX1dEQVRBX0xBTkVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0FDX1RJTEVfSU5ERVg=::MQ==::UFJJX0FDX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX1JEQVRBX1RJTEVfSU5ERVg=::MA==::U0VDX1JEQVRBX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX1JEQVRBX0xBTkVfSU5ERVg=::MA==::U0VDX1JEQVRBX0xBTkVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX1dEQVRBX1RJTEVfSU5ERVg=::MA==::U0VDX1dEQVRBX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX1dEQVRBX0xBTkVfSU5ERVg=::MA==::U0VDX1dEQVRBX0xBTkVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0FDX1RJTEVfSU5ERVg=::MQ==::U0VDX0FDX1RJTEVfSU5ERVg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMA==::NzU3MzczODA1::TEFORVNfVVNBR0VfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMQ==::MzY1::TEFORVNfVVNBR0VfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMg==::MA==::TEFORVNfVVNBR0VfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMw==::MA==::TEFORVNfVVNBR0VfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfQVVUT0dFTl9XQ05U::NA==::TEFORVNfVVNBR0VfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8w::MTA1Njk2MDUxMQ==::UElOU19VU0FHRV8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8x::NzYzMzYzMjYz::UElOU19VU0FHRV8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8y::OTU1MjI0MDYz::UElOU19VU0FHRV8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8z::MTA3MzQ3OTYwMA==::UElOU19VU0FHRV8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV80::MTA1Njk2MDUxMA==::UElOU19VU0FHRV80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV81::NjM=::UElOU19VU0FHRV81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV82::MA==::UElOU19VU0FHRV82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV83::MA==::UElOU19VU0FHRV83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV84::MA==::UElOU19VU0FHRV84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV85::MA==::UElOU19VU0FHRV85"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMA==::MA==::UElOU19VU0FHRV8xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMQ==::MA==::UElOU19VU0FHRV8xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMg==::MA==::UElOU19VU0FHRV8xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV9BVVRPR0VOX1dDTlQ=::MTM=::UElOU19VU0FHRV9BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzA=::MQ==::UElOU19SQVRFXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzE=::NTYxNzc0NTky::UElOU19SQVRFXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzI=::OTU1MjI0MDYz::UElOU19SQVRFXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzM=::MA==::UElOU19SQVRFXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzQ=::MA==::UElOU19SQVRFXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzU=::MA==::UElOU19SQVRFXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzY=::MA==::UElOU19SQVRFXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzc=::MA==::UElOU19SQVRFXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzg=::MA==::UElOU19SQVRFXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzk=::MA==::UElOU19SQVRFXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEw::MA==::UElOU19SQVRFXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEx::MA==::UElOU19SQVRFXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEy::MA==::UElOU19SQVRFXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19SQVRFX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMA==::OTIwMjAyNjc4::UElOU19XREJfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMQ==::OTEwOTEyNTY2::UElOU19XREJfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMg==::MzE2MzQ1Nzgy::UElOU19XREJfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMw==::OTE4Nzc3Mjcw::UElOU19XREJfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNA==::MTY1Mzc1Mzc4::UElOU19XREJfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNQ==::MTM2NTgxMTkz::UElOU19XREJfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNg==::MTUzMzkxNjg5::UElOU19XREJfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNw==::MTUzMzg3MDE3::UElOU19XREJfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfOA==::MTUzMDkyNjgw::UElOU19XREJfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfOQ==::OTE4NTg5NDQw::UElOU19XREJfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTA=::ODE5Njg2ODAy::UElOU19XREJfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTE=::OTIwMzQ3ODMw::UElOU19XREJfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTI=::OTIwMjAyNjcy::UElOU19XREJfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTM=::OTEwOTEyNTY2::UElOU19XREJfMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTQ=::MzE2MzQ1Nzgy::UElOU19XREJfMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTU=::MjI0Njk0::UElOU19XREJfMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTY=::MA==::UElOU19XREJfMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTc=::MA==::UElOU19XREJfMTc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTg=::MA==::UElOU19XREJfMTg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTk=::MA==::UElOU19XREJfMTk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjA=::MA==::UElOU19XREJfMjA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjE=::MA==::UElOU19XREJfMjE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjI=::MA==::UElOU19XREJfMjI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjM=::MA==::UElOU19XREJfMjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjQ=::MA==::UElOU19XREJfMjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjU=::MA==::UElOU19XREJfMjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjY=::MA==::UElOU19XREJfMjY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjc=::MA==::UElOU19XREJfMjc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjg=::MA==::UElOU19XREJfMjg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjk=::MA==::UElOU19XREJfMjk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzA=::MA==::UElOU19XREJfMzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzE=::MA==::UElOU19XREJfMzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzI=::MA==::UElOU19XREJfMzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzM=::MA==::UElOU19XREJfMzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzQ=::MA==::UElOU19XREJfMzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzU=::MA==::UElOU19XREJfMzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzY=::MA==::UElOU19XREJfMzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzc=::MA==::UElOU19XREJfMzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzg=::MA==::UElOU19XREJfMzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19XREJfQVVUT0dFTl9XQ05U::Mzk=::UElOU19XREJfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMA==::MTUzNjEyODcz::UElOU19EQVRBX0lOX01PREVfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMQ==::MTY3NTQ3NDAx::UElOU19EQVRBX0lOX01PREVfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMg==::MTA1OTM1NzI1Nw==::UElOU19EQVRBX0lOX01PREVfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMw==::MTUzMTI5NTQ1::UElOU19EQVRBX0lOX01PREVfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNA==::MTUzMzkxNzQz::UElOU19EQVRBX0lOX01PREVfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNQ==::MTUwNzM2OTY5::UElOU19EQVRBX0lOX01PREVfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNg==::MTUzMzkxNjg5::UElOU19EQVRBX0lOX01PREVfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNw==::MTUzMzg3MDE3::UElOU19EQVRBX0lOX01PREVfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfOA==::MTUzMDkyNjgw::UElOU19EQVRBX0lOX01PREVfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfOQ==::MTUzMzUwMTQ0::UElOU19EQVRBX0lOX01PREVfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTA=::MTM2NjE0NTI3::UElOU19EQVRBX0lOX01PREVfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTE=::MTUzMzk1MTQ1::UElOU19EQVRBX0lOX01PREVfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTI=::MTUzNjEyODcy::UElOU19EQVRBX0lOX01PREVfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTM=::MTY3NTQ3NDAx::UElOU19EQVRBX0lOX01PREVfMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTQ=::MTA1OTM1NzI1Nw==::UElOU19EQVRBX0lOX01PREVfMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTU=::Mzc0NDk=::UElOU19EQVRBX0lOX01PREVfMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTY=::MA==::UElOU19EQVRBX0lOX01PREVfMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTc=::MA==::UElOU19EQVRBX0lOX01PREVfMTc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTg=::MA==::UElOU19EQVRBX0lOX01PREVfMTg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTk=::MA==::UElOU19EQVRBX0lOX01PREVfMTk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjA=::MA==::UElOU19EQVRBX0lOX01PREVfMjA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjE=::MA==::UElOU19EQVRBX0lOX01PREVfMjE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjI=::MA==::UElOU19EQVRBX0lOX01PREVfMjI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjM=::MA==::UElOU19EQVRBX0lOX01PREVfMjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjQ=::MA==::UElOU19EQVRBX0lOX01PREVfMjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjU=::MA==::UElOU19EQVRBX0lOX01PREVfMjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjY=::MA==::UElOU19EQVRBX0lOX01PREVfMjY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjc=::MA==::UElOU19EQVRBX0lOX01PREVfMjc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjg=::MA==::UElOU19EQVRBX0lOX01PREVfMjg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjk=::MA==::UElOU19EQVRBX0lOX01PREVfMjk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzA=::MA==::UElOU19EQVRBX0lOX01PREVfMzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzE=::MA==::UElOU19EQVRBX0lOX01PREVfMzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzI=::MA==::UElOU19EQVRBX0lOX01PREVfMzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzM=::MA==::UElOU19EQVRBX0lOX01PREVfMzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzQ=::MA==::UElOU19EQVRBX0lOX01PREVfMzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzU=::MA==::UElOU19EQVRBX0lOX01PREVfMzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzY=::MA==::UElOU19EQVRBX0lOX01PREVfMzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzc=::MA==::UElOU19EQVRBX0lOX01PREVfMzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzg=::MA==::UElOU19EQVRBX0lOX01PREVfMzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfQVVUT0dFTl9XQ05U::Mzk=::UElOU19EQVRBX0lOX01PREVfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzA=::MjUxNDU3NDg2::UElOU19DMkxfRFJJVkVOXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzE=::MjU5MDA3::UElOU19DMkxfRFJJVkVOXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzI=::MA==::UElOU19DMkxfRFJJVkVOXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzM=::MTA2MDg5MzU2OA==::UElOU19DMkxfRFJJVkVOXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzQ=::MjUxNDU3NDg2::UElOU19DMkxfRFJJVkVOXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzU=::NjM=::UElOU19DMkxfRFJJVkVOXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzY=::MA==::UElOU19DMkxfRFJJVkVOXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzc=::MA==::UElOU19DMkxfRFJJVkVOXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzg=::MA==::UElOU19DMkxfRFJJVkVOXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzk=::MA==::UElOU19DMkxfRFJJVkVOXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEw::MA==::UElOU19DMkxfRFJJVkVOXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEx::MA==::UElOU19DMkxfRFJJVkVOXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEy::MA==::UElOU19DMkxfRFJJVkVOXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19DMkxfRFJJVkVOX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMA==::MQ==::UElOU19EQl9JTl9CWVBBU1NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMQ==::NzYzMTAxMTg0::UElOU19EQl9JTl9CWVBBU1NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMg==::OTU1MjI0MDYz::UElOU19EQl9JTl9CWVBBU1NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMw==::NDg=::UElOU19EQl9JTl9CWVBBU1NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNA==::MA==::UElOU19EQl9JTl9CWVBBU1NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNQ==::MA==::UElOU19EQl9JTl9CWVBBU1NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNg==::MA==::UElOU19EQl9JTl9CWVBBU1NfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNw==::MA==::UElOU19EQl9JTl9CWVBBU1NfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfOA==::MA==::UElOU19EQl9JTl9CWVBBU1NfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfOQ==::MA==::UElOU19EQl9JTl9CWVBBU1NfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTA=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTE=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTI=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfQVVUT0dFTl9XQ05U::MTM=::UElOU19EQl9JTl9CWVBBU1NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzA=::MQ==::UElOU19EQl9PVVRfQllQQVNTXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzE=::NzYzMTAxMTg0::UElOU19EQl9PVVRfQllQQVNTXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzI=::OTU1MjI0MDYz::UElOU19EQl9PVVRfQllQQVNTXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzM=::NDg=::UElOU19EQl9PVVRfQllQQVNTXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzQ=::MA==::UElOU19EQl9PVVRfQllQQVNTXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzU=::MA==::UElOU19EQl9PVVRfQllQQVNTXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzY=::MA==::UElOU19EQl9PVVRfQllQQVNTXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzc=::MA==::UElOU19EQl9PVVRfQllQQVNTXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzg=::MA==::UElOU19EQl9PVVRfQllQQVNTXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzk=::MA==::UElOU19EQl9PVVRfQllQQVNTXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEw::MA==::UElOU19EQl9PVVRfQllQQVNTXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEx::MA==::UElOU19EQl9PVVRfQllQQVNTXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEy::MA==::UElOU19EQl9PVVRfQllQQVNTXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19EQl9PVVRfQllQQVNTX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMA==::MQ==::UElOU19EQl9PRV9CWVBBU1NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMQ==::NzYzMTAxMTg0::UElOU19EQl9PRV9CWVBBU1NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMg==::OTU1MjI0MDYz::UElOU19EQl9PRV9CWVBBU1NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMw==::NDg=::UElOU19EQl9PRV9CWVBBU1NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNA==::MA==::UElOU19EQl9PRV9CWVBBU1NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNQ==::MA==::UElOU19EQl9PRV9CWVBBU1NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNg==::MA==::UElOU19EQl9PRV9CWVBBU1NfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNw==::MA==::UElOU19EQl9PRV9CWVBBU1NfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfOA==::MA==::UElOU19EQl9PRV9CWVBBU1NfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfOQ==::MA==::UElOU19EQl9PRV9CWVBBU1NfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTA=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTE=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTI=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfQVVUT0dFTl9XQ05U::MTM=::UElOU19EQl9PRV9CWVBBU1NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMA==::NTM3MDAyMDE2::UElOU19JTlZFUlRfV1JfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMQ==::MjA0OA==::UElOU19JTlZFUlRfV1JfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMg==::MA==::UElOU19JTlZFUlRfV1JfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMw==::ODM5MDY1Ng==::UElOU19JTlZFUlRfV1JfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNA==::NTM3MDAyMDE2::UElOU19JTlZFUlRfV1JfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNQ==::MA==::UElOU19JTlZFUlRfV1JfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNg==::MA==::UElOU19JTlZFUlRfV1JfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNw==::MA==::UElOU19JTlZFUlRfV1JfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfOA==::MA==::UElOU19JTlZFUlRfV1JfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfOQ==::MA==::UElOU19JTlZFUlRfV1JfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTA=::MA==::UElOU19JTlZFUlRfV1JfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTE=::MA==::UElOU19JTlZFUlRfV1JfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTI=::MA==::UElOU19JTlZFUlRfV1JfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfQVVUT0dFTl9XQ05U::MTM=::UElOU19JTlZFUlRfV1JfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMA==::MTA1Njk2MDUxMA==::UElOU19JTlZFUlRfT0VfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMQ==::NzYzMzYzMjYz::UElOU19JTlZFUlRfT0VfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMg==::OTU1MjI0MDYz::UElOU19JTlZFUlRfT0VfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMw==::MTA3MzQ3OTYwMA==::UElOU19JTlZFUlRfT0VfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNA==::MTA1Njk2MDUxMA==::UElOU19JTlZFUlRfT0VfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNQ==::NjM=::UElOU19JTlZFUlRfT0VfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNg==::MA==::UElOU19JTlZFUlRfT0VfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNw==::MA==::UElOU19JTlZFUlRfT0VfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfOA==::MA==::UElOU19JTlZFUlRfT0VfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfOQ==::MA==::UElOU19JTlZFUlRfT0VfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTA=::MA==::UElOU19JTlZFUlRfT0VfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTE=::MA==::UElOU19JTlZFUlRfT0VfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTI=::MA==::UElOU19JTlZFUlRfT0VfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfQVVUT0dFTl9XQ05U::MTM=::UElOU19JTlZFUlRfT0VfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMQ==::MjAxMzI2NTky::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMg==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMw==::NDg=::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNQ==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNg==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNw==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOQ==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTA=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTE=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTI=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfQVVUT0dFTl9XQ05U::MTM=::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8w::MTA1Njk2MDUxMA==::UElOU19PQ1RfTU9ERV8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8x::MjYyMDc5::UElOU19PQ1RfTU9ERV8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8y::MA==::UElOU19PQ1RfTU9ERV8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8z::MTA3MzQ3OTU1Mg==::UElOU19PQ1RfTU9ERV8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV80::MTA1Njk2MDUxMA==::UElOU19PQ1RfTU9ERV80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV81::NjM=::UElOU19PQ1RfTU9ERV81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV82::MA==::UElOU19PQ1RfTU9ERV82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV83::MA==::UElOU19PQ1RfTU9ERV83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV84::MA==::UElOU19PQ1RfTU9ERV84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV85::MA==::UElOU19PQ1RfTU9ERV85"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMA==::MA==::UElOU19PQ1RfTU9ERV8xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMQ==::MA==::UElOU19PQ1RfTU9ERV8xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMg==::MA==::UElOU19PQ1RfTU9ERV8xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV9BVVRPR0VOX1dDTlQ=::MTM=::UElOU19PQ1RfTU9ERV9BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMA==::MQ==::UElOU19HUElPX01PREVfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMQ==::MA==::UElOU19HUElPX01PREVfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMg==::MA==::UElOU19HUElPX01PREVfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMw==::MA==::UElOU19HUElPX01PREVfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNA==::MA==::UElOU19HUElPX01PREVfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNQ==::MA==::UElOU19HUElPX01PREVfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNg==::MA==::UElOU19HUElPX01PREVfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNw==::MA==::UElOU19HUElPX01PREVfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfOA==::MA==::UElOU19HUElPX01PREVfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfOQ==::MA==::UElOU19HUElPX01PREVfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTA=::MA==::UElOU19HUElPX01PREVfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTE=::MA==::UElOU19HUElPX01PREVfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTI=::MA==::UElOU19HUElPX01PREVfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfQVVUT0dFTl9XQ05U::MTM=::UElOU19HUElPX01PREVfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18w::MTk5NDI1MDgy::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18x::MTk2Mjc2NDEz::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18y::MTkzMTI3NjEw::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18z::MTg5OTc4ODA3::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180::MTg2ODMwMDA0::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181::MTgzNjgxMjAx::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182::MTgwNTMyMzk4::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183::MTc3MzgzNTk1::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184::MTc0MjM0Nzky::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185::MTcxMDg1OTg5::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMA==::MTY3OTM3MTg2::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMQ==::MTY0Nzg4Mzgz::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMg==::MTM4NTU5NjQ0::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMw==::MTAwNzc0MDA4::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNA==::OTU1MTQ3MTc=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNQ==::ODkyMTcxMTQ=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNg==::Nzc2NzY2Mjg=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNw==::NjA4OTEyMDk=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOA==::Mzc4MDMwNjM=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOQ==::MTIzMTI=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDk=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTk=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MTI5::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzA=::MTQ2OTU0MzE=::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzE=::NjI5ODYzNw==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzI=::NDEwMQ==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzM=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzQ=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzU=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzY=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzc=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzg=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzk=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzEw::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DX0FVVE9HRU5fV0NOVA==::MTE=::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMA==::NTQyMTE5OTQw::Q0VOVEVSX1RJRFNfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMQ==::Mw==::Q0VOVEVSX1RJRFNfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMg==::MA==::Q0VOVEVSX1RJRFNfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfQVVUT0dFTl9XQ05U::Mw==::Q0VOVEVSX1RJRFNfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMA==::Njc2NjAwMzI1::SE1DX1RJRFNfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMQ==::Mw==::SE1DX1RJRFNfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMg==::MA==::SE1DX1RJRFNfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfQVVUT0dFTl9XQ05U::Mw==::SE1DX1RJRFNfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzA=::NDAzMTc3OTg0::TEFORV9USURTXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzE=::MTY4MDY3NTg0::TEFORV9USURTXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzI=::MzU3MTcyMDg=::TEFORV9USURTXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzM=::MTQwNTE4OTMw::TEFORV9USURTXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzQ=::ODg2NDAz::TEFORV9USURTXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzU=::MA==::TEFORV9USURTXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzY=::MA==::TEFORV9USURTXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzc=::MA==::TEFORV9USURTXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzg=::MA==::TEFORV9USURTXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzk=::MA==::TEFORV9USURTXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORV9USURTX0FVVE9HRU5fV0NOVA==::MTA=::TEFORV9USURTX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJFQU1CTEVfTU9ERQ==::cHJlYW1ibGVfb25lX2N5Y2xl::UFJFQU1CTEVfTU9ERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "REJJX1dSX0VOQUJMRQ==::ZmFsc2U=::REJJX1dSX0VOQUJMRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "REJJX1JEX0VOQUJMRQ==::ZmFsc2U=::REJJX1JEX0VOQUJMRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "Q1JDX0VO::Y3JjX2Rpc2FibGU=::Q1JDX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U1dBUF9EUVNfQV9C::ZmFsc2U=::U1dBUF9EUVNfQV9C"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RFFTX1BBQ0tfTU9ERQ==::cGFja2Vk::RFFTX1BBQ0tfTU9ERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "T0NUX1NJWkU=::Mw==::T0NUX1NJWkU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "REJDX1dCX1JFU0VSVkVEX0VOVFJZ::OA==::REJDX1dCX1JFU0VSVkVEX0VOVFJZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RExMX01PREU=::Y3RsX2R5bmFtaWM=::RExMX01PREU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "RExMX0NPREVXT1JE::MA==::RExMX0NPREVXT1JE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "QUJQSFlfV1JJVEVfUFJPVE9DT0w=::MA==::QUJQSFlfV1JJVEVfUFJPVE9DT0w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJNT0RFX09DVA==::ZmFsc2U=::UEhZX1VTRVJNT0RFX09DVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX1BFUklPRElDX09DVF9SRUNBTA==::ZmFsc2U=::UEhZX1BFUklPRElDX09DVF9SRUNBTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UEhZX0hBU19EQ0M=::dHJ1ZQ==::UEhZX0hBU19EQ0M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRU5BQkxFX0VDQw==::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfRU5BQkxFX0VDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9EQVRB::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9EQVRB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9SRUFE::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9SRUFE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ==::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1RBUlZFX0xJTUlU::NjM=::UFJJX0hNQ19DRkdfU1RBUlZFX0xJTUlU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJCSVRFUl9UWVBF::dHdvdA==::UFJJX0hNQ19DRkdfQVJCSVRFUl9UWVBF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfT1BFTl9QQUdFX0VO::ZW5hYmxl::UFJJX0hNQ19DRkdfT1BFTl9QQUdFX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfR0VBUl9ET1dOX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfR0VBUl9ET1dOX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ==::c2luZ2xlYmFuaw==::UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUElOR19QT05HX01PREU=::cGluZ3Bvbmdfb2Zm::UFJJX0hNQ19DRkdfUElOR19QT05HX01PREU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4=::MA==::UFJJX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0xPVF9PRkZTRVQ=::Mg==::UFJJX0hNQ19DRkdfU0xPVF9PRkZTRVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQ09MX0NNRF9TTE9U::Mg==::UFJJX0hNQ19DRkdfQ09MX0NNRF9TTE9U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUk9XX0NNRF9TTE9U::MQ==::UFJJX0hNQ19DRkdfUk9XX0NNRF9TTE9U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRU5BQkxFX1JD::ZW5hYmxl::UFJJX0hNQ19DRkdfRU5BQkxFX1JD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H::MzM4MjU=::UFJJX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk=::OA==::UFJJX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk=::OA==::UFJJX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfVENM::MTg=::UFJJX0hNQ19DRkdfVENM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD::Mw==::UFJJX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw==::MTU=::UFJJX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UFJJX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UFJJX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfT0RUX09O::MA==::UFJJX0hNQ19DRkdfV1JfT0RUX09O"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfT0RUX09O::MA==::UFJJX0hNQ19DRkdfUkRfT0RUX09O"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfT0RUX1BFUklPRA==::Ng==::UFJJX0hNQ19DRkdfV1JfT0RUX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfT0RUX1BFUklPRA==::Ng==::UFJJX0hNQ19DRkdfUkRfT0RUX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA=::MTU=::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE=::MjQw::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI=::Mzg0MA==::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM=::NjE0NDA=::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA==::NTEy::UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q=::Mjc=::UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE::Mw==::UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA==::NA==::UFJJX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ==::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfVVNFUl9SRlNIX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfVVNFUl9SRlNIX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s=::cHJlc3JmZXhpdA==::UFJJX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjM=::MTk3MTIw::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjQ=::MjYyMTQ0::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjU=::MTA1Ng==::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I=::MA==::UFJJX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg=::Y29sX3dpZHRoXzEw::UFJJX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg=::cm93X3dpZHRoXzE1::UFJJX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI::YmFua193aWR0aF8y::UFJJX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA==::Ymdfd2lkdGhfMg==::UFJJX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg=::Y3Nfd2lkdGhfMQ==::UFJJX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUREUl9PUkRFUg==::Y2hpcF9yb3dfYmFua19jb2w=::UFJJX0hNQ19DRkdfQUREUl9PUkRFUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX1JEV1I=::OA==::UFJJX0hNQ19DRkdfQUNUX1RPX1JEV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX1BDSA==::MjA=::UFJJX0hNQ19DRkdfQUNUX1RPX1BDSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVA==::Mjk=::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks=::Mw==::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH::Mg==::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkQ=::Mw==::UFJJX0hNQ19DRkdfUkRfVE9fUkQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ::Mw==::UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw==::Mg==::UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1I=::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw==::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUENI::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fUENI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ=::MTQ=::UFJJX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1I=::Mw==::UFJJX0hNQ19DRkdfV1JfVE9fV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ::Mw==::UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw==::Mg==::UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkQ=::MTY=::UFJJX0hNQ19DRkdfV1JfVE9fUkQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ::Ng==::UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw==::MTY=::UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUENI::MjE=::UFJJX0hNQ19DRkdfV1JfVE9fUENI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ=::Mjk=::UFJJX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUENIX1RPX1ZBTElE::OQ==::UFJJX0hNQ19DRkdfUENIX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA==::OQ==::UFJJX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJGX1RPX1ZBTElE::OTc=::UFJJX0hNQ19DRkdfQVJGX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEROX1RPX1ZBTElE::NQ==::UFJJX0hNQ19DRkdfUEROX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1RPX1ZBTElE::NTEz::UFJJX0hNQ19DRkdfU1JGX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA==::NDQ5::UFJJX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJGX1BFUklPRA==::NDY4MQ==::UFJJX0hNQ19DRkdfQVJGX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEROX1BFUklPRA==::MA==::UFJJX0hNQ19DRkdfUEROX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfWlFDTF9UT19WQUxJRA==::MjU3::UFJJX0hNQ19DRkdfWlFDTF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfWlFDU19UT19WQUxJRA==::NjU=::UFJJX0hNQ19DRkdfWlFDU19UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVJTX1RPX1ZBTElE::Nw==::UFJJX0hNQ19DRkdfTVJTX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX1RPX1ZBTElE::NzY4::UFJJX0hNQ19DRkdfTVBTX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVJSX1RPX1ZBTElE::MA==::UFJJX0hNQ19DRkdfTVJSX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBSX1RPX1ZBTElE::MTY=::UFJJX0hNQ19DRkdfTVBSX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF::NQ==::UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT::Ng==::UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ::MA==::UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA==::MTY=::UFJJX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfNF9BQ1RfVE9fQUNU::MTQ=::UFJJX0hNQ19DRkdfNF9BQ1RfVE9fQUNU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA==::MA==::UFJJX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRU5BQkxFX0VDQw==::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfRU5BQkxFX0VDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9EQVRB::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9EQVRB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9SRUFE::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9SRUFE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ==::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1RBUlZFX0xJTUlU::NjM=::U0VDX0hNQ19DRkdfU1RBUlZFX0xJTUlU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJCSVRFUl9UWVBF::dHdvdA==::U0VDX0hNQ19DRkdfQVJCSVRFUl9UWVBF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfT1BFTl9QQUdFX0VO::ZW5hYmxl::U0VDX0hNQ19DRkdfT1BFTl9QQUdFX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfR0VBUl9ET1dOX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfR0VBUl9ET1dOX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ==::c2luZ2xlYmFuaw==::U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUElOR19QT05HX01PREU=::cGluZ3Bvbmdfb2Zm::U0VDX0hNQ19DRkdfUElOR19QT05HX01PREU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4=::MA==::U0VDX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0xPVF9PRkZTRVQ=::Mg==::U0VDX0hNQ19DRkdfU0xPVF9PRkZTRVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQ09MX0NNRF9TTE9U::Mg==::U0VDX0hNQ19DRkdfQ09MX0NNRF9TTE9U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUk9XX0NNRF9TTE9U::MQ==::U0VDX0hNQ19DRkdfUk9XX0NNRF9TTE9U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRU5BQkxFX1JD::ZW5hYmxl::U0VDX0hNQ19DRkdfRU5BQkxFX1JD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H::MzM4MjU=::U0VDX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk=::OA==::U0VDX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk=::OA==::U0VDX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfVENM::MTg=::U0VDX0hNQ19DRkdfVENM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD::Mw==::U0VDX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw==::MTU=::U0VDX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::U0VDX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::U0VDX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfT0RUX09O::MA==::U0VDX0hNQ19DRkdfV1JfT0RUX09O"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfT0RUX09O::MA==::U0VDX0hNQ19DRkdfUkRfT0RUX09O"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfT0RUX1BFUklPRA==::Ng==::U0VDX0hNQ19DRkdfV1JfT0RUX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfT0RUX1BFUklPRA==::Ng==::U0VDX0hNQ19DRkdfUkRfT0RUX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA=::MTU=::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE=::MjQw::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI=::Mzg0MA==::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM=::NjE0NDA=::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA==::NTEy::U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q=::Mjc=::U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE::Mw==::U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA==::NA==::U0VDX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ==::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfVVNFUl9SRlNIX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfVVNFUl9SRlNIX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s=::cHJlc3JmZXhpdA==::U0VDX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjM=::MTk3MTIw::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjQ=::MjYyMTQ0::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjU=::MTA1Ng==::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I=::MA==::U0VDX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg=::Y29sX3dpZHRoXzEw::U0VDX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg=::cm93X3dpZHRoXzE1::U0VDX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI::YmFua193aWR0aF8y::U0VDX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA==::Ymdfd2lkdGhfMg==::U0VDX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg=::Y3Nfd2lkdGhfMQ==::U0VDX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUREUl9PUkRFUg==::Y2hpcF9yb3dfYmFua19jb2w=::U0VDX0hNQ19DRkdfQUREUl9PUkRFUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX1JEV1I=::OA==::U0VDX0hNQ19DRkdfQUNUX1RPX1JEV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX1BDSA==::MjA=::U0VDX0hNQ19DRkdfQUNUX1RPX1BDSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVA==::Mjk=::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks=::Mw==::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH::Mg==::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkQ=::Mw==::U0VDX0hNQ19DRkdfUkRfVE9fUkQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ::Mw==::U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw==::Mg==::U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1I=::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw==::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUENI::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fUENI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ=::MTQ=::U0VDX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1I=::Mw==::U0VDX0hNQ19DRkdfV1JfVE9fV1I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ::Mw==::U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw==::Mg==::U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkQ=::MTY=::U0VDX0hNQ19DRkdfV1JfVE9fUkQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ::Ng==::U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw==::MTY=::U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUENI::MjE=::U0VDX0hNQ19DRkdfV1JfVE9fUENI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ=::Mjk=::U0VDX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUENIX1RPX1ZBTElE::OQ==::U0VDX0hNQ19DRkdfUENIX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA==::OQ==::U0VDX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJGX1RPX1ZBTElE::OTc=::U0VDX0hNQ19DRkdfQVJGX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEROX1RPX1ZBTElE::NQ==::U0VDX0hNQ19DRkdfUEROX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1RPX1ZBTElE::NTEz::U0VDX0hNQ19DRkdfU1JGX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA==::NDQ5::U0VDX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJGX1BFUklPRA==::NDY4MQ==::U0VDX0hNQ19DRkdfQVJGX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEROX1BFUklPRA==::MA==::U0VDX0hNQ19DRkdfUEROX1BFUklPRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfWlFDTF9UT19WQUxJRA==::MjU3::U0VDX0hNQ19DRkdfWlFDTF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfWlFDU19UT19WQUxJRA==::NjU=::U0VDX0hNQ19DRkdfWlFDU19UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVJTX1RPX1ZBTElE::Nw==::U0VDX0hNQ19DRkdfTVJTX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX1RPX1ZBTElE::NzY4::U0VDX0hNQ19DRkdfTVBTX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVJSX1RPX1ZBTElE::MA==::U0VDX0hNQ19DRkdfTVJSX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBSX1RPX1ZBTElE::MTY=::U0VDX0hNQ19DRkdfTVBSX1RPX1ZBTElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF::NQ==::U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT::Ng==::U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ::MA==::U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA==::MTY=::U0VDX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfNF9BQ1RfVE9fQUNU::MTQ=::U0VDX0hNQ19DRkdfNF9BQ1RfVE9fQUNU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA==::MA==::U0VDX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UElOU19QRVJfTEFORQ==::MTI=::UElOU19QRVJfTEFORQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "TEFORVNfUEVSX1RJTEU=::NA==::TEFORVNfUEVSX1RJTEU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "T0NUX0NPTlRST0xfV0lEVEg=::MTY=::T0NUX0NPTlRST0xfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfV0lEVEg=::Mg==::UE9SVF9NRU1fQ0tfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzA=::OTg2MjM0OTA=::UE9SVF9NRU1fQ0tfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQ0tfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9XSURUSA==::Mg==::UE9SVF9NRU1fQ0tfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMA==::OTk2NzMwOTA=::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfV0lEVEg=::MQ==::UE9SVF9NRU1fREtfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9XSURUSA==::MQ==::UE9SVF9NRU1fREtfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fREtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1dJRFRI::MQ==::UE9SVF9NRU1fREtBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ180::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ181::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fREtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fREtBX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1dJRFRI::MQ==::UE9SVF9NRU1fREtCX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ180::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ181::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fREtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fREtCX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19XSURUSA==::MQ==::UE9SVF9NRU1fS19XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMA==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMg==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMw==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfNA==::MA==::UE9SVF9NRU1fS19QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fS19QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fS19QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1dJRFRI::MQ==::UE9SVF9NRU1fS19OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18x::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18y::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18z::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ180::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ181::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fS19OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9XSURUSA==::MTc=::UE9SVF9NRU1fQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMA==::NjQwMjQ1OTM=::UE9SVF9NRU1fQV9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMQ==::NjcxNzM0Mzg=::UE9SVF9NRU1fQV9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMg==::NzAzMjIyNDE=::UE9SVF9NRU1fQV9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMw==::NzM0NzEwNDQ=::UE9SVF9NRU1fQV9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNA==::Nzk3Njg2NDc=::UE9SVF9NRU1fQV9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNQ==::ODI5MTc0NTM=::UE9SVF9NRU1fQV9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfQVVUT0dFTl9XQ05U::MTc=::UE9SVF9NRU1fQV9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfV0lEVEg=::Mg==::UE9SVF9NRU1fQkFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzA=::ODYwNjYxNzg=::UE9SVF9NRU1fQkFfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQkFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfV0lEVEg=::Mg==::UE9SVF9NRU1fQkdfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzA=::NTA0MTY2NDI=::UE9SVF9NRU1fQkdfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQkdfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19XSURUSA==::MQ==::UE9SVF9NRU1fQ19XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ19QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1dJRFRI::Mg==::UE9SVF9NRU1fQ0tFX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18w::OTMzNzg1NjI=::UE9SVF9NRU1fQ0tFX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18x::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18y::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18z::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ180::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ181::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fQ0tFX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9XSURUSA==::Mg==::UE9SVF9NRU1fQ1NfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMA==::OTEyNzczMTQ=::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fV0lEVEg=::MQ==::UE9SVF9NRU1fUk1fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUk1fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1dJRFRI::Mg==::UE9SVF9NRU1fT0RUX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18w::OTIzMjc5Mzg=::UE9SVF9NRU1fT0RUX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18x::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18y::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18z::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ180::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ181::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fT0RUX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUkFTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUkFTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUkFTX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fUkFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQ0FTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0FTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0FTX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQ0FTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9XSURUSA==::MQ==::UE9SVF9NRU1fV0VfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUkVTRVRfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMA==::NTAxNzc=::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQUNUX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DXzA=::NTIyMjU=::UE9SVF9NRU1fQUNUX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQUNUX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQUNUX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1dJRFRI::MQ==::UE9SVF9NRU1fUEFSX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ18w::NjA0MTc=::UE9SVF9NRU1fUEFSX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUEFSX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Mg==::UE9SVF9NRU1fUEFSX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfV0lEVEg=::MQ==::UE9SVF9NRU1fQ0FfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzY=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzc=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzg=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzk=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEw::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEx::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEy::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEz::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE0::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE1::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE1"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE2::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DX0FVVE9HRU5fV0NOVA==::MTc=::UE9SVF9NRU1fQ0FfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUkVGX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUkVGX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUkVGX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fV1BTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fV1BTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fV1BTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUlBTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUlBTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUlBTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1dJRFRI::MQ==::UE9SVF9NRU1fRE9GRl9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fTERBX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fTERBX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fTERBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fTERCX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fTERCX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fTERCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUldBX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUldBX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUldBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUldCX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUldCX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUldCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1dJRFRI::MQ==::UE9SVF9NRU1fTEJLMF9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1dJRFRI::MQ==::UE9SVF9NRU1fTEJLMV9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQ0ZHX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0ZHX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fQ0ZHX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfV0lEVEg=::MQ==::UE9SVF9NRU1fQVBfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQVBfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fQVBfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9XSURUSA==::MQ==::UE9SVF9NRU1fQUlOVl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQUlOVl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9QSU5MT0NfQVVUT0dFTl9XQ05U::MQ==::UE9SVF9NRU1fQUlOVl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fV0lEVEg=::MQ==::UE9SVF9NRU1fRE1fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzA=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzE=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzI=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzM=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzU=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzY=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzc=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzg=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzk=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEw::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEx::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEy::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DX0FVVE9HRU5fV0NOVA==::MTM=::UE9SVF9NRU1fRE1fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQldTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fQldTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9XSURUSA==::MQ==::UE9SVF9NRU1fRF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfQVVUT0dFTl9XQ05U::NDk=::UE9SVF9NRU1fRF9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfV0lEVEg=::NzI=::UE9SVF9NRU1fRFFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzA=::MjA5ODI0OA==::UE9SVF9NRU1fRFFfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE=::NzM0NjE3OQ==::UE9SVF9NRU1fRFFfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI=::MTA0OTQ5ODQ=::UE9SVF9NRU1fRFFfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM=::MTU3NDI5ODk=::UE9SVF9NRU1fRFFfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ=::MjA5OTA5OTQ=::UE9SVF9NRU1fRFFfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzU=::MjYyMzY5NDk=::UE9SVF9NRU1fRFFfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzY=::MzE0ODQ5NTQ=::UE9SVF9NRU1fRFFfUElOTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzc=::MzQ2MzU4MDc=::UE9SVF9NRU1fRFFfUElOTE9DXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzg=::Mzk4ODM4MTA=::UE9SVF9NRU1fRFFfUElOTE9DXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzk=::NDUxMzE4MTU=::UE9SVF9NRU1fRFFfUElOTE9DXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEw::NDgyODA2MjA=::UE9SVF9NRU1fRFFfUElOTE9DXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEx::MTAzOTA5NDcz::UE9SVF9NRU1fRFFfUElOTE9DXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEy::MTA5MTU3NDc4::UE9SVF9NRU1fRFFfUElOTE9DXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEz::MTE0NDAzNDMz::UE9SVF9NRU1fRFFfUElOTE9DXzEz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE0::MTE5NjUxNDM4::UE9SVF9NRU1fRFFfUElOTE9DXzE0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE1::MTIyODAyMjkx::UE9SVF9NRU1fRFFfUElOTE9DXzE1"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE2::MTI4MDUwMjk0::UE9SVF9NRU1fRFFfUElOTE9DXzE2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE3::MTMzMjk4Mjk5::UE9SVF9NRU1fRFFfUElOTE9DXzE3"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE4::MTM2NDQ3MTA0::UE9SVF9NRU1fRFFfUElOTE9DXzE4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE5::MTQxNjk1MTA5::UE9SVF9NRU1fRFFfUElOTE9DXzE5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIw::MTQ2OTQzMTE0::UE9SVF9NRU1fRFFfUElOTE9DXzIw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIx::MTUyMTg5MDY5::UE9SVF9NRU1fRFFfUElOTE9DXzIx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIy::MTU3NDM3MDc0::UE9SVF9NRU1fRFFfUElOTE9DXzIy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIz::MTYwNTg3OTI3::UE9SVF9NRU1fRFFfUElOTE9DXzIz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI0::MTU0::UE9SVF9NRU1fRFFfUElOTE9DXzI0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI1"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI3"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI5::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMw::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMx::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMy::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMz::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM0::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM1"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM3"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM5::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQw::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQx::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQy::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQz::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ0::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ1"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ3"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DX0FVVE9HRU5fV0NOVA==::NDk=::UE9SVF9NRU1fRFFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fV0lEVEg=::OQ==::UE9SVF9NRU1fREJJX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzA=::MjQxMjg1MjE=::UE9SVF9NRU1fREJJX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzE=::MTEyMjQ1Nzk1::UE9SVF9NRU1fREJJX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzI=::MTUwMDgwNjMx::UE9SVF9NRU1fREJJX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzM=::MTU1::UE9SVF9NRU1fREJJX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzY=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Nw==::UE9SVF9NRU1fREJJX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1dJRFRI::MQ==::UE9SVF9NRU1fRFFBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ182"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ183"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ184"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ185"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180MA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180MQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Mg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Mw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180NA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180NQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Ng==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Nw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180OA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::NDk=::UE9SVF9NRU1fRFFBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1dJRFRI::MQ==::UE9SVF9NRU1fRFFCX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ182"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ183"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ184"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ185"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180MA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180MA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180MQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Mg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Mw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180NA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180NA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180NQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Ng==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Nw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180OA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180OA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::NDk=::UE9SVF9NRU1fRFFCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfV0lEVEg=::MQ==::UE9SVF9NRU1fRElOVkFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzA=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzE=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzI=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fRElOVkFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfV0lEVEg=::MQ==::UE9SVF9NRU1fRElOVkJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzA=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzE=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzI=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fRElOVkJfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9XSURUSA==::MQ==::UE9SVF9NRU1fUV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfQVVUT0dFTl9XQ05U::NDk=::UE9SVF9NRU1fUV9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1dJRFRI::OQ==::UE9SVF9NRU1fRFFTX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18w::MTY3ODEzMjE=::UE9SVF9NRU1fRFFTX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18x::MTA0ODk4NTg4::UE9SVF9NRU1fRFFTX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18y::MTQyNzMzNDI0::UE9SVF9NRU1fRFFTX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18z::MTQ4::UE9SVF9NRU1fRFFTX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ182"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ183"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ184"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ185"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MTM=::UE9SVF9NRU1fRFFTX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fV0lEVEg=::OQ==::UE9SVF9NRU1fRFFTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzA=::MTc4MzA5MjE=::UE9SVF9NRU1fRFFTX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzE=::MTA1OTQ4MTg5::UE9SVF9NRU1fRFFTX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzI=::MTQzNzgzMDI1::UE9SVF9NRU1fRFFTX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzM=::MTQ5::UE9SVF9NRU1fRFFTX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzY=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzc=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzg=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzk=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEw::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEx::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEy::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MTM=::UE9SVF9NRU1fRFFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfV0lEVEg=::MQ==::UE9SVF9NRU1fUUtfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUUtfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1dJRFRI::MQ==::UE9SVF9NRU1fUUtBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ180::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ181::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fUUtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUUtBX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1dJRFRI::MQ==::UE9SVF9NRU1fUUtCX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ180::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ181::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fUUtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUUtCX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfV0lEVEg=::MQ==::UE9SVF9NRU1fQ1FfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ1FfUElOTE9DXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ1FfUElOTE9DXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQ1FfUElOTE9DX0FVVE9HRU5fV0NOVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9XSURUSA==::MQ==::UE9SVF9NRU1fQ1FfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9XSURUSA==::MQ==::UE9SVF9NRU1fQUxFUlRfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMA==::MQ==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUEVfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DTEtTX1NIQVJJTkdfTUFTVEVSX09VVF9XSURUSA==::MzI=::UE9SVF9DTEtTX1NIQVJJTkdfTUFTVEVSX09VVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfSU5fV0lEVEg=::MzI=::UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfSU5fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkxBVF9XSURUSA==::Ng==::UE9SVF9BRklfUkxBVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0xBVF9XSURUSA==::Ng==::UE9SVF9BRklfV0xBVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfU0VRX0JVU1lfV0lEVEg=::NA==::UE9SVF9BRklfU0VRX0JVU1lfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUREUl9XSURUSA==::MQ==::UE9SVF9BRklfQUREUl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQkFfV0lEVEg=::MQ==::UE9SVF9BRklfQkFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQkdfV0lEVEg=::MQ==::UE9SVF9BRklfQkdfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ19XSURUSA==::MQ==::UE9SVF9BRklfQ19XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0tFX1dJRFRI::MQ==::UE9SVF9BRklfQ0tFX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ1NfTl9XSURUSA==::MQ==::UE9SVF9BRklfQ1NfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUk1fV0lEVEg=::MQ==::UE9SVF9BRklfUk1fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfT0RUX1dJRFRI::MQ==::UE9SVF9BRklfT0RUX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkFTX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkFTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0FTX05fV0lEVEg=::MQ==::UE9SVF9BRklfQ0FTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0VfTl9XSURUSA==::MQ==::UE9SVF9BRklfV0VfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlNUX05fV0lEVEg=::MQ==::UE9SVF9BRklfUlNUX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUNUX05fV0lEVEg=::MQ==::UE9SVF9BRklfQUNUX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUEFSX1dJRFRI::MQ==::UE9SVF9BRklfUEFSX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0FfV0lEVEg=::MQ==::UE9SVF9BRklfQ0FfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkVGX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkVGX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV1BTX05fV0lEVEg=::MQ==::UE9SVF9BRklfV1BTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlBTX05fV0lEVEg=::MQ==::UE9SVF9BRklfUlBTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE9GRl9OX1dJRFRI::MQ==::UE9SVF9BRklfRE9GRl9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTERfTl9XSURUSA==::MQ==::UE9SVF9BRklfTERfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUldfTl9XSURUSA==::MQ==::UE9SVF9BRklfUldfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTEJLMF9OX1dJRFRI::MQ==::UE9SVF9BRklfTEJLMF9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTEJLMV9OX1dJRFRI::MQ==::UE9SVF9BRklfTEJLMV9OX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0ZHX05fV0lEVEg=::MQ==::UE9SVF9BRklfQ0ZHX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQVBfV0lEVEg=::MQ==::UE9SVF9BRklfQVBfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUlOVl9XSURUSA==::MQ==::UE9SVF9BRklfQUlOVl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE1fV0lEVEg=::MQ==::UE9SVF9BRklfRE1fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE1fTl9XSURUSA==::MQ==::UE9SVF9BRklfRE1fTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQldTX05fV0lEVEg=::MQ==::UE9SVF9BRklfQldTX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfREJJX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfREJJX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfREJJX05fV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfREJJX05fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfRElOVl9XSURUSA==::MQ==::UE9SVF9BRklfUkRBVEFfRElOVl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfRElOVl9XSURUSA==::MQ==::UE9SVF9BRklfV0RBVEFfRElOVl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRFFTX0JVUlNUX1dJRFRI::MQ==::UE9SVF9BRklfRFFTX0JVUlNUX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfVkFMSURfV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfVkFMSURfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfRU5fRlVMTF9XSURUSA==::MQ==::UE9SVF9BRklfUkRBVEFfRU5fRlVMTF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfVkFMSURfV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfVkFMSURfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlJBTktfV0lEVEg=::MQ==::UE9SVF9BRklfUlJBTktfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV1JBTktfV0lEVEg=::MQ==::UE9SVF9BRklfV1JBTktfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUxFUlRfTl9XSURUSA==::MQ==::UE9SVF9BRklfQUxFUlRfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUEVfTl9XSURUSA==::MQ==::UE9SVF9BRklfUEVfTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9DTURfREFUQV9XSURUSA==::MQ==::UE9SVF9DVFJMX0FTVF9DTURfREFUQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9XUl9EQVRBX1dJRFRI::MQ==::UE9SVF9DVFJMX0FTVF9XUl9EQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9SRF9EQVRBX1dJRFRI::MQ==::UE9SVF9DVFJMX0FTVF9SRF9EQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9BRERSRVNTX1dJRFRI::Mjc=::UE9SVF9DVFJMX0FNTV9BRERSRVNTX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9SREFUQV9XSURUSA==::NTc2::UE9SVF9DVFJMX0FNTV9SREFUQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9XREFUQV9XSURUSA==::NTc2::UE9SVF9DVFJMX0FNTV9XREFUQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9CQ09VTlRfV0lEVEg=::Nw==::UE9SVF9DVFJMX0FNTV9CQ09VTlRfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9CWVRFRU5fV0lEVEg=::NzI=::UE9SVF9DVFJMX0FNTV9CWVRFRU5fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9SRVFfV0lEVEg=::NA==::UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9SRVFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9CQU5LX1dJRFRI::MTY=::UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9CQU5LX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1NFTEZfUkVGUkVTSF9SRVFfV0lEVEg=::NA==::UE9SVF9DVFJMX1NFTEZfUkVGUkVTSF9SRVFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19XUklURV9JTkZPX1dJRFRI::MTU=::UE9SVF9DVFJMX0VDQ19XUklURV9JTkZPX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19SREFUQV9JRF9XSURUSA==::MTM=::UE9SVF9DVFJMX0VDQ19SREFUQV9JRF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19SRUFEX0lORk9fV0lEVEg=::Mw==::UE9SVF9DVFJMX0VDQ19SRUFEX0lORk9fV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19DTURfSU5GT19XSURUSA==::Mw==::UE9SVF9DVFJMX0VDQ19DTURfSU5GT19XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19XQl9QT0lOVEVSX1dJRFRI::MTI=::UE9SVF9DVFJMX0VDQ19XQl9QT0lOVEVSX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9BRERSRVNTX1dJRFRI::MTA=::UE9SVF9DVFJMX01NUl9TTEFWRV9BRERSRVNTX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9SREFUQV9XSURUSA==::MzI=::UE9SVF9DVFJMX01NUl9TTEFWRV9SREFUQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9XREFUQV9XSURUSA==::MzI=::UE9SVF9DVFJMX01NUl9TTEFWRV9XREFUQV9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9CQ09VTlRfV0lEVEg=::Mg==::UE9SVF9DVFJMX01NUl9TTEFWRV9CQ09VTlRfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9IMkVfV0lEVEg=::NDA5Ng==::UE9SVF9IUFNfRU1JRl9IMkVfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9FMkhfV0lEVEg=::NDA5Ng==::UE9SVF9IUFNfRU1JRl9FMkhfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9IMkVfR1BfV0lEVEg=::Mg==::UE9SVF9IUFNfRU1JRl9IMkVfR1BfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9FMkhfR1BfV0lEVEg=::MQ==::UE9SVF9IUFNfRU1JRl9FMkhfR1BfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfQUREUkVTU19XSURUSA==::MjQ=::UE9SVF9DQUxfREVCVUdfQUREUkVTU19XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfUkRBVEFfV0lEVEg=::MzI=::UE9SVF9DQUxfREVCVUdfUkRBVEFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfV0RBVEFfV0lEVEg=::MzI=::UE9SVF9DQUxfREVCVUdfV0RBVEFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfQllURUVOX1dJRFRI::NA==::UE9SVF9DQUxfREVCVUdfQllURUVOX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX0FERFJFU1NfV0lEVEg=::MjQ=::UE9SVF9DQUxfREVCVUdfT1VUX0FERFJFU1NfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX1JEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfREVCVUdfT1VUX1JEQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX1dEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfREVCVUdfT1VUX1dEQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX0JZVEVFTl9XSURUSA==::NA==::UE9SVF9DQUxfREVCVUdfT1VUX0JZVEVFTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX0FERFJFU1NfV0lEVEg=::MTY=::UE9SVF9DQUxfTUFTVEVSX0FERFJFU1NfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX1JEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfTUFTVEVSX1JEQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX1dEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfTUFTVEVSX1dEQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX0JZVEVFTl9XSURUSA==::NA==::UE9SVF9DQUxfTUFTVEVSX0JZVEVFTl9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfSU9BVVhfUElPX0lOX1dJRFRI::OA==::UE9SVF9ERlRfTkZfSU9BVVhfUElPX0lOX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfSU9BVVhfUElPX09VVF9XSURUSA==::OA==::UE9SVF9ERlRfTkZfSU9BVVhfUElPX09VVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVHX0FERFJfV0lEVEg=::OQ==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVHX0FERFJfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fV1JJVEVEQVRBX1dJRFRI::OA==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fV1JJVEVEQVRBX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVBRERBVEFfV0lEVEg=::OA==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVBRERBVEFfV0lEVEg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUExMX0NOVFNFTF9XSURUSA==::NA==::UE9SVF9ERlRfTkZfUExMX0NOVFNFTF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUExMX05VTV9TSElGVF9XSURUSA==::Mw==::UE9SVF9ERlRfTkZfUExMX05VTV9TSElGVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfQ09SRV9DTEtfQlVGX09VVF9XSURUSA==::Mg==::UE9SVF9ERlRfTkZfQ09SRV9DTEtfQlVGX09VVF9XSURUSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfQ09SRV9DTEtfTE9DS0VEX1dJRFRI::Mg==::UE9SVF9ERlRfTkZfQ09SRV9DTEtfTE9DS0VEX1dJRFRI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19GUkVRX01IWl9JTlQ=::MTIwMA==::UExMX1ZDT19GUkVRX01IWl9JTlQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19UT19NRU1fQ0xLX0ZSRVFfUkFUSU8=::MQ==::UExMX1ZDT19UT19NRU1fQ0xLX0ZSRVFfUkFUSU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1BIWV9DTEtfVkNPX1BIQVNF::MQ==::UExMX1BIWV9DTEtfVkNPX1BIQVNF"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19GUkVRX1BTX1NUUg==::ODM0IHBz::UExMX1ZDT19GUkVRX1BTX1NUUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1JFRl9DTEtfRlJFUV9QU19TVFI=::NDAwMzIgcHM=::UExMX1JFRl9DTEtfRlJFUV9QU19TVFI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1JFRl9DTEtfRlJFUV9QUw==::NDAwMzI=::UExMX1JFRl9DTEtfRlJFUV9QUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9WQ09fRlJFUV9QUw==::ODQw::UExMX1NJTV9WQ09fRlJFUV9QUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfMF9GUkVRX1BT::MTY4MA==::UExMX1NJTV9QSFlDTEtfMF9GUkVRX1BT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfMV9GUkVRX1BT::MzM2MA==::UExMX1NJTV9QSFlDTEtfMV9GUkVRX1BT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfRkJfRlJFUV9QUw==::MzM2MA==::UExMX1NJTV9QSFlDTEtfRkJfRlJFUV9QUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlfQ0xLX1ZDT19QSEFTRV9QUw==::MTA1::UExMX1NJTV9QSFlfQ0xLX1ZDT19QSEFTRV9QUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9DQUxfU0xBVkVfQ0xLX0ZSRVFfUFM=::NjcyMA==::UExMX1NJTV9DQUxfU0xBVkVfQ0xLX0ZSRVFfUFM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9DQUxfTUFTVEVSX0NMS19GUkVRX1BT::NjcyMA==::UExMX1NJTV9DQUxfTUFTVEVSX0NMS19GUkVRX1BT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0hJR0g=::MjQ=::UExMX01fQ05UX0hJR0g="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0xPVw==::MjQ=::UExMX01fQ05UX0xPVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0hJR0g=::MjU2::UExMX05fQ05UX0hJR0g="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0xPVw==::MjU2::UExMX05fQ05UX0xPVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0JZUEFTU19FTg==::ZmFsc2U=::UExMX01fQ05UX0JZUEFTU19FTg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0JZUEFTU19FTg==::dHJ1ZQ==::UExMX05fQ05UX0JZUEFTU19FTg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0VWRU5fRFVUWV9FTg==::ZmFsc2U=::UExMX01fQ05UX0VWRU5fRFVUWV9FTg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0VWRU5fRFVUWV9FTg==::ZmFsc2U=::UExMX05fQ05UX0VWRU5fRFVUWV9FTg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0ZCQ0xLX01VWF8x::cGxsX2ZiY2xrX211eF8xX2dsYg==::UExMX0ZCQ0xLX01VWF8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0ZCQ0xLX01VWF8y::cGxsX2ZiY2xrX211eF8yX21fY250::UExMX0ZCQ0xLX01VWF8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0lOX1NSQw==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::UExMX01fQ05UX0lOX1NSQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NQX1NFVFRJTkc=::cGxsX2NwX3NldHRpbmcyOA==::UExMX0NQX1NFVFRJTkc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0JXX0NUUkw=::cGxsX2J3X3Jlc19zZXR0aW5nNQ==::UExMX0JXX0NUUkw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0JXX1NFTA==::aGlnaA==::UExMX0JXX1NFTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMA==::Mg==::UExMX0NfQ05UX0hJR0hfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18w::Mg==::UExMX0NfQ05UX0xPV18w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMA==::MQ==::UExMX0NfQ05UX1BSU1RfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzA=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8w::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8w::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzA=::MzMzNiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8w::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8w::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMQ==::MQ==::UExMX0NfQ05UX0hJR0hfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18x::MQ==::UExMX0NfQ05UX0xPV18x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMQ==::MQ==::UExMX0NfQ05UX1BSU1RfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzE=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8x::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8x::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzE=::MTY2OCBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzE="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8x::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMQ==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8x::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8x"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMg==::Mg==::UExMX0NfQ05UX0hJR0hfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18y::Mg==::UExMX0NfQ05UX0xPV18y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMg==::MQ==::UExMX0NfQ05UX1BSU1RfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzI=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8y::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8y::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzI=::MzMzNiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8y::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMg==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8y::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMw==::NA==::UExMX0NfQ05UX0hJR0hfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18z::NA==::UExMX0NfQ05UX0xPV18z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMw==::MQ==::UExMX0NfQ05UX1BSU1RfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzM=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8z::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8z::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzM=::NjY3MiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8z::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMw==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8z::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNA==::NA==::UExMX0NfQ05UX0hJR0hfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV180::NA==::UExMX0NfQ05UX0xPV180"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNA==::MQ==::UExMX0NfQ05UX1BSU1RfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzQ=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl80::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl80::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzQ=::NjY3MiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl80::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl80::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl80"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNQ==::MjU2::UExMX0NfQ05UX0hJR0hfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV181::MjU2::UExMX0NfQ05UX0xPV181"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNQ==::MQ==::UExMX0NfQ05UX1BSU1RfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzU=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl81::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl81::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzU=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl81::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNQ==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl81::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl81"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNg==::MjU2::UExMX0NfQ05UX0hJR0hfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV182::MjU2::UExMX0NfQ05UX0xPV182"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNg==::MQ==::UExMX0NfQ05UX1BSU1RfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzY=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl82::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl82::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzY=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzY="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl82::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNg==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl82::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl82"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNw==::MjU2::UExMX0NfQ05UX0hJR0hfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV183::MjU2::UExMX0NfQ05UX0xPV183"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNw==::MQ==::UExMX0NfQ05UX1BSU1RfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzc=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl83::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl83::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzc=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl83::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNw==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl83::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl83"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfOA==::MjU2::UExMX0NfQ05UX0hJR0hfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV184::MjU2::UExMX0NfQ05UX0xPV184"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfOA==::MQ==::UExMX0NfQ05UX1BSU1RfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzg=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl84::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl84::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzg=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl84::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfOA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl84::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl84"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJzL0ludGVybmFsIENvbXBvbmVudHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_NAME "YWx0ZXJhX2F2YWxvbl9tbV9icmlkZ2U="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLU1NIFBpcGVsaW5lIEJyaWRnZQ=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_DESCRIPTION "SW5zZXJ0cyBhIHJlZ2lzdGVyIHN0YWdlIGluIHRoZSBBdmFsb24tTU0gY29tbWFuZCBhbmQgcmVzcG9uc2UgcGF0aHMuIEFjY2VwdHMgY29tbWFuZHMgb24gaXRzIEF2YWxvbi1NTSBzbGF2ZSBwb3J0IGFuZCBwcm9wYWdhdGVzIHRoZW0gdG8gaXRzIEF2YWxvbi1NTSBtYXN0ZXIgcG9ydC4="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "REFUQV9XSURUSA==::MzI=::RGF0YSB3aWR0aA=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "U1lNQk9MX1dJRFRI::OA==::U3ltYm9sIHdpZHRo"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "QUREUkVTU19XSURUSA==::MTY=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "U1lTSU5GT19BRERSX1dJRFRI::MTQ=::U1lTSU5GT19BRERSX1dJRFRI"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "VVNFX0FVVE9fQUREUkVTU19XSURUSA==::MA==::VXNlIGF1dG9tYXRpY2FsbHktZGV0ZXJtaW5lZCBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "QVVUT19BRERSRVNTX1dJRFRI::MTQ=::QXV0b21hdGljYWxseS1kZXRlcm1pbmVkIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "SERMX0FERFJfV0lEVEg=::MTY=::SERMX0FERFJfV0lEVEg="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "QUREUkVTU19VTklUUw==::U1lNQk9MUw==::QWRkcmVzcyB1bml0cw=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "QlVSU1RDT1VOVF9XSURUSA==::MQ==::QnVyc3Rjb3VudCB3aWR0aA=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "TUFYX0JVUlNUX1NJWkU=::MQ==::TWF4aW11bSBidXJzdCBzaXplICh3b3Jkcyk="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "TUFYX1BFTkRJTkdfUkVTUE9OU0VT::NA==::TWF4aW11bSBwZW5kaW5nIHJlYWQgdHJhbnNhY3Rpb25z"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "TElORVdSQVBCVVJTVFM=::MA==::TGluZSB3cmFwIGJ1cnN0cw=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQ09NTUFORA==::MQ==::UGlwZWxpbmUgY29tbWFuZCBzaWduYWxz"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfUkVTUE9OU0U=::MQ==::UGlwZWxpbmUgcmVzcG9uc2Ugc2lnbmFscw=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU1BPTlNF::MA==::VXNlIEF2YWxvbiBUcmFuc2FjdGlvbiBSZXNwb25zZXM="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0JyaWRnZXMgYW5kIEFkYXB0b3JzL01lbW9yeSBNYXBwZWQ="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfc3lzdGVtX2NvbXBvbmVudHMucGRm"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1OTI3NTc0OQ=="
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY4MzYxNDU1NTUvaGNvMTQxNjgzNjY1MzIyMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfYXZhbG9uX29uY2hpcF9tZW1vcnkyXzE3MF95cm9sZG15"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_DISPLAY_NAME "T24tQ2hpcCBNZW1vcnkgKFJBTSBvciBST00p"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "YWxsb3dJblN5c3RlbU1lbW9yeUNvbnRlbnRFZGl0b3I=::ZmFsc2U=::RW5hYmxlIEluLVN5c3RlbSBNZW1vcnkgQ29udGVudCBFZGl0b3IgZmVhdHVyZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "YmxvY2tUeXBl::QVVUTw==::QmxvY2sgdHlwZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRo::MzI=::U2xhdmUgUzEgRGF0YSB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRoMg==::MzI=::U2xhdmUgUzIgRGF0YSB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZHVhbFBvcnQ=::ZmFsc2U=::RHVhbC1wb3J0IGFjY2Vzcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg=::ZmFsc2U=::ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "aW5pdE1lbUNvbnRlbnQ=::dHJ1ZQ==::SW5pdGlhbGl6ZSBtZW1vcnkgY29udGVudA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "aW5pdGlhbGl6YXRpb25GaWxlTmFtZQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::VXNlciBjcmVhdGVkIGluaXRpYWxpemF0aW9uIGZpbGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZW5QUkluaXRNb2Rl::ZmFsc2U=::RW5hYmxlIFBhcnRpYWwgUmVjb25maWd1cmF0aW9uIEluaXRpYWxpemF0aW9uIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "bWVtb3J5U2l6ZQ==::MTYzODM=::VG90YWwgbWVtb3J5IHNpemU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "c2ltQWxsb3dNUkFNQ29udGVudHNGaWxl::ZmFsc2U=::QWxsb3cgTVJBTSBjb250ZW50cyBmaWxlIGZvciBzaW11bGF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "c2ltTWVtSW5pdE9ubHlGaWxlbmFtZQ==::MA==::U2ltdWxhdGlvbiBtZW1pbml0IG9ubHkgaGFzIGZpbGVuYW1l"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg==::ZmFsc2U=::ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "c2xhdmUxTGF0ZW5jeQ==::MQ==::U2xhdmUgczEgTGF0ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "dXNlTm9uRGVmYXVsdEluaXRGaWxl::dHJ1ZQ==::RW5hYmxlIG5vbi1kZWZhdWx0IGluaXRpYWxpemF0aW9uIGZpbGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "Y29weUluaXRGaWxl::dHJ1ZQ==::Q29weSBub24tZGVmYXVsdCBpbml0aWFsaXphdGlvbiBmaWxlIHRvIGdlbmVyYXRlZCBmb2xkZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "d3JpdGFibGU=::ZmFsc2U=::VHlwZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZWNjX2VuYWJsZWQ=::ZmFsc2U=::RXh0ZW5kIHRoZSBkYXRhIHdpZHRoIHRvIHN1cHBvcnQgRUNDIGJpdHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "cmVzZXRyZXF1ZXN0X2VuYWJsZWQ=::ZmFsc2U=::UmVzZXQgUmVxdWVzdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU=::YWx0ZXJhX2VtaWZfY2FsX3NsYXZlX25mX2lvYXV4X3NvZnRfcmFt::YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmFtaWx5::QXJyaWEgMTA=::ZGV2aWNlRmFtaWx5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmVhdHVyZXM=::ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0::ZGV2aWNlRmVhdHVyZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aA==::MTI=::U2xhdmUgMSBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aDI=::MTI=::U2xhdmUgMiBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aA==::MzI=::U2xhdmUgMSBkYXRhIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aDI=::MzI=::U2xhdmUgMiBkYXRhIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU=::QXV0b21hdGlj::ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pc19oYXJkY29weQ==::ZmFsc2U=::ZGVyaXZlZF9pc19oYXJkY29weQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL09uIENoaXAgTWVtb3J5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9jb250ZW50L2RhbS9hbHRlcmEtd3d3L2dsb2JhbC9lbl9VUy9wZGZzL2xpdGVyYXR1cmUvdWcvdWdfc29wY19idWlsZGVyLnBkZg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY4MzYxNDU1NTUvaGNvMTQxNjgzNjY1MzIyMQ=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9tYXN0ZXJfdHJhbnNsYXRvcg=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIE1hc3RlciBUcmFuc2xhdG9y"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_INTERNAL "On"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBtYXN0ZXIgaW50ZXJmYWNlIHRvIGEgc2ltcGxlciByZXByZXNlbnRhdGlvbiB0aGF0IHRoZSBRc3lzIG5ldHdvcmsgdXNlcy4gUmVmZXIgdG8gdGhlIEF2YWxvbiBJbnRlcmZhY2UgU3BlY2lmaWNhdGlvbnMgKGh0dHA6Ly93d3cuYWx0ZXJhLmNvbS9saXRlcmF0dXJlL21hbnVhbC9tbmxfYXZhbG9uX3NwZWMucGRmKSBmb3IgZGVmaW5pdGlvbnMgb2YgdGhlIEF2YWxvbi1NTSBzaWduYWxzIGFuZCBleHBsYW5hdGlvbnMgb2YgdGhlIGJ1cnN0aW5nIHByb3BlcnRpZXMu"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MTY=::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::NA==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTY=::TmV0d29yayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MA==::cmVhZExhdGVuY3k="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MQ==::cmVhZFdhaXRUaW1l"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MQ==::VXNlIHJlYWQ="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MQ==::VXNlIGJ5dGVlbmFibGU="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MA==::VXNlIGNoaXBzZWxlY3Q="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MQ==::VXNlIGJ1cnN0Y291bnQ="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MQ==::VXNlIGRlYnVnYWNjZXNz"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0NMS0VO::MA==::VXNlIG5ldHdvcmsgY2xrZW4="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MQ==::VXNlIHJlYWRkYXRhdmFsaWQ="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MQ==::VXNlIHdhaXRyZXF1ZXN0"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MQ==::QWRkcmVzcyBzeW1ib2xz"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::NjQ=::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MA==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MA==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_GROUP "UXN5cyBJbnRlcmNvbm5lY3QvTWVtb3J5LU1hcHBlZA=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9zbGF2ZV90cmFuc2xhdG9y"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uIE1NIFNsYXZlIFRyYW5zbGF0b3I="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_INTERNAL "On"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBzbGF2ZSBpbnRlcmZhY2UgdG8gYSBzaW1wbGlmaWVkIHJlcHJlc2VudGF0aW9uIHRoYXQgdGhlIFFzeXMgbmV0d29yayB1c2VzLiBSZWZlciB0byB0aGUgQXZhbG9uIEludGVyZmFjZSBTcGVjaWZpY2F0aW9ucyAoaHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbWFudWFsL21ubF9hdmFsb25fc3BlYy5wZGYpIGZvciBkZWZpbml0aW9ucyBvZiB0aGUgQXZhbG9uLU1NIHNpZ25hbHMgYW5kIGV4cGxhbmF0aW9ucyBvZiB0aGUgYnVyc3RpbmcgcHJvcGVydGllcyBhbmQgYWRkcmVzcyBhbGlnbm1lbnQu"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MTI=::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0RBVEFfVw==::MzI=::TmV0d29yayBEYXRhIHdpZHRo"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::NA==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0JZVEVFTkFCTEVfVw==::NA==::TmV0d29yayBieXRlZW5hYmxlIHdpZHRo"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTY=::TmV0d29yayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MQ==::cmVhZExhdGVuY3k="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MA==::cmVhZFdhaXRUaW1l"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfVElNSU5HX1VOSVRT::MQ==::VGltaW5nIHVuaXRz"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MA==::VXNlIHJlYWQ="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MQ==::VXNlIGJ5dGVlbmFibGU="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MQ==::VXNlIGNoaXBzZWxlY3Q="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MA==::VXNlIGJ1cnN0Y291bnQ="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MA==::VXNlIHJlYWRkYXRhdmFsaWQ="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MA==::VXNlIHdhaXRyZXF1ZXN0"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFQllURUVOQUJMRQ==::MA==::VXNlIHdyaXRlYnl0ZWVuYWJsZQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0FWX0NMS0VO::MQ==::VXNlIGNvbXBvbmVudCBjbGtlbg=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1VBVl9DTEtFTg==::MA==::VXNlIG5ldHdvcmsgY2xrZW4="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX09VVFBVVEVOQUJMRQ==::MA==::VXNlIG91dHB1dGVuYWJsZQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MQ==::VXNlIGRlYnVnYWNjZXNz"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MA==::QWRkcmVzcyBzeW1ib2xz"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVRVUlSRV9VTkFMSUdORURfQUREUkVTU0VT::MA==::VW5hbGlnbmVkIGFkZHJlc3Nlcw=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::MQ==::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfV1JJVEVfVFJBTlNBQ1RJT05T::MA==::bWF4UGVuZGluZ1dyaXRlVHJhbnNhY3Rpb25z"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MA==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MA==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "Q0hJUFNFTEVDVF9USFJPVUdIX1JFQURMQVRFTkNZ::MA==::Q2hpcHNlbGVjdCB0aHJvdWdoIHJlYWQgbGF0ZW5jeQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "Q0xPQ0tfUkFURQ==::MA==::Q0xPQ0tfUkFURQ=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlUX0NZQ0xFUw==::MA==::QVZfUkVBRF9XQUlUX0NZQ0xFUw=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVF9DWUNMRVM=::MA==::QVZfV1JJVEVfV0FJVF9DWUNMRVM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVF9DWUNMRVM=::MA==::QVZfU0VUVVBfV0FJVF9DWUNMRVM="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xEX0NZQ0xFUw==::MA==::QVZfREFUQV9IT0xEX0NZQ0xFUw=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_GROUP "UXN5cyBJbnRlcmNvbm5lY3QvTWVtb3J5LU1hcHBlZA=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfbW1faW50ZXJjb25uZWN0XzE3MF9vMnlzNGtp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_DISPLAY_NAME "TU0gSW50ZXJjb25uZWN0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_INTERNAL "On"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_DESCRIPTION "TU0gSW50ZXJjb25uZWN0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVMyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_COMPONENT_GROUP "TWVybGluIENvbXBvbmVudHM="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_NAME "YWx0ZXJhX3Jlc2V0X2NvbnRyb2xsZXI="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_DISPLAY_NAME "TWVybGluIFJlc2V0IENvbnRyb2xsZXI="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_DESCRIPTION "Rm9yIHN5c3RlbXMgd2l0aCBtdWx0aXBsZSByZXNldCBpbnB1dHMsIHRoZSBNZXJsaW4gUmVzZXQgQ29udHJvbGxlciBPUnMgYWxsIHJlc2V0IGlucHV0cyBhbmQgZ2VuZXJhdGVzIGEgc2luZ2xlIHJlc2V0IG91dHB1dC4="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "TlVNX1JFU0VUX0lOUFVUUw==::MQ==::TnVtYmVyIG9mIGlucHV0cw=="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "T1VUUFVUX1JFU0VUX1NZTkNfRURHRVM=::ZGVhc3NlcnQ=::T3V0cHV0IFJlc2V0IFN5bmNocm9ub3VzIEVkZ2Vz"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "U1lOQ19ERVBUSA==::Mg==::U3luY2hyb25pemVyIGRlcHRo"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRVUVTVF9QUkVTRU5U::MA==::UmVzZXQgcmVxdWVzdCBsb2dpYyBlbmFibGU="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX1dBSVRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCB3YWl0IHRpbWU="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "TUlOX1JTVF9BU1NFUlRJT05fVElNRQ==::Mw==::TWluaW11bSByZXNldCBhc3NlcnRpb24gdGltZQ=="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX0VBUkxZX0RTUlRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCBkZWFzc2VydCB0aW1pbmc="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4w::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjA="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4x::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4y::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjI="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4z::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjM="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU40::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjQ="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU41::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjU="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU42::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjY="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU43::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjc="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU44::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjg="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU45::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjk="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEw"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEx"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMg==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEy"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMw==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEz"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE0"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE1"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU5QVVQ=::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcmVzZXRfaW5wdXRz"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_PARAMETER "QURBUFRfUkVTRVRfUkVRVUVTVA==::MA==::T25seSBhZGFwdCBvbmx5IHJlc2V0IHJlcXVlc3Q="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0Nsb2NrczsgUExMcyBhbmQgUmVzZXRz"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl9jYWxfc2xhdmVfbmZfMTcwXzZxZm1ldnk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_DISPLAY_NAME "QXJyaWEgMTAgRXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXMgQ2FsaWJyYXRpb24gU2xhdmUvSGVscGVyIGNvbXBvbmVudA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_INTERNAL "On"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_DESCRIPTION "VGhpcyBjb21wb25lbnQgaW5zdGFudGlhdGVzIGNvbXBvbmVudHMgdGhhdCBzZXJ2ZSBhcyBzbGF2ZXMgdG8gdGhlIEVNSUYgY2FsaWJyYXRpb24gcHJvY2Vzc29yLiBJdCBpcyBpbnRlbmRlZCBmb3IgaW50ZXJuYWwgdXNlIG9ubHku"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0pUQUdfVUFSVA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBmb3IgRGVidWcgT3V0cHV0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "RU5BQkxFX1NPRlRfUkFN::dHJ1ZQ==::RW5hYmxlIHNvZnQgUkFNIGZvciBjYWxpYnJhdGlvbiBjb2RlIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "U09GVF9SQU1fSEVYRklMRQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::UEFSQU1fU09GVF9SQU1fSEVYRklMRV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVMyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::MQ==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl8xNzBfeHhvZHZ6aQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DISPLAY_NAME "QXJyaWEgMTAgRXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_VERSION "MTcuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DESCRIPTION "QXJyaWEgMTAgRXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX0ZBTUlMWQ==::QXJyaWEgMTA=::UEFSQU1fU1lTX0lORk9fREVWSUNFX0ZBTUlMWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNF::MTBBWDExNVMyRjQ1RTFTRw==::UEFSQU1fU1lTX0lORk9fREVWSUNFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX1NQRUVER1JBREU=::MQ==::UEFSQU1fU1lTX0lORk9fREVWSUNFX1NQRUVER1JBREVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RkFNSUxZX0VOVU0=::RkFNSUxZX0FSUklBMTA=::UEFSQU1fRkFNSUxZX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "VFJBSVRfU1VQUE9SVFNfVklE::MA==::UEFSQU1fVFJBSVRfU1VQUE9SVFNfVklEX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UFJPVE9DT0xfRU5VTQ==::UFJPVE9DT0xfRERSNA==::UHJvdG9jb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "SVNfRURfU0xBVkU=::ZmFsc2U=::UEFSQU1fSVNfRURfU0xBVkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "SU5URVJOQUxfVEVTVElOR19NT0RF::ZmFsc2U=::UEFSQU1fSU5URVJOQUxfVEVTVElOR19NT0RFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWQ==::NTAwMDAwMDA=::UEFSQU1fQ0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fVU5JUVVFX0lE::aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9kZHI0X2luc3Q=::UEFSQU1fU1lTX0lORk9fVU5JUVVFX0lEX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UFJFVl9QUk9UT0NPTF9FTlVN::UFJPVE9DT0xfRERSNA==::UEFSQU1fUFJFVl9QUk9UT0NPTF9FTlVNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0ZQR0FfU1BFRURHUkFERV9HVUk=::RTEgKFByb2R1Y3Rpb24pIC0gY2hhbmdlIGRldmljZSB1bmRlciAnVmlldyctPidEZXZpY2UgRmFtaWx5Jw==::U3BlZWQgZ3JhZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9TUEVFREdSQURF::RTE=::UEFSQU1fUEhZX1RBUkdFVF9TUEVFREdSQURFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUw==::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzI=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzM=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19QUk9EVUNUSU9O::dHJ1ZQ==::UEFSQU1fUEhZX1RBUkdFVF9JU19QUk9EVUNUSU9OX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0NPTkZJR19FTlVN::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JBVEVfRU5VTQ==::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX01FTV9DTEtfRlJFUV9NSFo=::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfRlJFUV9NSFo=::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfSklUVEVSX1BT::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VOVU0=::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0FDX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0FDX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0NLX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NLX0NBTElCUkFURURfT0NUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1Q=::dHJ1ZQ==::UEFSQU1fUEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1RfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JaUQ==::MjQw::UlpRIHJlc2lzdG9y"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0hQU19FTkFCTEVfRUFSTFlfUkVMRUFTRQ==::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJfUEVSSU9ESUNfT0NUX1JFQ0FMX0VOVU0=::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0FERF9FWFRSQV9DTEtT::ZmFsc2U=::U3BlY2lmeSBhZGRpdGlvbmFsIGNvcmUgY2xvY2tzIGJhc2VkIG9uIGV4aXN0aW5nIFBMTA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX1VTRVJfTlVNX09GX0VYVFJBX0NMS1M=::MA==::TnVtYmVyIG9mIGFkZGl0aW9uYWwgY29yZSBjbG9ja3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzA=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzA=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8w::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzA=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8w::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8wX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzE=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzE=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8x::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzE=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzFfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8x::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8xX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzI=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzI=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8y::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzI=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8y::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8yX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzM=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzM=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8z::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzM=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8z::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8zX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzQ=::MC4w::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzQ=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzQ=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzRfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzU=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzU=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzU=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzY=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzY=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzY=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzZfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzc=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzc=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzc=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzdfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzg=::MTAwLjA=::RnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzg=::MC4w::UGhhc2Ugc2hpZnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzg=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19DTEtfRlJFUV9NSFo=::MTIwMC4w::UEFSQU1fUExMX1ZDT19DTEtfRlJFUV9NSFpfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX05VTV9PRl9FWFRSQV9DTEtT::MA==::UEFSQU1fUExMX05VTV9PRl9FWFRSQV9DTEtTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfM19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNQ==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNg==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNw==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfN19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOA==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MTMzLjMzMw==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIw::MA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIx::OA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVT::dHJ1ZQ==::UEFSQU1fUEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfTUVNX0NMS19GUkVRX01IWg==::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19GUkVRX01IWg==::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JT19TVERfRU5VTQ==::SU9fU1REX1BPRF8xMg==::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9PVVRfTU9ERV9FTlVN::T1VUX09DVF8zNF9DQUw=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JTl9NT0RFX0VOVU0=::SU5fT0NUXzEyMF9DQUw=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfU1RBUlRJTkdfVlJFRklO::NjEuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::SU9fU1REX0xWRFM=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUlpRX0lPX1NURF9FTlVN::SU9fU1REX0NNT1NfMTI=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfTUVNX0NMS19GUkVRX01IWg==::NjMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfTUVNX0NMS19GUkVRX01IWg==::NTMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSU9fVk9MVEFHRQ==::MS44::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9PTkxZ::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT05GSUdfRU5VTQ==::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19NRU1fQ0xLX0ZSRVFfTUha::ODAwLjA=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX1JFRl9DTEtfRlJFUQ==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JFRl9DTEtfRlJFUV9NSFo=::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0pJVFRFUl9QUw==::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SQVRFX0VOVU0=::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FTlVN::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19JT19WT0xUQUdF::MS4y::Vm9sdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX0lP::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19IUFNfRU5BQkxFX0VBUkxZX1JFTEVBU0U=::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BFUklPRElDX09DVF9SRUNBTF9FTlVN::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfT1VUX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU5fTU9ERV9FTlVN::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FVVE9fU1RBUlRJTkdfVlJFRklOX0VO::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1NUQVJUSU5HX1ZSRUZJTg==::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BMTF9SRUZfQ0xLX0lPX1NURF9FTlVN::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JaUV9JT19TVERfRU5VTQ==::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0ZPUk1BVF9FTlVN::TUVNX0ZPUk1BVF9TT0RJTU0=::UEFSQU1fTUVNX0ZPUk1BVF9FTlVNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JFQURfTEFURU5DWQ==::MTguMA==::UEFSQU1fTUVNX1JFQURfTEFURU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1dSSVRFX0xBVEVOQ1k=::MTg=::UEFSQU1fTUVNX1dSSVRFX0xBVEVOQ1lfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0JVUlNUX0xFTkdUSA==::OA==::UEFSQU1fTUVNX0JVUlNUX0xFTkdUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0RBVEFfTUFTS19FTg==::dHJ1ZQ==::UEFSQU1fTUVNX0RBVEFfTUFTS19FTl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0hBU19TSU1fU1VQUE9SVA==::dHJ1ZQ==::UEFSQU1fTUVNX0hBU19TSU1fU1VQUE9SVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9EQVRBX1dJRFRI::NzI=::UEFSQU1fTUVNX1RUTF9EQVRBX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFM=::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBT::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9VRElNTQ==::TWVtb3J5IGZvcm1hdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkFOS1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk9XX0FERFJfV0lEVEg=::MTQ=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkRJTU1fQ09ORklH::MDAwMDAwMDAwMDAwMDAwMA==::RERSMyBSRElNTS9MUkRJTU0gY29udHJvbCB3b3Jkcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTFJESU1NX0VYVEVOREVEX0NPTkZJRw==::MHgwMDAwMDAwMDAwMDAwMDAwMDA=::RERSMyBMUkRJTU0gYWRkaXRpb25hbCBjb250cm9sIHdvcmRz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSM19BTEVSVF9OX1BMQUNFTUVOVF9BQ19MQU5FUw==::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFTX1dJRFRI::OA==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfQ1NfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfQ0tFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfT0RUX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfT0RUX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUl9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUNfUEFSX0VO::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQUNfUEFSX0VOX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRU19XSURUSA==::OA==::UEFSQU1fTUVNX0REUjNfVFRMX0RRU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjNfVFRMX0RRX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RNX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0RNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NTX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NTX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLRV9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLRV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX09EVF9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX09EVF9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSA==::Mw==::UEFSQU1fTUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0FERFJfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjNfVFRMX1JNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9ESU1NU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIw::MA==::UEFSQU1fTUVNX0REUjNfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIx::MA==::UEFSQU1fTUVNX0REUjNfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIy::MA==::UEFSQU1fTUVNX0REUjNfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIz::MA==::UEFSQU1fTUVNX0REUjNfTVIzX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkxfRU5VTQ==::RERSM19CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQlRfRU5VTQ==::RERSM19CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVNSX0VOVU0=::RERSM19BU1JfTUFOVUFM::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1JUX0VOVU0=::RERSM19TUlRfTk9STUFM::U2VsZi1yZWZyZXNoIHRlbXBlcmF0dXJl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUERfRU5VTQ==::RERSM19QRF9PRkY=::RExMIHByZWNoYXJnZSBwb3dlciBkb3du"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFJWX1NUUl9FTlVN::RERSM19EUlZfU1RSX1JaUV82::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX05PTV9FTlVN::RERSM19SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX1dSX0VOVU0=::RERSM19SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV1RDTA==::Ng==::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVRDTF9FTlVN::RERSM19BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVENM::Nw==::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVE4=::LCw=::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDA=::LCw=::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDE=::LCw=::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDI=::LCw=::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDM=::LCw=::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVE4=::LCw=::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDA=::LCw=::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDE=::LCw=::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDI=::LCw=::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDM=::LCw=::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9MTw==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9MT19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1BFRURCSU5fRU5VTQ==::RERSM19TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX0FDX01W::MTM1::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX1BT::NTM=::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX0FDX01W::MTM1::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX1BT::NTU=::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1FfUFM=::NzU=::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFIX0NZQw==::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX1BT::MTgw::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFTSF9DWUM=::MC40::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTSF9DWUM=::MC4xOA==::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMU19QUw==::MTI1LjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMSF9QUw==::MTI1LjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTU19DWUM=::MC4xOA==::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfVVM=::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVE1SRF9DS19DWUM=::NA==::dE1SRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19OUw==::MzMuMA==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9OUw==::MTMuMDk=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX05T::MTMuMDk=::dFJQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfVVM=::Ny44::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX05T::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdUUl9DWUM=::NA==::dFdUUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19OUw==::MjUuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJSRF9DWUM=::Ng==::dFJSRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJUUF9DWUM=::OA==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfQ0s=::NDk5::UEFSQU1fTUVNX0REUjNfVElOSVRfQ0tfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjNfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19DWUM=::MzY=::UEFSQU1fTUVNX0REUjNfVFJBU19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9DWUM=::MTQ=::UEFSQU1fTUVNX0REUjNfVFJDRF9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX0NZQw==::MTQ=::UEFSQU1fTUVNX0REUjNfVFJQX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19DWUM=::MTcx::UEFSQU1fTUVNX0REUjNfVFJGQ19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX0NZQw==::MTY=::UEFSQU1fTUVNX0REUjNfVFdSX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19DWUM=::Mjc=::UEFSQU1fTUVNX0REUjNfVEZBV19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfQ1lD::ODMyMA==::UEFSQU1fTUVNX0REUjNfVFJFRklfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9TQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9EQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9TT0RJTU0=::TWVtb3J5IGZvcm1hdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0hJUF9JRF9XSURUSA==::MA==::Q2hpcCBJRCB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkFOS1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tfV0lEVEg=::Mg==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk9XX0FERFJfV0lEVEg=::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19BRERSX1dJRFRI::Mg==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19HUk9VUF9XSURUSA==::Mg==::QmFuayBncm91cCB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRE1fRU4=::dHJ1ZQ==::RGF0YSBtYXNr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfUEFSX0VO::dHJ1ZQ==::RW5hYmxlIEFMRVJUIy9QQVIgcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSNF9BTEVSVF9OX1BMQUNFTUVOVF9EQVRBX0xBTkVT::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19MQU5F::MA==::QWRkcmVzcy9jb21tYW5kIEkvTyBsYW5lIG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19QSU4=::MA==::UGluIGluZGV4IG9mIEFMRVJUIw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkxfRU5VTQ==::RERSNF9CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQlRfRU5VTQ==::RERSNF9CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENM::MTg=::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX05PTV9FTlVN::RERSNF9SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVRDTF9FTlVN::RERSNF9BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFJWX1NUUl9FTlVN::RERSNF9EUlZfU1RSX1JaUV83::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVNSX0VOVU0=::RERSNF9BU1JfTUFOVUFMX05PUk1BTA==::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1dSX0VOVU0=::RERSNF9SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1RDTA==::MTg=::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ1JD::ZmFsc2U=::V3JpdGUgQ1JDIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfR0VBUkRPV04=::RERSNF9HRUFSRE9XTl9IUg==::RERSNCBnZWFyZG93biBtb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUEVSX0RSQU1fQUREUg==::ZmFsc2U=::UGVyLURSQU0gYWRkcmVzc2FiaWxpdHk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9TRU5TT1JfUkVBRE9VVA==::ZmFsc2U=::VGVtcGVyYXR1cmUgc2Vuc29yIHJlYWRvdXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRklORV9HUkFOVUxBUklUWV9SRUZSRVNI::RERSNF9GSU5FX1JFRlJFU0hfRklYRURfMVg=::RmluZSBncmFudWxhcml0eSByZWZyZXNo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVBSX1JFQURfRk9STUFU::RERSNF9NUFJfUkVBRF9GT1JNQVRfU0VSSUFM::TVBSIHJlYWQgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUFYX1BPV0VSRE9XTg==::ZmFsc2U=::TWF4aW11bSBwb3dlciBkb3duIG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfUkFOR0U=::RERSNF9URU1QX0NPTlRST0xMRURfUkZTSF9OT1JNQUw=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfRU5B::ZmFsc2U=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSU5URVJOQUxfVlJFRkRRX01PTklUT1I=::ZmFsc2U=::SW50ZXJuYWwgVnJlZkRRIG1vbml0b3I="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0FMX01PREU=::MA==::Q1MgdG8gQWRkci9DTUQgTGF0ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VMRl9SRlNIX0FCT1JU::ZmFsc2U=::U2VsZiByZWZyZXNoIGFib3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRV9UUkFJTklORw==::ZmFsc2U=::UmVhZCBwcmVhbWJsZSB0cmFpbmluZyBtb2RlIGVuYWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRQ==::MQ==::UmVhZCBwcmVhbWJsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfUFJFQU1CTEU=::MQ==::V3JpdGUgcHJlYW1ibGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEFSSVRZX0xBVEVOQ1k=::RERSNF9BQ19QQVJJVFlfTEFURU5DWV9ESVNBQkxF::QWRkci9DTUQgcGFyaXR5IGxhdGVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX0lOX1BPV0VSRE9XTg==::dHJ1ZQ==::T0RUIGlucHV0IGJ1ZmZlciBkdXJpbmcgcG93ZXJkb3duIG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1BBUks=::RERSNF9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::UlRUIFBBUks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEVSU0lTVEVOVF9FUlJPUg==::ZmFsc2U=::QWRkci9DTUQgcGVyc2lzdGVudCBlcnJvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfREJJ::ZmFsc2U=::V3JpdGUgREJJ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9EQkk=::ZmFsc2U=::UmVhZCBEQkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREVGQVVMVF9WUkVGT1VU::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZkRRIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfVkFMVUU=::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfUkFOR0U=::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NBX0lCVF9FTlVN::RERSNF9SQ0RfQ0FfSUJUXzEwMA==::UkNEIENBIElucHV0IEJ1cyBUZXJtaW5hdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NTX0lCVF9FTlVN::RERSNF9SQ0RfQ1NfSUJUXzEwMA==::UkNEIERDU1szOjBdX24gSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NLRV9JQlRfRU5VTQ==::RERSNF9SQ0RfQ0tFX0lCVF8xMDA=::UkNEIERDS0UgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX09EVF9JQlRfRU5VTQ==::RERSNF9SQ0RfT0RUX0lCVF8xMDA=::UkNEIERPRFQgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX05PTV9FTlVN::RERSNF9EQl9SVFRfTk9NX09EVF9ESVNBQkxFRA==::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX05PTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1dSX0VOVU0=::RERSNF9EQl9SVFRfV1JfUlpRXzM=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1dS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1BBUktfRU5VTQ==::RERSNF9EQl9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1BBUks="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfRFFfRFJWX0VOVU0=::RERSNF9EQl9EUlZfU1RSX1JaUV83::REIgSG9zdCBJbnRlcmZhY2UgRFEgRHJpdmVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzN19SQ0RfQ0FfRFJW::MTAx::U1BEIEJ5dGUgMTM3IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDb21tYW5kL0FkZHJlc3M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOF9SQ0RfQ0tfRFJW::NQ==::U1BEIEJ5dGUgMTM4IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MF9EUkFNX1ZSRUZEUV9SMA==::Mjk=::U1BEIEJ5dGUgMTQwIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MV9EUkFNX1ZSRUZEUV9SMQ==::Mjk=::U1BEIEJ5dGUgMTQxIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0Ml9EUkFNX1ZSRUZEUV9SMg==::Mjk=::U1BEIEJ5dGUgMTQyIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0M19EUkFNX1ZSRUZEUV9SMw==::Mjk=::U1BEIEJ5dGUgMTQzIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NF9EQl9WUkVGRFE=::Mzc=::U1BEIEJ5dGUgMTQ0IC0gREIgVnJlZkRRIGZvciBEUkFNIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NV9EQl9NRFFfRFJW::MjE=::U1BEIEJ5dGUgMTQ1LTE0NyAtIERCIE1EUSBEcml2ZSBTdHJlbmd0aCBhbmQgUlRU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OF9EUkFNX0RSVg==::MA==::U1BEIEJ5dGUgMTQ4IC0gRFJBTSBEcml2ZSBTdHJlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OV9EUkFNX1JUVF9XUl9OT00=::MjA=::U1BEIEJ5dGUgMTQ5LTE1MSAtIERSQU0gT0RUIChSVFRfV1IgYW5kIFJUVF9OT00p"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE1Ml9EUkFNX1JUVF9QQVJL::Mzk=::U1BEIEJ5dGUgMTUyLTE1NCAtIERSQU0gT0RUIChSVFRfUEFSSyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzM19SQ0RfREJfVkVORE9SX0xTQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKExTQik="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNF9SQ0RfREJfVkVORE9SX01TQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKE1TQik="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNV9SQ0RfUkVW::MA==::UkNEIFJldmlzaW9uIE51bWJlcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOV9EQl9SRVY=::MA==::REIgUmV2aXNpb24gTnVtYmVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JT::dHJ1ZQ==::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hN::MjQw::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFTX1dJRFRI::OQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfQ1NfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfQ0tFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfT0RUX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUl9XSURUSA==::MTc=::UEFSQU1fTUVNX0REUjRfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1M=::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1ZBTFVF::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdF::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdFX0RJU1A=::UmFuZ2UgMiAtIDQ1JSB0byA3Ny41JQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRU19XSURUSA==::OQ==::UEFSQU1fTUVNX0REUjRfVFRMX0RRU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjRfVFRMX0RRX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NTX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NTX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLRV9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLRV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX09EVF9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX09EVF9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEg=::MA==::UEFSQU1fTUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0FERFJfV0lEVEg=::MTc=::UEFSQU1fTUVNX0REUjRfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjRfVFRMX1JNX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9ESU1NU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIw::MjExMg==::UEFSQU1fTUVNX0REUjRfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIx::NjU1Mzc=::UEFSQU1fTUVNX0REUjRfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIy::MTMxMTIw::UEFSQU1fTUVNX0REUjRfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIz::MTk3MTIw::UEFSQU1fTUVNX0REUjRfTVIzX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI0::MjYyMTQ0::UEFSQU1fTUVNX0REUjRfTVI0X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI1::MzI4NzM2::UEFSQU1fTUVNX0REUjRfTVI1X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI2::Mzk0MzI3::UEFSQU1fTUVNX0REUjRfTVI2X05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkQ=::MTM=::UEFSQU1fTUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkRfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWQ==::MQ==::UEFSQU1fTUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDA=::KERyaXZlKSBSWlEvNyAoMzQgT2htKSxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChEcml2ZSkgUlpRLzcgKDM0IE9obSksLSwt::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDA=::KE5vbWluYWwpIE9EVCBEaXNhYmxlZCxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChOb21pbmFsKSBPRFQgRGlzYWJsZWQsLSwt::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9MTw==::NDE5NDMwOA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9MT19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BFRURCSU5fRU5VTQ==::RERSNF9TUEVFREJJTl8yNDAw::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX0FDX01W::MTAw::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX0RDX01W::NzU=::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfVE9UQUxfVUk=::MC4y::VGRpVldfdG90YWw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVkRJVldfVE9UQUw=::MTM2::VmRpVldfdG90YWw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfVUk=::MC4xNg==::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX1VJ::MC43Ng==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERWV1BfVUk=::MC43Mg==::dERWV3A="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX1BT::MTgw::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFTSF9DWUM=::MC4zOA==::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTSF9DWUM=::MC4xOA==::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTU19DWUM=::MC4xOA==::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19QUw==::MTIyLjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9QUw==::MTIyLjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfVVM=::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVE1SRF9DS19DWUM=::OA==::dE1SRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19OUw==::MzMuMA==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9OUw==::MTQuMDY=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX05T::MTQuMDY=::dFJQ"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfVVM=::Ny44::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX05T::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9MX0NZQw==::NA==::dFdUUl9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9TX0NZQw==::Mg==::dFdUUl9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19OUw==::MjUuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9MX0NZQw==::NQ==::dFJSRF9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9TX0NZQw==::NA==::dFJSRF9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9MX0NZQw==::NQ==::dENDRF9M"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9TX0NZQw==::NA==::dENDRF9T"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfTlM=::OTAuMA==::dFJGQ19kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19ETFJfQ1lD::MTY=::dEZBV19kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9ETFJfQ1lD::NA==::dFJSRF9kbHI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfREpfQ1lD::MC4x::UEFSQU1fTUVNX0REUjRfVERJVldfREpfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfUFM=::NjY=::UEFSQU1fTUVNX0REUjRfVERRU1FfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX0NZQw==::MC4zOA==::UEFSQU1fTUVNX0REUjRfVFFIX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfQ0s=::NjAwMDAw::UEFSQU1fTUVNX0REUjRfVElOSVRfQ0tfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjRfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19DWUM=::NDA=::UEFSQU1fTUVNX0REUjRfVFJBU19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9DWUM=::MTc=::UEFSQU1fTUVNX0REUjRfVFJDRF9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX0NZQw==::MTc=::UEFSQU1fTUVNX0REUjRfVFJQX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19DWUM=::MTky::UEFSQU1fTUVNX0REUjRfVFJGQ19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX0NZQw==::MTg=::UEFSQU1fTUVNX0REUjRfVFdSX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJUUF9DWUM=::OQ==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19DWUM=::MzA=::UEFSQU1fTUVNX0REUjRfVEZBV19DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfQ1lD::OTM2MA==::UEFSQU1fTUVNX0REUjRfVFJFRklfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ01EX0xBVEVOQ1k=::NQ==::V3JpdGUgQ01EIGxhdGVuY3kgZm9yIENSQy9ETSBlbmFibGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfQ1lD::MTA4::UEFSQU1fTUVNX0REUjRfVFJGQ19ETFJfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9TQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9EQkVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRQ==::MUQ=::UEFSQU1fTUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9QRVJfREVWSUNF::MzY=::RGF0YSB3aWR0aCBwZXIgZGV2aWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQUREUl9XSURUSA==::MTk=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX0VO::dHJ1ZQ==::RW5hYmxlIEJXUyMgcGlucw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjJfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjJfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9XSURUSA==::MzY=::RGF0YSB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fV0lEVEg=::NA==::QldTIyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fUEVSX0RFVklDRQ==::NA==::UEFSQU1fTUVNX1FEUjJfQldTX05fUEVSX0RFVklDRV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQ1FfV0lEVEg=::MQ==::Q1Egd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfS19XSURUSA==::MQ==::SyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFdMX0NZQw==::MQ==::dFdM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfU1BFRURCSU5fRU5VTQ==::UURSMl9TUEVFREJJTl82MzM=::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFJMX0NZQw==::Mi41::dFJM"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNBX05T::MC4yMw==::dFNB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhBX05T::MC4xOA==::dEhB"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNEX05T::MC4yMw==::dFNE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhEX05T::MC4xOA==::dEhE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRF9OUw==::MC4wOQ==::dENRRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRE9IX05T::LTAuMDk=::dENRRE9I"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfSU5URVJOQUxfSklUVEVSX05T::MC4wOA==::SW50ZXJuYWwgSml0dGVy"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRSF9OUw==::MC43MQ==::dENRSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENDUU9fTlM=::MC40NQ==::dENDUU8="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ0tfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChDbG9jayk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUNfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChBZGRyZXNzL0NvbW1hbmQp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9PRFRfTU9ERV9FTlVN::UURSNF9PRFRfMjVfUENU::T0RUIChEYXRhKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUFVfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLXVwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUERfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLWRvd24p"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9JTlZfRU5B::ZmFsc2U=::RGF0YSBidXMgaW52ZXJzaW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9JTlZfRU5B::ZmFsc2U=::QWRkcmVzcyBidXMgaW52ZXJzaW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjRfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfV0lEVEg=::NzI=::UEFSQU1fTUVNX1FEUjRfRFFfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfUUtfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfREtfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9XSURUSA==::NA==::UEFSQU1fTUVNX1FEUjRfRElOVl9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVVNFX0FERFJfUEFSSVRZ::ZmFsc2U=::VXNlIGFkZHJlc3MgcGFyaXR5IGJpdA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfV0lEVEg=::MzY=::RFFBIC8gRFFCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfUEVSX1BPUlRfV0lEVEg=::Mg==::UUtBIC8gUUtCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfUEVSX1BPUlRfV0lEVEg=::Mg==::REtBIC8gREtCIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9QRVJfUE9SVF9XSURUSA==::Mg==::RElOVkEgLyBESU5WQiB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQkw=::Mg==::UEFSQU1fTUVNX1FEUjRfQkxfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFJMX0NZQw==::OA==::UEFSQU1fTUVNX1FEUjRfVFJMX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFdMX0NZQw==::NQ==::UEFSQU1fTUVNX1FEUjRfVFdMX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iw::MA==::UEFSQU1fTUVNX1FEUjRfQ1IwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Ix::MA==::UEFSQU1fTUVNX1FEUjRfQ1IxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iy::MA==::UEFSQU1fTUVNX1FEUjRfQ1IyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU1BFRURCSU5fRU5VTQ==::UURSNF9TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVElTSF9QUw==::MTUw::dElTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFIX0NZQw==::MC40::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUFYX1BT::MTUw::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUlOX1BT::LTE1MA==::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLUUtfTUFYX1BT::MjI1::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVEFTSF9QUw==::MTcw::dEFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENTSF9QUw==::MTcw::dENTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX0RFVklDRQ==::OQ==::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ09ORklHX0VOVU0=::UkxEMl9DT05GSUdfVFJDXzhfVFJMXzhfVFdMXzk=::Q29uZmlndXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFJJVkVfSU1QRURFTkNFX0VOVU0=::UkxEMl9EUklWRV9JTVBFREVOQ0VfSU5URVJOQUxfNTA=::RHJpdmUgSW1wZWRhbmNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfT0RUX01PREVfRU5VTQ==::UkxEMl9PRFRfT04=::T24tRGllIFRlcm1pbmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDJfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfV0lEVEg=::OQ==::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUUtfV0lEVEg=::MQ==::UUsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREtfV0lEVEg=::MQ==::REsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX1JMRDJfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJD::OA==::UEFSQU1fTUVNX1JMRDJfVFJDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJM::OA==::UEFSQU1fTUVNX1JMRDJfVFJMX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFdM::OQ==::UEFSQU1fTUVNX1JMRDJfVFdMX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfTVI=::MA==::UEFSQU1fTUVNX1JMRDJfTVJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfU1BFRURCSU5fRU5VTQ==::UkxEMl9TUEVFREJJTl8xOA==::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUkVGUkVTSF9JTlRFUlZBTF9VUw==::MC4yNA==::UmVmcmVzaCBJbnRlcnZhbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLSF9DWUM=::MC40NQ==::dENLSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLSF9IQ1lD::MC45::dFFLSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFTX05T::MC4z::dEFT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFIX05T::MC4z::dEFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERTX05T::MC4xNw==::dERT"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERIX05T::MC4xNw==::dERI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NQVhfTlM=::MC4xMg==::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NSU5fTlM=::LTAuMTI=::dFFLUV9taW4="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUFYX05T::MC4z::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUlOX05T::LTAuMw==::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLUUtfTUFYX05T::MC4y::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVQVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIGRlcHRoIGV4cGFuc2lvbiB1c2luZyB0d2luIGRpZSBwYWNrYWdl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQUREUl9XSURUSA==::MjA=::QWRkcmVzcyB3aWR0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkFOS19BRERSX1dJRFRI::NA==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkw=::Mg==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREFUQV9MQVRFTkNZX01PREVfRU5VTQ==::UkxEM19ETF9STDE2X1dMMTc=::RGF0YSBMYXRlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVF9SQ19NT0RFX0VOVU0=::UkxEM19UUkNfOQ==::dFJD"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UkxEM19PVVRQVVRfRFJJVkVfNDA=::T3V0cHV0IGRyaXZl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT0RUX01PREVfRU5VTQ==::UkxEM19PRFRfNDA=::T0RU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQVJFRl9QUk9UT0NPTF9FTlVN::UkxEM19BUkVGX0JBQw==::QVJFRiBwcm90b2NvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV1JJVEVfUFJPVE9DT0xfRU5VTQ==::UkxEM19XUklURV8xQkFOSw==::V3JpdGUgcHJvdG9jb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDNfRk9STUFUX0VOVU1fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX0RFUFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfV0lEVEg=::MzY=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfUUtfV0lEVEg=::NA==::UUsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREtfV0lEVEg=::Mg==::REsgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fV0lEVEg=::Mg==::UEFSQU1fTUVNX1JMRDNfRE1fV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIw::MA==::UEFSQU1fTUVNX1JMRDNfTVIwX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIx::MA==::UEFSQU1fTUVNX1JMRDNfTVIxX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIy::MA==::UEFSQU1fTUVNX1JMRDNfTVIyX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfU1BFRURCSU5fRU5VTQ==::UkxEM19TUEVFREJJTl8wOTNF::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX1BT::LTMw::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX0FDX01W::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX1BT::NQ==::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFIX0NZQw==::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUFYX0NZQw==::MC4yNw==::dENLREtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUlOX0NZQw==::LTAuMjc=::dENLREtfbWlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLUUtfTUFYX1BT::MTM1::dENLUUtfbWF4"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX1BT::ODU=::dElTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX0FDX01W::MTUw::dElTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX1BT::NjU=::dElIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9XSURUSA==::MzI=::RFEgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ESVNDUkVURV9DU19XSURUSA==::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS19XSURUSA==::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9FTg==::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ST1dfQUREUl9XSURUSA==::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DT0xfQUREUl9XSURUSA==::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CQU5LX0FERFJfV0lEVEg=::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUVNfV0lEVEg=::MQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19ETV9XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DU19XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19DU19XSURUSF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS0VfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19DS0VfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19PRFRfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19PRFRfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19BRERSX1dJRFRI::MTA=::UEFSQU1fTUVNX0xQRERSM19BRERSX1dJRFRIX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9QRVJfRFFT::OA==::UEFSQU1fTUVNX0xQRERSM19EUV9QRVJfRFFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19GT1JNQVRfRU5VTQ==::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX0xQRERSM19GT1JNQVRfRU5VTV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjE=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjFfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjI=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjJfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjM=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjEx::MA==::UEFSQU1fTUVNX0xQRERSM19NUjExX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CTA==::TFBERFIzX0JMX0JMOA==::QnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EQVRBX0xBVEVOQ1k=::TFBERFIzX0RMX1JMMTJfV0w2::RGF0YSBsYXRlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUlZfU1RS::TFBERFIzX0RSVl9TVFJfNDBEXzQwVQ==::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUU9EVA==::TFBERFIzX0RRT0RUX0RJU0FCTEU=::RFEgT0RU"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19QRE9EVA==::TFBERFIzX1BET0RUX0RJU0FCTEVE::UG93ZXIgZG93biBPRFQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XTFNFTEVDVA==::U2V0IEE=::V0wgc2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OV1I=::TFBERFIzX05XUl9OV1IxMg==::bldSIGN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1NfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19VU0VfREVGQVVMVF9PRFQ=::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMVgx::b2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMVgx::b24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMlgy::b2ZmLG9mZg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfMlgy::b2ZmLG9mZg==::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMlgy::b24sb2Zm::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfMlgy::b2ZmLG9u::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfNFg0::b2ZmLG9mZixvbixvbg==::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDJfNFg0::b24sb24sb2ZmLG9mZg==::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfNFg0::b24sb24sb24sb24=::T0RUMA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDJfNFg0::b24sb24sb24sb24=::T0RUMg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUTg==::LCw=::UmVhZCBUYXJnZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMA==::LCw=::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMQ==::LCw=::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMg==::LCw=::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMw==::LCw=::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUTg==::LCw=::V3JpdGUgVGFyZ2V0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMA==::LCw=::T0RUMCBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMQ==::LCw=::T0RUMSBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMg==::LCw=::T0RUMiBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMw==::LCw=::T0RUMyBWYWx1ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xP::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xPX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJ::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQ::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5L::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5LX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TUEVFREJJTl9FTlVN::TFBERFIzX1NQRUVEQklOXzE2MDA=::U3BlZWQgYmlu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfUFM=::NzU=::dElTQ0EgKGJhc2Up"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfQUNfTVY=::MTUw::dElTQ0EgKGJhc2UpIEFDIGxldmVs"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfUFM=::MTAw::dElIQ0EgKGJhc2Up"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfRENfTVY=::MTAw::dElIQ0EgKGJhc2UpIERDIGxldmVs"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfUFM=::NzU=::dERTIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfQUNfTVY=::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfUFM=::MTAw::dERIIChiYXNlKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfRENfTVY=::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTUV9QUw==::MTM1::dERRU1E="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUUhfQ1lD::MC4zOA==::dFFI"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETA==::NjE0::dERRU0NLREw="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTU19DWUM=::MS4yNQ==::dERRU1MgKG1heCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUVNIX0NZQw==::MC4zOA==::dFFTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNIX0NZQw==::MC4y::dERTSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xTX1BT::MTc1LjA=::dFdMUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xIX1BT::MTc1LjA=::dFdMSA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNTX0NZQw==::MC4y::dERTUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9VUw==::NTAw::dElOSVQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJSX0NLX0NZQw==::NA==::dE1SUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJXX0NLX0NZQw==::MTA=::dE1SVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX05T::NDIuNQ==::dFJBUw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX05T::MTguNzU=::dFJDRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfTlM=::MTguNzU=::dFJQcGI="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9VUw==::My45::dFJFRkk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX05T::MjEwLjA=::dFJGQ2Fi"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfTlM=::MTUuMA==::dFdS"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1RSX0NZQw==::NA==::dFdUUg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX05T::NTAuMA==::dEZBVw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlJEX0NZQw==::Mg==::dFJSRA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlRQX0NZQw==::NA==::dFJUUA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9DSw==::NDk5::UEFSQU1fTUVNX0xQRERSM19USU5JVF9DS19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfREVSVl9QUw==::Mg==::UEFSQU1fTUVNX0xQRERSM19URFFTQ0tfREVSVl9QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tEUw==::MjIw::dERRU0NLRFM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETQ==::NTEx::dERRU0NLRE0="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfUFM=::NTUwMA==::dERRU0NL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX0NZQw==::MzQ=::UEFSQU1fTUVNX0xQRERSM19UUkFTX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX0NZQw==::MTc=::UEFSQU1fTUVNX0xQRERSM19UUkNEX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfQ1lD::MTc=::UEFSQU1fTUVNX0xQRERSM19UUlBfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX0NZQw==::MTY4::UEFSQU1fTUVNX0xQRERSM19UUkZDX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfQ1lD::MTI=::UEFSQU1fTUVNX0xQRERSM19UV1JfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX0NZQw==::NDA=::UEFSQU1fTUVNX0xQRERSM19URkFXX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9DWUM=::MzEyMA==::UEFSQU1fTUVNX0xQRERSM19UUkVGSV9DWUNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkxfQ1lD::MTA=::UEFSQU1fTUVNX0xQRERSM19UUkxfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xfQ1lD::Ng==::UEFSQU1fTUVNX0xQRERSM19UV0xfQ1lDX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0NLX1NMRVdfUkFURQ==::Mi4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX1NMRVdfUkFURQ==::MS4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX1NMRVdfUkFURQ==::NS4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX0lTSV9OUw==::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX0lTSV9OUw==::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlM=::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX1NMRVdfUkFURQ==::OC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9TTEVXX1JBVEU=::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19JU0lfTlM=::MC4yMg==::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX0lTSV9OUw==::MC4yMg==::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX0lTSV9OUw==::MC4wNzg=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9JU0lfTlM=::MC4xNTU=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9JU0lfTlM=::MC4xNg==::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4xOA==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0tfU0xFV19SQVRF::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfU0xFV19SQVRF::Mi4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::Sy9LIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBRIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9RX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUSBncm91cCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9EX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRCBncm91cCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fUV9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fRF9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX1FfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUSBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0RfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRCBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19UT19LX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9NQVhfS19ERUxBWV9OUw==::MC42::TWF4aW11bSBLIGRlbGF5IHRvIGRldmljZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9LX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX1NMRVdfUkFURQ==::NC4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9TTEVXX1JBVEU=::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX0lTSV9OUw==::MC4w::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX0lTSV9OUw==::MC4w::Sy9LIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBRIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfSVNJX05T::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfSVNJX05T::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX1NMRVdfUkFURQ==::NS4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX1NMRVdfUkFURQ==::Ny4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9TTEVXX1JBVEU=::My41::UmVhZCBEUSBzbGV3IHJhdGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVM=::dHJ1ZQ==::UEFSQU1fQk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX0lTSV9WQUxVRVM=::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfSVNJX05T::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19JU0lfTlM=::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19JU0lfTlM=::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfSVNJX05T::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfSVNJX05T::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0RRU19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0FDX0RFU0tFV0VE::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0RRU19UT19DS19TS0VXX05T::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9ESU1NU19OUw==::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1RPX0NLX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9DS19ERUxBWV9OUw==::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9EUVNfREVMQVlfTlM=::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gZGV2aWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0NLX1NMRVdfUkFURQ==::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfSVNJX05T::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfSVNJX05T::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OUw==::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05T::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05TX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9FQ0NfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9FQ0NfRU5fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9NTVJfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9NTVJfRU5fTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9BVVRPX1BSRUNIQVJHRV9FTg==::ZmFsc2U=::UEFSQU1fQ1RSTF9BVVRPX1BSRUNIQVJHRV9FTl9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9VU0VSX1BSSU9SSVRZX0VO::ZmFsc2U=::UEFSQU1fQ1RSTF9VU0VSX1BSSU9SSVRZX0VOX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FERFJfT1JERVJfRU5VTQ==::RERSM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FERFJfT1JERVJfRU5VTQ==::RERSNF9DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0NfQkc=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCByZWFkLWFmdGVyLXdyaXRlIHR1cm5hcm91bmQgdGltZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9XQVJfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCB3cml0ZS1hZnRlci1yZWFkIHR1cm5hcm91bmQgdGltZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQw==::NA==::UEFSQU1fQ1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQw==::MTE=::UEFSQU1fQ1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FERFJfT1JERVJfRU5VTQ==::UkxEM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVZMX1BST1RPQ09MX0VOVU0=::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU0VMRl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0NZQ1M=::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9QUklPUklUWV9FTg==::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QUkVDSEFSR0VfRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQUREUl9PUkRFUl9FTlVN::TFBERFIzX0NUUkxfQUREUl9PUkRFUl9DU19SX0JfQw==::QWRkcmVzcyBPcmRlcmluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkVPUkRFUl9FTg==::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU1RBUlZFX0xJTUlU::MTA=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfTU1SX0VO::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fUkVHVEVTVF9NT0RF::ZmFsc2U=::U2ltdWxhdGlvbiByZWd0ZXN0IG1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19USU1JTkdfUkVHVEVTVF9NT0RF::ZmFsc2U=::VGltaW5nIHJlZ3Rlc3QgbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TWU5USF9GT1JfU0lN::ZmFsc2U=::U3ludGhlc2l6ZSBmb3Igc2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTV9PVkVSUklERQ==::RkFTVF9TSU1fT1ZFUlJJREVfREVGQVVMVA==::RmFzdCBzaW11bGF0aW9uIG92ZXJyaWRl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNF::YXZs::UEFSQU1fRElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNFX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0U=::YXZsX3JlbGVhc2U=::UEFSQU1fRElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0VfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19WRVJCT1NFX0lPQVVY::ZmFsc2U=::U2hvdyB2ZXJib3NlIElPQVVYIGRlYnVnIG1lc3NhZ2Vz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FQ0xJUFNFX0RFQlVH::ZmFsc2U=::RW5hYmxlIEVjbGlwc2UgZGVidWdnaW5n"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfVkpJ::ZmFsc2U=::RXhwb3J0IFZpcnR1YWwgSlRBRyBJbnRlcmZhY2UgKFZKSSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJU::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJUX0hFWA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBoZXhmaWxlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSFBTX0VNSUZfREVCVUc=::ZmFsc2U=::RW5hYmxlIFVBUlQgZm9yIEhQUyBFTUlGIERlYnVn"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfTU9ERQ==::U09GVF9OSU9TX01PREVfRElTQUJMRUQ=::VXNlIFNvZnQgTklPUyBQcm9jZXNzb3IgZm9yIE9uLUNoaXAgRGVidWc="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfQ0xPQ0tfRlJFUVVFTkNZ::MTAw::Q2FsaWJyYXRpb24gUHJvY2Vzc29yIEV4dGVybmFsIENsb2NrIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfUlMyMzJfVUFSVA==::ZmFsc2U=::VXNlIGFuIFJTMjMyIFVBUlQgZm9yIFNvZnQgTklPUyBDYWxpYnJhdGlvbiBQcm9jZXNzb3IgZGVidWcgb3V0cHV0IChyZXF1aXJlcyBjb2RlIGNoYW5nZSk="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19SUzIzMl9VQVJUX0JBVURSQVRF::NTc2MDA=::UlMyMzIgVUFSVCBTcGVlZA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUkVTRVRT::ZmFsc2U=::VXNlIGEgc2VwYXJhdGUgZ2xvYmFsIHJlc2V0IHNpZ25hbCBmb3IgZXZlcnkgaW50ZXJmYWNl"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPU0VfREZUX1NJR05BTFM=::ZmFsc2U=::RXhwb3NlIHRlc3QgYW5kIGRlYnVnIHNpZ25hbHM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQk9BUkRfREVMQVlfTU9ERUw=::ZmFsc2U=::VXNlIGJvYXJkIGRlbGF5IG1vZGVsIGR1cmluZyBzaW11bGF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9OVU1fQ0ZHX0lOVEVSRkFDRVM=::MA==::TnVtYmVyIG9mIFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VU::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX0xPQ0tFRA==::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX0xPQ0tFRF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "U0hPUlRfUVNZU19JTlRFUkZBQ0VfTkFNRVM=::ZmFsc2U=::VXNlIHNob3J0IFFzeXMgaW50ZXJmYWNlIG5hbWVz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFRfRE9DUw==::ZmFsc2U=::UEFSQU1fRElBR19FWFRfRE9DU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0FMX01PREVfRU5VTQ==::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9TTEFWRQ==::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9NQVNURVI=::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fTlVNX09GX1NMQVZFUw==::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fSVNTUF9FTg==::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19JTlRFUkZBQ0VfSUQ=::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FRkZJQ0lFTkNZX01PTklUT1I=::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTQ==::dHJ1ZQ==::UEFSQU1fRElBR19GQVNUX1NJTV9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfVEdfQVZMXzI=::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19JTkZJX1RHMl9FUlJfVEVTVA==::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::UEFSQU1fRElBR19VU0VfQUJTVFJBQ1RfUEhZX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19EQVRBX1BBVFRFUk5fTEVOR1RI::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19UR19CRV9QQVRURVJOX0xFTkdUSA==::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfREVGQVVMVF9QQVRURVJO::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfVVNFUl9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfUkVQRUFUX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfU1RSRVNTX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfU09GVF9NMjBL::dHJ1ZQ==::UEFSQU1fRElBR19FTkFCTEVfU09GVF9NMjBLX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RH::ZmFsc2U=::UEFSQU1fRElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RHX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRUw==::dHJ1ZQ==::UEFSQU1fRElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRU19OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbiAoZXhwZXJpbWVudGFsKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTUlDUk9OX0FQ::ZmFsc2U=::RW5hYmxlIE1pY3JvbiBBdXRvbWF0YSBDYWxpYnJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfTEVWRUw=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfREVTS0VX::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfVlJFRl9DQUw=::dHJ1ZQ==::U2tpcCBWUkVGIGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NLSVBfVlJFRl9DQUw=::ZmFsc2U=::U2tpcCBWUkVGX2luIGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX0NBTF9NT0RFX0VOVU0=::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fU0xBVkU=::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fTUFTVEVS::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX05VTV9PRl9TTEFWRVM=::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX0lTU1BfRU4=::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5URVJGQUNFX0lE::MA==::SW50ZXJmYWNlIElE"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRUZGSUNJRU5DWV9NT05JVE9S::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVVNFX1RHX0FWTF8y::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX0RFRkFVTFRfUEFUVEVSTg==::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1VTRVJfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1JFUEVBVF9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1NUUkVTU19TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5GSV9URzJfRVJSX1RFU1Q=::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfREFUQV9QQVRURVJOX0xFTkdUSA==::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfQkVfUEFUVEVSTl9MRU5HVEg=::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0VQQVJBVEVfUkVBRF9XUklURV9JVEZT::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVM=::ZmFsc2U=::UEFSQU1fRElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVNfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9MRVZFTA==::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9ERVNLRVc=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU0lN::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU0lNX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU1lOVEg=::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU1lOVEhfTkFNRQ=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVF9OQU1F"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfU0VMX0RFU0lHTg==::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NJTQ==::dHJ1ZQ==::U2ltdWxhdGlvbg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NZTlRI::dHJ1ZQ==::U3ludGhlc2lz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfSERMX0ZPUk1BVA==::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfVEFSR0VUX0RFVl9LSVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfUFJFVl9QUkVTRVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJz"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY0OTM0NzA1MjgvaGNvMTQxNjQ5MjYyOTI2Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5Nzc0NTcxNg=="
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY0OTM0NzA1MjgvbWhpMTQ0MDE2NDI1NTczMQ=="
+
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl9hcmNoX25mXzE4MF9lMzdsdDRp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_DISPLAY_NAME "RU1JRiBDb3JlIENvbXBvbmVudCBmb3IgMjBubSBGYW1pbGllcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_INTERNAL "On"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_DESCRIPTION "SW50ZWwgRXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZSBDb3JlIENvbXBvbmVudCBmb3IgMjBubSBGYW1pbGllcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX0ZBTUlMWQ==::QXJyaWEgMTA=::UEFSQU1fU1lTX0lORk9fREVWSUNFX0ZBTUlMWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNF::MTBBWDExNVMyRjQ1RTFTRw==::UEFSQU1fU1lTX0lORk9fREVWSUNFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX1NQRUVER1JBREU=::MQ==::UEFSQU1fU1lTX0lORk9fREVWSUNFX1NQRUVER1JBREVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RkFNSUxZX0VOVU0=::RkFNSUxZX0FSUklBMTA=::UEFSQU1fRkFNSUxZX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VFJBSVRfU1VQUE9SVFNfVklE::MA==::UEFSQU1fVFJBSVRfU1VQUE9SVFNfVklEX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJPVE9DT0xfRU5VTQ==::UFJPVE9DT0xfRERSNA==::UHJvdG9jb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SVNfRURfU0xBVkU=::ZmFsc2U=::UEFSQU1fSVNfRURfU0xBVkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SU5URVJOQUxfVEVTVElOR19NT0RF::ZmFsc2U=::UEFSQU1fSU5URVJOQUxfVEVTVElOR19NT0RFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWQ==::NTAwMDAwMDA=::UEFSQU1fQ0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fVU5JUVVFX0lE::aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9kZHI0X2luc3Q=::UEFSQU1fU1lTX0lORk9fVU5JUVVFX0lEX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJFVl9QUk9UT0NPTF9FTlVN::UFJPVE9DT0xfRERSNA==::UEFSQU1fUFJFVl9QUk9UT0NPTF9FTlVNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0ZQR0FfU1BFRURHUkFERV9HVUk=::RTEgKFByb2R1Y3Rpb24pIC0gY2hhbmdlIGRldmljZSB1bmRlciAnVmlldyctPidEZXZpY2UgRmFtaWx5Jw==::U3BlZWQgZ3JhZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9TUEVFREdSQURF::RTE=::UEFSQU1fUEhZX1RBUkdFVF9TUEVFREdSQURFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUw==::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzI=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzM=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19QUk9EVUNUSU9O::dHJ1ZQ==::UEFSQU1fUEhZX1RBUkdFVF9JU19QUk9EVUNUSU9OX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPTkZJR19FTlVN::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JBVEVfRU5VTQ==::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX01FTV9DTEtfRlJFUV9NSFo=::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfRlJFUV9NSFo=::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfSklUVEVSX1BT::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VOVU0=::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VYUE9TRV9TTEFWRV9PVVQ=::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0FDX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0FDX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0NLX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NLX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1Q=::dHJ1ZQ==::UEFSQU1fUEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1RfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JaUQ==::MjQw::UlpRIHJlc2lzdG9y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0hQU19FTkFCTEVfRUFSTFlfUkVMRUFTRQ==::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJfUEVSSU9ESUNfT0NUX1JFQ0FMX0VOVU0=::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0FERF9FWFRSQV9DTEtT::ZmFsc2U=::U3BlY2lmeSBhZGRpdGlvbmFsIGNvcmUgY2xvY2tzIGJhc2VkIG9uIGV4aXN0aW5nIFBMTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1VTRVJfTlVNX09GX0VYVFJBX0NMS1M=::MA==::TnVtYmVyIG9mIGFkZGl0aW9uYWwgY29yZSBjbG9ja3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzA=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzA=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8w::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzA=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8w::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzE=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzE=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8x::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzE=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzFfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8x::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzI=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzI=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8y::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzI=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8y::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzM=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzM=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8z::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzM=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8z::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzQ=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzQ=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzQ=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzRfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzU=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzU=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzU=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzY=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzY=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzY=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzZfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzc=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzc=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzc=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzdfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzg=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzg=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzg=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19DTEtfRlJFUV9NSFo=::MTIwMC4w::UEFSQU1fUExMX1ZDT19DTEtfRlJFUV9NSFpfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX05VTV9PRl9FWFRSQV9DTEtT::MA==::UEFSQU1fUExMX05VTV9PRl9FWFRSQV9DTEtTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNQ==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNg==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNw==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOA==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MTMzLjMzMw==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIw::MA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIx::OA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVT::dHJ1ZQ==::UEFSQU1fUEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfTUVNX0NMS19GUkVRX01IWg==::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19GUkVRX01IWg==::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JT19TVERfRU5VTQ==::SU9fU1REX1BPRF8xMg==::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9PVVRfTU9ERV9FTlVN::T1VUX09DVF8zNF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JTl9NT0RFX0VOVU0=::SU5fT0NUXzEyMF9DQUw=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfU1RBUlRJTkdfVlJFRklO::NjEuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::SU9fU1REX0xWRFM=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUlpRX0lPX1NURF9FTlVN::SU9fU1REX0NNT1NfMTI=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfTUVNX0NMS19GUkVRX01IWg==::NjMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfTUVNX0NMS19GUkVRX01IWg==::NTMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSU9fVk9MVEFHRQ==::MS44::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9PTkxZ::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT05GSUdfRU5VTQ==::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19NRU1fQ0xLX0ZSRVFfTUha::ODAwLjA=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX1JFRl9DTEtfRlJFUQ==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JFRl9DTEtfRlJFUV9NSFo=::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0pJVFRFUl9QUw==::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SQVRFX0VOVU0=::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FTlVN::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FWFBPU0VfU0xBVkVfT1VU::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19JT19WT0xUQUdF::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX0lP::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19IUFNfRU5BQkxFX0VBUkxZX1JFTEVBU0U=::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BFUklPRElDX09DVF9SRUNBTF9FTlVN::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfT1VUX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU5fTU9ERV9FTlVN::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FVVE9fU1RBUlRJTkdfVlJFRklOX0VO::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1NUQVJUSU5HX1ZSRUZJTg==::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BMTF9SRUZfQ0xLX0lPX1NURF9FTlVN::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JaUV9JT19TVERfRU5VTQ==::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0ZPUk1BVF9FTlVN::TUVNX0ZPUk1BVF9TT0RJTU0=::UEFSQU1fTUVNX0ZPUk1BVF9FTlVNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JFQURfTEFURU5DWQ==::MTguMA==::UEFSQU1fTUVNX1JFQURfTEFURU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1dSSVRFX0xBVEVOQ1k=::MTg=::UEFSQU1fTUVNX1dSSVRFX0xBVEVOQ1lfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0JVUlNUX0xFTkdUSA==::OA==::UEFSQU1fTUVNX0JVUlNUX0xFTkdUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0RBVEFfTUFTS19FTg==::dHJ1ZQ==::UEFSQU1fTUVNX0RBVEFfTUFTS19FTl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0hBU19TSU1fU1VQUE9SVA==::dHJ1ZQ==::UEFSQU1fTUVNX0hBU19TSU1fU1VQUE9SVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9EQVRBX0VORFBPSU5UUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9EQVRBX0VORFBPSU5UU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9EQVRBX1dJRFRI::NzI=::UEFSQU1fTUVNX1RUTF9EQVRBX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFM=::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBT::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9VRElNTQ==::TWVtb3J5IGZvcm1hdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkFOS1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk9XX0FERFJfV0lEVEg=::MTQ=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkRJTU1fQ09ORklH::MDAwMDAwMDAwMDAwMDAwMA==::RERSMyBSRElNTS9MUkRJTU0gY29udHJvbCB3b3Jkcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTFJESU1NX0VYVEVOREVEX0NPTkZJRw==::MHgwMDAwMDAwMDAwMDAwMDAwMDA=::RERSMyBMUkRJTU0gYWRkaXRpb25hbCBjb250cm9sIHdvcmRz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSM19BTEVSVF9OX1BMQUNFTUVOVF9BQ19MQU5FUw==::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFTX1dJRFRI::OA==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfQ1NfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfQ0tFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfT0RUX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfT0RUX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUl9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUNfUEFSX0VO::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQUNfUEFSX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRU19XSURUSA==::OA==::UEFSQU1fTUVNX0REUjNfVFRMX0RRU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjNfVFRMX0RRX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RNX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0RNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NTX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NTX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLRV9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLRV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX09EVF9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX09EVF9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSA==::Mw==::UEFSQU1fTUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0FERFJfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjNfVFRMX1JNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9ESU1NU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIw::MA==::UEFSQU1fTUVNX0REUjNfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIx::MA==::UEFSQU1fTUVNX0REUjNfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIy::MA==::UEFSQU1fTUVNX0REUjNfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIz::MA==::UEFSQU1fTUVNX0REUjNfTVIzX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkxfRU5VTQ==::RERSM19CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQlRfRU5VTQ==::RERSM19CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVNSX0VOVU0=::RERSM19BU1JfTUFOVUFM::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1JUX0VOVU0=::RERSM19TUlRfTk9STUFM::U2VsZi1yZWZyZXNoIHRlbXBlcmF0dXJl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUERfRU5VTQ==::RERSM19QRF9PRkY=::RExMIHByZWNoYXJnZSBwb3dlciBkb3du"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFJWX1NUUl9FTlVN::RERSM19EUlZfU1RSX1JaUV82::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX05PTV9FTlVN::RERSM19SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX1dSX0VOVU0=::RERSM19SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV1RDTA==::Ng==::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVRDTF9FTlVN::RERSM19BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVENM::Nw==::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzFYMQ==::UmFuayAw::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzFYMQ==::UmFuayAw::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVE4=::LA==::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDA=::LA==::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDE=::LA==::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDI=::LA==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDM=::LA==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVE4=::LA==::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDA=::LA==::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDE=::LA==::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDI=::LA==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDM=::LA==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9MTw==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9MT19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1BFRURCSU5fRU5VTQ==::RERSM19TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX0FDX01W::MTM1::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX1BT::NTM=::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX0FDX01W::MTM1::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX1BT::NTU=::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1FfUFM=::NzU=::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFIX0NZQw==::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX1BT::MTgw::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFTSF9DWUM=::MC40::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTSF9DWUM=::MC4xOA==::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMU19QUw==::MTI1LjA=::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMSF9QUw==::MTI1LjA=::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTU19DWUM=::MC4xOA==::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfVVM=::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVE1SRF9DS19DWUM=::NA==::dE1SRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19OUw==::MzMuMA==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9OUw==::MTMuMDk=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX05T::MTMuMDk=::dFJQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfVVM=::Ny44::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX05T::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdUUl9DWUM=::NA==::dFdUUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19OUw==::MjUuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJSRF9DWUM=::Ng==::dFJSRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJUUF9DWUM=::OA==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfQ0s=::NDk5::UEFSQU1fTUVNX0REUjNfVElOSVRfQ0tfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjNfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19DWUM=::MzY=::UEFSQU1fTUVNX0REUjNfVFJBU19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9DWUM=::MTQ=::UEFSQU1fTUVNX0REUjNfVFJDRF9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX0NZQw==::MTQ=::UEFSQU1fTUVNX0REUjNfVFJQX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19DWUM=::MTcx::UEFSQU1fTUVNX0REUjNfVFJGQ19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX0NZQw==::MTY=::UEFSQU1fTUVNX0REUjNfVFdSX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19DWUM=::Mjc=::UEFSQU1fTUVNX0REUjNfVEZBV19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfQ1lD::ODMyMA==::UEFSQU1fTUVNX0REUjNfVFJFRklfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9TQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9EQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9TT0RJTU0=::TWVtb3J5IGZvcm1hdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0hJUF9JRF9XSURUSA==::MA==::Q2hpcCBJRCB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkFOS1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tfV0lEVEg=::Mg==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk9XX0FERFJfV0lEVEg=::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19BRERSX1dJRFRI::Mg==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19HUk9VUF9XSURUSA==::Mg==::QmFuayBncm91cCB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRE1fRU4=::dHJ1ZQ==::RGF0YSBtYXNr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfUEFSX0VO::dHJ1ZQ==::RW5hYmxlIEFMRVJUIy9QQVIgcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSNF9BTEVSVF9OX1BMQUNFTUVOVF9EQVRBX0xBTkVT::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19MQU5F::MA==::QWRkcmVzcy9jb21tYW5kIEkvTyBsYW5lIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19QSU4=::MA==::UGluIGluZGV4IG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkxfRU5VTQ==::RERSNF9CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQlRfRU5VTQ==::RERSNF9CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENM::MTg=::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX05PTV9FTlVN::RERSNF9SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVRDTF9FTlVN::RERSNF9BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFJWX1NUUl9FTlVN::RERSNF9EUlZfU1RSX1JaUV83::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVNSX0VOVU0=::RERSNF9BU1JfTUFOVUFMX05PUk1BTA==::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1dSX0VOVU0=::RERSNF9SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1RDTA==::MTg=::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ1JD::ZmFsc2U=::V3JpdGUgQ1JDIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfR0VBUkRPV04=::RERSNF9HRUFSRE9XTl9IUg==::RERSNCBnZWFyZG93biBtb2Rl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUEVSX0RSQU1fQUREUg==::ZmFsc2U=::UGVyLURSQU0gYWRkcmVzc2FiaWxpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9TRU5TT1JfUkVBRE9VVA==::ZmFsc2U=::VGVtcGVyYXR1cmUgc2Vuc29yIHJlYWRvdXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRklORV9HUkFOVUxBUklUWV9SRUZSRVNI::RERSNF9GSU5FX1JFRlJFU0hfRklYRURfMVg=::RmluZSBncmFudWxhcml0eSByZWZyZXNo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVBSX1JFQURfRk9STUFU::RERSNF9NUFJfUkVBRF9GT1JNQVRfU0VSSUFM::TVBSIHJlYWQgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUFYX1BPV0VSRE9XTg==::ZmFsc2U=::TWF4aW11bSBwb3dlciBkb3duIG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfUkFOR0U=::RERSNF9URU1QX0NPTlRST0xMRURfUkZTSF9OT1JNQUw=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfRU5B::ZmFsc2U=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSU5URVJOQUxfVlJFRkRRX01PTklUT1I=::ZmFsc2U=::SW50ZXJuYWwgVnJlZkRRIG1vbml0b3I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0FMX01PREU=::MA==::Q1MgdG8gQWRkci9DTUQgTGF0ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VMRl9SRlNIX0FCT1JU::ZmFsc2U=::U2VsZiByZWZyZXNoIGFib3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRV9UUkFJTklORw==::ZmFsc2U=::UmVhZCBwcmVhbWJsZSB0cmFpbmluZyBtb2RlIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRQ==::MQ==::UmVhZCBwcmVhbWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfUFJFQU1CTEU=::MQ==::V3JpdGUgcHJlYW1ibGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEFSSVRZX0xBVEVOQ1k=::RERSNF9BQ19QQVJJVFlfTEFURU5DWV9ESVNBQkxF::QWRkci9DTUQgcGFyaXR5IGxhdGVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX0lOX1BPV0VSRE9XTg==::dHJ1ZQ==::T0RUIGlucHV0IGJ1ZmZlciBkdXJpbmcgcG93ZXJkb3duIG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1BBUks=::RERSNF9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::UlRUIFBBUks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEVSU0lTVEVOVF9FUlJPUg==::ZmFsc2U=::QWRkci9DTUQgcGVyc2lzdGVudCBlcnJvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfREJJ::ZmFsc2U=::V3JpdGUgREJJ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9EQkk=::ZmFsc2U=::UmVhZCBEQkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREVGQVVMVF9WUkVGT1VU::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZkRRIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfVkFMVUU=::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfUkFOR0U=::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NBX0lCVF9FTlVN::RERSNF9SQ0RfQ0FfSUJUXzEwMA==::UkNEIENBIElucHV0IEJ1cyBUZXJtaW5hdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NTX0lCVF9FTlVN::RERSNF9SQ0RfQ1NfSUJUXzEwMA==::UkNEIERDU1szOjBdX24gSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NLRV9JQlRfRU5VTQ==::RERSNF9SQ0RfQ0tFX0lCVF8xMDA=::UkNEIERDS0UgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX09EVF9JQlRfRU5VTQ==::RERSNF9SQ0RfT0RUX0lCVF8xMDA=::UkNEIERPRFQgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX05PTV9FTlVN::RERSNF9EQl9SVFRfTk9NX09EVF9ESVNBQkxFRA==::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX05PTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1dSX0VOVU0=::RERSNF9EQl9SVFRfV1JfUlpRXzM=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1dS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1BBUktfRU5VTQ==::RERSNF9EQl9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1BBUks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfRFFfRFJWX0VOVU0=::RERSNF9EQl9EUlZfU1RSX1JaUV83::REIgSG9zdCBJbnRlcmZhY2UgRFEgRHJpdmVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzN19SQ0RfQ0FfRFJW::MTAx::U1BEIEJ5dGUgMTM3IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDb21tYW5kL0FkZHJlc3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOF9SQ0RfQ0tfRFJW::NQ==::U1BEIEJ5dGUgMTM4IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MF9EUkFNX1ZSRUZEUV9SMA==::Mjk=::U1BEIEJ5dGUgMTQwIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MV9EUkFNX1ZSRUZEUV9SMQ==::Mjk=::U1BEIEJ5dGUgMTQxIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0Ml9EUkFNX1ZSRUZEUV9SMg==::Mjk=::U1BEIEJ5dGUgMTQyIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0M19EUkFNX1ZSRUZEUV9SMw==::Mjk=::U1BEIEJ5dGUgMTQzIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NF9EQl9WUkVGRFE=::Mzc=::U1BEIEJ5dGUgMTQ0IC0gREIgVnJlZkRRIGZvciBEUkFNIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NV9EQl9NRFFfRFJW::MjE=::U1BEIEJ5dGUgMTQ1LTE0NyAtIERCIE1EUSBEcml2ZSBTdHJlbmd0aCBhbmQgUlRU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OF9EUkFNX0RSVg==::MA==::U1BEIEJ5dGUgMTQ4IC0gRFJBTSBEcml2ZSBTdHJlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OV9EUkFNX1JUVF9XUl9OT00=::MjA=::U1BEIEJ5dGUgMTQ5LTE1MSAtIERSQU0gT0RUIChSVFRfV1IgYW5kIFJUVF9OT00p"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE1Ml9EUkFNX1JUVF9QQVJL::Mzk=::U1BEIEJ5dGUgMTUyLTE1NCAtIERSQU0gT0RUIChSVFRfUEFSSyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzM19SQ0RfREJfVkVORE9SX0xTQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKExTQik="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNF9SQ0RfREJfVkVORE9SX01TQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKE1TQik="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNV9SQ0RfUkVW::MA==::UkNEIFJldmlzaW9uIE51bWJlcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOV9EQl9SRVY=::MA==::REIgUmV2aXNpb24gTnVtYmVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JT::dHJ1ZQ==::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hN::MjQw::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFTX1dJRFRI::OQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfQ1NfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfQ0tFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfT0RUX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUl9XSURUSA==::MTc=::UEFSQU1fTUVNX0REUjRfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1M=::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSURFQUxfVlJFRl9JTl9QQ1Q=::NjEuMA==::UEFSQU1fTUVNX0REUjRfSURFQUxfVlJFRl9JTl9QQ1RfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSURFQUxfVlJFRl9PVVRfUENU::NTAuMA==::UEFSQU1fTUVNX0REUjRfSURFQUxfVlJFRl9PVVRfUENUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1ZBTFVF::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdF::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdFX0RJU1A=::UmFuZ2UgMiAtIDQ1JSB0byA3Ny41JQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRU19XSURUSA==::OQ==::UEFSQU1fTUVNX0REUjRfVFRMX0RRU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjRfVFRMX0RRX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NTX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NTX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLRV9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLRV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX09EVF9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX09EVF9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEg=::MA==::UEFSQU1fTUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0FERFJfV0lEVEg=::MTc=::UEFSQU1fTUVNX0REUjRfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjRfVFRMX1JNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9ESU1NU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIw::MjExMg==::UEFSQU1fTUVNX0REUjRfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIx::NjU1Mzc=::UEFSQU1fTUVNX0REUjRfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIy::MTMxMTIw::UEFSQU1fTUVNX0REUjRfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIz::MTk3MTIw::UEFSQU1fTUVNX0REUjRfTVIzX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI0::MjYyMTQ0::UEFSQU1fTUVNX0REUjRfTVI0X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI1::MzI4NzM2::UEFSQU1fTUVNX0REUjRfTVI1X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI2::Mzk0MzI3::UEFSQU1fTUVNX0REUjRfTVI2X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkQ=::MTM=::UEFSQU1fTUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkRfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWQ==::MQ==::UEFSQU1fTUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzFYMQ==::UmFuayAw::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzFYMQ==::UmFuayAw::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzJYMg==::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzRYMg==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFROXzRYNA==::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDA=::KERyaXZlKSBSWlEvNyAoMzQgT2htKSxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChEcml2ZSkgUlpRLzcgKDM0IE9obSksLSwt::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDA=::KFBhcmspIFBhcmsgT0RUIG9mZixPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChQYXJrKSBQYXJrIE9EVCBvZmYsLSwt::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9MTw==::NDE5NDMwOA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9MT19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BFRURCSU5fRU5VTQ==::RERSNF9TUEVFREJJTl8yNDAw::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX0FDX01W::MTAw::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX0RDX01W::NzU=::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfVE9UQUxfVUk=::MC4y::VGRpVldfdG90YWw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVkRJVldfVE9UQUw=::MTM2::VmRpVldfdG90YWw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfVUk=::MC4xNg==::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX1VJ::MC43Ng==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERWV1BfVUk=::MC43Mg==::dERWV3A="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX1BT::MTgw::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFTSF9DWUM=::MC4zOA==::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTSF9DWUM=::MC4xOA==::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTU19DWUM=::MC4xOA==::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19DWUM=::MC4xMw==::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9DWUM=::MC4xMw==::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfVVM=::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVE1SRF9DS19DWUM=::OA==::dE1SRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19OUw==::MzMuMA==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9OUw==::MTQuMDY=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX05T::MTQuMDY=::dFJQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfVVM=::Ny44::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX05T::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9MX0NZQw==::NA==::dFdUUl9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9TX0NZQw==::Mg==::dFdUUl9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19OUw==::MjUuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9MX0NZQw==::NQ==::dFJSRF9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9TX0NZQw==::NA==::dFJSRF9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9MX0NZQw==::NQ==::dENDRF9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9TX0NZQw==::NA==::dENDRF9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfTlM=::OTAuMA==::dFJGQ19kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19ETFJfQ1lD::MTY=::dEZBV19kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9ETFJfQ1lD::NA==::dFJSRF9kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfREpfQ1lD::MC4x::UEFSQU1fTUVNX0REUjRfVERJVldfREpfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfUFM=::NjY=::UEFSQU1fTUVNX0REUjRfVERRU1FfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX0NZQw==::MC4zOA==::UEFSQU1fTUVNX0REUjRfVFFIX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfQ0s=::NjAwMDAw::UEFSQU1fTUVNX0REUjRfVElOSVRfQ0tfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjRfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19DWUM=::NDA=::UEFSQU1fTUVNX0REUjRfVFJBU19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9DWUM=::MTc=::UEFSQU1fTUVNX0REUjRfVFJDRF9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX0NZQw==::MTc=::UEFSQU1fTUVNX0REUjRfVFJQX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19DWUM=::MTky::UEFSQU1fTUVNX0REUjRfVFJGQ19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX0NZQw==::MTg=::UEFSQU1fTUVNX0REUjRfVFdSX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJUUF9DWUM=::OQ==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19DWUM=::MzA=::UEFSQU1fTUVNX0REUjRfVEZBV19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfQ1lD::OTM2MA==::UEFSQU1fTUVNX0REUjRfVFJFRklfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ01EX0xBVEVOQ1k=::NQ==::V3JpdGUgQ01EIGxhdGVuY3kgZm9yIENSQy9ETSBlbmFibGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfQ1lD::MTA4::UEFSQU1fTUVNX0REUjRfVFJGQ19ETFJfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9TQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9EQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRQ==::MUQ=::UEFSQU1fTUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19QUw==::MC4w::UEFSQU1fTUVNX0REUjRfVFdMU19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9QUw==::MC4w::UEFSQU1fTUVNX0REUjRfVFdMSF9QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9QRVJfREVWSUNF::MzY=::RGF0YSB3aWR0aCBwZXIgZGV2aWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQUREUl9XSURUSA==::MTk=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX0VO::dHJ1ZQ==::RW5hYmxlIEJXUyMgcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjJfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjJfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9XSURUSA==::MzY=::RGF0YSB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fV0lEVEg=::NA==::QldTIyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fUEVSX0RFVklDRQ==::NA==::UEFSQU1fTUVNX1FEUjJfQldTX05fUEVSX0RFVklDRV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQ1FfV0lEVEg=::MQ==::Q1Egd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfS19XSURUSA==::MQ==::SyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFdMX0NZQw==::MQ==::dFdM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfU1BFRURCSU5fRU5VTQ==::UURSMl9TUEVFREJJTl82MzM=::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFJMX0NZQw==::Mi41::dFJM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNBX05T::MC4yMw==::dFNB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhBX05T::MC4xOA==::dEhB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNEX05T::MC4yMw==::dFNE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhEX05T::MC4xOA==::dEhE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRF9OUw==::MC4wOQ==::dENRRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRE9IX05T::LTAuMDk=::dENRRE9I"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfSU5URVJOQUxfSklUVEVSX05T::MC4wOA==::SW50ZXJuYWwgSml0dGVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRSF9OUw==::MC43MQ==::dENRSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENDUU9fTlM=::MC40NQ==::dENDUU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU0tJUF9PRFRfU1dFRVBJTkc=::dHJ1ZQ==::U2tpcCBhdXRvbWF0aWMgb3B0aW1pemF0aW9uIG9mIENsb2NrIGFuZCBBZGRyZXNzL0NvbW1hbmQgT0RUIHNldHRpbmcgZHVyaW5nIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ0tfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChDbG9jayk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUNfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChBZGRyZXNzL0NvbW1hbmQp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9PRFRfTU9ERV9FTlVN::UURSNF9PRFRfMjVfUENU::T0RUIChEYXRhKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUFVfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLXVwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUERfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLWRvd24p"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfTUVNX1RZUEVfRU5VTQ==::TUVNX1hQ::TWVtb3J5IFR5cGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9JTlZfRU5B::ZmFsc2U=::RGF0YSBidXMgaW52ZXJzaW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9JTlZfRU5B::ZmFsc2U=::QWRkcmVzcyBidXMgaW52ZXJzaW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjRfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfV0lEVEg=::NzI=::UEFSQU1fTUVNX1FEUjRfRFFfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfUUtfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfREtfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9XSURUSA==::NA==::UEFSQU1fTUVNX1FEUjRfRElOVl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVVNFX0FERFJfUEFSSVRZ::ZmFsc2U=::VXNlIGFkZHJlc3MgcGFyaXR5IGJpdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfV0lEVEg=::MzY=::RFFBIC8gRFFCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfUEVSX1BPUlRfV0lEVEg=::Mg==::UUtBIC8gUUtCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfUEVSX1BPUlRfV0lEVEg=::Mg==::REtBIC8gREtCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9QRVJfUE9SVF9XSURUSA==::Mg==::RElOVkEgLyBESU5WQiB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQkw=::Mg==::UEFSQU1fTUVNX1FEUjRfQkxfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFJMX0NZQw==::OA==::TWVtb3J5IFJlYWQgbGF0ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFdMX0NZQw==::NQ==::TWVtb3J5IFdyaXRlIGxhdGVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQVZMX0NITkxT::OA==::UEFSQU1fTUVNX1FEUjRfQVZMX0NITkxTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iw::MA==::UEFSQU1fTUVNX1FEUjRfQ1IwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Ix::MA==::UEFSQU1fTUVNX1FEUjRfQ1IxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iy::MA==::UEFSQU1fTUVNX1FEUjRfQ1IyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU1BFRURCSU5fRU5VTQ==::UURSNF9TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVElTSF9QUw==::MTUw::dElTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFIX0NZQw==::MC40::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUFYX1BT::MTUw::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUlOX1BT::LTE1MA==::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLUUtfTUFYX1BT::MjI1::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVEFTSF9QUw==::MTcw::dEFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENTSF9QUw==::MTcw::dENTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX0RFVklDRQ==::OQ==::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ09ORklHX0VOVU0=::UkxEMl9DT05GSUdfVFJDXzhfVFJMXzhfVFdMXzk=::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFJJVkVfSU1QRURFTkNFX0VOVU0=::UkxEMl9EUklWRV9JTVBFREVOQ0VfSU5URVJOQUxfNTA=::RHJpdmUgSW1wZWRhbmNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfT0RUX01PREVfRU5VTQ==::UkxEMl9PRFRfT04=::T24tRGllIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDJfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfV0lEVEg=::OQ==::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUUtfV0lEVEg=::MQ==::UUsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREtfV0lEVEg=::MQ==::REsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX1JMRDJfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJD::OA==::UEFSQU1fTUVNX1JMRDJfVFJDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJM::OA==::UEFSQU1fTUVNX1JMRDJfVFJMX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFdM::OQ==::UEFSQU1fTUVNX1JMRDJfVFdMX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfTVI=::MA==::UEFSQU1fTUVNX1JMRDJfTVJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfU1BFRURCSU5fRU5VTQ==::UkxEMl9TUEVFREJJTl8xOA==::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUkVGUkVTSF9JTlRFUlZBTF9VUw==::MC4yNA==::UmVmcmVzaCBJbnRlcnZhbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLSF9DWUM=::MC40NQ==::dENLSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLSF9IQ1lD::MC45::dFFLSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFTX05T::MC4z::dEFT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFIX05T::MC4z::dEFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERTX05T::MC4xNw==::dERT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERIX05T::MC4xNw==::dERI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NQVhfTlM=::MC4xMg==::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NSU5fTlM=::LTAuMTI=::dFFLUV9taW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUFYX05T::MC4z::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUlOX05T::LTAuMw==::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLUUtfTUFYX05T::MC4y::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVQVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIGRlcHRoIGV4cGFuc2lvbiB1c2luZyB0d2luIGRpZSBwYWNrYWdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQUREUl9XSURUSA==::MjA=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkFOS19BRERSX1dJRFRI::NA==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkw=::Mg==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREFUQV9MQVRFTkNZX01PREVfRU5VTQ==::UkxEM19ETF9STDE2X1dMMTc=::RGF0YSBMYXRlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVF9SQ19NT0RFX0VOVU0=::UkxEM19UUkNfOQ==::dFJD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UkxEM19PVVRQVVRfRFJJVkVfNDA=::T3V0cHV0IGRyaXZl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT0RUX01PREVfRU5VTQ==::UkxEM19PRFRfNDA=::T0RU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQVJFRl9QUk9UT0NPTF9FTlVN::UkxEM19BUkVGX0JBQw==::QVJFRiBwcm90b2NvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV1JJVEVfUFJPVE9DT0xfRU5VTQ==::UkxEM19XUklURV8xQkFOSw==::V3JpdGUgcHJvdG9jb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDNfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfV0lEVEg=::MzY=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfUUtfV0lEVEg=::NA==::UUsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREtfV0lEVEg=::Mg==::REsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fV0lEVEg=::Mg==::UEFSQU1fTUVNX1JMRDNfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIw::MA==::UEFSQU1fTUVNX1JMRDNfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIx::MA==::UEFSQU1fTUVNX1JMRDNfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIy::MA==::UEFSQU1fTUVNX1JMRDNfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfU1BFRURCSU5fRU5VTQ==::UkxEM19TUEVFREJJTl8wOTNF::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX1BT::LTMw::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX0FDX01W::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX1BT::NQ==::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFIX0NZQw==::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUFYX0NZQw==::MC4yNw==::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUlOX0NZQw==::LTAuMjc=::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLUUtfTUFYX1BT::MTM1::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX1BT::ODU=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX0FDX01W::MTUw::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX1BT::NjU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9XSURUSA==::MzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ESVNDUkVURV9DU19XSURUSA==::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS19XSURUSA==::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9FTg==::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ST1dfQUREUl9XSURUSA==::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DT0xfQUREUl9XSURUSA==::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CQU5LX0FERFJfV0lEVEg=::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUVNfV0lEVEg=::MQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19ETV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DU19XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19DU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS0VfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19DS0VfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19PRFRfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19PRFRfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19BRERSX1dJRFRI::MTA=::UEFSQU1fTUVNX0xQRERSM19BRERSX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9QRVJfRFFT::OA==::UEFSQU1fTUVNX0xQRERSM19EUV9QRVJfRFFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19GT1JNQVRfRU5VTQ==::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX0xQRERSM19GT1JNQVRfRU5VTV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjE=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjFfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjI=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjM=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjEx::MA==::UEFSQU1fTUVNX0xQRERSM19NUjExX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CTA==::TFBERFIzX0JMX0JMOA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EQVRBX0xBVEVOQ1k=::TFBERFIzX0RMX1JMMTJfV0w2::RGF0YSBsYXRlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUlZfU1RS::TFBERFIzX0RSVl9TVFJfNDBEXzQwVQ==::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUU9EVA==::TFBERFIzX0RRT0RUX0RJU0FCTEU=::RFEgT0RU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19QRE9EVA==::TFBERFIzX1BET0RUX0RJU0FCTEVE::UG93ZXIgZG93biBPRFQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XTFNFTEVDVA==::U2V0IEE=::V0wgc2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OV1I=::TFBERFIzX05XUl9OV1IxMg==::bldSIGN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19VU0VfREVGQVVMVF9PRFQ=::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fMVgx::UmFuayAw::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMVgx::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fMVgx::UmFuayAw::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMVgx::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fMlgy::UmFuayAwLFJhbmsgMQ==::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMlgy::b2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfMlgy::b2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fMlgy::UmFuayAwLFJhbmsgMQ==::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMlgy::b24sb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfMlgy::b2ZmLG9u::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVE5fNFg0::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfNFg0::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDJfNFg0::b24sb24sb2ZmLG9mZg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVE5fNFg0::UmFuayAwLFJhbmsgMSxSYW5rIDIsUmFuayAz::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfNFg0::b24sb24sb24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDJfNFg0::b24sb24sb24sb24=::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUTg==::LA==::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMA==::LA==::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMQ==::LA==::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMg==::LA==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMw==::LA==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUTg==::LA==::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMA==::LA==::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMQ==::LA==::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMg==::LA==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMw==::LA==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xP::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xPX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJ::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQ::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5L::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5LX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TUEVFREJJTl9FTlVN::TFBERFIzX1NQRUVEQklOXzE2MDA=::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfUFM=::NzU=::dElTQ0EgKGJhc2Up"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfQUNfTVY=::MTUw::dElTQ0EgKGJhc2UpIEFDIGxldmVs"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfUFM=::MTAw::dElIQ0EgKGJhc2Up"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfRENfTVY=::MTAw::dElIQ0EgKGJhc2UpIERDIGxldmVs"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfUFM=::NzU=::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfQUNfTVY=::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfUFM=::MTAw::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfRENfTVY=::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTUV9QUw==::MTM1::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUUhfQ1lD::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETA==::NjE0::dERRU0NLREw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTU19DWUM=::MS4yNQ==::dERRU1MgKG1heCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUVNIX0NZQw==::MC4zOA==::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNIX0NZQw==::MC4y::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xTX1BT::MTc1LjA=::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xIX1BT::MTc1LjA=::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNTX0NZQw==::MC4y::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9VUw==::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJSX0NLX0NZQw==::NA==::dE1SUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJXX0NLX0NZQw==::MTA=::dE1SVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX05T::NDIuNQ==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX05T::MTguNzU=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfTlM=::MTguNzU=::dFJQcGI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9VUw==::My45::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX05T::MjEwLjA=::dFJGQ2Fi"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfTlM=::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1RSX0NZQw==::NA==::dFdUUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX05T::NTAuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlJEX0NZQw==::Mg==::dFJSRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlRQX0NZQw==::NA==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9DSw==::NDk5::UEFSQU1fTUVNX0xQRERSM19USU5JVF9DS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfREVSVl9QUw==::Mg==::UEFSQU1fTUVNX0xQRERSM19URFFTQ0tfREVSVl9QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tEUw==::MjIw::dERRU0NLRFM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETQ==::NTEx::dERRU0NLRE0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfUFM=::NTUwMA==::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX0NZQw==::MzQ=::UEFSQU1fTUVNX0xQRERSM19UUkFTX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX0NZQw==::MTc=::UEFSQU1fTUVNX0xQRERSM19UUkNEX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfQ1lD::MTc=::UEFSQU1fTUVNX0xQRERSM19UUlBfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX0NZQw==::MTY4::UEFSQU1fTUVNX0xQRERSM19UUkZDX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfQ1lD::MTI=::UEFSQU1fTUVNX0xQRERSM19UV1JfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX0NZQw==::NDA=::UEFSQU1fTUVNX0xQRERSM19URkFXX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9DWUM=::MzEyMA==::UEFSQU1fTUVNX0xQRERSM19UUkVGSV9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkxfQ1lD::MTA=::UEFSQU1fTUVNX0xQRERSM19UUkxfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xfQ1lD::Ng==::UEFSQU1fTUVNX0xQRERSM19UV0xfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0NLX1NMRVdfUkFURQ==::Mi4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX1NMRVdfUkFURQ==::MS4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX1NMRVdfUkFURQ==::NS4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX0lTSV9OUw==::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX0lTSV9OUw==::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlM=::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX1NMRVdfUkFURQ==::OC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9TTEVXX1JBVEU=::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19JU0lfTlM=::MC4yMg==::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX0lTSV9OUw==::MC4yMg==::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX0lTSV9OUw==::MC4wNzg=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9JU0lfTlM=::MC4xNTU=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9JU0lfTlM=::MC4xNg==::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4xOA==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0tfU0xFV19SQVRF::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfU0xFV19SQVRF::Mi4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::Sy9LIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBRIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9RX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUSBncm91cCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9EX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRCBncm91cCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fUV9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fRF9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX1FfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUSBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0RfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRCBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19UT19LX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9NQVhfS19ERUxBWV9OUw==::MC42::TWF4aW11bSBLIGRlbGF5IHRvIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9LX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX1NMRVdfUkFURQ==::NC4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9TTEVXX1JBVEU=::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX0lTSV9OUw==::MC4w::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX0lTSV9OUw==::MC4w::Sy9LIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBRIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfSVNJX05T::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfSVNJX05T::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX1NMRVdfUkFURQ==::NS4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX1NMRVdfUkFURQ==::Ny4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9TTEVXX1JBVEU=::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVM=::dHJ1ZQ==::UEFSQU1fQk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX0lTSV9WQUxVRVM=::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfSVNJX05T::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19JU0lfTlM=::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19JU0lfTlM=::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfSVNJX05T::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfSVNJX05T::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0RRU19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0FDX0RFU0tFV0VE::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0RRU19UT19DS19TS0VXX05T::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9ESU1NU19OUw==::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1RPX0NLX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9DS19ERUxBWV9OUw==::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9EUVNfREVMQVlfTlM=::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gZGV2aWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0NLX1NMRVdfUkFURQ==::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfSVNJX05T::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfSVNJX05T::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OUw==::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05T::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9FQ0NfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9FQ0NfRU5fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9NTVJfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9NTVJfRU5fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9BVVRPX1BSRUNIQVJHRV9FTg==::ZmFsc2U=::UEFSQU1fQ1RSTF9BVVRPX1BSRUNIQVJHRV9FTl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9VU0VSX1BSSU9SSVRZX0VO::ZmFsc2U=::UEFSQU1fQ1RSTF9VU0VSX1BSSU9SSVRZX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9SRU9SREVSX0VO::dHJ1ZQ==::UEFSQU1fQ1RSTF9SRU9SREVSX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FERFJfT1JERVJfRU5VTQ==::RERSM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbiB0byBFeHRlcm5hbCBNZW1vcnk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FERFJfT1JERVJfRU5VTQ==::RERSNF9DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0NfQkc=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbiB0byBFeHRlcm5hbCBNZW1vcnk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCByZWFkLWFmdGVyLXdyaXRlIHR1cm5hcm91bmQgdGltZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9XQVJfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCB3cml0ZS1hZnRlci1yZWFkIHR1cm5hcm91bmQgdGltZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0RFRl9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::NA==::UEFSQU1fQ1RSTF9RRFI0X0RFRl9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQw==::NA==::UEFSQU1fQ1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQw==::MTE=::UEFSQU1fQ1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FERFJfT1JERVJfRU5VTQ==::UkxEM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVZMX1BST1RPQ09MX0VOVU0=::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU0VMRl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0NZQ1M=::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9QUklPUklUWV9FTg==::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QUkVDSEFSR0VfRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQUREUl9PUkRFUl9FTlVN::TFBERFIzX0NUUkxfQUREUl9PUkRFUl9DU19SX0JfQw==::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkVPUkRFUl9FTg==::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU1RBUlZFX0xJTUlU::MTA=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfTU1SX0VO::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fUkVHVEVTVF9NT0RF::ZmFsc2U=::U2ltdWxhdGlvbiByZWd0ZXN0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19USU1JTkdfUkVHVEVTVF9NT0RF::ZmFsc2U=::VGltaW5nIHJlZ3Rlc3QgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TWU5USF9GT1JfU0lN::ZmFsc2U=::U3ludGhlc2l6ZSBmb3Igc2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTV9PVkVSUklERQ==::RkFTVF9TSU1fT1ZFUlJJREVfREVGQVVMVA==::RmFzdCBzaW11bGF0aW9uIG92ZXJyaWRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNF::YXZs::UEFSQU1fRElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0U=::YXZsX3JlbGVhc2U=::UEFSQU1fRElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0VfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19WRVJCT1NFX0lPQVVY::ZmFsc2U=::U2hvdyB2ZXJib3NlIElPQVVYIGRlYnVnIG1lc3NhZ2Vz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FQ0xJUFNFX0RFQlVH::ZmFsc2U=::RW5hYmxlIEVjbGlwc2UgZGVidWdnaW5n"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfVkpJ::ZmFsc2U=::RXhwb3J0IFZpcnR1YWwgSlRBRyBJbnRlcmZhY2UgKFZKSSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJU::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJUX0hFWA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBoZXhmaWxlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSFBTX0VNSUZfREVCVUc=::ZmFsc2U=::RW5hYmxlIFVBUlQgZm9yIEhQUyBFTUlGIERlYnVn"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfTU9ERQ==::U09GVF9OSU9TX01PREVfRElTQUJMRUQ=::VXNlIFNvZnQgTklPUyBQcm9jZXNzb3IgZm9yIE9uLUNoaXAgRGVidWc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfQ0xPQ0tfRlJFUVVFTkNZ::MTAw::Q2FsaWJyYXRpb24gUHJvY2Vzc29yIEV4dGVybmFsIENsb2NrIEZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfUlMyMzJfVUFSVA==::ZmFsc2U=::VXNlIGFuIFJTMjMyIFVBUlQgZm9yIFNvZnQgTklPUyBDYWxpYnJhdGlvbiBQcm9jZXNzb3IgZGVidWcgb3V0cHV0IChyZXF1aXJlcyBjb2RlIGNoYW5nZSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19SUzIzMl9VQVJUX0JBVURSQVRF::NTc2MDA=::UlMyMzIgVUFSVCBTcGVlZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUkVTRVRT::ZmFsc2U=::VXNlIGEgc2VwYXJhdGUgZ2xvYmFsIHJlc2V0IHNpZ25hbCBmb3IgZXZlcnkgaW50ZXJmYWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPU0VfREZUX1NJR05BTFM=::ZmFsc2U=::RXhwb3NlIHRlc3QgYW5kIGRlYnVnIHNpZ25hbHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQk9BUkRfREVMQVlfTU9ERUw=::ZmFsc2U=::VXNlIGJvYXJkIGRlbGF5IG1vZGVsIGR1cmluZyBzaW11bGF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9FWFBPUlRfQ0ZHX0lOVEVSRkFDRQ==::ZmFsc2U=::RXhwb3J0IFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9OVU1fQ0ZHX0lOVEVSRkFDRVM=::MA==::TnVtYmVyIG9mIFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VU::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX0xPQ0tFRA==::ZmFsc2U=::RXhwb3J0IFBMTCBsb2NrIHNpZ25hbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ITUNfSFJD::YXV0bw==::UEFSQU1fRElBR19ITUNfSFJDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0hPUlRfUVNZU19JTlRFUkZBQ0VfTkFNRVM=::ZmFsc2U=::VXNlIHNob3J0IFFzeXMgaW50ZXJmYWNlIG5hbWVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFRfRE9DUw==::ZmFsc2U=::UEFSQU1fRElBR19FWFRfRE9DU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0FMX01PREVfRU5VTQ==::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9TTEFWRQ==::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9NQVNURVI=::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9IRUFEX09GX0NIQUlO::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fTlVNX09GX1NMQVZFUw==::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fSVNTUF9FTg==::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19JTlRFUkZBQ0VfSUQ=::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FRkZJQ0lFTkNZX01PTklUT1I=::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fVkVSQk9TRV9MRVZFTA==::NQ==::UEFSQU1fRElBR19TSU1fVkVSQk9TRV9MRVZFTF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTQ==::dHJ1ZQ==::UEFSQU1fRElBR19GQVNUX1NJTV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfVEdfQVZMXzI=::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19JTkZJX1RHMl9FUlJfVEVTVA==::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::UEFSQU1fRElBR19VU0VfQUJTVFJBQ1RfUEhZX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19EQVRBX1BBVFRFUk5fTEVOR1RI::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19CRV9QQVRURVJOX0xFTkdUSA==::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfREVGQVVMVF9QQVRURVJO::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfVVNFUl9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfUkVQRUFUX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfU1RSRVNTX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfU09GVF9NMjBL::dHJ1ZQ==::UEFSQU1fRElBR19FTkFCTEVfU09GVF9NMjBLX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RH::ZmFsc2U=::UEFSQU1fRElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RHX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRUw==::dHJ1ZQ==::UEFSQU1fRElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0RFU0tFV19FTg==::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBkZXNrZXcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTUlDUk9OX0FQ::ZmFsc2U=::RW5hYmxlIE1pY3JvbiBBdXRvbWF0YSBDYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfTEVWRUw=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfREVTS0VX::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfVlJFRl9DQUw=::dHJ1ZQ==::U2tpcCBWUkVGIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NLSVBfVlJFRl9DQUw=::ZmFsc2U=::U2tpcCBWUkVGX2luIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0NBX0RFU0tFV19FTg==::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBkZXNrZXcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX0NBTF9NT0RFX0VOVU0=::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fU0xBVkU=::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fTUFTVEVS::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fSEVBRF9PRl9DSEFJTg==::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX05VTV9PRl9TTEFWRVM=::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX0lTU1BfRU4=::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5URVJGQUNFX0lE::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRUZGSUNJRU5DWV9NT05JVE9S::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX1ZFUkJPU0U=::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVVNFX1RHX0FWTF8y::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX0RFRkFVTFRfUEFUVEVSTg==::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1VTRVJfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1JFUEVBVF9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1NUUkVTU19TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5GSV9URzJfRVJSX1RFU1Q=::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfREFUQV9QQVRURVJOX0xFTkdUSA==::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfQkVfUEFUVEVSTl9MRU5HVEg=::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0VQQVJBVEVfUkVBRF9XUklURV9JVEZT::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVM=::ZmFsc2U=::UEFSQU1fRElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9MRVZFTA==::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9ERVNLRVc=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU0lN::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU0lNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU1lOVEg=::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU1lOVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfU0VMX0RFU0lHTg==::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NJTQ==::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NZTlRI::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfSERMX0ZPUk1BVA==::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfVEFSR0VUX0RFVl9LSVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfUFJFVl9QUkVTRVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0lMSUNPTl9SRVY=::MjBubTU=::U0lMSUNPTl9SRVY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SVNfSFBT::ZmFsc2U=::SVNfSFBT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SVNfVklE::ZmFsc2U=::SVNfVklE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VVNFUl9DTEtfUkFUSU8=::NA==::VVNFUl9DTEtfUkFUSU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "QzJQX1AyQ19DTEtfUkFUSU8=::NA==::QzJQX1AyQ19DTEtfUkFUSU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0hNQ19DTEtfUkFUSU8=::Mg==::UEhZX0hNQ19DTEtfUkFUSU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19BQlNUUkFDVF9QSFlfV0xBVA==::OQ==::RElBR19BQlNUUkFDVF9QSFlfV0xBVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19BQlNUUkFDVF9QSFlfUkxBVA==::MTg=::RElBR19BQlNUUkFDVF9QSFlfUkxBVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19DUEFfT1VUXzFfRU4=::ZmFsc2U=::RElBR19DUEFfT1VUXzFfRU4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQ1BBX0xPQ0s=::ZmFsc2U=::RElBR19VU0VfQ1BBX0xPQ0s="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RFFTX0JVU19NT0RFX0VOVU0=::RFFTX0JVU19NT0RFX1g4X1g5::RFFTX0JVU19NT0RFX0VOVU0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "QUNfUElOX01BUF9TQ0hFTUU=::dXNlXzBfMV8yXzNfbGFuZQ==::QUNfUElOX01BUF9TQ0hFTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TlVNX09GX0hNQ19QT1JUUw==::MQ==::TlVNX09GX0hNQ19QT1JUUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::SE1DX0FWTF9QUk9UT0NPTF9FTlVN"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX0NUUkxfRElNTV9UWVBF::c29kaW1t::SE1DX0NUUkxfRElNTV9UWVBF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UkVHSVNURVJfQUZJ::dHJ1ZQ==::UkVHSVNURVJfQUZJ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX0NQVV9DTEtfRElWSURF::Mg==::U0VRX1NZTlRIX0NQVV9DTEtfRElWSURF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX0NBTF9DTEtfRElWSURF::OA==::U0VRX1NZTlRIX0NBTF9DTEtfRElWSURF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9DUFVfQ0xLX0RJVklERQ==::MQ==::U0VRX1NJTV9DUFVfQ0xLX0RJVklERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9DQUxfQ0xLX0RJVklERQ==::MzI=::U0VRX1NJTV9DQUxfQ0xLX0RJVklERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NZTlRIX09TQ19GUkVRX01IWg==::NDUw::U0VRX1NZTlRIX09TQ19GUkVRX01IWg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VRX1NJTV9PU0NfRlJFUV9NSFo=::MjM5MA==::U0VRX1NJTV9PU0NfRlJFUV9NSFo="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TlVNX09GX1JUTF9USUxFUw==::NA==::TlVNX09GX1JUTF9USUxFUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX1JEQVRBX1RJTEVfSU5ERVg=::MA==::UFJJX1JEQVRBX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX1JEQVRBX0xBTkVfSU5ERVg=::MA==::UFJJX1JEQVRBX0xBTkVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX1dEQVRBX1RJTEVfSU5ERVg=::MA==::UFJJX1dEQVRBX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX1dEQVRBX0xBTkVfSU5ERVg=::MA==::UFJJX1dEQVRBX0xBTkVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0FDX1RJTEVfSU5ERVg=::MQ==::UFJJX0FDX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX1JEQVRBX1RJTEVfSU5ERVg=::MA==::U0VDX1JEQVRBX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX1JEQVRBX0xBTkVfSU5ERVg=::MA==::U0VDX1JEQVRBX0xBTkVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX1dEQVRBX1RJTEVfSU5ERVg=::MA==::U0VDX1dEQVRBX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX1dEQVRBX0xBTkVfSU5ERVg=::MA==::U0VDX1dEQVRBX0xBTkVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0FDX1RJTEVfSU5ERVg=::MQ==::U0VDX0FDX1RJTEVfSU5ERVg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMA==::NzU3MzczODA1::TEFORVNfVVNBR0VfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMQ==::MzY1::TEFORVNfVVNBR0VfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMg==::MA==::TEFORVNfVVNBR0VfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfMw==::MA==::TEFORVNfVVNBR0VfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfVVNBR0VfQVVUT0dFTl9XQ05U::NA==::TEFORVNfVVNBR0VfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8w::MTA1Njk2MDUxMQ==::UElOU19VU0FHRV8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8x::NzYzMzYzMjYz::UElOU19VU0FHRV8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8y::OTU1MjI0MDYz::UElOU19VU0FHRV8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8z::MTA3MzQ3OTYwMA==::UElOU19VU0FHRV8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV80::MTA1Njk2MDUxMA==::UElOU19VU0FHRV80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV81::NjM=::UElOU19VU0FHRV81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV82::MA==::UElOU19VU0FHRV82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV83::MA==::UElOU19VU0FHRV83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV84::MA==::UElOU19VU0FHRV84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV85::MA==::UElOU19VU0FHRV85"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMA==::MA==::UElOU19VU0FHRV8xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMQ==::MA==::UElOU19VU0FHRV8xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV8xMg==::MA==::UElOU19VU0FHRV8xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19VU0FHRV9BVVRPR0VOX1dDTlQ=::MTM=::UElOU19VU0FHRV9BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzA=::MQ==::UElOU19SQVRFXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzE=::NTYxNzc0NTky::UElOU19SQVRFXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzI=::OTU1MjI0MDYz::UElOU19SQVRFXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzM=::MA==::UElOU19SQVRFXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzQ=::MA==::UElOU19SQVRFXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzU=::MA==::UElOU19SQVRFXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzY=::MA==::UElOU19SQVRFXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzc=::MA==::UElOU19SQVRFXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzg=::MA==::UElOU19SQVRFXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzk=::MA==::UElOU19SQVRFXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEw::MA==::UElOU19SQVRFXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEx::MA==::UElOU19SQVRFXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFXzEy::MA==::UElOU19SQVRFXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19SQVRFX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19SQVRFX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMA==::OTIwMjAyNjc4::UElOU19XREJfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMQ==::OTEwOTEyNTY2::UElOU19XREJfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMg==::MzE2MzQ1Nzgy::UElOU19XREJfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMw==::OTE4Nzc3Mjcw::UElOU19XREJfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNA==::MTY1Mzc1Mzc4::UElOU19XREJfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNQ==::MTM2NTgxMTkz::UElOU19XREJfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNg==::MTUzMzkxNjg5::UElOU19XREJfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfNw==::MTUzMzg3MDE3::UElOU19XREJfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfOA==::MTUzMDkyNjgw::UElOU19XREJfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfOQ==::OTE4NTg5NDQw::UElOU19XREJfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTA=::ODE5Njg2ODAy::UElOU19XREJfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTE=::OTIwMzQ3ODMw::UElOU19XREJfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTI=::OTIwMjAyNjcy::UElOU19XREJfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTM=::OTEwOTEyNTY2::UElOU19XREJfMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTQ=::MzE2MzQ1Nzgy::UElOU19XREJfMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTU=::MjI0Njk0::UElOU19XREJfMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTY=::MA==::UElOU19XREJfMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTc=::MA==::UElOU19XREJfMTc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTg=::MA==::UElOU19XREJfMTg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMTk=::MA==::UElOU19XREJfMTk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjA=::MA==::UElOU19XREJfMjA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjE=::MA==::UElOU19XREJfMjE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjI=::MA==::UElOU19XREJfMjI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjM=::MA==::UElOU19XREJfMjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjQ=::MA==::UElOU19XREJfMjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjU=::MA==::UElOU19XREJfMjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjY=::MA==::UElOU19XREJfMjY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjc=::MA==::UElOU19XREJfMjc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjg=::MA==::UElOU19XREJfMjg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMjk=::MA==::UElOU19XREJfMjk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzA=::MA==::UElOU19XREJfMzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzE=::MA==::UElOU19XREJfMzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzI=::MA==::UElOU19XREJfMzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzM=::MA==::UElOU19XREJfMzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzQ=::MA==::UElOU19XREJfMzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzU=::MA==::UElOU19XREJfMzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzY=::MA==::UElOU19XREJfMzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzc=::MA==::UElOU19XREJfMzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfMzg=::MA==::UElOU19XREJfMzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19XREJfQVVUT0dFTl9XQ05U::Mzk=::UElOU19XREJfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMA==::MTUzNjEyODcz::UElOU19EQVRBX0lOX01PREVfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMQ==::MTY3NTQ3NDAx::UElOU19EQVRBX0lOX01PREVfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMg==::MTA1OTM1NzI1Nw==::UElOU19EQVRBX0lOX01PREVfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMw==::MTUzMTI5NTQ1::UElOU19EQVRBX0lOX01PREVfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNA==::MTUzMzkxNzQz::UElOU19EQVRBX0lOX01PREVfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNQ==::MTUwNzM2OTY5::UElOU19EQVRBX0lOX01PREVfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNg==::MTUzMzkxNjg5::UElOU19EQVRBX0lOX01PREVfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfNw==::MTUzMzg3MDE3::UElOU19EQVRBX0lOX01PREVfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfOA==::MTUzMDkyNjgw::UElOU19EQVRBX0lOX01PREVfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfOQ==::MTUzMzUwMTQ0::UElOU19EQVRBX0lOX01PREVfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTA=::MTM2NjE0NTI3::UElOU19EQVRBX0lOX01PREVfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTE=::MTUzMzk1MTQ1::UElOU19EQVRBX0lOX01PREVfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTI=::MTUzNjEyODcy::UElOU19EQVRBX0lOX01PREVfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTM=::MTY3NTQ3NDAx::UElOU19EQVRBX0lOX01PREVfMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTQ=::MTA1OTM1NzI1Nw==::UElOU19EQVRBX0lOX01PREVfMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTU=::Mzc0NDk=::UElOU19EQVRBX0lOX01PREVfMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTY=::MA==::UElOU19EQVRBX0lOX01PREVfMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTc=::MA==::UElOU19EQVRBX0lOX01PREVfMTc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTg=::MA==::UElOU19EQVRBX0lOX01PREVfMTg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMTk=::MA==::UElOU19EQVRBX0lOX01PREVfMTk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjA=::MA==::UElOU19EQVRBX0lOX01PREVfMjA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjE=::MA==::UElOU19EQVRBX0lOX01PREVfMjE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjI=::MA==::UElOU19EQVRBX0lOX01PREVfMjI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjM=::MA==::UElOU19EQVRBX0lOX01PREVfMjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjQ=::MA==::UElOU19EQVRBX0lOX01PREVfMjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjU=::MA==::UElOU19EQVRBX0lOX01PREVfMjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjY=::MA==::UElOU19EQVRBX0lOX01PREVfMjY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjc=::MA==::UElOU19EQVRBX0lOX01PREVfMjc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjg=::MA==::UElOU19EQVRBX0lOX01PREVfMjg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMjk=::MA==::UElOU19EQVRBX0lOX01PREVfMjk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzA=::MA==::UElOU19EQVRBX0lOX01PREVfMzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzE=::MA==::UElOU19EQVRBX0lOX01PREVfMzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzI=::MA==::UElOU19EQVRBX0lOX01PREVfMzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzM=::MA==::UElOU19EQVRBX0lOX01PREVfMzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzQ=::MA==::UElOU19EQVRBX0lOX01PREVfMzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzU=::MA==::UElOU19EQVRBX0lOX01PREVfMzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzY=::MA==::UElOU19EQVRBX0lOX01PREVfMzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzc=::MA==::UElOU19EQVRBX0lOX01PREVfMzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfMzg=::MA==::UElOU19EQVRBX0lOX01PREVfMzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQVRBX0lOX01PREVfQVVUT0dFTl9XQ05U::Mzk=::UElOU19EQVRBX0lOX01PREVfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzA=::MjUxNDU3NDg2::UElOU19DMkxfRFJJVkVOXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzE=::MjU5MDA3::UElOU19DMkxfRFJJVkVOXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzI=::MA==::UElOU19DMkxfRFJJVkVOXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzM=::MTA2MDg5MzU2OA==::UElOU19DMkxfRFJJVkVOXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzQ=::MjUxNDU3NDg2::UElOU19DMkxfRFJJVkVOXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzU=::NjM=::UElOU19DMkxfRFJJVkVOXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzY=::MA==::UElOU19DMkxfRFJJVkVOXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzc=::MA==::UElOU19DMkxfRFJJVkVOXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzg=::MA==::UElOU19DMkxfRFJJVkVOXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzk=::MA==::UElOU19DMkxfRFJJVkVOXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEw::MA==::UElOU19DMkxfRFJJVkVOXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEx::MA==::UElOU19DMkxfRFJJVkVOXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOXzEy::MA==::UElOU19DMkxfRFJJVkVOXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19DMkxfRFJJVkVOX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19DMkxfRFJJVkVOX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMA==::MQ==::UElOU19EQl9JTl9CWVBBU1NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMQ==::NzYzMTAxMTg0::UElOU19EQl9JTl9CWVBBU1NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMg==::OTU1MjI0MDYz::UElOU19EQl9JTl9CWVBBU1NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMw==::NDg=::UElOU19EQl9JTl9CWVBBU1NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNA==::MA==::UElOU19EQl9JTl9CWVBBU1NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNQ==::MA==::UElOU19EQl9JTl9CWVBBU1NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNg==::MA==::UElOU19EQl9JTl9CWVBBU1NfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfNw==::MA==::UElOU19EQl9JTl9CWVBBU1NfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfOA==::MA==::UElOU19EQl9JTl9CWVBBU1NfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfOQ==::MA==::UElOU19EQl9JTl9CWVBBU1NfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTA=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTE=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfMTI=::MA==::UElOU19EQl9JTl9CWVBBU1NfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9JTl9CWVBBU1NfQVVUT0dFTl9XQ05U::MTM=::UElOU19EQl9JTl9CWVBBU1NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzA=::MQ==::UElOU19EQl9PVVRfQllQQVNTXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzE=::NzYzMTAxMTg0::UElOU19EQl9PVVRfQllQQVNTXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzI=::OTU1MjI0MDYz::UElOU19EQl9PVVRfQllQQVNTXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzM=::NDg=::UElOU19EQl9PVVRfQllQQVNTXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzQ=::MA==::UElOU19EQl9PVVRfQllQQVNTXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzU=::MA==::UElOU19EQl9PVVRfQllQQVNTXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzY=::MA==::UElOU19EQl9PVVRfQllQQVNTXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzc=::MA==::UElOU19EQl9PVVRfQllQQVNTXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzg=::MA==::UElOU19EQl9PVVRfQllQQVNTXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzk=::MA==::UElOU19EQl9PVVRfQllQQVNTXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEw::MA==::UElOU19EQl9PVVRfQllQQVNTXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEx::MA==::UElOU19EQl9PVVRfQllQQVNTXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTXzEy::MA==::UElOU19EQl9PVVRfQllQQVNTXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PVVRfQllQQVNTX0FVVE9HRU5fV0NOVA==::MTM=::UElOU19EQl9PVVRfQllQQVNTX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMA==::MQ==::UElOU19EQl9PRV9CWVBBU1NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMQ==::NzYzMTAxMTg0::UElOU19EQl9PRV9CWVBBU1NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMg==::OTU1MjI0MDYz::UElOU19EQl9PRV9CWVBBU1NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMw==::NDg=::UElOU19EQl9PRV9CWVBBU1NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNA==::MA==::UElOU19EQl9PRV9CWVBBU1NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNQ==::MA==::UElOU19EQl9PRV9CWVBBU1NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNg==::MA==::UElOU19EQl9PRV9CWVBBU1NfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfNw==::MA==::UElOU19EQl9PRV9CWVBBU1NfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfOA==::MA==::UElOU19EQl9PRV9CWVBBU1NfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfOQ==::MA==::UElOU19EQl9PRV9CWVBBU1NfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTA=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTE=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfMTI=::MA==::UElOU19EQl9PRV9CWVBBU1NfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19EQl9PRV9CWVBBU1NfQVVUT0dFTl9XQ05U::MTM=::UElOU19EQl9PRV9CWVBBU1NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMA==::NTM3MDAyMDE2::UElOU19JTlZFUlRfV1JfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMQ==::MjA0OA==::UElOU19JTlZFUlRfV1JfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMg==::MA==::UElOU19JTlZFUlRfV1JfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMw==::ODM5MDY1Ng==::UElOU19JTlZFUlRfV1JfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNA==::NTM3MDAyMDE2::UElOU19JTlZFUlRfV1JfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNQ==::MA==::UElOU19JTlZFUlRfV1JfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNg==::MA==::UElOU19JTlZFUlRfV1JfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfNw==::MA==::UElOU19JTlZFUlRfV1JfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfOA==::MA==::UElOU19JTlZFUlRfV1JfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfOQ==::MA==::UElOU19JTlZFUlRfV1JfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTA=::MA==::UElOU19JTlZFUlRfV1JfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTE=::MA==::UElOU19JTlZFUlRfV1JfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfMTI=::MA==::UElOU19JTlZFUlRfV1JfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfV1JfQVVUT0dFTl9XQ05U::MTM=::UElOU19JTlZFUlRfV1JfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMA==::MTA1Njk2MDUxMA==::UElOU19JTlZFUlRfT0VfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMQ==::NzYzMzYzMjYz::UElOU19JTlZFUlRfT0VfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMg==::OTU1MjI0MDYz::UElOU19JTlZFUlRfT0VfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMw==::MTA3MzQ3OTYwMA==::UElOU19JTlZFUlRfT0VfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNA==::MTA1Njk2MDUxMA==::UElOU19JTlZFUlRfT0VfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNQ==::NjM=::UElOU19JTlZFUlRfT0VfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNg==::MA==::UElOU19JTlZFUlRfT0VfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfNw==::MA==::UElOU19JTlZFUlRfT0VfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfOA==::MA==::UElOU19JTlZFUlRfT0VfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfOQ==::MA==::UElOU19JTlZFUlRfT0VfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTA=::MA==::UElOU19JTlZFUlRfT0VfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTE=::MA==::UElOU19JTlZFUlRfT0VfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfMTI=::MA==::UElOU19JTlZFUlRfT0VfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19JTlZFUlRfT0VfQVVUT0dFTl9XQ05U::MTM=::UElOU19JTlZFUlRfT0VfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMQ==::MjAxMzI2NTky::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMg==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMw==::NDg=::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNQ==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNg==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNw==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOA==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOQ==::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTA=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTE=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTI=::MA==::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfQVVUT0dFTl9XQ05U::MTM=::UElOU19BQ19ITUNfREFUQV9PVkVSUklERV9FTkFfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8w::MTA1Njk2MDUxMA==::UElOU19PQ1RfTU9ERV8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8x::MjYyMDc5::UElOU19PQ1RfTU9ERV8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8y::MA==::UElOU19PQ1RfTU9ERV8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8z::MTA3MzQ3OTU1Mg==::UElOU19PQ1RfTU9ERV8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV80::MTA1Njk2MDUxMA==::UElOU19PQ1RfTU9ERV80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV81::NjM=::UElOU19PQ1RfTU9ERV81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV82::MA==::UElOU19PQ1RfTU9ERV82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV83::MA==::UElOU19PQ1RfTU9ERV83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV84::MA==::UElOU19PQ1RfTU9ERV84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV85::MA==::UElOU19PQ1RfTU9ERV85"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMA==::MA==::UElOU19PQ1RfTU9ERV8xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMQ==::MA==::UElOU19PQ1RfTU9ERV8xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV8xMg==::MA==::UElOU19PQ1RfTU9ERV8xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19PQ1RfTU9ERV9BVVRPR0VOX1dDTlQ=::MTM=::UElOU19PQ1RfTU9ERV9BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMA==::MQ==::UElOU19HUElPX01PREVfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMQ==::MA==::UElOU19HUElPX01PREVfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMg==::MA==::UElOU19HUElPX01PREVfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMw==::MA==::UElOU19HUElPX01PREVfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNA==::MA==::UElOU19HUElPX01PREVfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNQ==::MA==::UElOU19HUElPX01PREVfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNg==::MA==::UElOU19HUElPX01PREVfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfNw==::MA==::UElOU19HUElPX01PREVfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfOA==::MA==::UElOU19HUElPX01PREVfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfOQ==::MA==::UElOU19HUElPX01PREVfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTA=::MA==::UElOU19HUElPX01PREVfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTE=::MA==::UElOU19HUElPX01PREVfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfMTI=::MA==::UElOU19HUElPX01PREVfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19HUElPX01PREVfQVVUT0dFTl9XQ05U::MTM=::UElOU19HUElPX01PREVfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18w::MTk5NDI1MDgy::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18x::MTk2Mjc2NDEz::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18y::MTkzMTI3NjEw::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18z::MTg5OTc4ODA3::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180::MTg2ODMwMDA0::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181::MTgzNjgxMjAx::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182::MTgwNTMyMzk4::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183::MTc3MzgzNTk1::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184::MTc0MjM0Nzky::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185::MTcxMDg1OTg5::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMA==::MTY3OTM3MTg2::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMQ==::MTY0Nzg4Mzgz::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMg==::MTM4NTU5NjQ0::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMw==::MTAwNzc0MDA4::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNA==::OTU1MTQ3MTc=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNQ==::ODkyMTcxMTQ=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNg==::Nzc2NzY2Mjg=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNw==::NjA4OTEyMDk=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOA==::Mzc4MDMwNjM=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOQ==::MTIzMTI=::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18yOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18zOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ180OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ181OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ182OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ183OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ184OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mg==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Ng==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Nw==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OA==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OQ==::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ185OQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDk=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMDk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTk=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMTk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjA=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjE=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjI=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjM=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjQ=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjU=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjY=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjc=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjg=::MA==::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ18xMjg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX01FTV9QSU5TX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MTI5::VU5VU0VEX01FTV9QSU5TX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzA=::MTQ2OTU0MzE=::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzE=::NjI5ODYzNw==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzI=::NDEwMQ==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzM=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzQ=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzU=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzY=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzc=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzg=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzk=::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzEw::MA==::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DX0FVVE9HRU5fV0NOVA==::MTE=::VU5VU0VEX0RRU19CVVNFU19MQU5FTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMA==::NTQyMTE5OTQw::Q0VOVEVSX1RJRFNfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMQ==::Mw==::Q0VOVEVSX1RJRFNfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfMg==::MA==::Q0VOVEVSX1RJRFNfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q0VOVEVSX1RJRFNfQVVUT0dFTl9XQ05U::Mw==::Q0VOVEVSX1RJRFNfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMA==::Njc2NjAwMzI1::SE1DX1RJRFNfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMQ==::Mw==::SE1DX1RJRFNfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfMg==::MA==::SE1DX1RJRFNfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "SE1DX1RJRFNfQVVUT0dFTl9XQ05U::Mw==::SE1DX1RJRFNfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzA=::NDAzMTc3OTg0::TEFORV9USURTXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzE=::MTY4MDY3NTg0::TEFORV9USURTXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzI=::MzU3MTcyMDg=::TEFORV9USURTXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzM=::MTQwNTE4OTMw::TEFORV9USURTXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzQ=::ODg2NDAz::TEFORV9USURTXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzU=::MA==::TEFORV9USURTXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzY=::MA==::TEFORV9USURTXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzc=::MA==::TEFORV9USURTXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzg=::MA==::TEFORV9USURTXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTXzk=::MA==::TEFORV9USURTXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORV9USURTX0FVVE9HRU5fV0NOVA==::MTA=::TEFORV9USURTX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJFQU1CTEVfTU9ERQ==::cHJlYW1ibGVfb25lX2N5Y2xl::UFJFQU1CTEVfTU9ERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "REJJX1dSX0VOQUJMRQ==::ZmFsc2U=::REJJX1dSX0VOQUJMRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "REJJX1JEX0VOQUJMRQ==::ZmFsc2U=::REJJX1JEX0VOQUJMRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "Q1JDX0VO::Y3JjX2Rpc2FibGU=::Q1JDX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U1dBUF9EUVNfQV9C::ZmFsc2U=::U1dBUF9EUVNfQV9C"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RFFTX1BBQ0tfTU9ERQ==::cGFja2Vk::RFFTX1BBQ0tfTU9ERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "T0NUX1NJWkU=::Mw==::T0NUX1NJWkU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "REJDX1dCX1JFU0VSVkVEX0VOVFJZ::OA==::REJDX1dCX1JFU0VSVkVEX0VOVFJZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RExMX01PREU=::Y3RsX2R5bmFtaWM=::RExMX01PREU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "RExMX0NPREVXT1JE::MA==::RExMX0NPREVXT1JE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "QUJQSFlfV1JJVEVfUFJPVE9DT0w=::MA==::QUJQSFlfV1JJVEVfUFJPVE9DT0w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJNT0RFX09DVA==::ZmFsc2U=::UEhZX1VTRVJNT0RFX09DVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX1BFUklPRElDX09DVF9SRUNBTA==::ZmFsc2U=::UEhZX1BFUklPRElDX09DVF9SRUNBTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UEhZX0hBU19EQ0M=::dHJ1ZQ==::UEhZX0hBU19EQ0M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRU5BQkxFX0VDQw==::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfRU5BQkxFX0VDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9EQVRB::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9EQVRB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9SRUFE::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9SRUFE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ==::ZW5hYmxl::UFJJX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1RBUlZFX0xJTUlU::NjM=::UFJJX0hNQ19DRkdfU1RBUlZFX0xJTUlU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJCSVRFUl9UWVBF::dHdvdA==::UFJJX0hNQ19DRkdfQVJCSVRFUl9UWVBF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfT1BFTl9QQUdFX0VO::ZW5hYmxl::UFJJX0hNQ19DRkdfT1BFTl9QQUdFX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfR0VBUl9ET1dOX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfR0VBUl9ET1dOX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ==::c2luZ2xlYmFuaw==::UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUElOR19QT05HX01PREU=::cGluZ3Bvbmdfb2Zm::UFJJX0hNQ19DRkdfUElOR19QT05HX01PREU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4=::MA==::UFJJX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0xPVF9PRkZTRVQ=::Mg==::UFJJX0hNQ19DRkdfU0xPVF9PRkZTRVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQ09MX0NNRF9TTE9U::Mg==::UFJJX0hNQ19DRkdfQ09MX0NNRF9TTE9U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUk9XX0NNRF9TTE9U::MQ==::UFJJX0hNQ19DRkdfUk9XX0NNRF9TTE9U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRU5BQkxFX1JD::ZW5hYmxl::UFJJX0hNQ19DRkdfRU5BQkxFX1JD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H::MzM4MjU=::UFJJX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk=::OA==::UFJJX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk=::OA==::UFJJX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfVENM::MTg=::UFJJX0hNQ19DRkdfVENM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD::Mw==::UFJJX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw==::MTU=::UFJJX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UFJJX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UFJJX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfT0RUX09O::MA==::UFJJX0hNQ19DRkdfV1JfT0RUX09O"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfT0RUX09O::MA==::UFJJX0hNQ19DRkdfUkRfT0RUX09O"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfT0RUX1BFUklPRA==::Ng==::UFJJX0hNQ19DRkdfV1JfT0RUX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfT0RUX1BFUklPRA==::Ng==::UFJJX0hNQ19DRkdfUkRfT0RUX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA=::MTU=::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE=::MjQw::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI=::Mzg0MA==::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM=::NjE0NDA=::UFJJX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4=::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA==::NTEy::UFJJX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q=::Mjc=::UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE::Mw==::UFJJX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA==::NA==::UFJJX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ==::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfVVNFUl9SRlNIX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfVVNFUl9SRlNIX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO::ZGlzYWJsZQ==::UFJJX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s=::cHJlc3JmZXhpdA==::UFJJX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjM=::MTk3MTIw::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjQ=::MjYyMTQ0::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU0JfRERSNF9NUjU=::MTA1Ng==::UFJJX0hNQ19DRkdfU0JfRERSNF9NUjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I=::MA==::UFJJX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg=::Y29sX3dpZHRoXzEw::UFJJX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg=::cm93X3dpZHRoXzE1::UFJJX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI::YmFua193aWR0aF8y::UFJJX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA==::Ymdfd2lkdGhfMg==::UFJJX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg=::Y3Nfd2lkdGhfMQ==::UFJJX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUREUl9PUkRFUg==::Y2hpcF9yb3dfYmFua19jb2w=::UFJJX0hNQ19DRkdfQUREUl9PUkRFUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX1JEV1I=::OA==::UFJJX0hNQ19DRkdfQUNUX1RPX1JEV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX1BDSA==::MjA=::UFJJX0hNQ19DRkdfQUNUX1RPX1BDSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVA==::Mjk=::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks=::Mw==::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH::Mg==::UFJJX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkQ=::Mw==::UFJJX0hNQ19DRkdfUkRfVE9fUkQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ::Mw==::UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw==::Mg==::UFJJX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1I=::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw==::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfVE9fUENI::NQ==::UFJJX0hNQ19DRkdfUkRfVE9fUENI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ=::MTQ=::UFJJX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1I=::Mw==::UFJJX0hNQ19DRkdfV1JfVE9fV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ::Mw==::UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw==::Mg==::UFJJX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkQ=::MTY=::UFJJX0hNQ19DRkdfV1JfVE9fUkQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ::Ng==::UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw==::MTY=::UFJJX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfVE9fUENI::MjE=::UFJJX0hNQ19DRkdfV1JfVE9fUENI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ=::Mjk=::UFJJX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUENIX1RPX1ZBTElE::OQ==::UFJJX0hNQ19DRkdfUENIX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA==::OQ==::UFJJX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJGX1RPX1ZBTElE::OTc=::UFJJX0hNQ19DRkdfQVJGX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEROX1RPX1ZBTElE::NQ==::UFJJX0hNQ19DRkdfUEROX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1RPX1ZBTElE::NTEz::UFJJX0hNQ19DRkdfU1JGX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA==::NDQ5::UFJJX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfQVJGX1BFUklPRA==::NDY4MQ==::UFJJX0hNQ19DRkdfQVJGX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUEROX1BFUklPRA==::MA==::UFJJX0hNQ19DRkdfUEROX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfWlFDTF9UT19WQUxJRA==::MjU3::UFJJX0hNQ19DRkdfWlFDTF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfWlFDU19UT19WQUxJRA==::NjU=::UFJJX0hNQ19DRkdfWlFDU19UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVJTX1RPX1ZBTElE::Nw==::UFJJX0hNQ19DRkdfTVJTX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX1RPX1ZBTElE::NzY4::UFJJX0hNQ19DRkdfTVBTX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVJSX1RPX1ZBTElE::MA==::UFJJX0hNQ19DRkdfTVJSX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBSX1RPX1ZBTElE::MTY=::UFJJX0hNQ19DRkdfTVBSX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF::NQ==::UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT::Ng==::UFJJX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ::MA==::UFJJX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA==::MTY=::UFJJX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfNF9BQ1RfVE9fQUNU::MTQ=::UFJJX0hNQ19DRkdfNF9BQ1RfVE9fQUNU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UFJJX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA==::MA==::UFJJX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRU5BQkxFX0VDQw==::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfRU5BQkxFX0VDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9EQVRB::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9EQVRB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9SRUFE::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9SRUFE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ==::ZW5hYmxl::U0VDX0hNQ19DRkdfUkVPUkRFUl9SREFUQQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1RBUlZFX0xJTUlU::NjM=::U0VDX0hNQ19DRkdfU1RBUlZFX0xJTUlU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfRFFTX1RSQUNLSU5HX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJCSVRFUl9UWVBF::dHdvdA==::U0VDX0hNQ19DRkdfQVJCSVRFUl9UWVBF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfT1BFTl9QQUdFX0VO::ZW5hYmxl::U0VDX0hNQ19DRkdfT1BFTl9QQUdFX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfR0VBUl9ET1dOX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfR0VBUl9ET1dOX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ==::c2luZ2xlYmFuaw==::U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfTU9ERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUElOR19QT05HX01PREU=::cGluZ3Bvbmdfb2Zm::U0VDX0hNQ19DRkdfUElOR19QT05HX01PREU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4=::MA==::U0VDX0hNQ19DRkdfU0xPVF9ST1RBVEVfRU4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0xPVF9PRkZTRVQ=::Mg==::U0VDX0hNQ19DRkdfU0xPVF9PRkZTRVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQ09MX0NNRF9TTE9U::Mg==::U0VDX0hNQ19DRkdfQ09MX0NNRF9TTE9U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUk9XX0NNRF9TTE9U::MQ==::U0VDX0hNQ19DRkdfUk9XX0NNRF9TTE9U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRU5BQkxFX1JD::ZW5hYmxl::U0VDX0hNQ19DRkdfRU5BQkxFX1JD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H::MzM4MjU=::U0VDX0hNQ19DRkdfQ1NfVE9fQ0hJUF9NQVBQSU5H"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk=::OA==::U0VDX0hNQ19DRkdfUkJfUkVTRVJWRURfRU5UUlk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk=::OA==::U0VDX0hNQ19DRkdfV0JfUkVTRVJWRURfRU5UUlk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfVENM::MTg=::U0VDX0hNQ19DRkdfVENM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD::Mw==::U0VDX0hNQ19DRkdfUE9XRVJfU0FWSU5HX0VYSVRfQ1lD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw==::MTU=::U0VDX0hNQ19DRkdfTUVNX0NMS19ESVNBQkxFX0VOVFJZX0NZQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::U0VDX0hNQ19DRkdfV1JJVEVfT0RUX0NISVA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::U0VDX0hNQ19DRkdfUkVBRF9PRFRfQ0hJUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfT0RUX09O::MA==::U0VDX0hNQ19DRkdfV1JfT0RUX09O"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfT0RUX09O::MA==::U0VDX0hNQ19DRkdfUkRfT0RUX09O"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfT0RUX1BFUklPRA==::Ng==::U0VDX0hNQ19DRkdfV1JfT0RUX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfT0RUX1BFUklPRA==::Ng==::U0VDX0hNQ19DRkdfUkRfT0RUX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA=::MTU=::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE=::MjQw::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI=::Mzg0MA==::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM=::NjE0NDA=::U0VDX0hNQ19DRkdfUkxEM19SRUZSRVNIX1NFUTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU1JGX1pRQ0FMX0RJU0FCTEU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfTVBTX1pRQ0FMX0RJU0FCTEU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfTVBTX0RRU1RSS19ESVNBQkxF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4=::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU0hPUlRfRFFTVFJLX0NUUkxfRU4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19DVFJMX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA==::NTEy::U0VDX0hNQ19DRkdfUEVSSU9EX0RRU1RSS19JTlRFUlZBTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q=::Mjc=::U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElEX0xBU1Q="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE::Mw==::U0VDX0hNQ19DRkdfRFFTVFJLX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA==::NA==::U0VDX0hNQ19DRkdfUkZTSF9XQVJOX1RIUkVTSE9MRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ==::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU0JfQ0dfRElTQUJMRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfVVNFUl9SRlNIX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfVVNFUl9SRlNIX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO::ZGlzYWJsZQ==::U0VDX0hNQ19DRkdfU1JGX0FVVE9FWElUX0VO"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s=::cHJlc3JmZXhpdA==::U0VDX0hNQ19DRkdfU1JGX0VOVFJZX0VYSVRfQkxPQ0s="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjM=::MTk3MTIw::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjQ=::MjYyMTQ0::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU0JfRERSNF9NUjU=::MTA1Ng==::U0VDX0hNQ19DRkdfU0JfRERSNF9NUjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I=::MA==::U0VDX0hNQ19DRkdfRERSNF9NUFNfQUREUl9NSVJST1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg=::Y29sX3dpZHRoXzEw::U0VDX0hNQ19DRkdfTUVNX0lGX0NPTEFERFJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg=::cm93X3dpZHRoXzE1::U0VDX0hNQ19DRkdfTUVNX0lGX1JPV0FERFJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI::YmFua193aWR0aF8y::U0VDX0hNQ19DRkdfTUVNX0lGX0JBTktBRERSX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA==::Ymdfd2lkdGhfMg==::U0VDX0hNQ19DRkdfTUVNX0lGX0JHQUREUl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg=::Y3Nfd2lkdGhfMQ==::U0VDX0hNQ19DRkdfTE9DQUxfSUZfQ1NfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUREUl9PUkRFUg==::Y2hpcF9yb3dfYmFua19jb2w=::U0VDX0hNQ19DRkdfQUREUl9PUkRFUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX1JEV1I=::OA==::U0VDX0hNQ19DRkdfQUNUX1RPX1JEV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX1BDSA==::MjA=::U0VDX0hNQ19DRkdfQUNUX1RPX1BDSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVA==::Mjk=::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks=::Mw==::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JBTks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH::Mg==::U0VDX0hNQ19DRkdfQUNUX1RPX0FDVF9ESUZGX0JH"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkQ=::Mw==::U0VDX0hNQ19DRkdfUkRfVE9fUkQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ::Mw==::U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw==::Mg==::U0VDX0hNQ19DRkdfUkRfVE9fUkRfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1I=::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw==::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fV1JfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfVE9fUENI::NQ==::U0VDX0hNQ19DRkdfUkRfVE9fUENI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ=::MTQ=::U0VDX0hNQ19DRkdfUkRfQVBfVE9fVkFMSUQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1I=::Mw==::U0VDX0hNQ19DRkdfV1JfVE9fV1I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ::Mw==::U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw==::Mg==::U0VDX0hNQ19DRkdfV1JfVE9fV1JfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkQ=::MTY=::U0VDX0hNQ19DRkdfV1JfVE9fUkQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ::Ng==::U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9DSElQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw==::MTY=::U0VDX0hNQ19DRkdfV1JfVE9fUkRfRElGRl9CRw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfVE9fUENI::MjE=::U0VDX0hNQ19DRkdfV1JfVE9fUENI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ=::Mjk=::U0VDX0hNQ19DRkdfV1JfQVBfVE9fVkFMSUQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUENIX1RPX1ZBTElE::OQ==::U0VDX0hNQ19DRkdfUENIX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA==::OQ==::U0VDX0hNQ19DRkdfUENIX0FMTF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJGX1RPX1ZBTElE::OTc=::U0VDX0hNQ19DRkdfQVJGX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEROX1RPX1ZBTElE::NQ==::U0VDX0hNQ19DRkdfUEROX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1RPX1ZBTElE::NTEz::U0VDX0hNQ19DRkdfU1JGX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA==::NDQ5::U0VDX0hNQ19DRkdfU1JGX1RPX1pRX0NBTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfQVJGX1BFUklPRA==::NDY4MQ==::U0VDX0hNQ19DRkdfQVJGX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUEROX1BFUklPRA==::MA==::U0VDX0hNQ19DRkdfUEROX1BFUklPRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfWlFDTF9UT19WQUxJRA==::MjU3::U0VDX0hNQ19DRkdfWlFDTF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfWlFDU19UT19WQUxJRA==::NjU=::U0VDX0hNQ19DRkdfWlFDU19UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVJTX1RPX1ZBTElE::Nw==::U0VDX0hNQ19DRkdfTVJTX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX1RPX1ZBTElE::NzY4::U0VDX0hNQ19DRkdfTVBTX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVJSX1RPX1ZBTElE::MA==::U0VDX0hNQ19DRkdfTVJSX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBSX1RPX1ZBTElE::MTY=::U0VDX0hNQ19DRkdfTVBSX1RPX1ZBTElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF::NQ==::U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ1NfVE9fQ0tF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT::Ng==::U0VDX0hNQ19DRkdfTVBTX0VYSVRfQ0tFX1RPX0NT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ::MA==::U0VDX0hNQ19DRkdfUkxEM19NVUxUSUJBTktfUkVGX0RFTEFZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA==::MTY=::U0VDX0hNQ19DRkdfTU1SX0NNRF9UT19WQUxJRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfNF9BQ1RfVE9fQUNU::MTQ=::U0VDX0hNQ19DRkdfNF9BQ1RfVE9fQUNU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "U0VDX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA==::MA==::U0VDX0hNQ19DRkdfMTZfQUNUX1RPX0FDVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UElOU19QRVJfTEFORQ==::MTI=::UElOU19QRVJfTEFORQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "TEFORVNfUEVSX1RJTEU=::NA==::TEFORVNfUEVSX1RJTEU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "T0NUX0NPTlRST0xfV0lEVEg=::MTY=::T0NUX0NPTlRST0xfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfV0lEVEg=::Mg==::UE9SVF9NRU1fQ0tfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzA=::OTg2MjM0OTA=::UE9SVF9NRU1fQ0tfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQ0tfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQ0tfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9XSURUSA==::Mg==::UE9SVF9NRU1fQ0tfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMA==::OTk2NzMwOTA=::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ0tfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfV0lEVEg=::MQ==::UE9SVF9NRU1fREtfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9XSURUSA==::MQ==::UE9SVF9NRU1fREtfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fREtfTl9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fREtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1dJRFRI::MQ==::UE9SVF9NRU1fREtBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ180::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ181::MA==::UE9SVF9NRU1fREtBX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fREtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fREtBX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtBX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1dJRFRI::MQ==::UE9SVF9NRU1fREtCX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ180::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ181::MA==::UE9SVF9NRU1fREtCX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fREtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fREtCX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREtCX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fREtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19XSURUSA==::MQ==::UE9SVF9NRU1fS19XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMA==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMg==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfMw==::MA==::UE9SVF9NRU1fS19QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfNA==::MA==::UE9SVF9NRU1fS19QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fS19QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fS19QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1dJRFRI::MQ==::UE9SVF9NRU1fS19OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18x::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18y::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ18z::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ180::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ181::MA==::UE9SVF9NRU1fS19OX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fS19OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fS19OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9XSURUSA==::MTc=::UE9SVF9NRU1fQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMA==::NjQwMjQ1OTM=::UE9SVF9NRU1fQV9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMQ==::NjcxNzM0Mzg=::UE9SVF9NRU1fQV9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMg==::NzAzMjIyNDE=::UE9SVF9NRU1fQV9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMw==::NzM0NzEwNDQ=::UE9SVF9NRU1fQV9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNA==::Nzk3Njg2NDc=::UE9SVF9NRU1fQV9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNQ==::ODI5MTc0NTM=::UE9SVF9NRU1fQV9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fQV9QSU5MT0NfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fQV9QSU5MT0NfMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQV9QSU5MT0NfQVVUT0dFTl9XQ05U::MTc=::UE9SVF9NRU1fQV9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfV0lEVEg=::Mg==::UE9SVF9NRU1fQkFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzA=::ODYwNjYxNzg=::UE9SVF9NRU1fQkFfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQkFfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkFfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQkFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfV0lEVEg=::Mg==::UE9SVF9NRU1fQkdfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzA=::NTA0MTY2NDI=::UE9SVF9NRU1fQkdfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQkdfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQkdfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fQkdfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19XSURUSA==::MQ==::UE9SVF9NRU1fQ19XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ19QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ19QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ19QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1dJRFRI::Mg==::UE9SVF9NRU1fQ0tFX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18w::OTMzNzg1NjI=::UE9SVF9NRU1fQ0tFX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18x::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18y::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ18z::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ180::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ181::MA==::UE9SVF9NRU1fQ0tFX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0tFX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fQ0tFX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9XSURUSA==::Mg==::UE9SVF9NRU1fQ1NfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMA==::OTEyNzczMTQ=::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1NfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fQ1NfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fV0lEVEg=::MQ==::UE9SVF9NRU1fUk1fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUk1fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUk1fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUk1fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1dJRFRI::Mg==::UE9SVF9NRU1fT0RUX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18w::OTIzMjc5Mzg=::UE9SVF9NRU1fT0RUX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18x::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18y::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ18z::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ180::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ181::MA==::UE9SVF9NRU1fT0RUX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fT0RUX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fT0RUX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUkFTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUkFTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUkFTX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fUkFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQ0FTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0FTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0FTX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQ0FTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9XSURUSA==::MQ==::UE9SVF9NRU1fV0VfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV0VfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fV0VfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUkVTRVRfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMA==::NTAxNzc=::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fUkVTRVRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQUNUX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DXzA=::NTIyMjU=::UE9SVF9NRU1fQUNUX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQUNUX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUNUX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQUNUX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1dJRFRI::MQ==::UE9SVF9NRU1fUEFSX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ18w::NjA0MTc=::UE9SVF9NRU1fUEFSX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUEFSX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEFSX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Mg==::UE9SVF9NRU1fUEFSX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfV0lEVEg=::MQ==::UE9SVF9NRU1fQ0FfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzI=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzM=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzU=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzY=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzc=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzg=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzk=::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEw::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEx::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEy::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzEz::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzEz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE0::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE1::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE1"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DXzE2::MA==::UE9SVF9NRU1fQ0FfUElOTE9DXzE2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0FfUElOTE9DX0FVVE9HRU5fV0NOVA==::MTc=::UE9SVF9NRU1fQ0FfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUkVGX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUkVGX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUkVGX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUkVGX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fV1BTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fV1BTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fV1BTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fV1BTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUlBTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUlBTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUlBTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUlBTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1dJRFRI::MQ==::UE9SVF9NRU1fRE9GRl9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fRE9GRl9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fTERBX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fTERBX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fTERBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fTERCX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fTERCX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTERCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fTERCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUldBX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUldBX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUldBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUldCX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUldCX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUldCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fUldCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1dJRFRI::MQ==::UE9SVF9NRU1fTEJLMF9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fTEJLMF9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1dJRFRI::MQ==::UE9SVF9NRU1fTEJLMV9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ18w::MA==::UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MQ==::UE9SVF9NRU1fTEJLMV9OX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQ0ZHX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ0ZHX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ0ZHX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fQ0ZHX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfV0lEVEg=::MQ==::UE9SVF9NRU1fQVBfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQVBfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQVBfUElOTE9DX0FVVE9HRU5fV0NOVA==::MQ==::UE9SVF9NRU1fQVBfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9XSURUSA==::MQ==::UE9SVF9NRU1fQUlOVl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQUlOVl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUlOVl9QSU5MT0NfQVVUT0dFTl9XQ05U::MQ==::UE9SVF9NRU1fQUlOVl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fV0lEVEg=::MQ==::UE9SVF9NRU1fRE1fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzA=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzE=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzI=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzM=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzU=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzY=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzc=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzg=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzk=::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEw::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEx::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DXzEy::MA==::UE9SVF9NRU1fRE1fUElOTE9DXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRE1fUElOTE9DX0FVVE9HRU5fV0NOVA==::MTM=::UE9SVF9NRU1fRE1fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fV0lEVEg=::MQ==::UE9SVF9NRU1fQldTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fQldTX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQldTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fQldTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9XSURUSA==::MQ==::UE9SVF9NRU1fRF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fRF9QSU5MT0NfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMTk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMTk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMjk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMjk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfMzk=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfMzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDA=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDE=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDI=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDM=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDQ=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDU=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDY=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDc=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfNDg=::MA==::UE9SVF9NRU1fRF9QSU5MT0NfNDg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRF9QSU5MT0NfQVVUT0dFTl9XQ05U::NDk=::UE9SVF9NRU1fRF9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfV0lEVEg=::NzI=::UE9SVF9NRU1fRFFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzA=::MjA5ODI0OA==::UE9SVF9NRU1fRFFfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE=::NzM0NjE3OQ==::UE9SVF9NRU1fRFFfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI=::MTA0OTQ5ODQ=::UE9SVF9NRU1fRFFfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM=::MTU3NDI5ODk=::UE9SVF9NRU1fRFFfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ=::MjA5OTA5OTQ=::UE9SVF9NRU1fRFFfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzU=::MjYyMzY5NDk=::UE9SVF9NRU1fRFFfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzY=::MzE0ODQ5NTQ=::UE9SVF9NRU1fRFFfUElOTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzc=::MzQ2MzU4MDc=::UE9SVF9NRU1fRFFfUElOTE9DXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzg=::Mzk4ODM4MTA=::UE9SVF9NRU1fRFFfUElOTE9DXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzk=::NDUxMzE4MTU=::UE9SVF9NRU1fRFFfUElOTE9DXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEw::NDgyODA2MjA=::UE9SVF9NRU1fRFFfUElOTE9DXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEx::MTAzOTA5NDcz::UE9SVF9NRU1fRFFfUElOTE9DXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEy::MTA5MTU3NDc4::UE9SVF9NRU1fRFFfUElOTE9DXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzEz::MTE0NDAzNDMz::UE9SVF9NRU1fRFFfUElOTE9DXzEz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE0::MTE5NjUxNDM4::UE9SVF9NRU1fRFFfUElOTE9DXzE0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE1::MTIyODAyMjkx::UE9SVF9NRU1fRFFfUElOTE9DXzE1"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE2::MTI4MDUwMjk0::UE9SVF9NRU1fRFFfUElOTE9DXzE2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE3::MTMzMjk4Mjk5::UE9SVF9NRU1fRFFfUElOTE9DXzE3"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE4::MTM2NDQ3MTA0::UE9SVF9NRU1fRFFfUElOTE9DXzE4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzE5::MTQxNjk1MTA5::UE9SVF9NRU1fRFFfUElOTE9DXzE5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIw::MTQ2OTQzMTE0::UE9SVF9NRU1fRFFfUElOTE9DXzIw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIx::MTUyMTg5MDY5::UE9SVF9NRU1fRFFfUElOTE9DXzIx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIy::MTU3NDM3MDc0::UE9SVF9NRU1fRFFfUElOTE9DXzIy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzIz::MTYwNTg3OTI3::UE9SVF9NRU1fRFFfUElOTE9DXzIz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI0::MTU0::UE9SVF9NRU1fRFFfUElOTE9DXzI0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI1"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI3"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzI5::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzI5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMw::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMx::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMy::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzMz::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzMz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM0::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM1"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM3"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzM5::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzM5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQw::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQx::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQy::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQz::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ0::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ1::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ1"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ2::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ3::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ3"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DXzQ4::MA==::UE9SVF9NRU1fRFFfUElOTE9DXzQ4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFfUElOTE9DX0FVVE9HRU5fV0NOVA==::NDk=::UE9SVF9NRU1fRFFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fV0lEVEg=::OQ==::UE9SVF9NRU1fREJJX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzA=::MjQxMjg1MjE=::UE9SVF9NRU1fREJJX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzE=::MTEyMjQ1Nzk1::UE9SVF9NRU1fREJJX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzI=::MTUwMDgwNjMx::UE9SVF9NRU1fREJJX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzM=::MTU1::UE9SVF9NRU1fREJJX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DXzY=::MA==::UE9SVF9NRU1fREJJX05fUElOTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fREJJX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Nw==::UE9SVF9NRU1fREJJX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1dJRFRI::MQ==::UE9SVF9NRU1fRFFBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ182"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ183"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ184"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ185"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18xOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18xOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18yOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18yOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zMw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zNw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zOA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ18zOQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ18zOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180MA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180MQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Mg==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Mw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180NA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180NQ==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Ng==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180Nw==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ180OA==::MA==::UE9SVF9NRU1fRFFBX1BJTkxPQ180OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::NDk=::UE9SVF9NRU1fRFFBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1dJRFRI::MQ==::UE9SVF9NRU1fRFFCX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ182"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ183"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ184"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ185"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18xOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18xOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18yOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18yOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zMw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zNw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zOA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ18zOQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ18zOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180MA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180MA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180MQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180MQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Mg==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Mg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Mw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180NA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180NA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180NQ==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180NQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Ng==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Ng=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180Nw==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180Nw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ180OA==::MA==::UE9SVF9NRU1fRFFCX1BJTkxPQ180OA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::NDk=::UE9SVF9NRU1fRFFCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfV0lEVEg=::MQ==::UE9SVF9NRU1fRElOVkFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzA=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzE=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DXzI=::MA==::UE9SVF9NRU1fRElOVkFfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkFfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fRElOVkFfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfV0lEVEg=::MQ==::UE9SVF9NRU1fRElOVkJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzA=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzE=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DXzI=::MA==::UE9SVF9NRU1fRElOVkJfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRElOVkJfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mw==::UE9SVF9NRU1fRElOVkJfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9XSURUSA==::MQ==::UE9SVF9NRU1fUV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNg==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNw==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfOA==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfOQ==::MA==::UE9SVF9NRU1fUV9QSU5MT0NfOQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMTk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMTk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMjk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMjk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfMzk=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfMzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDA=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDE=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDI=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDM=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDQ=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDU=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDY=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDc=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfNDg=::MA==::UE9SVF9NRU1fUV9QSU5MT0NfNDg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUV9QSU5MT0NfQVVUT0dFTl9XQ05U::NDk=::UE9SVF9NRU1fUV9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1dJRFRI::OQ==::UE9SVF9NRU1fRFFTX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18w::MTY3ODEzMjE=::UE9SVF9NRU1fRFFTX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18x::MTA0ODk4NTg4::UE9SVF9NRU1fRFFTX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18y::MTQyNzMzNDI0::UE9SVF9NRU1fRFFTX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18z::MTQ4::UE9SVF9NRU1fRFFTX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ180::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ181::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ182::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ182"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ183::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ183"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ184::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ184"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ185::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ185"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMA==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMQ==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ18xMg==::MA==::UE9SVF9NRU1fRFFTX1BJTkxPQ18xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::MTM=::UE9SVF9NRU1fRFFTX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fV0lEVEg=::OQ==::UE9SVF9NRU1fRFFTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzA=::MTc4MzA5MjE=::UE9SVF9NRU1fRFFTX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzE=::MTA1OTQ4MTg5::UE9SVF9NRU1fRFFTX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzI=::MTQzNzgzMDI1::UE9SVF9NRU1fRFFTX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzM=::MTQ5::UE9SVF9NRU1fRFFTX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzY=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzc=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzg=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzk=::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEw::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEx::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DXzEy::MA==::UE9SVF9NRU1fRFFTX05fUElOTE9DXzEy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fRFFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::MTM=::UE9SVF9NRU1fRFFTX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfV0lEVEg=::MQ==::UE9SVF9NRU1fUUtfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtfUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUUtfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMg==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfMw==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfNA==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfNQ==::MA==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Ng==::UE9SVF9NRU1fUUtfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1dJRFRI::MQ==::UE9SVF9NRU1fUUtBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18w::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18y::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ18z::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ180::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ181::MA==::UE9SVF9NRU1fUUtBX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fUUtBX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUUtBX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtBX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtBX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1dJRFRI::MQ==::UE9SVF9NRU1fUUtCX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18w::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18x::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18y::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ18z::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ180::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ181::MA==::UE9SVF9NRU1fUUtCX1BJTkxPQ181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ=::Ng==::UE9SVF9NRU1fUUtCX1BJTkxPQ19BVVRPR0VOX1dDTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fV0lEVEg=::MQ==::UE9SVF9NRU1fUUtCX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzA=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzE=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzI=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzM=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzQ=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DXzU=::MA==::UE9SVF9NRU1fUUtCX05fUElOTE9DXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUUtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA==::Ng==::UE9SVF9NRU1fUUtCX05fUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfV0lEVEg=::MQ==::UE9SVF9NRU1fQ1FfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DXzA=::MA==::UE9SVF9NRU1fQ1FfUElOTE9DXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DXzE=::MA==::UE9SVF9NRU1fQ1FfUElOTE9DXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfUElOTE9DX0FVVE9HRU5fV0NOVA==::Mg==::UE9SVF9NRU1fQ1FfUElOTE9DX0FVVE9HRU5fV0NOVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9XSURUSA==::MQ==::UE9SVF9NRU1fQ1FfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQ1FfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fQ1FfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9XSURUSA==::MQ==::UE9SVF9NRU1fQUxFUlRfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMA==::MQ==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fQUxFUlRfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9XSURUSA==::MQ==::UE9SVF9NRU1fUEVfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfMA==::MA==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfMQ==::MA==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9NRU1fUEVfTl9QSU5MT0NfQVVUT0dFTl9XQ05U::Mg==::UE9SVF9NRU1fUEVfTl9QSU5MT0NfQVVUT0dFTl9XQ05U"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DTEtTX1NIQVJJTkdfTUFTVEVSX09VVF9XSURUSA==::MzI=::UE9SVF9DTEtTX1NIQVJJTkdfTUFTVEVSX09VVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfSU5fV0lEVEg=::MzI=::UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfSU5fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfT1VUX1dJRFRI::MzI=::UE9SVF9DTEtTX1NIQVJJTkdfU0xBVkVfT1VUX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkxBVF9XSURUSA==::Ng==::UE9SVF9BRklfUkxBVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0xBVF9XSURUSA==::Ng==::UE9SVF9BRklfV0xBVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfU0VRX0JVU1lfV0lEVEg=::NA==::UE9SVF9BRklfU0VRX0JVU1lfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUREUl9XSURUSA==::MQ==::UE9SVF9BRklfQUREUl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQkFfV0lEVEg=::MQ==::UE9SVF9BRklfQkFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQkdfV0lEVEg=::MQ==::UE9SVF9BRklfQkdfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ19XSURUSA==::MQ==::UE9SVF9BRklfQ19XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0tFX1dJRFRI::MQ==::UE9SVF9BRklfQ0tFX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ1NfTl9XSURUSA==::MQ==::UE9SVF9BRklfQ1NfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUk1fV0lEVEg=::MQ==::UE9SVF9BRklfUk1fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfT0RUX1dJRFRI::MQ==::UE9SVF9BRklfT0RUX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkFTX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkFTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0FTX05fV0lEVEg=::MQ==::UE9SVF9BRklfQ0FTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0VfTl9XSURUSA==::MQ==::UE9SVF9BRklfV0VfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlNUX05fV0lEVEg=::MQ==::UE9SVF9BRklfUlNUX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUNUX05fV0lEVEg=::MQ==::UE9SVF9BRklfQUNUX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUEFSX1dJRFRI::MQ==::UE9SVF9BRklfUEFSX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0FfV0lEVEg=::MQ==::UE9SVF9BRklfQ0FfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkVGX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkVGX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV1BTX05fV0lEVEg=::MQ==::UE9SVF9BRklfV1BTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlBTX05fV0lEVEg=::MQ==::UE9SVF9BRklfUlBTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE9GRl9OX1dJRFRI::MQ==::UE9SVF9BRklfRE9GRl9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTERfTl9XSURUSA==::MQ==::UE9SVF9BRklfTERfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUldfTl9XSURUSA==::MQ==::UE9SVF9BRklfUldfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTEJLMF9OX1dJRFRI::MQ==::UE9SVF9BRklfTEJLMF9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfTEJLMV9OX1dJRFRI::MQ==::UE9SVF9BRklfTEJLMV9OX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQ0ZHX05fV0lEVEg=::MQ==::UE9SVF9BRklfQ0ZHX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQVBfV0lEVEg=::MQ==::UE9SVF9BRklfQVBfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUlOVl9XSURUSA==::MQ==::UE9SVF9BRklfQUlOVl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE1fV0lEVEg=::MQ==::UE9SVF9BRklfRE1fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRE1fTl9XSURUSA==::MQ==::UE9SVF9BRklfRE1fTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQldTX05fV0lEVEg=::MQ==::UE9SVF9BRklfQldTX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfREJJX05fV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfREJJX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfREJJX05fV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfREJJX05fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfRElOVl9XSURUSA==::MQ==::UE9SVF9BRklfUkRBVEFfRElOVl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfRElOVl9XSURUSA==::MQ==::UE9SVF9BRklfV0RBVEFfRElOVl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfRFFTX0JVUlNUX1dJRFRI::MQ==::UE9SVF9BRklfRFFTX0JVUlNUX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfVkFMSURfV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfVkFMSURfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV0RBVEFfV0lEVEg=::MQ==::UE9SVF9BRklfV0RBVEFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfRU5fRlVMTF9XSURUSA==::MQ==::UE9SVF9BRklfUkRBVEFfRU5fRlVMTF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUkRBVEFfVkFMSURfV0lEVEg=::MQ==::UE9SVF9BRklfUkRBVEFfVkFMSURfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUlJBTktfV0lEVEg=::MQ==::UE9SVF9BRklfUlJBTktfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfV1JBTktfV0lEVEg=::MQ==::UE9SVF9BRklfV1JBTktfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfQUxFUlRfTl9XSURUSA==::MQ==::UE9SVF9BRklfQUxFUlRfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9BRklfUEVfTl9XSURUSA==::MQ==::UE9SVF9BRklfUEVfTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9DTURfREFUQV9XSURUSA==::MQ==::UE9SVF9DVFJMX0FTVF9DTURfREFUQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9XUl9EQVRBX1dJRFRI::MQ==::UE9SVF9DVFJMX0FTVF9XUl9EQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FTVF9SRF9EQVRBX1dJRFRI::MQ==::UE9SVF9DVFJMX0FTVF9SRF9EQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9BRERSRVNTX1dJRFRI::Mjc=::UE9SVF9DVFJMX0FNTV9BRERSRVNTX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9SREFUQV9XSURUSA==::NTc2::UE9SVF9DVFJMX0FNTV9SREFUQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9XREFUQV9XSURUSA==::NTc2::UE9SVF9DVFJMX0FNTV9XREFUQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9CQ09VTlRfV0lEVEg=::Nw==::UE9SVF9DVFJMX0FNTV9CQ09VTlRfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0FNTV9CWVRFRU5fV0lEVEg=::NzI=::UE9SVF9DVFJMX0FNTV9CWVRFRU5fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9SRVFfV0lEVEg=::NA==::UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9SRVFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9CQU5LX1dJRFRI::MTY=::UE9SVF9DVFJMX1VTRVJfUkVGUkVTSF9CQU5LX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX1NFTEZfUkVGUkVTSF9SRVFfV0lEVEg=::NA==::UE9SVF9DVFJMX1NFTEZfUkVGUkVTSF9SRVFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19XUklURV9JTkZPX1dJRFRI::MTU=::UE9SVF9DVFJMX0VDQ19XUklURV9JTkZPX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19SREFUQV9JRF9XSURUSA==::MTM=::UE9SVF9DVFJMX0VDQ19SREFUQV9JRF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19SRUFEX0lORk9fV0lEVEg=::Mw==::UE9SVF9DVFJMX0VDQ19SRUFEX0lORk9fV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19DTURfSU5GT19XSURUSA==::Mw==::UE9SVF9DVFJMX0VDQ19DTURfSU5GT19XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX0VDQ19XQl9QT0lOVEVSX1dJRFRI::MTI=::UE9SVF9DVFJMX0VDQ19XQl9QT0lOVEVSX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9BRERSRVNTX1dJRFRI::MTA=::UE9SVF9DVFJMX01NUl9TTEFWRV9BRERSRVNTX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9SREFUQV9XSURUSA==::MzI=::UE9SVF9DVFJMX01NUl9TTEFWRV9SREFUQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9XREFUQV9XSURUSA==::MzI=::UE9SVF9DVFJMX01NUl9TTEFWRV9XREFUQV9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DVFJMX01NUl9TTEFWRV9CQ09VTlRfV0lEVEg=::Mg==::UE9SVF9DVFJMX01NUl9TTEFWRV9CQ09VTlRfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9IMkVfV0lEVEg=::NDA5Ng==::UE9SVF9IUFNfRU1JRl9IMkVfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9FMkhfV0lEVEg=::NDA5Ng==::UE9SVF9IUFNfRU1JRl9FMkhfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9IMkVfR1BfV0lEVEg=::Mg==::UE9SVF9IUFNfRU1JRl9IMkVfR1BfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9IUFNfRU1JRl9FMkhfR1BfV0lEVEg=::MQ==::UE9SVF9IUFNfRU1JRl9FMkhfR1BfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfQUREUkVTU19XSURUSA==::MjQ=::UE9SVF9DQUxfREVCVUdfQUREUkVTU19XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfUkRBVEFfV0lEVEg=::MzI=::UE9SVF9DQUxfREVCVUdfUkRBVEFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfV0RBVEFfV0lEVEg=::MzI=::UE9SVF9DQUxfREVCVUdfV0RBVEFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfQllURUVOX1dJRFRI::NA==::UE9SVF9DQUxfREVCVUdfQllURUVOX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX0FERFJFU1NfV0lEVEg=::MjQ=::UE9SVF9DQUxfREVCVUdfT1VUX0FERFJFU1NfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX1JEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfREVCVUdfT1VUX1JEQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX1dEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfREVCVUdfT1VUX1dEQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfREVCVUdfT1VUX0JZVEVFTl9XSURUSA==::NA==::UE9SVF9DQUxfREVCVUdfT1VUX0JZVEVFTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX0FERFJFU1NfV0lEVEg=::MTY=::UE9SVF9DQUxfTUFTVEVSX0FERFJFU1NfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX1JEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfTUFTVEVSX1JEQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX1dEQVRBX1dJRFRI::MzI=::UE9SVF9DQUxfTUFTVEVSX1dEQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9DQUxfTUFTVEVSX0JZVEVFTl9XSURUSA==::NA==::UE9SVF9DQUxfTUFTVEVSX0JZVEVFTl9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfSU9BVVhfUElPX0lOX1dJRFRI::OA==::UE9SVF9ERlRfTkZfSU9BVVhfUElPX0lOX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfSU9BVVhfUElPX09VVF9XSURUSA==::OA==::UE9SVF9ERlRfTkZfSU9BVVhfUElPX09VVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVHX0FERFJfV0lEVEg=::OQ==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVHX0FERFJfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fV1JJVEVEQVRBX1dJRFRI::OA==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fV1JJVEVEQVRBX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVBRERBVEFfV0lEVEg=::OA==::UE9SVF9ERlRfTkZfUEFfRFBSSU9fUkVBRERBVEFfV0lEVEg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUExMX0NOVFNFTF9XSURUSA==::NA==::UE9SVF9ERlRfTkZfUExMX0NOVFNFTF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfUExMX05VTV9TSElGVF9XSURUSA==::Mw==::UE9SVF9ERlRfTkZfUExMX05VTV9TSElGVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfQ09SRV9DTEtfQlVGX09VVF9XSURUSA==::Mg==::UE9SVF9ERlRfTkZfQ09SRV9DTEtfQlVGX09VVF9XSURUSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UE9SVF9ERlRfTkZfQ09SRV9DTEtfTE9DS0VEX1dJRFRI::Mg==::UE9SVF9ERlRfTkZfQ09SRV9DTEtfTE9DS0VEX1dJRFRI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19GUkVRX01IWl9JTlQ=::MTIwMA==::UExMX1ZDT19GUkVRX01IWl9JTlQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19UT19NRU1fQ0xLX0ZSRVFfUkFUSU8=::MQ==::UExMX1ZDT19UT19NRU1fQ0xLX0ZSRVFfUkFUSU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1BIWV9DTEtfVkNPX1BIQVNF::MQ==::UExMX1BIWV9DTEtfVkNPX1BIQVNF"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19GUkVRX1BTX1NUUg==::ODM0IHBz::UExMX1ZDT19GUkVRX1BTX1NUUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1JFRl9DTEtfRlJFUV9QU19TVFI=::NDAwMzIgcHM=::UExMX1JFRl9DTEtfRlJFUV9QU19TVFI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1JFRl9DTEtfRlJFUV9QUw==::NDAwMzI=::UExMX1JFRl9DTEtfRlJFUV9QUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9WQ09fRlJFUV9QUw==::ODQw::UExMX1NJTV9WQ09fRlJFUV9QUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfMF9GUkVRX1BT::MTY4MA==::UExMX1NJTV9QSFlDTEtfMF9GUkVRX1BT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfMV9GUkVRX1BT::MzM2MA==::UExMX1NJTV9QSFlDTEtfMV9GUkVRX1BT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlDTEtfRkJfRlJFUV9QUw==::MzM2MA==::UExMX1NJTV9QSFlDTEtfRkJfRlJFUV9QUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9QSFlfQ0xLX1ZDT19QSEFTRV9QUw==::MTA1::UExMX1NJTV9QSFlfQ0xLX1ZDT19QSEFTRV9QUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9DQUxfU0xBVkVfQ0xLX0ZSRVFfUFM=::NjcyMA==::UExMX1NJTV9DQUxfU0xBVkVfQ0xLX0ZSRVFfUFM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX1NJTV9DQUxfTUFTVEVSX0NMS19GUkVRX1BT::NjcyMA==::UExMX1NJTV9DQUxfTUFTVEVSX0NMS19GUkVRX1BT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0hJR0g=::MjQ=::UExMX01fQ05UX0hJR0g="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0xPVw==::MjQ=::UExMX01fQ05UX0xPVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0hJR0g=::MjU2::UExMX05fQ05UX0hJR0g="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0xPVw==::MjU2::UExMX05fQ05UX0xPVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0JZUEFTU19FTg==::ZmFsc2U=::UExMX01fQ05UX0JZUEFTU19FTg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0JZUEFTU19FTg==::dHJ1ZQ==::UExMX05fQ05UX0JZUEFTU19FTg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0VWRU5fRFVUWV9FTg==::ZmFsc2U=::UExMX01fQ05UX0VWRU5fRFVUWV9FTg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX05fQ05UX0VWRU5fRFVUWV9FTg==::ZmFsc2U=::UExMX05fQ05UX0VWRU5fRFVUWV9FTg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0ZCQ0xLX01VWF8x::cGxsX2ZiY2xrX211eF8xX2dsYg==::UExMX0ZCQ0xLX01VWF8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0ZCQ0xLX01VWF8y::cGxsX2ZiY2xrX211eF8yX21fY250::UExMX0ZCQ0xLX01VWF8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX01fQ05UX0lOX1NSQw==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::UExMX01fQ05UX0lOX1NSQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NQX1NFVFRJTkc=::cGxsX2NwX3NldHRpbmcyOA==::UExMX0NQX1NFVFRJTkc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0JXX0NUUkw=::cGxsX2J3X3Jlc19zZXR0aW5nNQ==::UExMX0JXX0NUUkw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0JXX1NFTA==::aGlnaA==::UExMX0JXX1NFTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMA==::Mg==::UExMX0NfQ05UX0hJR0hfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18w::Mg==::UExMX0NfQ05UX0xPV18w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMA==::MQ==::UExMX0NfQ05UX1BSU1RfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzA=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8w::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8w::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzA=::MzMzNiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8w::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8w::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMQ==::MQ==::UExMX0NfQ05UX0hJR0hfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18x::MQ==::UExMX0NfQ05UX0xPV18x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMQ==::MQ==::UExMX0NfQ05UX1BSU1RfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzE=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8x::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8x::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzE=::MTY2OCBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8x::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMQ==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8x::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8x"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMg==::Mg==::UExMX0NfQ05UX0hJR0hfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18y::Mg==::UExMX0NfQ05UX0xPV18y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMg==::MQ==::UExMX0NfQ05UX1BSU1RfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzI=::MQ==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8y::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8y::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzI=::MzMzNiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8y::MTA0IHBz::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMg==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8y::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfMw==::NA==::UExMX0NfQ05UX0hJR0hfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV18z::NA==::UExMX0NfQ05UX0xPV18z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfMw==::MQ==::UExMX0NfQ05UX1BSU1RfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzM=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl8z::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8z::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzM=::NjY3MiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8z::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfMw==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl8z::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl8z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNA==::NA==::UExMX0NfQ05UX0hJR0hfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV180::NA==::UExMX0NfQ05UX0xPV180"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNA==::MQ==::UExMX0NfQ05UX1BSU1RfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzQ=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl80::ZmFsc2U=::UExMX0NfQ05UX0JZUEFTU19FTl80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl80::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzQ=::NjY3MiBwcw==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl80::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl80::dHJ1ZQ==::UExMX0NfQ05UX09VVF9FTl80"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNQ==::MjU2::UExMX0NfQ05UX0hJR0hfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV181::MjU2::UExMX0NfQ05UX0xPV181"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNQ==::MQ==::UExMX0NfQ05UX1BSU1RfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzU=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl81::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl81::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzU=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl81::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNQ==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl81::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl81"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNg==::MjU2::UExMX0NfQ05UX0hJR0hfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV182::MjU2::UExMX0NfQ05UX0xPV182"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNg==::MQ==::UExMX0NfQ05UX1BSU1RfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzY=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl82::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl82::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzY=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzY="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl82::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNg==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl82::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl82"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfNw==::MjU2::UExMX0NfQ05UX0hJR0hfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV183::MjU2::UExMX0NfQ05UX0xPV183"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfNw==::MQ==::UExMX0NfQ05UX1BSU1RfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzc=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl83::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl83::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzc=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl83::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfNw==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfNw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl83::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl83"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0hJR0hfOA==::MjU2::UExMX0NfQ05UX0hJR0hfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0xPV184::MjU2::UExMX0NfQ05UX0xPV184"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BSU1RfOA==::MQ==::UExMX0NfQ05UX1BSU1RfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIX01VWF9QUlNUXzg=::MA==::UExMX0NfQ05UX1BIX01VWF9QUlNUXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0JZUEFTU19FTl84::dHJ1ZQ==::UExMX0NfQ05UX0JZUEFTU19FTl84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0VWRU5fRFVUWV9FTl84::ZmFsc2U=::UExMX0NfQ05UX0VWRU5fRFVUWV9FTl84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzg=::MC4wIE1Ieg==::UExMX0NfQ05UX0ZSRVFfUFNfU1RSXzg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX1BIQVNFX1BTX1NUUl84::MCBwcw==::UExMX0NfQ05UX1BIQVNFX1BTX1NUUl84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX0RVVFlfQ1lDTEVfOA==::NTA=::UExMX0NfQ05UX0RVVFlfQ1lDTEVfOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_PARAMETER "UExMX0NfQ05UX09VVF9FTl84::ZmFsc2U=::UExMX0NfQ05UX09VVF9FTl84"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJzL0ludGVybmFsIENvbXBvbmVudHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_NAME "YWx0ZXJhX2F2YWxvbl9tbV9icmlkZ2U="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLU1NIFBpcGVsaW5lIEJyaWRnZSBJbnRlbCBGUEdBIElQ"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_DESCRIPTION "SW5zZXJ0cyBhIHJlZ2lzdGVyIHN0YWdlIGluIHRoZSBBdmFsb24tTU0gY29tbWFuZCBhbmQgcmVzcG9uc2UgcGF0aHMuIEFjY2VwdHMgY29tbWFuZHMgb24gaXRzIEF2YWxvbi1NTSBzbGF2ZSBwb3J0IGFuZCBwcm9wYWdhdGVzIHRoZW0gdG8gaXRzIEF2YWxvbi1NTSBtYXN0ZXIgcG9ydC4="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "REFUQV9XSURUSA==::MzI=::RGF0YSB3aWR0aA=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "U1lNQk9MX1dJRFRI::OA==::U3ltYm9sIHdpZHRo"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "QUREUkVTU19XSURUSA==::MTY=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "U1lTSU5GT19BRERSX1dJRFRI::MTQ=::U1lTSU5GT19BRERSX1dJRFRI"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "VVNFX0FVVE9fQUREUkVTU19XSURUSA==::MA==::VXNlIGF1dG9tYXRpY2FsbHktZGV0ZXJtaW5lZCBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "QVVUT19BRERSRVNTX1dJRFRI::MTQ=::QXV0b21hdGljYWxseS1kZXRlcm1pbmVkIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "SERMX0FERFJfV0lEVEg=::MTY=::SERMX0FERFJfV0lEVEg="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "QUREUkVTU19VTklUUw==::U1lNQk9MUw==::QWRkcmVzcyB1bml0cw=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "QlVSU1RDT1VOVF9XSURUSA==::MQ==::QnVyc3Rjb3VudCB3aWR0aA=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "TUFYX0JVUlNUX1NJWkU=::MQ==::TWF4aW11bSBidXJzdCBzaXplICh3b3Jkcyk="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "TUFYX1BFTkRJTkdfUkVTUE9OU0VT::NA==::TWF4aW11bSBwZW5kaW5nIHJlYWQgdHJhbnNhY3Rpb25z"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "TElORVdSQVBCVVJTVFM=::MA==::TGluZSB3cmFwIGJ1cnN0cw=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfQ09NTUFORA==::MQ==::UGlwZWxpbmUgY29tbWFuZCBzaWduYWxz"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "UElQRUxJTkVfUkVTUE9OU0U=::MQ==::UGlwZWxpbmUgcmVzcG9uc2Ugc2lnbmFscw=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU1BPTlNF::MA==::VXNlIEF2YWxvbiBUcmFuc2FjdGlvbiBSZXNwb25zZXM="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0JyaWRnZXMgYW5kIEFkYXB0b3JzL01lbW9yeSBNYXBwZWQ="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfc3lzdGVtX2NvbXBvbmVudHMucGRm"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1OTI3NTc0OQ=="
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY4MzYxNDU1NTUvaGNvMTQxNjgzNjY1MzIyMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfYXZhbG9uX29uY2hpcF9tZW1vcnkyXzE4MF94eW14Nnph"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_DISPLAY_NAME "T24tQ2hpcCBNZW1vcnkgKFJBTSBvciBST00pIEludGVsIEZQR0EgSVA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "YWxsb3dJblN5c3RlbU1lbW9yeUNvbnRlbnRFZGl0b3I=::ZmFsc2U=::RW5hYmxlIEluLVN5c3RlbSBNZW1vcnkgQ29udGVudCBFZGl0b3IgZmVhdHVyZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "YmxvY2tUeXBl::QVVUTw==::QmxvY2sgdHlwZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRo::MzI=::U2xhdmUgUzEgRGF0YSB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGF0YVdpZHRoMg==::MzI=::U2xhdmUgUzIgRGF0YSB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZHVhbFBvcnQ=::ZmFsc2U=::RHVhbC1wb3J0IGFjY2Vzcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg=::ZmFsc2U=::ZGVyaXZlZF9lbmFibGVEaWZmV2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "aW5pdE1lbUNvbnRlbnQ=::dHJ1ZQ==::SW5pdGlhbGl6ZSBtZW1vcnkgY29udGVudA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "aW5pdGlhbGl6YXRpb25GaWxlTmFtZQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::VXNlciBjcmVhdGVkIGluaXRpYWxpemF0aW9uIGZpbGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZW5QUkluaXRNb2Rl::ZmFsc2U=::RW5hYmxlIFBhcnRpYWwgUmVjb25maWd1cmF0aW9uIEluaXRpYWxpemF0aW9uIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "bWVtb3J5U2l6ZQ==::MTYzODM=::VG90YWwgbWVtb3J5IHNpemU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "c2ltQWxsb3dNUkFNQ29udGVudHNGaWxl::ZmFsc2U=::QWxsb3cgTVJBTSBjb250ZW50cyBmaWxlIGZvciBzaW11bGF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "c2ltTWVtSW5pdE9ubHlGaWxlbmFtZQ==::MA==::U2ltdWxhdGlvbiBtZW1pbml0IG9ubHkgaGFzIGZpbGVuYW1l"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg==::ZmFsc2U=::ZGVyaXZlZF9zaW5nbGVDbG9ja09wZXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "c2xhdmUxTGF0ZW5jeQ==::MQ==::U2xhdmUgczEgTGF0ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "dXNlTm9uRGVmYXVsdEluaXRGaWxl::dHJ1ZQ==::RW5hYmxlIG5vbi1kZWZhdWx0IGluaXRpYWxpemF0aW9uIGZpbGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "Y29weUluaXRGaWxl::dHJ1ZQ==::Q29weSBub24tZGVmYXVsdCBpbml0aWFsaXphdGlvbiBmaWxlIHRvIGdlbmVyYXRlZCBmb2xkZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "d3JpdGFibGU=::ZmFsc2U=::VHlwZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZWNjX2VuYWJsZWQ=::ZmFsc2U=::RXh0ZW5kIHRoZSBkYXRhIHdpZHRoIHRvIHN1cHBvcnQgRUNDIGJpdHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "cmVzZXRyZXF1ZXN0X2VuYWJsZWQ=::ZmFsc2U=::UmVzZXQgUmVxdWVzdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU=::YWx0ZXJhX2VtaWZfY2FsX3NsYXZlX25mX2lvYXV4X3NvZnRfcmFt::YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmFtaWx5::QXJyaWEgMTA=::ZGV2aWNlRmFtaWx5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGV2aWNlRmVhdHVyZXM=::ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0::ZGV2aWNlRmVhdHVyZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aA==::MTI=::U2xhdmUgMSBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfYWRkcl93aWR0aDI=::MTI=::U2xhdmUgMiBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aA==::MzI=::U2xhdmUgMSBkYXRhIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9zZXRfZGF0YV93aWR0aDI=::MzI=::U2xhdmUgMiBkYXRhIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU=::QXV0b21hdGlj::ZGVyaXZlZF9ndWlfcmFtX2Jsb2NrX3R5cGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pc19oYXJkY29weQ==::ZmFsc2U=::ZGVyaXZlZF9pc19oYXJkY29weQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_PARAMETER "ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::ZGVyaXZlZF9pbml0X2ZpbGVfbmFtZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL09uIENoaXAgTWVtb3J5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9jb250ZW50L2RhbS9hbHRlcmEtd3d3L2dsb2JhbC9lbl9VUy9wZGZzL2xpdGVyYXR1cmUvdWcvdWdfc29wY19idWlsZGVyLnBkZg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY4MzYxNDU1NTUvaGNvMTQxNjgzNjY1MzIyMQ=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9tYXN0ZXJfdHJhbnNsYXRvcg=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLU1NIE1hc3RlciBUcmFuc2xhdG9yIEludGVsIEZQR0EgSVA="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBtYXN0ZXIgaW50ZXJmYWNlIHRvIGEgc2ltcGxlciByZXByZXNlbnRhdGlvbiB0aGF0IHRoZSBRc3lzIG5ldHdvcmsgdXNlcy4gUmVmZXIgdG8gdGhlIEF2YWxvbiBJbnRlcmZhY2UgU3BlY2lmaWNhdGlvbnMgKGh0dHA6Ly93d3cuYWx0ZXJhLmNvbS9saXRlcmF0dXJlL21hbnVhbC9tbmxfYXZhbG9uX3NwZWMucGRmKSBmb3IgZGVmaW5pdGlvbnMgb2YgdGhlIEF2YWxvbi1NTSBzaWduYWxzIGFuZCBleHBsYW5hdGlvbnMgb2YgdGhlIGJ1cnN0aW5nIHByb3BlcnRpZXMu"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MTY=::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::NA==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTY=::TmV0d29yayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MA==::cmVhZExhdGVuY3k="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MQ==::cmVhZFdhaXRUaW1l"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MQ==::VXNlIHJlYWQ="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MQ==::VXNlIGJ5dGVlbmFibGU="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MA==::VXNlIGNoaXBzZWxlY3Q="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MQ==::VXNlIGJ1cnN0Y291bnQ="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MQ==::VXNlIGRlYnVnYWNjZXNz"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0NMS0VO::MA==::VXNlIG5ldHdvcmsgY2xrZW4="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MQ==::VXNlIHJlYWRkYXRhdmFsaWQ="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MQ==::VXNlIHdhaXRyZXF1ZXN0"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MQ==::QWRkcmVzcyBzeW1ib2xz"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::NjQ=::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MA==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MA==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_PARAMETER "V0FJVFJFUVVFU1RfQUxMT1dBTkNF::MA==::V2FpdHJlcXVlc3QgQWxsb3dhbmNl"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_GROUP "SW50ZWwgRlBHQSBJbnRlcmNvbm5lY3QvTWVtb3J5LU1hcHBlZA=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_NAME "YWx0ZXJhX21lcmxpbl9zbGF2ZV90cmFuc2xhdG9y"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_DISPLAY_NAME "QXZhbG9uLU1NIFNsYXZlIFRyYW5zbGF0b3IgSW50ZWwgRlBHQSBJUA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_DESCRIPTION "Q29udmVydHMgdGhlIEF2YWxvbi1NTSBzbGF2ZSBpbnRlcmZhY2UgdG8gYSBzaW1wbGlmaWVkIHJlcHJlc2VudGF0aW9uIHRoYXQgdGhlIFFzeXMgbmV0d29yayB1c2VzLiBSZWZlciB0byB0aGUgQXZhbG9uIEludGVyZmFjZSBTcGVjaWZpY2F0aW9ucyAoaHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbWFudWFsL21ubF9hdmFsb25fc3BlYy5wZGYpIGZvciBkZWZpbml0aW9ucyBvZiB0aGUgQXZhbG9uLU1NIHNpZ25hbHMgYW5kIGV4cGxhbmF0aW9ucyBvZiB0aGUgYnVyc3RpbmcgcHJvcGVydGllcyBhbmQgYWRkcmVzcyBhbGlnbm1lbnQu"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19X::MTI=::Q29tcG9uZW50IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9X::MzI=::Q29tcG9uZW50IERhdGEgd2lkdGg="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0RBVEFfVw==::MzI=::TmV0d29yayBEYXRhIHdpZHRo"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9X::MQ==::Q29tcG9uZW50IGJ1cnN0Y291bnQgd2lkdGg="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQllURUVOQUJMRV9X::NA==::Q29tcG9uZW50IGJ5dGVlbmFibGUgd2lkdGg="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0JZVEVFTkFCTEVfVw==::NA==::TmV0d29yayBieXRlZW5hYmxlIHdpZHRo"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NfVw==::MTY=::TmV0d29yayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0JVUlNUQ09VTlRfVw==::Mw==::TmV0d29yayBidXJzdGNvdW50IHdpZHRo"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVBRExBVEVOQ1k=::MQ==::cmVhZExhdGVuY3k="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVA==::MA==::c2V0dXBUaW1l"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVA==::MA==::d3JpdGVXYWl0VGltZQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlU::MA==::cmVhZFdhaXRUaW1l"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xE::MA==::SG9sZCB0aW1l"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfVElNSU5HX1VOSVRT::MQ==::VGltaW5nIHVuaXRz"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRB::MQ==::VXNlIHJlYWRkYXRh"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFREFUQQ==::MQ==::VXNlIHdyaXRlZGF0YQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUQ=::MA==::VXNlIHJlYWQ="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRF::MQ==::VXNlIHdyaXRl"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOQlVSU1RUUkFOU0ZFUg==::MA==::VXNlIGJlZ2luYnVyc3R0cmFuc2Zlcg=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JFR0lOVFJBTlNGRVI=::MA==::VXNlIGJlZ2ludHJhbnNmZXI="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JZVEVFTkFCTEU=::MQ==::VXNlIGJ5dGVlbmFibGU="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0NISVBTRUxFQ1Q=::MQ==::VXNlIGNoaXBzZWxlY3Q="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0FERFJFU1M=::MQ==::VXNlIGFkZHJlc3M="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0JVUlNUQ09VTlQ=::MA==::VXNlIGJ1cnN0Y291bnQ="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQUREQVRBVkFMSUQ=::MA==::VXNlIHJlYWRkYXRhdmFsaWQ="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dBSVRSRVFVRVNU::MA==::VXNlIHdhaXRyZXF1ZXN0"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFQllURUVOQUJMRQ==::MA==::VXNlIHdyaXRlYnl0ZWVuYWJsZQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0xPQ0s=::MA==::VXNlIGxvY2s="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0FWX0NMS0VO::MQ==::VXNlIGNvbXBvbmVudCBjbGtlbg=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1VBVl9DTEtFTg==::MA==::VXNlIG5ldHdvcmsgY2xrZW4="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX09VVFBVVEVOQUJMRQ==::MA==::VXNlIG91dHB1dGVuYWJsZQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX0RFQlVHQUNDRVNT::MQ==::VXNlIGRlYnVnYWNjZXNz"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFQURSRVNQT05TRQ==::MA==::VXNlIHJlYWRyZXNwb25zZQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VVNFX1dSSVRFUkVTUE9OU0U=::MA==::VXNlIHdyaXRlcmVzcG9uc2U="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfU1lNQk9MU19QRVJfV09SRA==::NA==::U3ltYm9scyBwZXIgd29yZA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU19TWU1CT0xT::MA==::QWRkcmVzcyBzeW1ib2xz"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RDT1VOVF9TWU1CT0xT::MA==::QnVyc3Rjb3VudCBzeW1ib2xz"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQ09OU1RBTlRfQlVSU1RfQkVIQVZJT1I=::MA==::Q29tcG9uZW50IGNvbnN0YW50QnVyc3RCZWhhdmlvcg=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0NPTlNUQU5UX0JVUlNUX0JFSEFWSU9S::MA==::TmV0d29yayBjb25zdGFudEJ1cnN0QmVoYXZpb3I="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVRVUlSRV9VTkFMSUdORURfQUREUkVTU0VT::MA==::VW5hbGlnbmVkIGFkZHJlc3Nlcw=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfTElORVdSQVBCVVJTVFM=::MA==::bGluZXdyYXBCdXJzdHM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfUkVBRF9UUkFOU0FDVElPTlM=::MQ==::bWF4UGVuZGluZ1JlYWRUcmFuc2FjdGlvbnM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfTUFYX1BFTkRJTkdfV1JJVEVfVFJBTlNBQ1RJT05T::MA==::bWF4UGVuZGluZ1dyaXRlVHJhbnNhY3Rpb25z"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQlVSU1RCT1VOREFSSUVT::MA==::YnVyc3RPbkJ1cnN0Qm91bmRhcmllc09ubHk="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfSU5URVJMRUFWRUJVUlNUUw==::MA==::aW50ZXJsZWF2ZUJ1cnN0cw=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQklUU19QRVJfU1lNQk9M::OA==::Qml0cy9zeW1ib2w="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfSVNCSUdFTkRJQU4=::MA==::aXNCaWdFbmRpYW4="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUREUkVTU0dST1VQ::MA==::Q29tcG9uZW50IGFkZHJlc3MgZ3JvdXA="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "VUFWX0FERFJFU1NHUk9VUA==::MA==::TmV0d29yayBhZGRyZXNzIGdyb3Vw"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJPVVRHT0lOR1NJR05BTFM=::MA==::cmVnaXN0ZXJPdXRnb2luZ1NpZ25hbHM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVHSVNURVJJTkNPTUlOR1NJR05BTFM=::MA==::cmVnaXN0ZXJJbmNvbWluZ1NpZ25hbHM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfQUxXQVlTQlVSU1RNQVhCVVJTVA==::MA==::QWx3YXlzIGJ1cnN0IG1heC1idXJzdA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "Q0hJUFNFTEVDVF9USFJPVUdIX1JFQURMQVRFTkNZ::MA==::Q2hpcHNlbGVjdCB0aHJvdWdoIHJlYWQgbGF0ZW5jeQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "Q0xPQ0tfUkFURQ==::MQ==::Q0xPQ0tfUkFURQ=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfUkVBRF9XQUlUX0NZQ0xFUw==::MA==::QVZfUkVBRF9XQUlUX0NZQ0xFUw=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfV1JJVEVfV0FJVF9DWUNMRVM=::MA==::QVZfV1JJVEVfV0FJVF9DWUNMRVM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfU0VUVVBfV0FJVF9DWUNMRVM=::MA==::QVZfU0VUVVBfV0FJVF9DWUNMRVM="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "QVZfREFUQV9IT0xEX0NZQ0xFUw==::MA==::QVZfREFUQV9IT0xEX0NZQ0xFUw=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "V0FJVFJFUVVFU1RfQUxMT1dBTkNF::MA==::V2FpdHJlcXVlc3QgQWxsb3dhbmNl"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_GROUP "SW50ZWwgRlBHQSBJbnRlcmNvbm5lY3QvTWVtb3J5LU1hcHBlZA=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfbW1faW50ZXJjb25uZWN0XzE4MF83a200dHJx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_DISPLAY_NAME "TU0gSW50ZXJjb25uZWN0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_INTERNAL "On"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_DESCRIPTION "TU0gSW50ZXJjb25uZWN0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_PARAMETER "U1lOQ19SRVNFVA==::MA==::VXNlIHN5bmNocm9ub3VzIHJlc2V0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVMyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_COMPONENT_GROUP "TWVybGluIENvbXBvbmVudHM="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_NAME "YWx0ZXJhX3Jlc2V0X2NvbnRyb2xsZXI="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_DISPLAY_NAME "TWVybGluIFJlc2V0IENvbnRyb2xsZXIgSW50ZWwgRlBHQSBJUA=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_DESCRIPTION "Rm9yIHN5c3RlbXMgd2l0aCBtdWx0aXBsZSByZXNldCBpbnB1dHMsIHRoZSBNZXJsaW4gUmVzZXQgQ29udHJvbGxlciBPUnMgYWxsIHJlc2V0IGlucHV0cyBhbmQgZ2VuZXJhdGVzIGEgc2luZ2xlIHJlc2V0IG91dHB1dC4="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "TlVNX1JFU0VUX0lOUFVUUw==::MQ==::TnVtYmVyIG9mIGlucHV0cw=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "T1VUUFVUX1JFU0VUX1NZTkNfRURHRVM=::ZGVhc3NlcnQ=::T3V0cHV0IFJlc2V0IFN5bmNocm9ub3VzIEVkZ2Vz"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "U1lOQ19ERVBUSA==::Mg==::U3luY2hyb25pemVyIGRlcHRo"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRVUVTVF9QUkVTRU5U::MA==::UmVzZXQgcmVxdWVzdCBsb2dpYyBlbmFibGU="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX1dBSVRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCB3YWl0IHRpbWU="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "TUlOX1JTVF9BU1NFUlRJT05fVElNRQ==::Mw==::TWluaW11bSByZXNldCBhc3NlcnRpb24gdGltZQ=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "UkVTRVRfUkVRX0VBUkxZX0RTUlRfVElNRQ==::MQ==::UmVzZXQgcmVxdWVzdCBkZWFzc2VydCB0aW1pbmc="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4w::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjA="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4x::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4y::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjI="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4z::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjM="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU40::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjQ="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU41::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjU="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU42::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjY="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU43::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjc="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU44::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjg="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU45::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjk="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEw"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEx"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMg==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEy"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xMw==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjEz"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNA==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE0"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU4xNQ==::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcG9ydCByZXNldF9pbjE1"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "VVNFX1JFU0VUX1JFUVVFU1RfSU5QVVQ=::MA==::RW5hYmxlIHJlc2V0X3JlcSBmb3IgcmVzZXRfaW5wdXRz"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_PARAMETER "QURBUFRfUkVTRVRfUkVRVUVTVA==::MA==::T25seSBhZGFwdCBvbmx5IHJlc2V0IHJlcXVlc3Q="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0Nsb2NrczsgUExMcyBhbmQgUmVzZXRz"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvcXRzL3FzeXNfaW50ZXJjb25uZWN0LnBkZg=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL213aDE0MDk5NjAxODE2NDEvbXdoMTQwOTk1ODgyODczMg=="
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl9jYWxfc2xhdmVfbmZfMTgwX2Vmc2x5eXE="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_DISPLAY_NAME "QXJyaWEgMTAgRXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXMgQ2FsaWJyYXRpb24gU2xhdmUvSGVscGVyIGNvbXBvbmVudA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_INTERNAL "On"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_DESCRIPTION "VGhpcyBjb21wb25lbnQgaW5zdGFudGlhdGVzIGNvbXBvbmVudHMgdGhhdCBzZXJ2ZSBhcyBzbGF2ZXMgdG8gdGhlIEVNSUYgY2FsaWJyYXRpb24gcHJvY2Vzc29yLiBJdCBpcyBpbnRlbmRlZCBmb3IgaW50ZXJuYWwgdXNlIG9ubHku"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0pUQUdfVUFSVA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBmb3IgRGVidWcgT3V0cHV0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX1NPRlRfUkFN::dHJ1ZQ==::RW5hYmxlIHNvZnQgUkFNIGZvciBjYWxpYnJhdGlvbiBjb2RlIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "U09GVF9SQU1fSEVYRklMRQ==::Li4vLi4vZW1pZi9pcF9hcmNoX25mL3NyYy9zZXFfY2FsX3NvZnRfbTIway5oZXg=::UEFSQU1fU09GVF9SQU1fSEVYRklMRV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVMyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::MQ==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9hbHRlcmFfZW1pZl8xODBfbnozbWR4YQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DISPLAY_NAME "RXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXMgSW50ZWwgQXJyaWEgMTAgRlBHQSBJUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_VERSION "MTguMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DESCRIPTION "RXh0ZXJuYWwgTWVtb3J5IEludGVyZmFjZXMgSW50ZWwgQXJyaWEgMTAgRlBHQSBJUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX0ZBTUlMWQ==::QXJyaWEgMTA=::UEFSQU1fU1lTX0lORk9fREVWSUNFX0ZBTUlMWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNF::MTBBWDExNVMyRjQ1RTFTRw==::UEFSQU1fU1lTX0lORk9fREVWSUNFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fREVWSUNFX1NQRUVER1JBREU=::MQ==::UEFSQU1fU1lTX0lORk9fREVWSUNFX1NQRUVER1JBREVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RkFNSUxZX0VOVU0=::RkFNSUxZX0FSUklBMTA=::UEFSQU1fRkFNSUxZX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "VFJBSVRfU1VQUE9SVFNfVklE::MA==::UEFSQU1fVFJBSVRfU1VQUE9SVFNfVklEX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UFJPVE9DT0xfRU5VTQ==::UFJPVE9DT0xfRERSNA==::UHJvdG9jb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "SVNfRURfU0xBVkU=::ZmFsc2U=::UEFSQU1fSVNfRURfU0xBVkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "SU5URVJOQUxfVEVTVElOR19NT0RF::ZmFsc2U=::UEFSQU1fSU5URVJOQUxfVEVTVElOR19NT0RFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWQ==::NTAwMDAwMDA=::UEFSQU1fQ0FMX0RFQlVHX0NMT0NLX0ZSRVFVRU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "U1lTX0lORk9fVU5JUVVFX0lE::aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMF9kZHI0X2luc3Q=::UEFSQU1fU1lTX0lORk9fVU5JUVVFX0lEX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UFJFVl9QUk9UT0NPTF9FTlVN::UFJPVE9DT0xfRERSNA==::UEFSQU1fUFJFVl9QUk9UT0NPTF9FTlVNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0ZQR0FfU1BFRURHUkFERV9HVUk=::RTEgKFByb2R1Y3Rpb24pIC0gY2hhbmdlIGRldmljZSB1bmRlciAnVmlldyctPidEZXZpY2UgRmFtaWx5Jw==::U3BlZWQgZ3JhZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9TUEVFREdSQURF::RTE=::UEFSQU1fUEhZX1RBUkdFVF9TUEVFREdSQURFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUw==::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzI=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19FUzM=::ZmFsc2U=::UEFSQU1fUEhZX1RBUkdFVF9JU19FUzNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1RBUkdFVF9JU19QUk9EVUNUSU9O::dHJ1ZQ==::UEFSQU1fUEhZX1RBUkdFVF9JU19QUk9EVUNUSU9OX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPTkZJR19FTlVN::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JBVEVfRU5VTQ==::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX01FTV9DTEtfRlJFUV9NSFo=::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfRlJFUV9NSFo=::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JFRl9DTEtfSklUVEVSX1BT::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VOVU0=::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0NPUkVfQ0xLU19TSEFSSU5HX0VYUE9TRV9TTEFWRV9PVVQ=::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0FDX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0FDX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0NLX0NBTElCUkFURURfT0NU::dHJ1ZQ==::UEFSQU1fUEhZX0NLX0NBTElCUkFURURfT0NUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1Q=::dHJ1ZQ==::UEFSQU1fUEhZX0RBVEFfQ0FMSUJSQVRFRF9PQ1RfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JaUQ==::MjQw::UlpRIHJlc2lzdG9y"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0hQU19FTkFCTEVfRUFSTFlfUkVMRUFTRQ==::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1VTRVJfUEVSSU9ESUNfT0NUX1JFQ0FMX0VOVU0=::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0FERF9FWFRSQV9DTEtT::ZmFsc2U=::U3BlY2lmeSBhZGRpdGlvbmFsIGNvcmUgY2xvY2tzIGJhc2VkIG9uIGV4aXN0aW5nIFBMTA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX1VTRVJfTlVNX09GX0VYVFJBX0NMS1M=::MA==::TnVtYmVyIG9mIGFkZGl0aW9uYWwgY29yZSBjbG9ja3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzA=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzA=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8w::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8w::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzA=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8w::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8wX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzE=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzE=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8x::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8x::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzE=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzFfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8x::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8xX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzI=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzI=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8y::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8y::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzI=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8y::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8yX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzM=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzM=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8z::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8z::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzM=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfMw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8z::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV8zX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzQ=::MC4w::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzQ=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzQ=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzRfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV80X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzU=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzU=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzU=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNQ==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV81X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzY=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzY=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzY=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzZfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNg==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV82X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzc=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzc=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzc=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzdfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfNw==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV83X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfR1VJXzg=::MTAwLjA=::RnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfR1VJXzg=::MC4w::UGhhc2Ugc2hpZnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84::MTAwLjA=::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0ZSRVFfTUhaX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84::MA==::UEFSQU1fUExMX0VYVFJBX0NMS19QSEFTRV9TSElGVF9VTklUX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX1BIQVNFX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfREVHX0dVSV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzg=::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19ERVNJUkVEX0RVVFlfQ1lDTEVfR1VJXzhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOA==::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV9HVUlfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84::NTAuMA==::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRFVUWV9DWUNMRV84X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX1ZDT19DTEtfRlJFUV9NSFo=::MTIwMC4w::UEFSQU1fUExMX1ZDT19DTEtfRlJFUV9NSFpfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX05VTV9PRl9FWFRSQV9DTEtT::MA==::UEFSQU1fUExMX05VTV9PRl9FWFRSQV9DTEtTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfMw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfM19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNQ==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNQ==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNg==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNg==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfNw==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfNw==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfN19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOA==::MTIwMC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfRlJFUV9NSFpfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOA==::MC4w::UEFSQU1fUExMX0VYVFJBX0NMS19BQ1RVQUxfUEhBU0VfUFNfOF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MTMzLjMzMw==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIw::MA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0FERFIx::OA==::UEFSQU1fUEhZX0REUjNfQ0FMX0FERFIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVT::dHJ1ZQ==::UEFSQU1fUEhZX0REUjNfQ0FMX0VOQUJMRV9OT05fREVTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfTUVNX0NMS19GUkVRX01IWg==::MTIwMC4w::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUkVGX0NMS19GUkVRX01IWg==::MjUuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfSU9fU1REX0VOVU0=::SU9fU1REX1NTVExfMTI=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfTU9ERV9FTlVN::T1VUX09DVF80MF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JT19TVERfRU5VTQ==::SU9fU1REX1BPRF8xMg==::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9PVVRfTU9ERV9FTlVN::T1VUX09DVF8zNF9DQUw=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfREFUQV9JTl9NT0RFX0VOVU0=::SU5fT0NUXzEyMF9DQUw=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfU1RBUlRJTkdfVlJFRklO::NjEuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::SU9fU1REX0xWRFM=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0REUjRfUlpRX0lPX1NURF9FTlVN::SU9fU1REX0NNT1NfMTI=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfTUVNX0NMS19GUkVRX01IWg==::NjMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSU9fVk9MVEFHRQ==::MS41::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1FEUjRfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9BTkRfU09GVF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfTUVNX0NMS19GUkVRX01IWg==::NTMzLjMzMw==::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkFURV9FTlVN::UkFURV9IQUxG::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSU9fVk9MVEFHRQ==::MS44::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDJfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09ORklHX0VOVU0=::Q09ORklHX1BIWV9PTkxZ::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfTUVNX0NMS19GUkVRX01IWg==::MTA2Ni42Njc=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9SRUZfQ0xLX0ZSRVE=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19KSVRURVJfUFM=::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkFURV9FTlVN::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRU5VTQ==::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ09SRV9DTEtTX1NIQVJJTkdfRVhQT1NFX1NMQVZFX09VVA==::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSU9fVk9MVEFHRQ==::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREVGQVVMVF9JTw==::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfSFBTX0VOQUJMRV9FQVJMWV9SRUxFQVNF::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QRVJJT0RJQ19PQ1RfUkVDQUxfRU5VTQ==::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUkVGX0NMS19GUkVRX01IWg==::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUElOR19QT05HX0VO::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfVVNFUl9SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQUNfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQ0tfU0xFV19SQVRFX0VOVU0=::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9PVVRfTU9ERV9FTlVN::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfREFUQV9JTl9NT0RFX0VOVU0=::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfQVVUT19TVEFSVElOR19WUkVGSU5fRU4=::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfU1RBUlRJTkdfVlJFRklO::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUExMX1JFRl9DTEtfSU9fU1REX0VOVU0=::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX1JMRDNfUlpRX0lPX1NURF9FTlVN::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT05GSUdfRU5VTQ==::Q09ORklHX1BIWV9BTkRfSEFSRF9DVFJM::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BJTkdfUE9OR19FTg==::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19NRU1fQ0xLX0ZSRVFfTUha::ODAwLjA=::TWVtb3J5IGNsb2NrIGZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX1JFRl9DTEtfRlJFUQ==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIFBMTCByZWZlcmVuY2UgY2xvY2sgZnJlcXVlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JFRl9DTEtfRlJFUV9NSFo=::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0pJVFRFUl9QUw==::MTAuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBqaXR0ZXI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SQVRFX0VOVU0=::UkFURV9RVUFSVEVS::Q2xvY2sgcmF0ZSBvZiB1c2VyIGxvZ2lj"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FTlVN::Q09SRV9DTEtTX1NIQVJJTkdfRElTQUJMRUQ=::Q29yZSBjbG9ja3Mgc2hhcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DT1JFX0NMS1NfU0hBUklOR19FWFBPU0VfU0xBVkVfT1VU::ZmFsc2U=::RXhwb3J0IGNsa3Nfc2hhcmluZ19zbGF2ZV9vdXQgdG8gZmFjaWxpdGF0ZSBtdWx0aS1zbGF2ZSBjb25uZWN0aXZpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19JT19WT0xUQUdF::MS4y::Vm9sdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19ERUZBVUxUX0lP::dHJ1ZQ==::VXNlIGRlZmF1bHQgSS9PIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19IUFNfRU5BQkxFX0VBUkxZX1JFTEVBU0U=::ZmFsc2U=::RW5hYmxlIEhQUyBFYXJseSBSZWxlYXNlIE1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BFUklPRElDX09DVF9SRUNBTF9FTlVN::UEVSSU9ESUNfT0NUX1JFQ0FMX0FVVE8=::UGVyaW9kaWMgT0NUIHJlLWNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SRUZfQ0xLX0ZSRVFfTUha::LTEuMA==::UExMIHJlZmVyZW5jZSBjbG9jayBmcmVxdWVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QSU5HX1BPTkdfRU4=::ZmFsc2U=::SW5zdGFudGlhdGUgdHdvIGNvbnRyb2xsZXJzIHNoYXJpbmcgYSBQaW5nIFBvbmcgUEhZ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FDX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0NLX1NMRVdfUkFURV9FTlVN::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU9fU1REX0VOVU0=::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfT1VUX01PREVfRU5VTQ==::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0RBVEFfSU5fTU9ERV9FTlVN::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX0FVVE9fU1RBUlRJTkdfVlJFRklOX0VO::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1NUQVJUSU5HX1ZSRUZJTg==::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1BMTF9SRUZfQ0xLX0lPX1NURF9FTlVN::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19VU0VSX1JaUV9JT19TVERfRU5VTQ==::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BQ19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19JT19TVERfRU5VTQ==::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19DS19TTEVXX1JBVEVfRU5VTQ==::U0xFV19SQVRFX0ZBU1Q=::U2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lPX1NURF9FTlVN::dW5zZXQ=::SS9PIHN0YW5kYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX09VVF9NT0RFX0VOVU0=::dW5zZXQ=::T3V0cHV0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19EQVRBX0lOX01PREVfRU5VTQ==::dW5zZXQ=::SW5wdXQgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19BVVRPX1NUQVJUSU5HX1ZSRUZJTl9FTg==::dHJ1ZQ==::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19TVEFSVElOR19WUkVGSU4=::NzAuMA==::SW5pdGlhbCBWcmVmaW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19QTExfUkVGX0NMS19JT19TVERfRU5VTQ==::dW5zZXQ=::UExMIHJlZmVyZW5jZSBjbG9jayBJL08gc3RhbmRhcmQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "UEhZX0xQRERSM19SWlFfSU9fU1REX0VOVU0=::dW5zZXQ=::UlpRIEkvTyBzdGFuZGFyZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0ZPUk1BVF9FTlVN::TUVNX0ZPUk1BVF9TT0RJTU0=::UEFSQU1fTUVNX0ZPUk1BVF9FTlVNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JFQURfTEFURU5DWQ==::MTguMA==::UEFSQU1fTUVNX1JFQURfTEFURU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1dSSVRFX0xBVEVOQ1k=::MTg=::UEFSQU1fTUVNX1dSSVRFX0xBVEVOQ1lfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0JVUlNUX0xFTkdUSA==::OA==::UEFSQU1fTUVNX0JVUlNUX0xFTkdUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0RBVEFfTUFTS19FTg==::dHJ1ZQ==::UEFSQU1fTUVNX0RBVEFfTUFTS19FTl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0hBU19TSU1fU1VQUE9SVA==::dHJ1ZQ==::UEFSQU1fTUVNX0hBU19TSU1fU1VQUE9SVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX05VTV9PRl9EQVRBX0VORFBPSU5UUw==::Mg==::UEFSQU1fTUVNX05VTV9PRl9EQVRBX0VORFBPSU5UU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9EQVRBX1dJRFRI::NzI=::UEFSQU1fTUVNX1RUTF9EQVRBX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFM=::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfUkVBRF9HUk9VUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBT::OQ==::UEFSQU1fTUVNX1RUTF9OVU1fT0ZfV1JJVEVfR1JPVVBTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9VRElNTQ==::TWVtb3J5IGZvcm1hdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkFOS1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk9XX0FERFJfV0lEVEg=::MTQ=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUkRJTU1fQ09ORklH::MDAwMDAwMDAwMDAwMDAwMA==::RERSMyBSRElNTS9MUkRJTU0gY29udHJvbCB3b3Jkcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTFJESU1NX0VYVEVOREVEX0NPTkZJRw==::MHgwMDAwMDAwMDAwMDAwMDAwMDA=::RERSMyBMUkRJTU0gYWRkaXRpb25hbCBjb250cm9sIHdvcmRz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSM19BTEVSVF9OX1BMQUNFTUVOVF9BQ19MQU5FUw==::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFFTX1dJRFRI::OA==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfQ1NfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1NfUEVSX0RJTU0=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0tFX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfQ0tFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfT0RUX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfT0RUX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUl9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUNfUEFSX0VO::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQUNfUEFSX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0REUjNfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRU19XSURUSA==::OA==::UEFSQU1fTUVNX0REUjNfVFRMX0RRU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjNfVFRMX0RRX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0RNX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0RNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NTX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NTX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLX1dJRFRI::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0NLRV9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0NLRV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX09EVF9XSURUSA==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX09EVF9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSA==::Mw==::UEFSQU1fTUVNX0REUjNfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX0FERFJfV0lEVEg=::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjNfVFRMX1JNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9ESU1NU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::MQ==::UEFSQU1fTUVNX0REUjNfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIw::MA==::UEFSQU1fTUVNX0REUjNfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIx::MA==::UEFSQU1fTUVNX0REUjNfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIy::MA==::UEFSQU1fTUVNX0REUjNfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfTVIz::MA==::UEFSQU1fTUVNX0REUjNfTVIzX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjNfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQkxfRU5VTQ==::RERSM19CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQlRfRU5VTQ==::RERSM19CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVNSX0VOVU0=::RERSM19BU1JfTUFOVUFM::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1JUX0VOVU0=::RERSM19TUlRfTk9STUFM::U2VsZi1yZWZyZXNoIHRlbXBlcmF0dXJl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUERfRU5VTQ==::RERSM19QRF9PRkY=::RExMIHByZWNoYXJnZSBwb3dlciBkb3du"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRFJWX1NUUl9FTlVN::RERSM19EUlZfU1RSX1JaUV82::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX05PTV9FTlVN::RERSM19SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUlRUX1dSX0VOVU0=::RERSM19SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV1RDTA==::Ng==::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQVRDTF9FTlVN::RERSM19BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVENM::Nw==::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVE4=::LCw=::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDA=::LCw=::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDE=::LCw=::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDI=::LCw=::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfUl9ERVJJVkVEX09EVDM=::LCw=::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVE4=::LCw=::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDA=::LCw=::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDE=::LCw=::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDI=::LCw=::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfV19ERVJJVkVEX09EVDM=::LCw=::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9MTw==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9MT19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjNfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MA==::UEFSQU1fTUVNX0REUjNfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfU1BFRURCSU5fRU5VTQ==::RERSM19TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElTX0FDX01W::MTM1::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX1BT::NTM=::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTX0FDX01W::MTM1::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX1BT::NTU=::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1FfUFM=::NzU=::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFIX0NZQw==::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX1BT::MTgw::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFFTSF9DWUM=::MC40::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTSF9DWUM=::MC4xOA==::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMU19QUw==::MTI1LjA=::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdMSF9QUw==::MTI1LjA=::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERTU19DWUM=::MC4xOA==::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfVVM=::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVE1SRF9DS19DWUM=::NA==::dE1SRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19OUw==::MzMuMA==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9OUw==::MTMuMDk=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX05T::MTMuMDk=::dFJQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfVVM=::Ny44::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX05T::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdUUl9DWUM=::NA==::dFdUUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19OUw==::MjUuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJSRF9DWUM=::Ng==::dFJSRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJUUF9DWUM=::OA==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVElOSVRfQ0s=::NDk5::UEFSQU1fTUVNX0REUjNfVElOSVRfQ0tfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjNfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJBU19DWUM=::MzY=::UEFSQU1fTUVNX0REUjNfVFJBU19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJDRF9DWUM=::MTQ=::UEFSQU1fTUVNX0REUjNfVFJDRF9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJQX0NZQw==::MTQ=::UEFSQU1fTUVNX0REUjNfVFJQX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJGQ19DWUM=::MTcx::UEFSQU1fTUVNX0REUjNfVFJGQ19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFdSX0NZQw==::MTY=::UEFSQU1fTUVNX0REUjNfVFdSX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVEZBV19DWUM=::Mjc=::UEFSQU1fTUVNX0REUjNfVEZBV19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfVFJFRklfQ1lD::ODMyMA==::UEFSQU1fTUVNX0REUjNfVFJFRklfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9TQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjNfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjNfQ0ZHX0dFTl9EQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9TT0RJTU0=::TWVtb3J5IGZvcm1hdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfV0lEVEg=::NzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFfUEVSX0RRUw==::OA==::RFEgcGlucyBwZXIgRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfQ1NfV0lEVEg=::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0RJTU1T::MQ==::TnVtYmVyIG9mIERJTU1z"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0hJUF9JRF9XSURUSA==::MA==::Q2hpcCBJRCB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkFOS1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIHBoeXNpY2FsIHJhbmtzIHBlciBESU1N"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1BFUl9ESU1N::MQ==::TnVtYmVyIG9mIGNsb2NrIGVuYWJsZXMgcGVyIERJTU0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tfV0lEVEg=::Mg==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk9XX0FERFJfV0lEVEg=::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ09MX0FERFJfV0lEVEg=::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19BRERSX1dJRFRI::Mg==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkFOS19HUk9VUF9XSURUSA==::Mg==::QmFuayBncm91cCB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRE1fRU4=::dHJ1ZQ==::RGF0YSBtYXNr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfUEFSX0VO::dHJ1ZQ==::RW5hYmxlIEFMRVJUIy9QQVIgcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9QTEFDRU1FTlRfRU5VTQ==::RERSNF9BTEVSVF9OX1BMQUNFTUVOVF9EQVRBX0xBTkVT::QUxFUlQjIHBpbiBwbGFjZW1lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9EUVNfR1JPVVA=::MA==::RFFTIGdyb3VwIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19MQU5F::MA==::QWRkcmVzcy9jb21tYW5kIEkvTyBsYW5lIG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUxFUlRfTl9BQ19QSU4=::MA==::UGluIGluZGV4IG9mIEFMRVJUIw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRElTQ1JFVEVfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgY2hpcC1zZWxlY3Rz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUlSUk9SX0FERFJFU1NJTkdfRU4=::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MgbWlycm9yaW5nIGZvciBvZGQgcmFua3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSElERV9BRFZfTVJfU0VUVElOR1M=::dHJ1ZQ==::SGlkZSBhZHZhbmNlZCBtb2RlIHJlZ2lzdGVyIHNldHRpbmdz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQkxfRU5VTQ==::RERSNF9CTF9CTDg=::QnVyc3QgTGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQlRfRU5VTQ==::RERSNF9CVF9TRVFVRU5USUFM::UmVhZCBCdXJzdCBUeXBl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENM::MTg=::TWVtb3J5IENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX05PTV9FTlVN::RERSNF9SVFRfTk9NX09EVF9ESVNBQkxFRA==::T0RUIFJ0dCBub21pbmFsIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRExMX0VO::dHJ1ZQ==::RW5hYmxlIHRoZSBETEwgaW4gbWVtb3J5IGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVRDTF9FTlVN::RERSNF9BVENMX0RJU0FCTEVE::TWVtb3J5IGFkZGl0aXZlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFJWX1NUUl9FTlVN::RERSNF9EUlZfU1RSX1JaUV83::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQVNSX0VOVU0=::RERSNF9BU1JfTUFOVUFMX05PUk1BTA==::QXV0byBzZWxmLXJlZnJlc2ggbWV0aG9k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1dSX0VOVU0=::RERSNF9SVFRfV1JfT0RUX0RJU0FCTEVE::RHluYW1pYyBPRFQgKFJ0dF9XUikgdmFsdWU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1RDTA==::MTg=::TWVtb3J5IHdyaXRlIENBUyBsYXRlbmN5IHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ1JD::ZmFsc2U=::V3JpdGUgQ1JDIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfR0VBUkRPV04=::RERSNF9HRUFSRE9XTl9IUg==::RERSNCBnZWFyZG93biBtb2Rl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUEVSX0RSQU1fQUREUg==::ZmFsc2U=::UGVyLURSQU0gYWRkcmVzc2FiaWxpdHk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9TRU5TT1JfUkVBRE9VVA==::ZmFsc2U=::VGVtcGVyYXR1cmUgc2Vuc29yIHJlYWRvdXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRklORV9HUkFOVUxBUklUWV9SRUZSRVNI::RERSNF9GSU5FX1JFRlJFU0hfRklYRURfMVg=::RmluZSBncmFudWxhcml0eSByZWZyZXNo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVBSX1JFQURfRk9STUFU::RERSNF9NUFJfUkVBRF9GT1JNQVRfU0VSSUFM::TVBSIHJlYWQgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTUFYX1BPV0VSRE9XTg==::ZmFsc2U=::TWF4aW11bSBwb3dlciBkb3duIG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfUkFOR0U=::RERSNF9URU1QX0NPTlRST0xMRURfUkZTSF9OT1JNQUw=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEVNUF9DT05UUk9MTEVEX1JGU0hfRU5B::ZmFsc2U=::VGVtcGVyYXR1cmUgY29udHJvbGxlZCByZWZyZXNoIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSU5URVJOQUxfVlJFRkRRX01PTklUT1I=::ZmFsc2U=::SW50ZXJuYWwgVnJlZkRRIG1vbml0b3I="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0FMX01PREU=::MA==::Q1MgdG8gQWRkci9DTUQgTGF0ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VMRl9SRlNIX0FCT1JU::ZmFsc2U=::U2VsZiByZWZyZXNoIGFib3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRV9UUkFJTklORw==::ZmFsc2U=::UmVhZCBwcmVhbWJsZSB0cmFpbmluZyBtb2RlIGVuYWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9QUkVBTUJMRQ==::MQ==::UmVhZCBwcmVhbWJsZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfUFJFQU1CTEU=::MQ==::V3JpdGUgcHJlYW1ibGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEFSSVRZX0xBVEVOQ1k=::RERSNF9BQ19QQVJJVFlfTEFURU5DWV9ESVNBQkxF::QWRkci9DTUQgcGFyaXR5IGxhdGVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX0lOX1BPV0VSRE9XTg==::dHJ1ZQ==::T0RUIGlucHV0IGJ1ZmZlciBkdXJpbmcgcG93ZXJkb3duIG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUlRUX1BBUks=::RERSNF9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::UlRUIFBBUks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUNfUEVSU0lTVEVOVF9FUlJPUg==::ZmFsc2U=::QWRkci9DTUQgcGVyc2lzdGVudCBlcnJvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfREJJ::ZmFsc2U=::V3JpdGUgREJJ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkVBRF9EQkk=::ZmFsc2U=::UmVhZCBEQkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREVGQVVMVF9WUkVGT1VU::ZmFsc2U=::VXNlIHJlY29tbWVuZGVkIGluaXRpYWwgVnJlZkRRIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfVkFMVUU=::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFUl9WUkVGRFFfVFJBSU5JTkdfUkFOR0U=::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NBX0lCVF9FTlVN::RERSNF9SQ0RfQ0FfSUJUXzEwMA==::UkNEIENBIElucHV0IEJ1cyBUZXJtaW5hdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NTX0lCVF9FTlVN::RERSNF9SQ0RfQ1NfSUJUXzEwMA==::UkNEIERDU1szOjBdX24gSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NLRV9JQlRfRU5VTQ==::RERSNF9SQ0RfQ0tFX0lCVF8xMDA=::UkNEIERDS0UgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX09EVF9JQlRfRU5VTQ==::RERSNF9SQ0RfT0RUX0lCVF8xMDA=::UkNEIERPRFQgSW5wdXQgQnVzIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX05PTV9FTlVN::RERSNF9EQl9SVFRfTk9NX09EVF9ESVNBQkxFRA==::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX05PTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1dSX0VOVU0=::RERSNF9EQl9SVFRfV1JfUlpRXzM=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1dS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfUlRUX1BBUktfRU5VTQ==::RERSNF9EQl9SVFRfUEFSS19PRFRfRElTQUJMRUQ=::REIgSG9zdCBJbnRlcmZhY2UgRFEgUlRUX1BBUks="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfREJfRFFfRFJWX0VOVU0=::RERSNF9EQl9EUlZfU1RSX1JaUV83::REIgSG9zdCBJbnRlcmZhY2UgRFEgRHJpdmVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzN19SQ0RfQ0FfRFJW::MTAx::U1BEIEJ5dGUgMTM3IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDb21tYW5kL0FkZHJlc3M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOF9SQ0RfQ0tfRFJW::NQ==::U1BEIEJ5dGUgMTM4IC0gUkNEIERyaXZlIFN0cmVuZ3RoIGZvciBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MF9EUkFNX1ZSRUZEUV9SMA==::Mjk=::U1BEIEJ5dGUgMTQwIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0MV9EUkFNX1ZSRUZEUV9SMQ==::Mjk=::U1BEIEJ5dGUgMTQxIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0Ml9EUkFNX1ZSRUZEUV9SMg==::Mjk=::U1BEIEJ5dGUgMTQyIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0M19EUkFNX1ZSRUZEUV9SMw==::Mjk=::U1BEIEJ5dGUgMTQzIC0gRFJBTSBWcmVmRFEgZm9yIFBhY2thZ2UgUmFuayAz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NF9EQl9WUkVGRFE=::Mzc=::U1BEIEJ5dGUgMTQ0IC0gREIgVnJlZkRRIGZvciBEUkFNIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0NV9EQl9NRFFfRFJW::MjE=::U1BEIEJ5dGUgMTQ1LTE0NyAtIERCIE1EUSBEcml2ZSBTdHJlbmd0aCBhbmQgUlRU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OF9EUkFNX0RSVg==::MA==::U1BEIEJ5dGUgMTQ4IC0gRFJBTSBEcml2ZSBTdHJlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE0OV9EUkFNX1JUVF9XUl9OT00=::MjA=::U1BEIEJ5dGUgMTQ5LTE1MSAtIERSQU0gT0RUIChSVFRfV1IgYW5kIFJUVF9OT00p"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzE1Ml9EUkFNX1JUVF9QQVJL::Mzk=::U1BEIEJ5dGUgMTUyLTE1NCAtIERSQU0gT0RUIChSVFRfUEFSSyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzM19SQ0RfREJfVkVORE9SX0xTQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKExTQik="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNF9SQ0RfREJfVkVORE9SX01TQg==::MA==::UkNEIGFuZCBEQiBNYW51ZmFjdHVyZXIgKE1TQik="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzNV9SQ0RfUkVW::MA==::UkNEIFJldmlzaW9uIE51bWJlcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BEXzEzOV9EQl9SRVY=::MA==::REIgUmV2aXNpb24gTnVtYmVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JT::dHJ1ZQ==::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hN::MjQw::UEFSQU1fTUVNX0REUjRfTFJESU1NX09EVF9MRVNTX0JTX1BBUktfT0hNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfRFFTX1dJRFRI::OQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfQ1NfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1NfUEVSX0RJTU0=::Mg==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cyBwZXIgRElNTQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0tFX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfQ0tFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfT0RUX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfT0RUX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUl9XSURUSA==::MTc=::UEFSQU1fTUVNX0REUjRfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUk1fV0lEVEg=::MA==::TnVtYmVyIG9mIHJhbmsgbXVsdGlwbGljYXRpb24gcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX1BIWVNJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1M=::Mg==::UEFSQU1fTUVNX0REUjRfTlVNX09GX0xPR0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSURFQUxfVlJFRl9JTl9QQ1Q=::NjEuMA==::UEFSQU1fTUVNX0REUjRfSURFQUxfVlJFRl9JTl9QQ1RfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfSURFQUxfVlJFRl9PVVRfUENU::NTAuMA==::UEFSQU1fTUVNX0REUjRfSURFQUxfVlJFRl9PVVRfUENUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1ZBTFVF::NjAuMA==::VnJlZkRRIHRyYWluaW5nIHZhbHVl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdF::RERSNF9WUkVGRFFfVFJBSU5JTkdfUkFOR0VfMQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVlJFRkRRX1RSQUlOSU5HX1JBTkdFX0RJU1A=::UmFuZ2UgMiAtIDQ1JSB0byA3Ny41JQ==::VnJlZkRRIHRyYWluaW5nIHJhbmdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRU19XSURUSA==::OQ==::UEFSQU1fTUVNX0REUjRfVFRMX0RRU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0RRX1dJRFRI::NzI=::UEFSQU1fTUVNX0REUjRfVFRMX0RRX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NTX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NTX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLX1dJRFRI::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NLRV9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0NLRV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX09EVF9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX09EVF9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSA==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfQUREUl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEg=::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX0JBTktfR1JPVVBfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEg=::MA==::UEFSQU1fTUVNX0REUjRfVFRMX0NISVBfSURfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX0FERFJfV0lEVEg=::MTc=::UEFSQU1fTUVNX0REUjRfVFRMX0FERFJfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX1JNX1dJRFRI::MA==::UEFSQU1fTUVNX0REUjRfVFRMX1JNX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9ESU1NUw==::MQ==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9ESU1NU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LUw==::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9QSFlTSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktT::Mg==::UEFSQU1fTUVNX0REUjRfVFRMX05VTV9PRl9MT0dJQ0FMX1JBTktTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIw::MjExMg==::UEFSQU1fTUVNX0REUjRfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIx::NjU1Mzc=::UEFSQU1fTUVNX0REUjRfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIy::MTMxMTIw::UEFSQU1fTUVNX0REUjRfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVIz::MTk3MTIw::UEFSQU1fTUVNX0REUjRfTVIzX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI0::MjYyMTQ0::UEFSQU1fTUVNX0REUjRfTVI0X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI1::MzI4NzM2::UEFSQU1fTUVNX0REUjRfTVI1X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTVI2::Mzk0MzI3::UEFSQU1fTUVNX0REUjRfTVI2X05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVD::MA==::UEFSQU1fTUVNX0REUjRfQUREUkVTU19NSVJST1JfQklUVkVDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkQ=::MTM=::UEFSQU1fTUVNX0REUjRfUkNEX1BBUklUWV9DT05UUk9MX1dPUkRfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWQ==::MQ==::UEFSQU1fTUVNX0REUjRfUkNEX0NPTU1BTkRfTEFURU5DWV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVVNFX0RFRkFVTFRfT0RU::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzFYMQ==::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzFYMQ==::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzJYMg==::b2ZmLG9u::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzJYMg==::b24sb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzJYMg==::b24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzJYMg==::b24sb24=::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYMg==::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYMg==::b24sb24sb2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQwXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQyXzRYNA==::b2ZmLG9mZixvZmYsb2Zm::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQwXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQxXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQyXzRYNA==::b2ZmLG9mZixvbixvbg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19PRFQzXzRYNA==::b24sb24sb2ZmLG9mZg==::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDA=::KERyaXZlKSBSWlEvNyAoMzQgT2htKSxPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChEcml2ZSkgUlpRLzcgKDM0IE9obSksLSwt::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfUl9ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVE4=::UmFuayAwLFJhbmsgMSwtLC0=::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDA=::KFBhcmspIFBhcmsgT0RUIG9mZixPRFQgRGlzYWJsZWQsLSwt::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDE=::T0RUIERpc2FibGVkLChQYXJrKSBQYXJrIE9EVCBvZmYsLSwt::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDI=::LSwtLC0sLQ==::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV19ERVJJVkVEX09EVDM=::LSwtLC0sLQ==::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9MTw==::NDE5NDMwOA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9MT19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISQ==::MA==::UEFSQU1fTUVNX0REUjRfU0VRX09EVF9UQUJMRV9ISV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVA=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX0NISVBfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfUkVBRF9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTks=::MzM=::UEFSQU1fTUVNX0REUjRfQ1RSTF9DRkdfV1JJVEVfT0RUX1JBTktfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfU1BFRURCSU5fRU5VTQ==::RERSNF9TUEVFREJJTl8yNDAw::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX1BT::NjA=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElTX0FDX01W::MTAw::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX1BT::OTU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElIX0RDX01W::NzU=::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfVE9UQUxfVUk=::MC4y::VGRpVldfdG90YWw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVkRJVldfVE9UQUw=::MTM2::VmRpVldfdG90YWw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfVUk=::MC4xNg==::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX1VJ::MC43Ng==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERWV1BfVUk=::MC43Mg==::dERWV3A="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX1BT::MTgw::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1NfQ1lD::MC4yNw==::dERRU1M="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFTSF9DWUM=::MC4zOA==::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTSF9DWUM=::MC4xOA==::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERTU19DWUM=::MC4xOA==::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19DWUM=::MC4xMw==::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9DWUM=::MC4xMw==::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfVVM=::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVE1SRF9DS19DWUM=::OA==::dE1SRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19OUw==::MzMuMA==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9OUw==::MTQuMDY=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX05T::MTQuMDY=::dFJQ"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfVVM=::Ny44::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19OUw==::MTYwLjA=::dFJGQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX05T::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9MX0NZQw==::NA==::dFdUUl9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdUUl9TX0NZQw==::Mg==::dFdUUl9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19OUw==::MjUuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9MX0NZQw==::NQ==::dFJSRF9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9TX0NZQw==::NA==::dFJSRF9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9MX0NZQw==::NQ==::dENDRF9M"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVENDRF9TX0NZQw==::NA==::dENDRF9T"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfTlM=::OTAuMA==::dFJGQ19kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19ETFJfQ1lD::MTY=::dEZBV19kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJSRF9ETFJfQ1lD::NA==::dFJSRF9kbHI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERJVldfREpfQ1lD::MC4x::UEFSQU1fTUVNX0REUjRfVERJVldfREpfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU1FfUFM=::NjY=::UEFSQU1fTUVNX0REUjRfVERRU1FfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFFIX0NZQw==::MC4zOA==::UEFSQU1fTUVNX0REUjRfVFFIX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVElOSVRfQ0s=::NjAwMDAw::UEFSQU1fTUVNX0REUjRfVElOSVRfQ0tfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLX0RFUlZfUFM=::Mg==::UEFSQU1fTUVNX0REUjRfVERRU0NLX0RFUlZfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRFM=::NDUw::dERRU0NLIERlbHRhIFNob3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLRE0=::OTAw::dERRU0NLIERlbHRhIE1lZGl1bQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVERRU0NLREw=::MTIwMA==::dERRU0NLIERlbHRhIExvbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJBU19DWUM=::NDA=::UEFSQU1fTUVNX0REUjRfVFJBU19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJDRF9DWUM=::MTc=::UEFSQU1fTUVNX0REUjRfVFJDRF9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJQX0NZQw==::MTc=::UEFSQU1fTUVNX0REUjRfVFJQX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19DWUM=::MTky::UEFSQU1fTUVNX0REUjRfVFJGQ19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdSX0NZQw==::MTg=::UEFSQU1fTUVNX0REUjRfVFdSX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJUUF9DWUM=::OQ==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVEZBV19DWUM=::MzA=::UEFSQU1fTUVNX0REUjRfVEZBV19DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJFRklfQ1lD::OTM2MA==::UEFSQU1fTUVNX0REUjRfVFJFRklfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfV1JJVEVfQ01EX0xBVEVOQ1k=::NQ==::V3JpdGUgQ01EIGxhdGVuY3kgZm9yIENSQy9ETSBlbmFibGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFJGQ19ETFJfQ1lD::MTA4::UEFSQU1fTUVNX0REUjRfVFJGQ19ETFJfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9TQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9TQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfQ0ZHX0dFTl9EQkU=::ZmFsc2U=::UEFSQU1fTUVNX0REUjRfQ0ZHX0dFTl9EQkVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRQ==::MUQ=::UEFSQU1fTUVNX0REUjRfTFJESU1NX1ZSRUZEUV9WQUxVRV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMU19QUw==::MC4w::UEFSQU1fTUVNX0REUjRfVFdMU19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0REUjRfVFdMSF9QUw==::MC4w::UEFSQU1fTUVNX0REUjRfVFdMSF9QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9QRVJfREVWSUNF::MzY=::RGF0YSB3aWR0aCBwZXIgZGV2aWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQUREUl9XSURUSA==::MTk=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX0VO::dHJ1ZQ==::RW5hYmxlIEJXUyMgcGlucw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjJfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjJfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfREFUQV9XSURUSA==::MzY=::RGF0YSB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fV0lEVEg=::NA==::QldTIyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQldTX05fUEVSX0RFVklDRQ==::NA==::UEFSQU1fTUVNX1FEUjJfQldTX05fUEVSX0RFVklDRV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfQ1FfV0lEVEg=::MQ==::Q1Egd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfS19XSURUSA==::MQ==::SyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFdMX0NZQw==::MQ==::dFdM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfU1BFRURCSU5fRU5VTQ==::UURSMl9TUEVFREJJTl82MzM=::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFJMX0NZQw==::Mi41::dFJM"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNBX05T::MC4yMw==::dFNB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhBX05T::MC4xOA==::dEhB"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVFNEX05T::MC4yMw==::dFNE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVEhEX05T::MC4xOA==::dEhE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRF9OUw==::MC4wOQ==::dENRRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRRE9IX05T::LTAuMDk=::dENRRE9I"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfSU5URVJOQUxfSklUVEVSX05T::MC4wOA==::SW50ZXJuYWwgSml0dGVy"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENRSF9OUw==::MC43MQ==::dENRSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjJfVENDUU9fTlM=::MC40NQ==::dENDUU8="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU0tJUF9PRFRfU1dFRVBJTkc=::dHJ1ZQ==::U2tpcCBhdXRvbWF0aWMgb3B0aW1pemF0aW9uIG9mIENsb2NrIGFuZCBBZGRyZXNzL0NvbW1hbmQgT0RUIHNldHRpbmcgZHVyaW5nIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ0tfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChDbG9jayk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUNfT0RUX01PREVfRU5VTQ==::UURSNF9PRFRfMjVfUENU::T0RUIChBZGRyZXNzL0NvbW1hbmQp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9PRFRfTU9ERV9FTlVN::UURSNF9PRFRfMjVfUENU::T0RUIChEYXRhKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUFVfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLXVwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUERfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UURSNF9PVVRQVVRfRFJJVkVfMjVfUENU::T3V0cHV0IGRyaXZlIChwdWxsLWRvd24p"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfTUVNX1RZUEVfRU5VTQ==::TUVNX1hQ::TWVtb3J5IFR5cGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREFUQV9JTlZfRU5B::ZmFsc2U=::RGF0YSBidXMgaW52ZXJzaW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQUREUl9JTlZfRU5B::ZmFsc2U=::QWRkcmVzcyBidXMgaW52ZXJzaW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1FEUjRfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1FEUjRfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1FEUjRfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfV0lEVEg=::NzI=::UEFSQU1fTUVNX1FEUjRfRFFfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfUUtfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfV0lEVEg=::NA==::UEFSQU1fTUVNX1FEUjRfREtfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9XSURUSA==::NA==::UEFSQU1fTUVNX1FEUjRfRElOVl9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVVNFX0FERFJfUEFSSVRZ::ZmFsc2U=::VXNlIGFkZHJlc3MgcGFyaXR5IGJpdA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRFFfUEVSX1BPUlRfV0lEVEg=::MzY=::RFFBIC8gRFFCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfUUtfUEVSX1BPUlRfV0lEVEg=::Mg==::UUtBIC8gUUtCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfREtfUEVSX1BPUlRfV0lEVEg=::Mg==::REtBIC8gREtCIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfRElOVl9QRVJfUE9SVF9XSURUSA==::Mg==::RElOVkEgLyBESU5WQiB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQkw=::Mg==::UEFSQU1fTUVNX1FEUjRfQkxfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFJMX0NZQw==::OA==::TWVtb3J5IFJlYWQgbGF0ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFdMX0NZQw==::NQ==::TWVtb3J5IFdyaXRlIGxhdGVuY3k="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQVZMX0NITkxT::OA==::UEFSQU1fTUVNX1FEUjRfQVZMX0NITkxTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iw::MA==::UEFSQU1fTUVNX1FEUjRfQ1IwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Ix::MA==::UEFSQU1fTUVNX1FEUjRfQ1IxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfQ1Iy::MA==::UEFSQU1fTUVNX1FEUjRfQ1IyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfU1BFRURCSU5fRU5VTQ==::UURSNF9TUEVFREJJTl8yMTMz::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVElTSF9QUw==::MTUw::dElTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVFFIX0NZQw==::MC40::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUFYX1BT::MTUw::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLREtfTUlOX1BT::LTE1MA==::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENLUUtfTUFYX1BT::MjI1::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVEFTSF9QUw==::MTcw::dEFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1FEUjRfVENTSF9QUw==::MTcw::dENTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX0RFVklDRQ==::OQ==::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQUREUl9XSURUSA==::MjE=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkFOS19BRERSX1dJRFRI::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQkw=::NA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ09ORklHX0VOVU0=::UkxEMl9DT05GSUdfVFJDXzhfVFJMXzhfVFdMXzk=::Q29uZmlndXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFJJVkVfSU1QRURFTkNFX0VOVU0=::UkxEMl9EUklWRV9JTVBFREVOQ0VfSU5URVJOQUxfNTA=::RHJpdmUgSW1wZWRhbmNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfT0RUX01PREVfRU5VTQ==::UkxEMl9PRFRfT04=::T24tRGllIFRlcm1pbmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDJfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDJfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfV0lEVEg=::OQ==::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDJfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUUtfV0lEVEg=::MQ==::UUsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfREtfV0lEVEg=::MQ==::REsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfRE1fV0lEVEg=::MQ==::UEFSQU1fTUVNX1JMRDJfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJD::OA==::UEFSQU1fTUVNX1JMRDJfVFJDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFJM::OA==::UEFSQU1fTUVNX1JMRDJfVFJMX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFdM::OQ==::UEFSQU1fTUVNX1JMRDJfVFdMX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfTVI=::MA==::UEFSQU1fTUVNX1JMRDJfTVJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfU1BFRURCSU5fRU5VTQ==::UkxEMl9TUEVFREJJTl8xOA==::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfUkVGUkVTSF9JTlRFUlZBTF9VUw==::MC4yNA==::UmVmcmVzaCBJbnRlcnZhbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLSF9DWUM=::MC40NQ==::dENLSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLSF9IQ1lD::MC45::dFFLSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFTX05T::MC4z::dEFT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVEFIX05T::MC4z::dEFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERTX05T::MC4xNw==::dERT"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVERIX05T::MC4xNw==::dERI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NQVhfTlM=::MC4xMg==::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVFFLUV9NSU5fTlM=::LTAuMTI=::dFFLUV9taW4="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUFYX05T::MC4z::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLREtfTUlOX05T::LTAuMw==::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDJfVENLUUtfTUFYX05T::MC4y::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV0lEVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIHdpZHRoIGV4cGFuc2lvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVQVEhfRVhQQU5ERUQ=::ZmFsc2U=::RW5hYmxlIGRlcHRoIGV4cGFuc2lvbiB1c2luZyB0d2luIGRpZSBwYWNrYWdl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX0RFVklDRQ==::MzY=::RFEgd2lkdGggcGVyIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQUREUl9XSURUSA==::MjA=::QWRkcmVzcyB3aWR0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkFOS19BRERSX1dJRFRI::NA==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fRU4=::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQkw=::Mg==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREFUQV9MQVRFTkNZX01PREVfRU5VTQ==::UkxEM19ETF9STDE2X1dMMTc=::RGF0YSBMYXRlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVF9SQ19NT0RFX0VOVU0=::UkxEM19UUkNfOQ==::dFJD"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT1VUUFVUX0RSSVZFX01PREVfRU5VTQ==::UkxEM19PVVRQVVRfRFJJVkVfNDA=::T3V0cHV0IGRyaXZl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfT0RUX01PREVfRU5VTQ==::UkxEM19PRFRfNDA=::T0RU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQVJFRl9QUk9UT0NPTF9FTlVN::UkxEM19BUkVGX0JBQw==::QVJFRiBwcm90b2NvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfV1JJVEVfUFJPVE9DT0xfRU5VTQ==::UkxEM19XUklURV8xQkFOSw==::V3JpdGUgcHJvdG9jb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRk9STUFUX0VOVU0=::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX1JMRDNfRk9STUFUX0VOVU1fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX1dJRFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREVWSUNFX0RFUFRI::MQ==::UEFSQU1fTUVNX1JMRDNfREVWSUNFX0RFUFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfV0lEVEg=::MzY=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQ::OQ==::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1JEX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQ::MTg=::UEFSQU1fTUVNX1JMRDNfRFFfUEVSX1dSX0dST1VQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfUUtfV0lEVEg=::NA==::UUsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfREtfV0lEVEg=::Mg==::REsgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfRE1fV0lEVEg=::Mg==::UEFSQU1fTUVNX1JMRDNfRE1fV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfQ1NfV0lEVEg=::MQ==::Q1MjIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIw::MA==::UEFSQU1fTUVNX1JMRDNfTVIwX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIx::MA==::UEFSQU1fTUVNX1JMRDNfTVIxX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfTVIy::MA==::UEFSQU1fTUVNX1JMRDNfTVIyX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfU1BFRURCSU5fRU5VTQ==::UkxEM19TUEVFREJJTl8wOTNF::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX1BT::LTMw::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERTX0FDX01W::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX1BT::NQ==::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVERIX0RDX01W::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFLUV9NQVhfUFM=::NzU=::dFFLUV9tYXg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVFFIX0NZQw==::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUFYX0NZQw==::MC4yNw==::dENLREtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLREtfTUlOX0NZQw==::LTAuMjc=::dENLREtfbWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVENLUUtfTUFYX1BT::MTM1::dENLUUtfbWF4"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX1BT::ODU=::dElTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElTX0FDX01W::MTUw::dElTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX1BT::NjU=::dElIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX1JMRDNfVElIX0RDX01W::MTAw::dElIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9XSURUSA==::MzI=::RFEgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ESVNDUkVURV9DU19XSURUSA==::MQ==::TnVtYmVyIG9mIGNoaXAgc2VsZWN0cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS19XSURUSA==::MQ==::TnVtYmVyIG9mIGNsb2Nrcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9FTg==::dHJ1ZQ==::RW5hYmxlIERNIHBpbnM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ST1dfQUREUl9XSURUSA==::MTU=::Um93IGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DT0xfQUREUl9XSURUSA==::MTA=::Q29sdW1uIGFkZHJlc3Mgd2lkdGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CQU5LX0FERFJfV0lEVEg=::Mw==::QmFuayBhZGRyZXNzIHdpZHRo"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUVNfV0lEVEg=::MQ==::TnVtYmVyIG9mIERRUyBncm91cHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19ETV9XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19ETV9XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DU19XSURUSA==::MQ==::UEFSQU1fTUVNX0xQRERSM19DU19XSURUSF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DS0VfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19DS0VfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19PRFRfV0lEVEg=::MQ==::UEFSQU1fTUVNX0xQRERSM19PRFRfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19BRERSX1dJRFRI::MTA=::UEFSQU1fTUVNX0xQRERSM19BRERSX1dJRFRIX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUV9QRVJfRFFT::OA==::UEFSQU1fTUVNX0xQRERSM19EUV9QRVJfRFFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19GT1JNQVRfRU5VTQ==::TUVNX0ZPUk1BVF9ESVNDUkVURQ==::UEFSQU1fTUVNX0xQRERSM19GT1JNQVRfRU5VTV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjE=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjFfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjI=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjJfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjM=::MA==::UEFSQU1fTUVNX0xQRERSM19NUjNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19NUjEx::MA==::UEFSQU1fTUVNX0xQRERSM19NUjExX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19CTA==::TFBERFIzX0JMX0JMOA==::QnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EQVRBX0xBVEVOQ1k=::TFBERFIzX0RMX1JMMTJfV0w2::RGF0YSBsYXRlbmN5"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUlZfU1RS::TFBERFIzX0RSVl9TVFJfNDBEXzQwVQ==::T3V0cHV0IGRyaXZlIHN0cmVuZ3RoIHNldHRpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19EUU9EVA==::TFBERFIzX0RRT0RUX0RJU0FCTEU=::RFEgT0RU"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19QRE9EVA==::TFBERFIzX1BET0RUX0RJU0FCTEVE::UG93ZXIgZG93biBPRFQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XTFNFTEVDVA==::U2V0IEE=::V0wgc2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OV1I=::TFBERFIzX05XUl9OV1IxMg==::bldSIGN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LUw==::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfTE9HSUNBTF9SQU5LU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1M=::MQ==::UEFSQU1fTUVNX0xQRERSM19OVU1fT0ZfUEhZU0lDQUxfUkFOS1NfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19VU0VfREVGQVVMVF9PRFQ=::dHJ1ZQ==::VXNlIERlZmF1bHQgT0RUIEFzc2VydGlvbiBUYWJsZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMVgx::b2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMVgx::b24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfMlgy::b2ZmLG9mZg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfMlgy::b2ZmLG9mZg==::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfMlgy::b24sb2Zm::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfMlgy::b2ZmLG9u::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDBfNFg0::b2ZmLG9mZixvbixvbg==::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDJfNFg0::b24sb24sb2ZmLG9mZg==::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDBfNFg0::b24sb24sb24sb24=::T0RUMA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDFfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDJfNFg0::b24sb24sb24sb24=::T0RUMg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX09EVDNfNFg0::b2ZmLG9mZixvZmYsb2Zm::T0RUMw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUTg==::LCw=::UmVhZCBUYXJnZXQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMA==::LCw=::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMQ==::LCw=::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMg==::LCw=::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19SX0RFUklWRURfT0RUMw==::LCw=::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUTg==::LCw=::V3JpdGUgVGFyZ2V0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMA==::LCw=::T0RUMCBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMQ==::LCw=::T0RUMSBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMg==::LCw=::T0RUMiBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19XX0RFUklWRURfT0RUMw==::LCw=::T0RUMyBWYWx1ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xP::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0xPX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJ::MA==::UEFSQU1fTUVNX0xQRERSM19TRVFfT0RUX1RBQkxFX0hJX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQ::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9DSElQX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUA==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfQ0hJUF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5L::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19SRUFEX09EVF9SQU5LX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOSw==::MA==::UEFSQU1fTUVNX0xQRERSM19DVFJMX0NGR19XUklURV9PRFRfUkFOS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19TUEVFREJJTl9FTlVN::TFBERFIzX1NQRUVEQklOXzE2MDA=::U3BlZWQgYmlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfUFM=::NzU=::dElTQ0EgKGJhc2Up"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USVNfQUNfTVY=::MTUw::dElTQ0EgKGJhc2UpIEFDIGxldmVs"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfUFM=::MTAw::dElIQ0EgKGJhc2Up"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USUhfRENfTVY=::MTAw::dElIQ0EgKGJhc2UpIERDIGxldmVs"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfUFM=::NzU=::dERTIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNfQUNfTVY=::MTUw::dERTIChiYXNlKSBBQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfUFM=::MTAw::dERIIChiYXNlKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UREhfRENfTVY=::MTAw::dERIIChiYXNlKSBEQyBsZXZlbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTUV9QUw==::MTM1::dERRU1E="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUUhfQ1lD::MC4zOA==::dFFI"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETA==::NjE0::dERRU0NLREw="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTU19DWUM=::MS4yNQ==::dERRU1MgKG1heCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUVNIX0NZQw==::MC4zOA==::dFFTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNIX0NZQw==::MC4y::dERTSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xTX1BT::MTc1LjA=::dFdMUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xIX1BT::MTc1LjA=::dFdMSA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFNTX0NZQw==::MC4y::dERTUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9VUw==::NTAw::dElOSVQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJSX0NLX0NZQw==::NA==::dE1SUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UTVJXX0NLX0NZQw==::MTA=::dE1SVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX05T::NDIuNQ==::dFJBUw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX05T::MTguNzU=::dFJDRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfTlM=::MTguNzU=::dFJQcGI="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9VUw==::My45::dFJFRkk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX05T::MjEwLjA=::dFJGQ2Fi"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfTlM=::MTUuMA==::dFdS"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1RSX0NZQw==::NA==::dFdUUg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX05T::NTAuMA==::dEZBVw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlJEX0NZQw==::Mg==::dFJSRA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlRQX0NZQw==::NA==::dFJUUA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19USU5JVF9DSw==::NDk5::UEFSQU1fTUVNX0xQRERSM19USU5JVF9DS19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfREVSVl9QUw==::Mg==::UEFSQU1fTUVNX0xQRERSM19URFFTQ0tfREVSVl9QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tEUw==::MjIw::dERRU0NLRFM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tETQ==::NTEx::dERRU0NLRE0="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URFFTQ0tfUFM=::NTUwMA==::dERRU0NL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkFTX0NZQw==::MzQ=::UEFSQU1fTUVNX0xQRERSM19UUkFTX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkNEX0NZQw==::MTc=::UEFSQU1fTUVNX0xQRERSM19UUkNEX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUlBfQ1lD::MTc=::UEFSQU1fTUVNX0xQRERSM19UUlBfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkZDX0NZQw==::MTY4::UEFSQU1fTUVNX0xQRERSM19UUkZDX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV1JfQ1lD::MTI=::UEFSQU1fTUVNX0xQRERSM19UV1JfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19URkFXX0NZQw==::NDA=::UEFSQU1fTUVNX0xQRERSM19URkFXX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkVGSV9DWUM=::MzEyMA==::UEFSQU1fTUVNX0xQRERSM19UUkVGSV9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UUkxfQ1lD::MTA=::UEFSQU1fTUVNX0xQRERSM19UUkxfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "TUVNX0xQRERSM19UV0xfQ1lD::Ng==::UEFSQU1fTUVNX0xQRERSM19UV0xfQ1lDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0NLX1NMRVdfUkFURQ==::Mi4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX1NMRVdfUkFURQ==::MS4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX1NMRVdfUkFURQ==::NS4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SQ0xLX0lTSV9OUw==::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XQ0xLX0lTSV9OUw==::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlM=::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfRERSM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9EUVNfREVTS0VXRUQ=::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0RRU19OUw==::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9EUVNfVE9fQ0tfU0tFV19OUw==::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRElNTXMvZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX0JFVFdFRU5fRFFTX05T::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBESU1NL2RldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9NQVhfRFFTX0RFTEFZX05T::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gRElNTS9kZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfRERSNF9USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX1NMRVdfUkFURQ==::OC4w::UmVhZCBEUVMvRFFTIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::V3JpdGUgRFFTL0RRUyMgc2xldyByYXRlIChEaWZmZXJlbnRpYWwp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9TTEVXX1JBVEU=::NC4w::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9BQ19JU0lfTlM=::MC4yMg==::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SQ0xLX0lTSV9OUw==::MC4yMg==::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XQ0xLX0lTSV9OUw==::MC4wNzg=::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9SREFUQV9JU0lfTlM=::MC4xNTU=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9XREFUQV9JU0lfTlM=::MC4xNg==::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9EUVNfTlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4xOA==::UEFSQU1fQk9BUkRfRERSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0tfU0xFV19SQVRF::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfU0xFV19SQVRF::Mi4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::Sy9LIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBRIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9RX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUSBncm91cCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9EX0RFU0tFV0VE::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRCBncm91cCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fUV9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fRF9OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX1FfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUSBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0RfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRCBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19UT19LX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9NQVhfS19ERUxBWV9OUw==::MC42::TWF4aW11bSBLIGRlbGF5IHRvIGRldmljZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9LX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX1NMRVdfUkFURQ==::NC4w::Q1EvQ1EjIHNsZXcgcmF0ZSAoQ29tcGxlbWVudGFyeSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX1NMRVdfUkFURQ==::NC4w::Sy9LIyBzbGV3IHJhdGUgKERpZmZlcmVudGlhbCk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9TTEVXX1JBVEU=::Mi4w::UmVhZCBRIHNsZXcgcmF0ZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SQ0xLX0lTSV9OUw==::MC4w::Q1EvQ1EjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XQ0xLX0lTSV9OUw==::MC4w::Sy9LIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBRIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9RX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05T::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9EX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSMl9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JDTEtfSVNJX05T::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dDTEtfSVNJX05T::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9VU0VSX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX1NMRVdfUkFURQ==::NS4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9TTEVXX1JBVEU=::Mi41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9RS19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUURSNF9TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9TTEVXX1JBVEVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgc2xldyByYXRlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VfREVGQVVMVF9JU0lfVkFMVUVT::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0NLX1NMRVdfUkFURQ==::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX1NMRVdfUkFURQ==::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfU0xFV19SQVRF::NC4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfU0xFV19SQVRF::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX1NMRVdfUkFURQ==::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX0FDX0lTSV9OUw==::MC4wOTQ=::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JDTEtfSVNJX05T::MC4wOTQ=::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dDTEtfSVNJX05T::MC4wMzE=::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1JEQVRBX0lTSV9OUw==::MC4wNjM=::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19VU0VSX1dEQVRBX0lTSV9OUw==::MC4wNjM=::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9RS19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoUUsgZ3JvdXAp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fUUtfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBRSyBncm91cA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX1FLX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gUUsgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19JU19TS0VXX1dJVEhJTl9BQ19ERVNLRVdFRA==::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19QS0dfQlJEX1NLRVdfV0lUSElOX0FDX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19ES19UT19DS19TS0VXX05T::LTAuMDI=::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gREsgYW5kIENL"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fRElNTVNfTlM=::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX0JFVFdFRU5fREtfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gREsgZ3JvdXBz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19UT19DS19TS0VXX05T::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfQ0tfREVMQVlfTlM=::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19NQVhfREtfREVMQVlfTlM=::MC42::TWF4aW11bSBESyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USVNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19USUhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19URFNfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFM=::MA==::UEFSQU1fQk9BUkRfUkxEM19UREhfREVSQVRJTkdfUFNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19DS19TTEVXX1JBVEU=::NC4w::Q0svQ0sjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19TTEVXX1JBVEU=::Mi4w::QWRkcmVzcyBhbmQgY29tbWFuZCBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX1NMRVdfUkFURQ==::Ny4w::UUsvUUsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX1NMRVdfUkFURQ==::NC4w::REsvREsjIHNsZXcgcmF0ZSAoRGlmZmVyZW50aWFsKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9TTEVXX1JBVEU=::My41::UmVhZCBEUSBzbGV3IHJhdGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9TTEVXX1JBVEU=::Mi4w::V3JpdGUgRFEgc2xldyByYXRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19BQ19JU0lfTlM=::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SQ0xLX0lTSV9OUw==::MC4w::UUsvUUsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XQ0xLX0lTSV9OUw==::MC4w::REsvREsjIElTSS9jcm9zc3RhbGs="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19SREFUQV9JU0lfTlM=::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19XREFUQV9JU0lfTlM=::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9RS19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OUw==::MC4w::UEFSQU1fQk9BUkRfUkxEM19TS0VXX1dJVEhJTl9BQ19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVM=::dHJ1ZQ==::UEFSQU1fQk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX1NMRVdfUkFURVNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRV9ERUZBVUxUX0lTSV9WQUxVRVM=::dHJ1ZQ==::VXNlIGRlZmF1bHQgSVNJL2Nyb3NzdGFsayB2YWx1ZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEU=::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRF::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfQUNfSVNJX05T::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkNMS19JU0lfTlM=::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0NMS19JU0lfTlM=::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfSVNJX05T::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfSVNJX05T::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0RRU19ERVNLRVdFRA==::ZmFsc2U=::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoRFFTIGdyb3VwKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBEUVMgZ3JvdXA="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fRFFTX05T::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gRFFTIGdyb3Vw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0lTX1NLRVdfV0lUSElOX0FDX0RFU0tFV0VE::dHJ1ZQ==::UGFja2FnZSBkZXNrZXdlZCB3aXRoIGJvYXJkIGxheW91dCAoYWRkcmVzcy9jb21tYW5kIGJ1cyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0JSRF9TS0VXX1dJVEhJTl9BQ19OUw==::MC4wMg==::TWF4aW11bSBib2FyZCBza2V3IHdpdGhpbiBhZGRyZXNzL2NvbW1hbmQgYnVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1BLR19CUkRfU0tFV19XSVRISU5fQUNfTlM=::MC4wMg==::TWF4aW11bSBzeXN0ZW0gc2tldyB3aXRoaW4gYWRkcmVzcy9jb21tYW5kIGJ1cw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0RRU19UT19DS19TS0VXX05T::MC4wMg==::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gRFFTIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9ESU1NU19OUw==::MC4wNQ==::TWF4aW11bSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gZGV2aWNlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfQkVUV0VFTl9EUVNfTlM=::MC4wMg==::TWF4aW11bSBza2V3IGJldHdlZW4gRFFTIGdyb3Vwcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1RPX0NLX1NLRVdfTlM=::MC4w::QXZlcmFnZSBkZWxheSBkaWZmZXJlbmNlIGJldHdlZW4gYWRkcmVzcy9jb21tYW5kIGFuZCBDSw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9DS19ERUxBWV9OUw==::MC42::TWF4aW11bSBDSyBkZWxheSB0byBkZXZpY2U="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX01BWF9EUVNfREVMQVlfTlM=::MC42::TWF4aW11bSBEUVMgZGVsYXkgdG8gZGV2aWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJU19ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RJSF9ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1REU19ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QUw==::MA==::UEFSQU1fQk9BUkRfTFBERFIzX1RESF9ERVJBVElOR19QU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0NLX1NMRVdfUkFURQ==::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQ0tfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfQUNfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkNMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfU0xFV19SQVRF::NC4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0NMS19TTEVXX1JBVEVfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfUkRBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX1NMRVdfUkFURQ==::Mi4w::UEFSQU1fQk9BUkRfTFBERFIzX1VTRVJfV0RBVEFfU0xFV19SQVRFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX0FDX0lTSV9OUw==::MC4w::QWRkcmVzcyBhbmQgY29tbWFuZCBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JDTEtfSVNJX05T::MC4w::UmVhZCBEUVMvRFFTIyBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dDTEtfSVNJX05T::MC4w::V3JpdGUgRFFTL0RRUyMgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1JEQVRBX0lTSV9OUw==::MC4w::UmVhZCBEUSBJU0kvY3Jvc3N0YWxr"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1dEQVRBX0lTSV9OUw==::MC4w::V3JpdGUgRFEgSVNJL2Nyb3NzdGFsaw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OUw==::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0RRU19OU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Qk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05T::MC4w::UEFSQU1fQk9BUkRfTFBERFIzX1NLRVdfV0lUSElOX0FDX05TX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9FQ0NfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9FQ0NfRU5fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9NTVJfRU4=::ZmFsc2U=::UEFSQU1fQ1RSTF9NTVJfRU5fTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9BVVRPX1BSRUNIQVJHRV9FTg==::ZmFsc2U=::UEFSQU1fQ1RSTF9BVVRPX1BSRUNIQVJHRV9FTl9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9VU0VSX1BSSU9SSVRZX0VO::ZmFsc2U=::UEFSQU1fQ1RSTF9VU0VSX1BSSU9SSVRZX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9SRU9SREVSX0VO::dHJ1ZQ==::UEFSQU1fQ1RSTF9SRU9SREVSX0VOX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUE9XRVJfRE9XTl9DWUNT::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0FERFJfT1JERVJfRU5VTQ==::RERSM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX0VDQ19BVVRPX0NPUlJFQ1RJT05fRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8gRXJyb3IgQ29ycmVjdGlvbiB0byBFeHRlcm5hbCBNZW1vcnk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFIzX1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NFTEZfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUE9XRVJfRE9XTl9FTg==::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUkVGUkVTSF9FTg==::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1VTRVJfUFJJT1JJVFlfRU4=::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FVVE9fUFJFQ0hBUkdFX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0FERFJfT1JERVJfRU5VTQ==::RERSNF9DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0NfQkc=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X0VDQ19FTg==::ZmFsc2U=::RW5hYmxlIEVycm9yIERldGVjdGlvbiBhbmQgQ29ycmVjdGlvbiBMb2dpYyB3aXRoIEVDQw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JFT1JERVJfRU4=::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1NUQVJWRV9MSU1JVA==::NjM=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X01NUl9FTg==::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX1NBTUVfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1JEX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1dSX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9ERFI0X1dSX1RPX1JEX0RJRkZfQ0hJUF9ERUxUQV9DWUNT::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFIyX0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9NQVhfQlVSU1RfQ09VTlQ=::NA==::TWF4aW11bSBBdmFsb24tTU0gYnVyc3QgbGVuZ3Ro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9FTkFCTEVfUE9XRVJfT0ZfVFdPX0JVUw==::ZmFsc2U=::R2VuZXJhdGUgcG93ZXItb2YtMiBkYXRhIGJ1cyB3aWR0aHMgZm9yIFFzeXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCByZWFkLWFmdGVyLXdyaXRlIHR1cm5hcm91bmQgdGltZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FERF9XQVJfVFVSTkFST1VORF9ERUxBWV9DWUM=::MA==::QWRkaXRpb25hbCB3cml0ZS1hZnRlci1yZWFkIHR1cm5hcm91bmQgdGltZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0RFRl9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUM=::NA==::UEFSQU1fQ1RSTF9RRFI0X0RFRl9SQVdfVFVSTkFST1VORF9ERUxBWV9DWUNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEg=::OQ==::UEFSQU1fQ1RSTF9RRFI0X0FWTF9TWU1CT0xfV0lEVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQw==::NA==::UEFSQU1fQ1RSTF9RRFI0X1JBV19UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQw==::MTE=::UEFSQU1fQ1RSTF9RRFI0X1dBUl9UVVJOQVJPVU5EX0RFTEFZX0NZQ19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQyX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FWTF9QUk9UT0NPTF9FTlVN::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9STEQzX0FERFJfT1JERVJfRU5VTQ==::UkxEM19DVFJMX0FERFJfT1JERVJfQ1NfUl9CX0M=::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVZMX1BST1RPQ09MX0VOVU0=::Q1RSTF9BVkxfUFJPVE9DT0xfTU0=::QXZhbG9uIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU0VMRl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFNlbGYtUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0VO::ZmFsc2U=::RW5hYmxlIEF1dG8gUG93ZXItRG93bg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QT1dFUl9ET1dOX0NZQ1M=::MzI=::QXV0byBQb3dlci1Eb3duIEN5Y2xlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9SRUZSRVNIX0VO::ZmFsc2U=::RW5hYmxlIFVzZXIgUmVmcmVzaCBDb250cm9s"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfVVNFUl9QUklPUklUWV9FTg==::ZmFsc2U=::RW5hYmxlIENvbW1hbmQgUHJpb3JpdHkgQ29udHJvbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQVVUT19QUkVDSEFSR0VfRU4=::ZmFsc2U=::RW5hYmxlIEF1dG8tUHJlY2hhcmdlIENvbnRyb2w="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfQUREUl9PUkRFUl9FTlVN::TFBERFIzX0NUUkxfQUREUl9PUkRFUl9DU19SX0JfQw==::QWRkcmVzcyBPcmRlcmluZw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkVPUkRFUl9FTg==::dHJ1ZQ==::RW5hYmxlIFJlb3JkZXJpbmc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfU1RBUlZFX0xJTUlU::MTA=::U3RhcnZhdGlvbiBsaW1pdCBmb3IgZWFjaCBjb21tYW5k"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfTU1SX0VO::ZmFsc2U=::RW5hYmxlIE1lbW9yeS1NYXBwZWQgQ29uZmlndXJhdGlvbiBhbmQgU3RhdHVzIFJlZ2lzdGVyIChNTVIpIEludGVyZmFjZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfU0FNRV9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoc2FtZSByYW5rKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXJlYWQgdHVybmFyb3VuZCB0aW1lIChkaWZmZXJlbnQgcmFua3Mp"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfUkRfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCByZWFkLXRvLXdyaXRlIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fV1JfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by13cml0ZSB0dXJuYXJvdW5kIHRpbWUgKGRpZmZlcmVudCByYW5rcyk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "Q1RSTF9MUEREUjNfV1JfVE9fUkRfRElGRl9DSElQX0RFTFRBX0NZQ1M=::MA==::QWRkaXRpb25hbCB3cml0ZS10by1yZWFkIHR1cm5hcm91bmQgdGltZSAoZGlmZmVyZW50IHJhbmtzKQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fUkVHVEVTVF9NT0RF::ZmFsc2U=::U2ltdWxhdGlvbiByZWd0ZXN0IG1vZGU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19USU1JTkdfUkVHVEVTVF9NT0RF::ZmFsc2U=::VGltaW5nIHJlZ3Rlc3QgbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TWU5USF9GT1JfU0lN::ZmFsc2U=::U3ludGhlc2l6ZSBmb3Igc2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTV9PVkVSUklERQ==::RkFTVF9TSU1fT1ZFUlJJREVfREVGQVVMVA==::RmFzdCBzaW11bGF0aW9uIG92ZXJyaWRl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNF::YXZs::UEFSQU1fRElBR19TRVFfUkVTRVRfQVVUT19SRUxFQVNFX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0U=::YXZsX3JlbGVhc2U=::UEFSQU1fRElBR19EQl9SRVNFVF9BVVRPX1JFTEVBU0VfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19WRVJCT1NFX0lPQVVY::ZmFsc2U=::U2hvdyB2ZXJib3NlIElPQVVYIGRlYnVnIG1lc3NhZ2Vz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FQ0xJUFNFX0RFQlVH::ZmFsc2U=::RW5hYmxlIEVjbGlwc2UgZGVidWdnaW5n"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfVkpJ::ZmFsc2U=::RXhwb3J0IFZpcnR1YWwgSlRBRyBJbnRlcmZhY2UgKFZKSSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJU::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSlRBR19VQVJUX0hFWA==::ZmFsc2U=::RW5hYmxlIEpUQUcgVUFSVCBoZXhmaWxlcw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfSFBTX0VNSUZfREVCVUc=::ZmFsc2U=::RW5hYmxlIFVBUlQgZm9yIEhQUyBFTUlGIERlYnVn"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfTU9ERQ==::U09GVF9OSU9TX01PREVfRElTQUJMRUQ=::VXNlIFNvZnQgTklPUyBQcm9jZXNzb3IgZm9yIE9uLUNoaXAgRGVidWc="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TT0ZUX05JT1NfQ0xPQ0tfRlJFUVVFTkNZ::MTAw::Q2FsaWJyYXRpb24gUHJvY2Vzc29yIEV4dGVybmFsIENsb2NrIEZyZXF1ZW5jeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfUlMyMzJfVUFSVA==::ZmFsc2U=::VXNlIGFuIFJTMjMyIFVBUlQgZm9yIFNvZnQgTklPUyBDYWxpYnJhdGlvbiBQcm9jZXNzb3IgZGVidWcgb3V0cHV0IChyZXF1aXJlcyBjb2RlIGNoYW5nZSk="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19SUzIzMl9VQVJUX0JBVURSQVRF::NTc2MDA=::UlMyMzIgVUFSVCBTcGVlZA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUkVTRVRT::ZmFsc2U=::VXNlIGEgc2VwYXJhdGUgZ2xvYmFsIHJlc2V0IHNpZ25hbCBmb3IgZXZlcnkgaW50ZXJmYWNl"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPU0VfREZUX1NJR05BTFM=::ZmFsc2U=::RXhwb3NlIHRlc3QgYW5kIGRlYnVnIHNpZ25hbHM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQk9BUkRfREVMQVlfTU9ERUw=::ZmFsc2U=::VXNlIGJvYXJkIGRlbGF5IG1vZGVsIGR1cmluZyBzaW11bGF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19BVkxfMl9OVU1fQ0ZHX0lOVEVSRkFDRVM=::MA==::TnVtYmVyIG9mIFRyYWZmaWMgR2VuZXJhdG9yIDIuMCBjb25maWd1cmF0aW9uIGludGVyZmFjZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VU::ZmFsc2U=::UEFSQU1fRElBR19FWFBPUlRfUExMX1JFRl9DTEtfT1VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfUExMX0xPQ0tFRA==::ZmFsc2U=::RXhwb3J0IFBMTCBsb2NrIHNpZ25hbA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ITUNfSFJD::YXV0bw==::UEFSQU1fRElBR19ITUNfSFJDX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "U0hPUlRfUVNZU19JTlRFUkZBQ0VfTkFNRVM=::ZmFsc2U=::VXNlIHNob3J0IFFzeXMgaW50ZXJmYWNlIG5hbWVz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFRfRE9DUw==::ZmFsc2U=::UEFSQU1fRElBR19FWFRfRE9DU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0FMX01PREVfRU5VTQ==::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9TTEFWRQ==::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9NQVNURVI=::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWFBPUlRfU0VRX0FWQUxPTl9IRUFEX09GX0NIQUlO::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fTlVNX09GX1NMQVZFUw==::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fSVNTUF9FTg==::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19JTlRFUkZBQ0VfSUQ=::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FRkZJQ0lFTkNZX01PTklUT1I=::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fVkVSQk9TRV9MRVZFTA==::NQ==::UEFSQU1fRElBR19TSU1fVkVSQk9TRV9MRVZFTF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19GQVNUX1NJTQ==::dHJ1ZQ==::UEFSQU1fRElBR19GQVNUX1NJTV9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfVEdfQVZMXzI=::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19JTkZJX1RHMl9FUlJfVEVTVA==::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19VU0VfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::UEFSQU1fRElBR19VU0VfQUJTVFJBQ1RfUEhZX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19EQVRBX1BBVFRFUk5fTEVOR1RI::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19UR19CRV9QQVRURVJOX0xFTkdUSA==::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfREVGQVVMVF9QQVRURVJO::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfVVNFUl9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfUkVQRUFUX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19CWVBBU1NfU1RSRVNTX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FTkFCTEVfU09GVF9NMjBL::dHJ1ZQ==::UEFSQU1fRElBR19FTkFCTEVfU09GVF9NMjBLX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RH::ZmFsc2U=::UEFSQU1fRElBR19TSU1fQ0hFQ0tFUl9TS0lQX1RHX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRUw==::dHJ1ZQ==::UEFSQU1fRElBR19FWF9ERVNJR05fU0VQQVJBVEVfUlpRU19OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFIzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBX0RFU0tFV19FTg==::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBkZXNrZXcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFIzX0NBTF9FTkFCTEVfTUlDUk9OX0FQ::ZmFsc2U=::RW5hYmxlIE1pY3JvbiBBdXRvbWF0YSBDYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19ERFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfTEVWRUw=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfQ0FfREVTS0VX::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X1NLSVBfVlJFRl9DQUw=::dHJ1ZQ==::U2tpcCBWUkVGIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMA==::MA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9BRERSMQ==::OA==::Q2FsaWJyYXRpb24gYWRkcmVzcyAx"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9FTkFCTEVfTk9OX0RFUw==::ZmFsc2U=::RW5hYmxlIHJlZnJlc2hlcyBkdXJpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19ERFI0X0NBTF9GVUxMX0NBTF9PTl9SRVNFVA==::dHJ1ZQ==::RW5hYmxlIGF1dG9tYXRpYyBjYWxpYnJhdGlvbiBhZnRlciByZXNldA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFIyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19RRFI0X0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19RRFI0X1NLSVBfVlJFRl9DQUw=::ZmFsc2U=::U2tpcCBWUkVGX2luIGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQyX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9DQUxfTU9ERV9FTlVN::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX1NMQVZF::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX01BU1RFUg==::dHJ1ZQ==::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYUE9SVF9TRVFfQVZBTE9OX0hFQURfT0ZfQ0hBSU4=::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9OVU1fT0ZfU0xBVkVT::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9JU1NQX0VO::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lOVEVSRkFDRV9JRA==::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VGRklDSUVOQ1lfTU9OSVRPUg==::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NJTV9WRVJCT1NF::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1VTRV9UR19BVkxfMg==::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0FCU1RSQUNUX1BIWQ==::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19ERUZBVUxUX1BBVFRFUk4=::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19VU0VSX1NUQUdF::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19SRVBFQVRfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0JZUEFTU19TVFJFU1NfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0lORklfVEcyX0VSUl9URVNU::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0RBVEFfUEFUVEVSTl9MRU5HVEg=::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1RHX0JFX1BBVFRFUk5fTEVOR1RI::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX1NFUEFSQVRFX1JFQURfV1JJVEVfSVRGUw==::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFT::ZmFsc2U=::UEFSQU1fRElBR19STEQzX0VYX0RFU0lHTl9TRVBBUkFURV9SWlFTX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0NBX0xFVkVMX0VO::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBsZXZlbGluZyBjYWxpYnJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19STEQzX0NBX0RFU0tFV19FTg==::ZmFsc2U=::RW5hYmxlIGFkZHJlc3MvY29tbWFuZCBkZXNrZXcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX0NBTF9NT0RFX0VOVU0=::U0lNX0NBTF9NT0RFX1NLSVA=::Q2FsaWJyYXRpb24gbW9kZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fU0xBVkU=::Q0FMX0RFQlVHX0VYUE9SVF9NT0RFX0RJU0FCTEVE::UXVhcnR1cyBQcmltZSBFTUlGIERlYnVnIFRvb2xraXQvT24tQ2hpcCBEZWJ1ZyBQb3J0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fTUFTVEVS::ZmFsc2U=::RW5hYmxlIERhaXN5LUNoYWluaW5nIGZvciBRdWFydHVzIFByaW1lIEVNSUYgRGVidWcgVG9vbGtpdC9Pbi1DaGlwIERlYnVnIFBvcnQ="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhQT1JUX1NFUV9BVkFMT05fSEVBRF9PRl9DSEFJTg==::dHJ1ZQ==::Rmlyc3QgRU1JRiBJbnN0YW5jZSBpbiB0aGUgQXZhbG9uIENoYWlu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX05VTV9PRl9TTEFWRVM=::MQ==::TnVtYmVyIG9mIGNvcmUgY2xvY2tzIHNoYXJpbmcgc2xhdmVzIHRvIGluc3RhbnRpYXRlIGluIHRoZSBleGFtcGxlIGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX0lTU1BfRU4=::dHJ1ZQ==::RW5hYmxlIEluLVN5c3RlbS1Tb3VyY2VzLWFuZC1Qcm9iZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5URVJGQUNFX0lE::MA==::SW50ZXJmYWNlIElE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRUZGSUNJRU5DWV9NT05JVE9S::RUZGTU9OX01PREVfRElTQUJMRUQ=::RW5hYmxlIEVmZmljaWVuY3kgTW9uaXRvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0lNX1ZFUkJPU0U=::dHJ1ZQ==::U2hvdyB2ZXJib3NlIHNpbXVsYXRpb24gZGVidWcgbWVzc2FnZXM="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVVNFX1RHX0FWTF8y::ZmFsc2U=::VXNlIGNvbmZpZ3VyYWJsZSBBdmFsb24gdHJhZmZpYyBnZW5lcmF0b3IgMi4w"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQUJTVFJBQ1RfUEhZ::ZmFsc2U=::QWJzdHJhY3QgcGh5IGZvciBmYXN0IHNpbXVsYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX0RFRkFVTFRfUEFUVEVSTg==::ZmFsc2U=::QnlwYXNzIHRoZSBkZWZhdWx0IHRyYWZmaWMgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1VTRVJfU1RBR0U=::dHJ1ZQ==::QnlwYXNzIHRoZSB1c2VyLWNvbmZpZ3VyZWQgdHJhZmZpYyBzdGFnZQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1JFUEVBVF9TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciByZXBlYXRlZC13cml0ZXMvcmVwZWF0ZWQtcmVhZHMgdGVzdCBwYXR0ZXJu"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfQllQQVNTX1NUUkVTU19TVEFHRQ==::dHJ1ZQ==::QnlwYXNzIHRoZSB0cmFmZmljIGdlbmVyYXRvciBzdHJlc3MgcGF0dGVybg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfSU5GSV9URzJfRVJSX1RFU1Q=::ZmFsc2U=::UnVuIGRpYWdub3N0aWMgb24gaW5maW5pdGUgdGVzdCBkdXJhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfREFUQV9QQVRURVJOX0xFTkdUSA==::OA==::RGF0YSBQYXR0ZXJuIExlbmd0aA=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfVEdfQkVfUEFUVEVSTl9MRU5HVEg=::OA==::Qnl0ZSBFbmFibGUgUGF0dGVybiBMZW5ndGg="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0VQQVJBVEVfUkVBRF9XUklURV9JVEZT::ZmFsc2U=::UEFSQU1fRElBR19TRVBBUkFURV9SRUFEX1dSSVRFX0lURlNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVM=::ZmFsc2U=::UEFSQU1fRElBR19MUEREUjNfRVhfREVTSUdOX1NFUEFSQVRFX1JaUVNfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9MRVZFTA==::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgbGV2ZWxpbmcgY2FsaWJyYXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RElBR19MUEREUjNfU0tJUF9DQV9ERVNLRVc=::ZmFsc2U=::U2tpcCBhZGRyZXNzL2NvbW1hbmQgZGVza2V3IGNhbGlicmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU0lN::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU0lNX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9HRU5fU1lOVEg=::dHJ1ZQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9HRU5fU1lOVEhfTkFNRQ=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9UQVJHRVRfREVWX0tJVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVA==::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX0dVSV9QUkVWX1BSRVNFVF9OQU1F"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFIzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9ERFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFIyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9RRFI0X1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQyX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1NFTF9ERVNJR04=::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TSU0=::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0dFTl9TWU5USA==::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX0hETF9GT1JNQVQ=::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1RBUkdFVF9ERVZfS0lU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9STEQzX1BSRVZfUFJFU0VU::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfU0VMX0RFU0lHTg==::QVZBSUxfRVhfREVTSUdOU19HRU5fREVTSUdO::U2VsZWN0IGRlc2lnbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NJTQ==::dHJ1ZQ==::U2ltdWxhdGlvbg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfR0VOX1NZTlRI::dHJ1ZQ==::U3ludGhlc2lz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfSERMX0ZPUk1BVA==::SERMX0ZPUk1BVF9WRVJJTE9H::U2ltdWxhdGlvbiBIREwgZm9ybWF0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfVEFSR0VUX0RFVl9LSVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::U2VsZWN0IGJvYXJk"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_PARAMETER "RVhfREVTSUdOX0dVSV9MUEREUjNfUFJFVl9QUkVTRVQ=::VEFSR0VUX0RFVl9LSVRfTk9ORQ==::UEFSQU1fRVhfREVTSUdOX1BSRVZfUFJFU0VUX05BTUU="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_GROUP "TWVtb3J5IEludGVyZmFjZXMgYW5kIENvbnRyb2xsZXJz"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvbGl0LWV4dGVybmFsLW1lbW9yeS1pbnRlcmZhY2UuanNw"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY0OTM0NzA1MjgvaGNvMTQxNjQ5MjYyOTI2Mw=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5Nzc0NTcxNg=="
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MTY0OTM0NzA1MjgvbWhpMTQ0MDE2NDI1NTczMQ=="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMA=="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_DISPLAY_NAME "aXBfYXJyaWExMF9lMXNnX2RkcjRfOGdfMjQwMA=="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_REPORT_HIERARCHY "On"
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_VERSION "MS4w"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MTU3MDY0MjY1MA==::QXV0byBHRU5FUkFUSU9OX0lE"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MA==::QXV0byBHRU5FUkFUSU9OX0lE"
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVMyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::MQ==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
@@ -5498,91 +4998,682 @@ set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria1
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_PARAMETER "QVVUT19QTExfUkVGX0NMS19DTE9DS19TSU5LX1JFU0VUX0RPTUFJTg==::LTE=::QXV0byBSRVNFVF9ET01BSU4="
set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400" -library "ip_arria10_e1sg_ddr4_8g_2400" -name IP_COMPONENT_GROUP "U3lzdGVt"
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_bufs.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_udir_se_i.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_udir_se_o.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_udir_df_i.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_udir_df_o.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_udir_cp_i.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_bdir_df.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_bdir_se.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_buf_unused.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_cal_counter.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_pll.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_pll_fast_sim.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_pll_extra_clks.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_oct.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_core_clks_rsts.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hps_clks_rsts.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_io_tiles_wrap.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_io_tiles.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_io_tiles_abphy.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_abphy_mux.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hmc_avl_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hmc_sideband_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hmc_mmr_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hmc_amm_data_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_hmc_ast_data_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_afi_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_seq_if.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_emif_arch_nf_regs.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_oct.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_oct_um_fsm.sv"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/altera_std_synchronizer_nocut.v"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_ip_parameters.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_utils.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_parameters.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_pin_map.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_report_io_timing.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_report_timing.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_report_timing_core.tcl"]
-set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name SDC_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sdc"] -no_sdc_promotion -no_auto_inst_discovery
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.txt"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.txt"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex"]
-set_global_assignment -library "altera_emif_arch_nf_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_readme.txt"]
-set_global_assignment -library "altera_avalon_mm_bridge_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_avalon_mm_bridge_170/synth/altera_avalon_mm_bridge.v"]
-set_global_assignment -library "altera_avalon_onchip_memory2_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_avalon_onchip_memory2_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.v"]
-set_global_assignment -library "altera_avalon_onchip_memory2_170" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_avalon_onchip_memory2_170/synth/seq_cal_soft_m20k.hex"]
-set_global_assignment -library "altera_merlin_master_translator_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_merlin_master_translator_170/synth/altera_merlin_master_translator.sv"]
-set_global_assignment -library "altera_merlin_slave_translator_170" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_merlin_slave_translator_170/synth/altera_merlin_slave_translator.sv"]
-set_global_assignment -library "altera_mm_interconnect_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_mm_interconnect_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.v"]
-set_global_assignment -library "altera_reset_controller_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_reset_controller_170/synth/altera_reset_controller.v"]
-set_global_assignment -library "altera_reset_controller_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_reset_controller_170/synth/altera_reset_synchronizer.v"]
-set_global_assignment -library "altera_reset_controller_170" -name SDC_FILE [file join $::quartus(qip_path) "altera_reset_controller_170/synth/altera_reset_controller.sdc"]
-set_global_assignment -library "altera_emif_cal_slave_nf_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_cal_slave_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v"]
-set_global_assignment -library "altera_emif_170" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "LVDS" -to "pll_ref_clk"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "DIFFERENTIAL" -to "pll_ref_clk"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V" -to "oct_rzqin"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ck[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ck[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ck_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ck_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ck_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_a[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_a[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_a[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_act_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_act_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_act_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_ba[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ba[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ba[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_ba[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_ba[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_ba[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_bg[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_bg[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_bg[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_bg[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_bg[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_bg[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_cke[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cke[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_cke[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_cke[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cke[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_cke[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_cs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_cs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_cs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_odt[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_odt[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_odt[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_odt[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_odt[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_odt[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V" -to "mem_reset_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "OFF" -to "mem_reset_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_reset_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "SSTL-12" -to "mem_par[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to "mem_par[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SLEW_RATE "1" -to "mem_par[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V" -to "mem_alert_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "OFF" -to "mem_alert_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_alert_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dqs[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dqs[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "Differential 1.2-V POD" -to "mem_dqs_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dqs_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dqs_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[9]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[10]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[11]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[12]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[13]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[14]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[15]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[16]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[17]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[17]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[17]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[17]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[17]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[18]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[18]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[18]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[18]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[18]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[19]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[19]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[19]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[19]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[19]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[20]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[20]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[20]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[20]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[20]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[21]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[21]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[21]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[21]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[21]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[22]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[22]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[22]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[22]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[22]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[23]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[23]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[23]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[23]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[23]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[24]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[24]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[24]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[24]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[24]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[25]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[25]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[25]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[25]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[25]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[26]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[26]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[26]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[26]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[26]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[27]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[27]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[27]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[27]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[27]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[28]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[28]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[28]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[28]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[28]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[29]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[29]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[29]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[29]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[29]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[30]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[30]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[30]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[30]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[30]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[31]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[31]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[31]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[31]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[31]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[32]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[32]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[32]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[32]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[32]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[33]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[33]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[33]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[33]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[33]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[34]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[34]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[34]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[34]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[34]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[35]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[35]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[35]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[35]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[35]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[36]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[36]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[36]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[36]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[36]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[37]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[37]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[37]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[37]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[37]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[38]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[38]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[38]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[38]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[38]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[39]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[39]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[39]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[39]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[39]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[40]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[40]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[40]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[40]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[40]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[41]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[41]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[41]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[41]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[41]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[42]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[42]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[42]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[42]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[42]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[43]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[43]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[43]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[43]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[43]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[44]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[44]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[44]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[44]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[44]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[45]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[45]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[45]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[45]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[45]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[46]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[46]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[46]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[46]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[46]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[47]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[47]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[47]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[47]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[47]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[48]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[48]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[48]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[48]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[48]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[49]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[49]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[49]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[49]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[49]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[50]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[50]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[50]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[50]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[50]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[51]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[51]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[51]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[51]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[51]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[52]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[52]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[52]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[52]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[52]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[53]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[53]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[53]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[53]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[53]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[54]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[54]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[54]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[54]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[54]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[55]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[55]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[55]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[55]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[55]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[56]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[56]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[56]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[56]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[56]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[57]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[57]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[57]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[57]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[57]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[58]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[58]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[58]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[58]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[58]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[59]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[59]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[59]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[59]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[59]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[60]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[60]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[60]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[60]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[60]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[61]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[61]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[61]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[61]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[61]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[62]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[62]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[62]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[62]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[62]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[63]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[63]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[63]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[63]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[63]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[64]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[64]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[64]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[64]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[64]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[65]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[65]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[65]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[65]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[65]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[66]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[66]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[66]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[66]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[66]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[67]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[67]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[67]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[67]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[67]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[68]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[68]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[68]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[68]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[68]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[69]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[69]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[69]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[69]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[69]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[70]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[70]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[70]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[70]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[70]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dq[71]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dq[71]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dq[71]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dq[71]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dq[71]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[0]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[1]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[2]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[3]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[4]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[5]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[6]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[7]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name OUTPUT_TERMINATION "SERIES 34 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name INPUT_TERMINATION "PARALLEL 120 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name PACKAGE_SKEW_COMPENSATION ON -to "mem_dbi_n[8]"
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name VREF_MODE "CALIBRATED_SSTL" -to "mem_dbi_n[8]"
+
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_oct.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_df_o.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_bdir_df.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_bdir_se.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_cp_i.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_df_i.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_se_i.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_se_o.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_core_clks_rsts.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_io_tiles.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_io_tiles_abphy.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/twentynm_io_12_lane_abphy.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/twentynm_io_12_lane_encrypted_abphy.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_bufs.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_unused.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_cal_counter.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll_fast_sim.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll_extra_clks.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hps_clks_rsts.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_io_tiles_wrap.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_abphy_mux.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hmc_avl_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hmc_sideband_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hmc_mmr_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hmc_amm_data_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_hmc_ast_data_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_afi_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_seq_if.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_emif_arch_nf_regs.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_oct.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_oct_um_fsm.sv"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/altera_std_synchronizer_nocut.v"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_ip_parameters.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_utils.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_parameters.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_pin_map.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_io_timing.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name TCL_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_report_timing_core.tcl"]
+set_instance_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name SDC_ENTITY_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sdc"] -no_sdc_promotion -no_auto_inst_discovery
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.txt"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.txt"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"]
+set_global_assignment -library "altera_emif_arch_nf_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_readme.txt"]
+set_global_assignment -library "altera_avalon_mm_bridge_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_avalon_mm_bridge_180/synth/altera_avalon_mm_bridge.v"]
+set_global_assignment -library "altera_avalon_onchip_memory2_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v"]
+set_global_assignment -library "altera_avalon_onchip_memory2_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_avalon_onchip_memory2_180/synth/seq_cal_soft_m20k.hex"]
+set_global_assignment -library "altera_merlin_master_translator_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_merlin_master_translator_180/synth/altera_merlin_master_translator.sv"]
+set_global_assignment -library "altera_merlin_slave_translator_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_merlin_slave_translator_180/synth/altera_merlin_slave_translator.sv"]
+set_global_assignment -library "altera_mm_interconnect_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v"]
+set_global_assignment -library "altera_reset_controller_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_reset_controller_180/synth/altera_reset_controller.v"]
+set_global_assignment -library "altera_reset_controller_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_reset_controller_180/synth/altera_reset_synchronizer.v"]
+set_instance_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name SDC_ENTITY_FILE [file join $::quartus(qip_path) "altera_reset_controller_180/synth/altera_reset_controller.sdc"] -no_sdc_promotion -no_auto_inst_discovery
+set_global_assignment -library "altera_emif_cal_slave_nf_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v"]
+set_global_assignment -library "altera_emif_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v"]
set_global_assignment -library "ip_arria10_e1sg_ddr4_8g_2400" -name VHDL_FILE [file join $::quartus(qip_path) "synth/ip_arria10_e1sg_ddr4_8g_2400.vhd"]
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_TOOL_NAME "altera_emif"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi" -library "altera_emif_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_TOOL_NAME "altera_emif_cal_slave_nf"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy" -library "altera_emif_cal_slave_nf_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_TOOL_NAME "altera_reset_controller"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_TOOL_NAME "altera_mm_interconnect"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki" -library "altera_mm_interconnect_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_TOOL_NAME "altera_merlin_slave_translator"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_TOOL_NAME "altera_merlin_master_translator"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_TOOL_NAME "altera_avalon_onchip_memory2"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy" -library "altera_avalon_onchip_memory2_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_TOOL_NAME "altera_avalon_mm_bridge"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_170" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_TOOL_NAME "altera_emif_arch_nf"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_TOOL_VERSION "17.0"
-set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i" -library "altera_emif_arch_nf_170" -name IP_TOOL_ENV "QsysPrimePro"
+
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_TOOL_NAME "altera_emif"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa" -library "altera_emif_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_TOOL_NAME "altera_emif_cal_slave_nf"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq" -library "altera_emif_cal_slave_nf_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_TOOL_NAME "altera_reset_controller"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "altera_reset_controller" -library "altera_reset_controller_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_TOOL_NAME "altera_mm_interconnect"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq" -library "altera_mm_interconnect_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_TOOL_NAME "altera_merlin_slave_translator"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "altera_merlin_slave_translator" -library "altera_merlin_slave_translator_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_TOOL_NAME "altera_merlin_master_translator"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "altera_merlin_master_translator" -library "altera_merlin_master_translator_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_TOOL_NAME "altera_avalon_onchip_memory2"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za" -library "altera_avalon_onchip_memory2_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_TOOL_NAME "altera_avalon_mm_bridge"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "altera_avalon_mm_bridge" -library "altera_avalon_mm_bridge_180" -name IP_TOOL_ENV "QsysPrimePro"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_TOOL_NAME "altera_emif_arch_nf"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i" -library "altera_emif_arch_nf_180" -name IP_TOOL_ENV "QsysPrimePro"
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.sopcinfo b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.sopcinfo
index 306fd32f3dcdf5bddb656769429ee28457e510fd..1054648ca08fcc1fdcd8792999e141c58a1f45e7 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.sopcinfo
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.sopcinfo
@@ -4,12 +4,12 @@
kind="ip_arria10_e1sg_ddr4_8g_2400"
version="1.0"
fabric="QSYS">
- <!-- Format version 17.0.2 297 (Future versions may contain additional information.) -->
- <!-- 2019.10.09.19:37:30 -->
+ <!-- Format version 18.0 219 (Future versions may contain additional information.) -->
+ <!-- 2019.10.10.13:20:50 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
- <value>1570642650</value>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
@@ -99,7 +99,7 @@
<visible>true</visible>
<valid>true</valid>
</parameter>
- <module name="ddr4_inst" kind="altera_emif" version="17.0" path="ddr4_inst">
+ <module name="ddr4_inst" kind="altera_emif" version="18.0" path="ddr4_inst">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
<parameter name="SYS_INFO_DEVICE_FAMILY">
@@ -129,6 +129,15 @@ the requested settings for a module instance. -->
<valid>true</valid>
<sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>
</parameter>
+ <parameter name="SYS_INFO_DEVICE_DIE_REVISIONS">
+ <type>[Ljava.lang.String;</type>
+ <value></value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>DEVICE_DIE_REVISIONS</sysinfo_type>
+ </parameter>
<parameter name="FAMILY_ENUM">
<type>java.lang.String</type>
<value>FAMILY_ARRIA10</value>
@@ -302,6 +311,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_CALIBRATED_OCT">
<type>boolean</type>
<value>true</value>
@@ -1246,6 +1263,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_DDR3_IO_VOLTAGE">
<type>double</type>
<value>1.5</value>
@@ -1590,6 +1615,14 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_DDR4_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -1910,6 +1943,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_QDR2_IO_VOLTAGE">
<type>double</type>
<value>1.5</value>
@@ -2230,6 +2271,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_QDR4_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -2550,6 +2599,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_RLD2_IO_VOLTAGE">
<type>double</type>
<value>1.8</value>
@@ -2870,6 +2927,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_RLD3_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -3190,6 +3255,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_LPDDR3_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -3510,6 +3583,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_NUM_OF_DATA_ENDPOINTS">
+ <type>int</type>
+ <value>2</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_TTL_DATA_WIDTH">
<type>int</type>
<value>72</value>
@@ -4697,7 +4778,7 @@ the requested settings for a module instance. -->
<parameter name="MEM_DDR3_CFG_GEN_SBE">
<type>boolean</type>
<value>false</value>
- <derived>true</derived>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
@@ -4705,7 +4786,7 @@ the requested settings for a module instance. -->
<parameter name="MEM_DDR3_CFG_GEN_DBE">
<type>boolean</type>
<value>false</value>
- <derived>true</derived>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
@@ -4891,7 +4972,7 @@ the requested settings for a module instance. -->
<value>DDR4_BL_BL8</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="MEM_DDR4_BT_ENUM">
@@ -4899,7 +4980,7 @@ the requested settings for a module instance. -->
<value>DDR4_BT_SEQUENTIAL</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="MEM_DDR4_TCL">
@@ -5091,7 +5172,7 @@ the requested settings for a module instance. -->
<value>DDR4_AC_PARITY_LATENCY_DISABLE</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="MEM_DDR4_ODT_IN_POWERDOWN">
@@ -5430,6 +5511,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_DDR4_IDEAL_VREF_IN_PCT">
+ <type>double</type>
+ <value>61.0</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="MEM_DDR4_IDEAL_VREF_OUT_PCT">
+ <type>double</type>
+ <value>50.0</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_DDR4_VREFDQ_TRAINING_VALUE">
<type>double</type>
<value>60.0</value>
@@ -5928,7 +6025,7 @@ the requested settings for a module instance. -->
</parameter>
<parameter name="MEM_DDR4_W_DERIVED_ODT0">
<type>[Ljava.lang.String;</type>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
<derived>true</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -5936,7 +6033,7 @@ the requested settings for a module instance. -->
</parameter>
<parameter name="MEM_DDR4_W_DERIVED_ODT1">
<type>[Ljava.lang.String;</type>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
<derived>true</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -6126,17 +6223,17 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="MEM_DDR4_TWLS_PS">
+ <parameter name="MEM_DDR4_TWLS_CYC">
<type>double</type>
- <value>122.0</value>
+ <value>0.13</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="MEM_DDR4_TWLH_PS">
+ <parameter name="MEM_DDR4_TWLH_CYC">
<type>double</type>
- <value>122.0</value>
+ <value>0.13</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -6433,7 +6530,7 @@ the requested settings for a module instance. -->
<parameter name="MEM_DDR4_CFG_GEN_SBE">
<type>boolean</type>
<value>false</value>
- <derived>true</derived>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
@@ -6441,7 +6538,7 @@ the requested settings for a module instance. -->
<parameter name="MEM_DDR4_CFG_GEN_DBE">
<type>boolean</type>
<value>false</value>
- <derived>true</derived>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
@@ -6454,6 +6551,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_DDR4_TWLS_PS">
+ <type>double</type>
+ <value>0.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="MEM_DDR4_TWLH_PS">
+ <type>double</type>
+ <value>0.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR2_WIDTH_EXPANDED">
<type>boolean</type>
<value>false</value>
@@ -6670,6 +6783,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_SKIP_ODT_SWEEPING">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_CK_ODT_MODE_ENUM">
<type>java.lang.String</type>
<value>QDR4_ODT_25_PCT</value>
@@ -6710,6 +6831,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_MEM_TYPE_ENUM">
+ <type>java.lang.String</type>
+ <value>MEM_XP</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_DATA_INV_ENA">
<type>boolean</type>
<value>false</value>
@@ -6862,6 +6991,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_AVL_CHNLS">
+ <type>int</type>
+ <value>8</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_CR0">
<type>int</type>
<value>0</value>
@@ -10406,6 +10543,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="CTRL_REORDER_EN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="CTRL_DDR3_AVL_PROTOCOL_ENUM">
<type>java.lang.String</type>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -10782,6 +10927,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC">
+ <type>int</type>
+ <value>4</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="CTRL_QDR4_AVL_SYMBOL_WIDTH">
<type>int</type>
<value>9</value>
@@ -11171,6 +11324,14 @@ the requested settings for a module instance. -->
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="DIAG_HMC_HRC">
+ <type>java.lang.String</type>
+ <value>auto</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
@@ -11214,6 +11375,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -11246,6 +11415,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_SIM_VERBOSE_LEVEL">
+ <type>int</type>
+ <value>5</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_FAST_SIM">
<type>boolean</type>
<value>true</value>
@@ -11374,6 +11551,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -11406,6 +11591,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -11502,6 +11695,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_CA_DESKEW_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_CAL_ADDR0">
<type>int</type>
<value>0</value>
@@ -11566,6 +11767,14 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -11598,11 +11807,19 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR4_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR4_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
- <enabled>true</enabled>
+ <enabled>false</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
@@ -11766,6 +11983,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -11798,6 +12023,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR2_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR2_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -11910,6 +12143,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -11942,6 +12183,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR4_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR4_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -12062,6 +12311,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -12094,6 +12351,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD2_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD2_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -12206,6 +12471,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -12238,6 +12511,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -12326,6 +12607,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_CA_LEVEL_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="DIAG_RLD3_CA_DESKEW_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_SIM_CAL_MODE_ENUM">
<type>java.lang.String</type>
<value>SIM_CAL_MODE_SKIP</value>
@@ -12350,6 +12647,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -12382,6 +12687,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_LPDDR3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -12870,7 +13183,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="ctrl_amm_avalon_slave_0" kind="avalon_slave" version="17.0">
+ <interface name="ctrl_amm_avalon_slave_0" kind="avalon_slave" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -12903,7 +13216,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressSpan">
@@ -13291,7 +13604,7 @@ parameters are a RESULT of the module parameters. -->
<role>readdatavalid</role>
</port>
</interface>
- <interface name="emif_usr_clk_clock_source" kind="clock_source" version="17.0">
+ <interface name="emif_usr_clk_clock_source" kind="clock_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13308,7 +13621,7 @@ parameters are a RESULT of the module parameters. -->
<value>300000000</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="clockRateKnown">
@@ -13316,7 +13629,7 @@ parameters are a RESULT of the module parameters. -->
<value>true</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="externallyDriven">
@@ -13360,7 +13673,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="emif_usr_reset_reset_source" kind="reset_source" version="17.0">
+ <interface name="emif_usr_reset_reset_source" kind="reset_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13421,7 +13734,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="global_reset_reset_sink" kind="reset_sink" version="17.0">
+ <interface name="global_reset_reset_sink" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13466,7 +13779,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="mem_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="mem_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13609,7 +13922,7 @@ parameters are a RESULT of the module parameters. -->
<role>mem_dbi_n</role>
</port>
</interface>
- <interface name="oct_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="oct_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13662,7 +13975,7 @@ parameters are a RESULT of the module parameters. -->
<role>oct_rzqin</role>
</port>
</interface>
- <interface name="pll_ref_clk_clock_sink" kind="clock_sink" version="17.0">
+ <interface name="pll_ref_clk_clock_sink" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13707,7 +14020,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="status_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="status_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -13770,7 +14083,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_arch"
kind="altera_emif_arch_nf"
- version="17.0"
+ version="18.0"
path="ddr4_inst.arch">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -13798,6 +14111,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="SYS_INFO_DEVICE_DIE_REVISIONS">
+ <type>[Ljava.lang.String;</type>
+ <value></value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="FAMILY_ENUM">
<type>java.lang.String</type>
<value>FAMILY_ARRIA10</value>
@@ -13966,6 +14287,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_CALIBRATED_OCT">
<type>boolean</type>
<value>true</value>
@@ -14910,6 +15239,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_DDR3_IO_VOLTAGE">
<type>double</type>
<value>1.5</value>
@@ -15254,6 +15591,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_DDR4_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -15574,6 +15919,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_QDR2_IO_VOLTAGE">
<type>double</type>
<value>1.5</value>
@@ -15894,6 +16247,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_QDR4_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -16214,6 +16575,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_RLD2_IO_VOLTAGE">
<type>double</type>
<value>1.8</value>
@@ -16534,6 +16903,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_RLD3_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -16854,6 +17231,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PHY_LPDDR3_IO_VOLTAGE">
<type>double</type>
<value>1.2</value>
@@ -17174,6 +17559,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_NUM_OF_DATA_ENDPOINTS">
+ <type>int</type>
+ <value>2</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_TTL_DATA_WIDTH">
<type>int</type>
<value>72</value>
@@ -19094,6 +19487,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_DDR4_IDEAL_VREF_IN_PCT">
+ <type>double</type>
+ <value>61.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="MEM_DDR4_IDEAL_VREF_OUT_PCT">
+ <type>double</type>
+ <value>50.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_DDR4_VREFDQ_TRAINING_VALUE">
<type>double</type>
<value>60.0</value>
@@ -19592,7 +20001,7 @@ the requested settings for a module instance. -->
</parameter>
<parameter name="MEM_DDR4_W_DERIVED_ODT0">
<type>[Ljava.lang.String;</type>
- <value>(Nominal) ODT Disabled,ODT Disabled,-,-</value>
+ <value>(Park) Park ODT off,ODT Disabled,-,-</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
@@ -19600,7 +20009,7 @@ the requested settings for a module instance. -->
</parameter>
<parameter name="MEM_DDR4_W_DERIVED_ODT1">
<type>[Ljava.lang.String;</type>
- <value>ODT Disabled,(Nominal) ODT Disabled,-,-</value>
+ <value>ODT Disabled,(Park) Park ODT off,-,-</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
@@ -19790,17 +20199,17 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="MEM_DDR4_TWLS_PS">
+ <parameter name="MEM_DDR4_TWLS_CYC">
<type>double</type>
- <value>122.0</value>
+ <value>0.13</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="MEM_DDR4_TWLH_PS">
+ <parameter name="MEM_DDR4_TWLH_CYC">
<type>double</type>
- <value>122.0</value>
+ <value>0.13</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
@@ -20118,6 +20527,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_DDR4_TWLS_PS">
+ <type>double</type>
+ <value>0.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="MEM_DDR4_TWLH_PS">
+ <type>double</type>
+ <value>0.0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR2_WIDTH_EXPANDED">
<type>boolean</type>
<value>false</value>
@@ -20334,6 +20759,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_SKIP_ODT_SWEEPING">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_CK_ODT_MODE_ENUM">
<type>java.lang.String</type>
<value>QDR4_ODT_25_PCT</value>
@@ -20374,6 +20807,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_MEM_TYPE_ENUM">
+ <type>java.lang.String</type>
+ <value>MEM_XP</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_DATA_INV_ENA">
<type>boolean</type>
<value>false</value>
@@ -20526,6 +20967,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="MEM_QDR4_AVL_CHNLS">
+ <type>int</type>
+ <value>8</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="MEM_QDR4_CR0">
<type>int</type>
<value>0</value>
@@ -24070,6 +24519,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="CTRL_REORDER_EN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="CTRL_DDR3_AVL_PROTOCOL_ENUM">
<type>java.lang.String</type>
<value>CTRL_AVL_PROTOCOL_MM</value>
@@ -24446,6 +24903,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC">
+ <type>int</type>
+ <value>4</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="CTRL_QDR4_AVL_SYMBOL_WIDTH">
<type>int</type>
<value>9</value>
@@ -24838,6 +25303,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_HMC_HRC">
+ <type>java.lang.String</type>
+ <value>auto</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="SHORT_QSYS_INTERFACE_NAMES">
<type>boolean</type>
<value>false</value>
@@ -24878,6 +25351,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -24910,6 +25391,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_SIM_VERBOSE_LEVEL">
+ <type>int</type>
+ <value>5</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_FAST_SIM">
<type>boolean</type>
<value>true</value>
@@ -25038,6 +25527,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25070,6 +25567,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25166,6 +25671,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR3_CA_DESKEW_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR3_CAL_ADDR0">
<type>int</type>
<value>0</value>
@@ -25230,6 +25743,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25262,6 +25783,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_DDR4_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_DDR4_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25430,6 +25959,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25462,6 +25999,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR2_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR2_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25574,6 +26119,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25606,6 +26159,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_QDR4_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_QDR4_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25726,6 +26287,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25758,6 +26327,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD2_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD2_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25870,6 +26447,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -25902,6 +26487,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_RLD3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -25990,6 +26583,22 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_RLD3_CA_LEVEL_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="DIAG_RLD3_CA_DESKEW_EN">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_SIM_CAL_MODE_ENUM">
<type>java.lang.String</type>
<value>SIM_CAL_MODE_SKIP</value>
@@ -26014,6 +26623,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_EX_DESIGN_NUM_OF_SLAVES">
<type>int</type>
<value>1</value>
@@ -26046,6 +26663,14 @@ the requested settings for a module instance. -->
<visible>false</visible>
<valid>true</valid>
</parameter>
+ <parameter name="DIAG_LPDDR3_SIM_VERBOSE">
+ <type>boolean</type>
+ <value>true</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="DIAG_LPDDR3_USE_TG_AVL_2">
<type>boolean</type>
<value>false</value>
@@ -36670,6 +37295,14 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="PORT_CLKS_SHARING_SLAVE_OUT_WIDTH">
+ <type>int</type>
+ <value>32</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="PORT_AFI_RLAT_WIDTH">
<type>int</type>
<value>6</value>
@@ -38350,7 +38983,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="global_reset_reset_sink" kind="reset_sink" version="17.0">
+ <interface name="global_reset_reset_sink" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38395,7 +39028,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="pll_ref_clk_clock_sink" kind="clock_sink" version="17.0">
+ <interface name="pll_ref_clk_clock_sink" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38440,7 +39073,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="oct_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="oct_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38493,7 +39126,7 @@ parameters are a RESULT of the module parameters. -->
<role>oct_rzqin</role>
</port>
</interface>
- <interface name="mem_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="mem_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38636,7 +39269,7 @@ parameters are a RESULT of the module parameters. -->
<role>mem_dbi_n</role>
</port>
</interface>
- <interface name="status_conduit_end" kind="conduit_end" version="17.0">
+ <interface name="status_conduit_end" kind="conduit_end" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38695,7 +39328,7 @@ parameters are a RESULT of the module parameters. -->
<role>local_cal_fail</role>
</port>
</interface>
- <interface name="emif_usr_reset_reset_source" kind="reset_source" version="17.0">
+ <interface name="emif_usr_reset_reset_source" kind="reset_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38756,7 +39389,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="emif_usr_clk_clock_source" kind="clock_source" version="17.0">
+ <interface name="emif_usr_clk_clock_source" kind="clock_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38773,7 +39406,7 @@ parameters are a RESULT of the module parameters. -->
<value>300000000</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="clockRateKnown">
@@ -38781,7 +39414,7 @@ parameters are a RESULT of the module parameters. -->
<value>true</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="externallyDriven">
@@ -38828,7 +39461,7 @@ parameters are a RESULT of the module parameters. -->
<interface
name="cal_slave_reset_n_reset_source"
kind="reset_source"
- version="17.0">
+ version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38889,7 +39522,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="cal_slave_clk_clock_source" kind="clock_source" version="17.0">
+ <interface name="cal_slave_clk_clock_source" kind="clock_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -38906,7 +39539,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="clockRateKnown">
@@ -38914,7 +39547,7 @@ parameters are a RESULT of the module parameters. -->
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="externallyDriven">
@@ -38985,7 +39618,7 @@ parameters are a RESULT of the module parameters. -->
<interface
name="cal_slave_reset_n_in_reset_sink"
kind="reset_sink"
- version="17.0">
+ version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -39030,7 +39663,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset_n</role>
</port>
</interface>
- <interface name="cal_slave_clk_in_clock_sink" kind="clock_sink" version="17.0">
+ <interface name="cal_slave_clk_in_clock_sink" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -39075,7 +39708,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="ctrl_amm_avalon_slave_0" kind="avalon_slave" version="17.0">
+ <interface name="ctrl_amm_avalon_slave_0" kind="avalon_slave" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -39100,7 +39733,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressSpan">
@@ -39488,7 +40121,7 @@ parameters are a RESULT of the module parameters. -->
<role>readdatavalid</role>
</port>
</interface>
- <interface name="cal_master_avalon_master" kind="avalon_master" version="17.0">
+ <interface name="cal_master_avalon_master" kind="avalon_master" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -39505,7 +40138,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressUnits">
@@ -39863,7 +40496,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_cal_slave_component"
kind="altera_emif_cal_slave_nf"
- version="17.0"
+ version="18.0"
path="ddr4_inst.cal_slave_component">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -39935,7 +40568,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="avl" kind="avalon_slave" version="17.0">
+ <interface name="avl" kind="avalon_slave" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -39945,15 +40578,15 @@ parameters are a RESULT of the module parameters. -->
</assignment>
<assignment>
<name>embeddedsw.configuration.isMemoryDevice</name>
- <value>0</value>
+ <value>false</value>
</assignment>
<assignment>
<name>embeddedsw.configuration.isNonVolatileStorage</name>
- <value>0</value>
+ <value>false</value>
</assignment>
<assignment>
<name>embeddedsw.configuration.isPrintableDevice</name>
- <value>0</value>
+ <value>false</value>
</assignment>
<parameter name="addressAlignment">
<type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
@@ -39968,7 +40601,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressSpan">
@@ -40362,7 +40995,7 @@ parameters are a RESULT of the module parameters. -->
<role>debugaccess</role>
</port>
</interface>
- <interface name="clk" kind="clock_sink" version="17.0">
+ <interface name="clk" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40407,7 +41040,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="rst" kind="reset_sink" version="17.0">
+ <interface name="rst" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40456,7 +41089,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_cal_slave_component_clk_bridge"
kind="altera_clock_bridge"
- version="17.0"
+ version="18.0"
path="ddr4_inst.cal_slave_component.clk_bridge">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -40502,7 +41135,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="in_clk" kind="clock_sink" version="17.0">
+ <interface name="in_clk" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40563,7 +41196,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="out_clk" kind="clock_source" version="17.0">
+ <interface name="out_clk" kind="clock_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40580,7 +41213,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="clockRateKnown">
@@ -40588,7 +41221,7 @@ parameters are a RESULT of the module parameters. -->
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="externallyDriven">
@@ -40648,7 +41281,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_cal_slave_component_rst_bridge"
kind="altera_reset_bridge"
- version="17.0"
+ version="18.0"
path="ddr4_inst.cal_slave_component.rst_bridge">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -40684,6 +41317,14 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="SYNC_RESET">
+ <type>int</type>
+ <value>0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="AUTO_CLK_CLOCK_RATE">
<type>java.lang.Long</type>
<value>-1</value>
@@ -40710,7 +41351,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="in_reset" kind="reset_sink" version="17.0">
+ <interface name="in_reset" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40755,7 +41396,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset</role>
</port>
</interface>
- <interface name="out_reset" kind="reset_source" version="17.0">
+ <interface name="out_reset" kind="reset_source" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -40820,7 +41461,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_cal_slave_component_ioaux_master_bridge"
kind="altera_avalon_mm_bridge"
- version="17.0"
+ version="18.0"
path="ddr4_inst.cal_slave_component.ioaux_master_bridge">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -40946,6 +41587,14 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="SYNC_RESET">
+ <type>int</type>
+ <value>0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -40962,7 +41611,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="clk" kind="clock_sink" version="17.0">
+ <interface name="clk" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -41007,7 +41656,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="reset" kind="reset_sink" version="17.0">
+ <interface name="reset" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -41052,7 +41701,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset</role>
</port>
</interface>
- <interface name="s0" kind="avalon_slave" version="17.0">
+ <interface name="s0" kind="avalon_slave" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -41081,7 +41730,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressSpan">
@@ -41475,7 +42124,7 @@ parameters are a RESULT of the module parameters. -->
<role>debugaccess</role>
</port>
</interface>
- <interface name="m0" kind="avalon_master" version="17.0">
+ <interface name="m0" kind="avalon_master" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -41492,7 +42141,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressUnits">
@@ -41842,7 +42491,7 @@ parameters are a RESULT of the module parameters. -->
<module
name="ddr4_inst_cal_slave_component_ioaux_soft_ram"
kind="altera_avalon_onchip_memory2"
- version="17.0"
+ version="18.0"
path="ddr4_inst.cal_slave_component.ioaux_soft_ram">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
@@ -42162,7 +42811,7 @@ the requested settings for a module instance. -->
</parameter>
<parameter name="deviceFeatures">
<type>java.lang.String</type>
- <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
+ <value>ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
@@ -42233,7 +42882,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="clk1" kind="clock_sink" version="17.0">
+ <interface name="clk1" kind="clock_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -42278,7 +42927,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="s1" kind="avalon_slave" version="17.0">
+ <interface name="s1" kind="avalon_slave" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -42311,7 +42960,7 @@ parameters are a RESULT of the module parameters. -->
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="addressSpan">
@@ -42693,7 +43342,7 @@ parameters are a RESULT of the module parameters. -->
<role>byteenable</role>
</port>
</interface>
- <interface name="reset1" kind="reset_sink" version="17.0">
+ <interface name="reset1" kind="reset_sink" version="18.0">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -42742,9 +43391,45 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_cal_slave_component_clk_bridge.out_clk/ddr4_inst_cal_slave_component_ioaux_master_bridge.clk"
kind="clock"
- version="17.0"
+ version="18.0"
start="ddr4_inst_cal_slave_component_clk_bridge.out_clk"
end="ddr4_inst_cal_slave_component_ioaux_master_bridge.clk">
+ <parameter name="clockRateSysInfo">
+ <type>java.lang.Long</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RATE</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42769,9 +43454,36 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_cal_slave_component_rst_bridge.out_reset/ddr4_inst_cal_slave_component_ioaux_master_bridge.reset"
kind="reset"
- version="17.0"
+ version="18.0"
start="ddr4_inst_cal_slave_component_rst_bridge.out_reset"
end="ddr4_inst_cal_slave_component_ioaux_master_bridge.reset">
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42796,7 +43508,7 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_cal_slave_component_ioaux_master_bridge.m0/ddr4_inst_cal_slave_component_ioaux_soft_ram.s1"
kind="avalon"
- version="17.0"
+ version="18.0"
start="ddr4_inst_cal_slave_component_ioaux_master_bridge.m0"
end="ddr4_inst_cal_slave_component_ioaux_soft_ram.s1">
<parameter name="arbitrationPriority">
@@ -42831,6 +43543,33 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="slaveDataWidthSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>MAX_SLAVE_DATA_WIDTH</sysinfo_type>
+ </parameter>
+ <parameter name="addressMapSysInfo">
+ <type>com.altera.entityinterfaces.moduleext.AddressMap</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>ADDRESS_MAP</sysinfo_type>
+ </parameter>
+ <parameter name="addressWidthSysInfo">
+ <type>com.altera.entityinterfaces.moduleext.AddressWidthType</type>
+ <value>14</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>ADDRESS_WIDTH</sysinfo_type>
+ </parameter>
<parameter name="maximumAdditionalLatency">
<type>java.lang.String</type>
<value>0</value>
@@ -42887,6 +43626,14 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="syncResets">
+ <type>java.lang.String</type>
+ <value>FALSE</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42911,9 +43658,45 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_cal_slave_component_clk_bridge.out_clk/ddr4_inst_cal_slave_component_ioaux_soft_ram.clk1"
kind="clock"
- version="17.0"
+ version="18.0"
start="ddr4_inst_cal_slave_component_clk_bridge.out_clk"
end="ddr4_inst_cal_slave_component_ioaux_soft_ram.clk1">
+ <parameter name="clockRateSysInfo">
+ <type>java.lang.Long</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RATE</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42938,9 +43721,36 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_cal_slave_component_rst_bridge.out_reset/ddr4_inst_cal_slave_component_ioaux_soft_ram.reset1"
kind="reset"
- version="17.0"
+ version="18.0"
start="ddr4_inst_cal_slave_component_rst_bridge.out_reset"
end="ddr4_inst_cal_slave_component_ioaux_soft_ram.reset1">
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42965,9 +43775,45 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_arch.cal_slave_clk_clock_source/ddr4_inst_arch.cal_slave_clk_in_clock_sink"
kind="clock"
- version="17.0"
+ version="18.0"
start="ddr4_inst_arch.cal_slave_clk_clock_source"
end="ddr4_inst_arch.cal_slave_clk_in_clock_sink">
+ <parameter name="clockRateSysInfo">
+ <type>java.lang.Long</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RATE</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -42992,9 +43838,36 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_arch.cal_slave_reset_n_reset_source/ddr4_inst_arch.cal_slave_reset_n_in_reset_sink"
kind="reset"
- version="17.0"
+ version="18.0"
start="ddr4_inst_arch.cal_slave_reset_n_reset_source"
end="ddr4_inst_arch.cal_slave_reset_n_in_reset_sink">
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -43019,9 +43892,45 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_arch.cal_slave_clk_clock_source/ddr4_inst_cal_slave_component_clk_bridge.in_clk"
kind="clock"
- version="17.0"
+ version="18.0"
start="ddr4_inst_arch.cal_slave_clk_clock_source"
end="ddr4_inst_cal_slave_component_clk_bridge.in_clk">
+ <parameter name="clockRateSysInfo">
+ <type>java.lang.Long</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RATE</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -43046,9 +43955,36 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_arch.cal_slave_reset_n_reset_source/ddr4_inst_cal_slave_component_rst_bridge.in_reset"
kind="reset"
- version="17.0"
+ version="18.0"
start="ddr4_inst_arch.cal_slave_reset_n_reset_source"
end="ddr4_inst_cal_slave_component_rst_bridge.in_reset">
+ <parameter name="resetDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>RESET_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockDomainSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
+ </parameter>
+ <parameter name="clockResetSysInfo">
+ <type>java.lang.String</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>CLOCK_RESET_INFO</sysinfo_type>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -43073,7 +44009,7 @@ parameters are a RESULT of the module parameters. -->
<connection
name="ddr4_inst_arch.cal_master_avalon_master/ddr4_inst_cal_slave_component_ioaux_master_bridge.s0"
kind="avalon"
- version="17.0"
+ version="18.0"
start="ddr4_inst_arch.cal_master_avalon_master"
end="ddr4_inst_cal_slave_component_ioaux_master_bridge.s0">
<parameter name="arbitrationPriority">
@@ -43108,6 +44044,33 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="slaveDataWidthSysInfo">
+ <type>java.lang.Integer</type>
+ <value>-1</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>MAX_SLAVE_DATA_WIDTH</sysinfo_type>
+ </parameter>
+ <parameter name="addressMapSysInfo">
+ <type>com.altera.entityinterfaces.moduleext.AddressMap</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>ADDRESS_MAP</sysinfo_type>
+ </parameter>
+ <parameter name="addressWidthSysInfo">
+ <type>com.altera.entityinterfaces.moduleext.AddressWidthType</type>
+ <value></value>
+ <derived>true</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ <sysinfo_type>ADDRESS_WIDTH</sysinfo_type>
+ </parameter>
<parameter name="maximumAdditionalLatency">
<type>java.lang.String</type>
<value>0</value>
@@ -43164,6 +44127,14 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="syncResets">
+ <type>java.lang.String</type>
+ <value>FALSE</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -43190,8 +44161,8 @@ parameters are a RESULT of the module parameters. -->
<name>altera_emif</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Arria 10 External Memory Interfaces</displayName>
- <version>17.0</version>
+ <displayName>External Memory Interfaces Intel Arria 10 FPGA IP</displayName>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>5</instanceCount>
@@ -43199,7 +44170,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Avalon Memory Mapped Slave</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>4</instanceCount>
@@ -43207,7 +44178,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Clock Output</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>4</instanceCount>
@@ -43215,7 +44186,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Reset Output</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>7</instanceCount>
@@ -43223,7 +44194,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Reset Input</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>6</instanceCount>
@@ -43231,7 +44202,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Conduit</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>7</instanceCount>
@@ -43239,7 +44210,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Clock Input</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
@@ -43247,7 +44218,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
<displayName>EMIF Core Component for 20nm Families</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>2</instanceCount>
@@ -43255,7 +44226,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Avalon Memory Mapped Master</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
@@ -43263,39 +44234,39 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
<displayName>Arria 10 External Memory Interfaces Calibration Slave/Helper component</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
<name>altera_clock_bridge</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Clock Bridge</displayName>
- <version>17.0</version>
+ <displayName>Clock Bridge Intel FPGA IP</displayName>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
<name>altera_reset_bridge</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Reset Bridge</displayName>
- <version>17.0</version>
+ <displayName>Reset Bridge Intel FPGA IP</displayName>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
<name>altera_avalon_mm_bridge</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Avalon-MM Pipeline Bridge</displayName>
- <version>17.0</version>
+ <displayName>Avalon-MM Pipeline Bridge Intel FPGA IP</displayName>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
<name>altera_avalon_onchip_memory2</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>On-Chip Memory (RAM or ROM)</displayName>
- <version>17.0</version>
+ <displayName>On-Chip Memory (RAM or ROM) Intel FPGA IP</displayName>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>4</instanceCount>
@@ -43303,7 +44274,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IConnection</subtype>
<displayName>Clock Connection</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>4</instanceCount>
@@ -43311,7 +44282,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IConnection</subtype>
<displayName>Reset Connection</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
<plugin>
<instanceCount>2</instanceCount>
@@ -43319,8 +44290,8 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IConnection</subtype>
<displayName>Avalon Memory Mapped Connection</displayName>
- <version>17.0</version>
+ <version>18.0</version>
</plugin>
- <reportVersion>17.0.2 297</reportVersion>
+ <reportVersion>18.0 219</reportVersion>
<uniqueIdentifier></uniqueIdentifier>
</EnsembleReport>
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd
index bb2e650b4aa1c7b528b64823ec2ed50ed5d21a22..70f28692f8d1fc314548da64092dfaec2ce51a1e 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd
@@ -1,279 +1,279 @@
<?xml version="1.0" encoding="UTF-8"?>
<simPackage>
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv"
+ path="altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv"
+ path="altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv"
+ path="altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_oct.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv"
+ path="altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v"
- type="VERILOG"
- library="altera_emif_arch_nf_170" />
- <file
- path="altera_emif_arch_nf_170/sim/mem_array_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/altera_oct.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv"
- type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ path="altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v"
+ type="VERILOG"
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/mem_array_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv"
+ path="altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv"
type="SYSTEM_VERILOG"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"
type="HEX"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.txt"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.txt"
type="OTHER"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"
type="HEX"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.txt"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.txt"
type="OTHER"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
type="HEX"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_readme.txt"
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_readme.txt"
type="OTHER"
- library="altera_emif_arch_nf_170" />
+ library="altera_emif_arch_nf_180" />
+ <file
+ path="altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd"
+ type="VHDL"
+ library="altera_emif_arch_nf_180" />
<file
- path="altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v"
+ path="altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v"
type="VERILOG"
- library="altera_avalon_mm_bridge_170" />
+ library="altera_avalon_mm_bridge_180" />
<file
- path="altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd"
+ path="altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd"
type="VHDL"
- library="altera_avalon_onchip_memory2_170" />
+ library="altera_avalon_onchip_memory2_180" />
<file
- path="altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"
+ path="altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"
type="HEX"
- library="altera_avalon_onchip_memory2_170" />
+ library="altera_avalon_onchip_memory2_180" />
<file
- path="altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv"
+ path="altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv"
type="SYSTEM_VERILOG"
- library="altera_merlin_master_translator_170" />
+ library="altera_merlin_master_translator_180" />
<file
- path="altera_merlin_slave_translator_170/sim/mentor/altera_merlin_slave_translator.sv"
+ path="altera_merlin_slave_translator_180/sim/mentor/altera_merlin_slave_translator.sv"
type="SYSTEM_VERILOG_ENCRYPT"
- library="altera_merlin_slave_translator_170"
+ library="altera_merlin_slave_translator_180"
simulator="modelsim" />
<file
- path="altera_merlin_slave_translator_170/sim/aldec/altera_merlin_slave_translator.sv"
+ path="altera_merlin_slave_translator_180/sim/aldec/altera_merlin_slave_translator.sv"
type="SYSTEM_VERILOG_ENCRYPT"
- library="altera_merlin_slave_translator_170"
+ library="altera_merlin_slave_translator_180"
simulator="riviera" />
<file
- path="altera_merlin_slave_translator_170/sim/cadence/altera_merlin_slave_translator.sv"
+ path="altera_merlin_slave_translator_180/sim/cadence/altera_merlin_slave_translator.sv"
type="SYSTEM_VERILOG_ENCRYPT"
- library="altera_merlin_slave_translator_170"
+ library="altera_merlin_slave_translator_180"
simulator="ncsim" />
<file
- path="altera_merlin_slave_translator_170/sim/synopsys/altera_merlin_slave_translator.sv"
+ path="altera_merlin_slave_translator_180/sim/synopsys/altera_merlin_slave_translator.sv"
type="SYSTEM_VERILOG_ENCRYPT"
- library="altera_merlin_slave_translator_170"
+ library="altera_merlin_slave_translator_180"
simulator="vcs" />
<file
- path="altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd"
+ path="altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd"
type="VHDL"
- library="altera_mm_interconnect_170"
+ library="altera_mm_interconnect_180"
hasInlineConfiguration="true" />
<file
- path="altera_reset_controller_170/sim/mentor/altera_reset_controller.v"
+ path="altera_reset_controller_180/sim/mentor/altera_reset_controller.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="modelsim" />
<file
- path="altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v"
+ path="altera_reset_controller_180/sim/mentor/altera_reset_synchronizer.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="modelsim" />
<file
- path="altera_reset_controller_170/sim/aldec/altera_reset_controller.v"
+ path="altera_reset_controller_180/sim/aldec/altera_reset_controller.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="riviera" />
<file
- path="altera_reset_controller_170/sim/aldec/altera_reset_synchronizer.v"
+ path="altera_reset_controller_180/sim/aldec/altera_reset_synchronizer.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="riviera" />
<file
- path="altera_reset_controller_170/sim/cadence/altera_reset_controller.v"
+ path="altera_reset_controller_180/sim/cadence/altera_reset_controller.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="ncsim" />
<file
- path="altera_reset_controller_170/sim/cadence/altera_reset_synchronizer.v"
+ path="altera_reset_controller_180/sim/cadence/altera_reset_synchronizer.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="ncsim" />
<file
- path="altera_reset_controller_170/sim/synopsys/altera_reset_controller.v"
+ path="altera_reset_controller_180/sim/synopsys/altera_reset_controller.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="vcs" />
<file
- path="altera_reset_controller_170/sim/synopsys/altera_reset_synchronizer.v"
+ path="altera_reset_controller_180/sim/synopsys/altera_reset_synchronizer.v"
type="VERILOG_ENCRYPT"
- library="altera_reset_controller_170"
+ library="altera_reset_controller_180"
simulator="vcs" />
<file
- path="altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v"
- type="VERILOG"
- library="altera_emif_cal_slave_nf_170"
+ path="altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd"
+ type="VHDL"
+ library="altera_emif_cal_slave_nf_180"
hasInlineConfiguration="true" />
<file
- path="altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v"
- type="VERILOG"
- library="altera_emif_170"
+ path="altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd"
+ type="VHDL"
+ library="altera_emif_180"
hasInlineConfiguration="true" />
<file
path="sim/ip_arria10_e1sg_ddr4_8g_2400.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.xml b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.xml
index a0fd4e1eb07cef6456e5db60be666660156216b2..61090badfc07d1488e05729df93cbb60236e2640 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.xml
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.xml
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<deploy
- date="2019.10.09.19:37:31"
+ date="2019.10.10.13:20:51"
outputDirectory="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/">
<perimeter>
<parameter
@@ -185,7 +185,7 @@
version="1.0"
name="ip_arria10_e1sg_ddr4_8g_2400">
<parameter name="AUTO_PLL_REF_CLK_CLOCK_SINK_CLOCK_RATE" value="-1" />
- <parameter name="AUTO_GENERATION_ID" value="1570642650" />
+ <parameter name="AUTO_GENERATION_ID" value="0" />
<parameter name="AUTO_DEVICE" value="10AX115S2F45E1SG" />
<parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
<parameter name="AUTO_PLL_REF_CLK_CLOCK_SINK_RESET_DOMAIN" value="-1" />
@@ -208,35 +208,35 @@
</sourceFiles>
<childSourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/emif/hwtcl/altera_emif/altera_emif_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/hwtcl/altera_emif/altera_emif_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
</childSourceFiles>
<messages>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_avalon_mm_bridge"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"</message>
- <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]</message>
- <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"</message>
+ <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]</message>
+ <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_master_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_slave_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_reset_controller"</message>
@@ -244,8 +244,8 @@
</entity>
<entity
kind="altera_emif"
- version="17.0"
- name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi">
+ version="18.0"
+ name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa">
<parameter name="BOARD_QDR4_USE_DEFAULT_SLEW_RATES" value="true" />
<parameter name="CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC" value="11" />
<parameter name="PHY_DDR4_DATA_IN_MODE_ENUM" value="IN_OCT_120_CAL" />
@@ -322,10 +322,12 @@
<parameter name="BOARD_DDR3_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="MEM_DDR3_W_ODT0_2X2" value="on,on" />
<parameter name="MEM_DDR4_PER_DRAM_ADDR" value="false" />
+ <parameter name="DIAG_SIM_VERBOSE_LEVEL" value="5" />
<parameter name="MEM_DDR3_MIRROR_ADDRESSING_EN" value="false" />
<parameter name="BOARD_LPDDR3_USER_RDATA_SLEW_RATE" value="2.0" />
<parameter name="BOARD_DDR3_USER_CK_SLEW_RATE" value="2.0" />
<parameter name="MEM_QDR4_TCKQK_MAX_PS" value="225" />
+ <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PHY_TARGET_IS_ES3" value="false" />
<parameter name="MEM_LPDDR3_W_ODT3_4X4" value="off,off,off,off" />
<parameter name="PHY_TARGET_IS_ES2" value="false" />
@@ -355,6 +357,7 @@
<parameter name="BOARD_QDR4_USER_WDATA_ISI_NS" value="0.0" />
<parameter name="CTRL_DDR4_USER_REFRESH_EN" value="false" />
<parameter name="MEM_DDR3_R_ODTN_2X2" value="Rank 0,Rank 1" />
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="MEM_LPDDR3_DATA_LATENCY" value="LPDDR3_DL_RL12_WL6" />
<parameter name="BOARD_RLD3_RCLK_ISI_NS" value="0.0" />
<parameter name="EX_DESIGN_GUI_RLD2_GEN_SYNTH" value="true" />
@@ -366,13 +369,16 @@
<parameter name="MEM_QDR4_AC_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
<parameter name="DIAG_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="PHY_LPDDR3_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="MEM_DDR3_RANKS_PER_DIMM" value="1" />
<parameter name="MEM_DDR4_DB_DQ_DRV_ENUM" value="DDR4_DB_DRV_STR_RZQ_7" />
<parameter name="MEM_DDR3_TDSS_CYC" value="0.18" />
<parameter name="BOARD_DDR4_SKEW_BETWEEN_DQS_NS" value="0.02" />
+ <parameter name="DIAG_QDR2_SIM_VERBOSE" value="true" />
<parameter name="MEM_DDR3_TREFI_US" value="7.8" />
<parameter name="DIAG_QDR4_EX_DESIGN_SEPARATE_RZQS" value="false" />
- <parameter name="MEM_DDR4_TWLH_PS" value="122.0" />
+ <parameter name="PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
+ <parameter name="MEM_DDR4_TWLH_PS" value="0.0" />
<parameter name="MEM_DDR3_TDSH_CYC" value="0.18" />
<parameter name="BOARD_RLD3_DK_TO_CK_SKEW_NS" value="-0.02" />
<parameter name="DIAG_DDR4_TG_DATA_PATTERN_LENGTH" value="8" />
@@ -390,7 +396,7 @@
name="CTRL_DDR3_ADDR_ORDER_ENUM"
value="DDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
<parameter name="EX_DESIGN_GUI_DDR3_GEN_SIM" value="true" />
- <parameter name="MEM_DDR4_TWLS_PS" value="122.0" />
+ <parameter name="MEM_DDR4_TWLS_PS" value="0.0" />
<parameter name="EX_DESIGN_GUI_RLD2_GEN_SIM" value="true" />
<parameter name="MEM_DDR4_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
<parameter name="PHY_DDR3_USER_DATA_IN_MODE_ENUM" value="unset" />
@@ -480,6 +486,7 @@
<parameter name="PHY_DDR3_USER_CK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_LPDDR3_AC_MODE_ENUM" value="unset" />
<parameter name="BOARD_DDR4_USER_AC_ISI_NS" value="0.094" />
+ <parameter name="MEM_NUM_OF_DATA_ENDPOINTS" value="2" />
<parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_NUM_OF_LOGICAL_RANKS" value="2" />
<parameter name="PHY_QDR2_DATA_OUT_MODE_ENUM" value="unset" />
@@ -549,6 +556,7 @@
<parameter name="MEM_RLD3_TDS_PS" value="-30" />
<parameter name="PHY_RLD3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_RLD3_TDH_PS" value="5" />
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="DIAG_DDR3_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="PHY_QDR2_RATE_ENUM" value="RATE_HALF" />
<parameter name="PHY_QDR2_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
@@ -559,6 +567,7 @@
<parameter name="MEM_LPDDR3_R_ODTN_1X1" value="Rank 0" />
<parameter name="BOARD_QDR2_WDATA_SLEW_RATE" value="2.0" />
<parameter name="DIAG_RLD2_USE_TG_AVL_2" value="false" />
+ <parameter name="PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="MEM_DDR3_SEQ_ODT_TABLE_LO" value="0" />
<parameter name="BOARD_RLD3_RDATA_ISI_NS" value="0.0" />
<parameter name="PHY_QDR2_REF_CLK_JITTER_PS" value="10.0" />
@@ -566,6 +575,7 @@
<parameter name="MEM_DDR4_RCD_CKE_IBT_ENUM" value="DDR4_RCD_CKE_IBT_100" />
<parameter name="BOARD_DDR3_WCLK_ISI_NS" value="0.0" />
<parameter name="BOARD_RLD3_PKG_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
+ <parameter name="DIAG_DDR4_SIM_VERBOSE" value="true" />
<parameter name="MEM_QDR2_BWS_N_PER_DEVICE" value="4" />
<parameter name="MEM_DDR4_READ_DBI" value="false" />
<parameter name="MEM_DDR3_TTL_CK_WIDTH" value="1" />
@@ -652,6 +662,7 @@
<parameter name="BOARD_RLD3_USER_RCLK_ISI_NS" value="0.094" />
<parameter name="PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
<parameter name="MEM_DDR3_CS_PER_DIMM" value="1" />
+ <parameter name="DIAG_QDR4_SIM_VERBOSE" value="true" />
<parameter name="MEM_DDR3_TINIT_US" value="500" />
<parameter name="PHY_RLD3_DATA_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_DM_EN" value="true" />
@@ -677,6 +688,7 @@
<parameter name="MEM_DDR4_R_ODT3_4X4" value="on,on,off,off" />
<parameter name="PHY_LPDDR3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="PLL_VCO_CLK_FREQ_MHZ" value="1200.0" />
+ <parameter name="DIAG_DDR3_CA_DESKEW_EN" value="false" />
<parameter name="DIAG_QDR2_SEPARATE_READ_WRITE_ITFS" value="false" />
<parameter name="MEM_DDR4_TCCD_L_CYC" value="5" />
<parameter name="PHY_RLD3_RZQ_IO_STD_ENUM" value="unset" />
@@ -718,6 +730,7 @@
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_1" value="50.0" />
<parameter name="BOARD_QDR2_RDATA_SLEW_RATE" value="2.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_0" value="50.0" />
+ <parameter name="DIAG_RLD2_SIM_VERBOSE" value="true" />
<parameter
name="PHY_FPGA_SPEEDGRADE_GUI"
value="E1 (Production) - change device under 'View'->'Device Family'" />
@@ -743,6 +756,7 @@
<parameter name="MEM_DDR3_TDH_DC_MV" value="100" />
<parameter name="MEM_QDR4_ADDR_INV_ENA" value="false" />
<parameter name="BOARD_DDR3_TDS_DERATING_PS" value="0" />
+ <parameter name="DIAG_RLD3_CA_DESKEW_EN" value="false" />
<parameter name="BOARD_DDR4_USER_RCLK_SLEW_RATE" value="4.0" />
<parameter name="DIAG_DDR3_BYPASS_USER_STAGE" value="true" />
<parameter name="MEM_DDR4_ROW_ADDR_WIDTH" value="15" />
@@ -751,12 +765,15 @@
<parameter name="MEM_DDR4_TTL_ADDR_WIDTH" value="17" />
<parameter name="EX_DESIGN_GUI_DDR4_GEN_SIM" value="true" />
<parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_D_NS" value="0.02" />
+ <parameter name="PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="MEM_DDR4_TIH_DC_MV" value="75" />
<parameter name="MEM_DDR4_SEQ_ODT_TABLE_HI" value="0" />
<parameter name="BOARD_DDR3_USER_RCLK_SLEW_RATE" value="4.0" />
<parameter name="BOARD_RLD3_TIH_DERATING_PS" value="0" />
<parameter name="DIAG_RLD2_SEPARATE_READ_WRITE_ITFS" value="false" />
+ <parameter name="MEM_DDR4_TWLH_CYC" value="0.13" />
<parameter name="BOARD_QDR2_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="BOARD_RLD3_TDS_DERATING_PS" value="0" />
<parameter name="MEM_LPDDR3_TFAW_NS" value="50.0" />
<parameter name="MEM_LPDDR3_TDH_PS" value="100" />
@@ -767,6 +784,7 @@
<parameter name="MEM_RLD3_AREF_PROTOCOL_ENUM" value="RLD3_AREF_BAC" />
<parameter name="PHY_QDR2_IO_VOLTAGE" value="1.5" />
<parameter name="PHY_QDR2_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="DIAG_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="MEM_DDR4_RANKS_PER_DIMM" value="2" />
<parameter name="BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
@@ -786,6 +804,7 @@
<parameter name="BOARD_QDR2_USER_WCLK_ISI_NS" value="0.031" />
<parameter name="MEM_QDR2_K_WIDTH" value="1" />
<parameter name="MEM_LPDDR3_W_DERIVED_ODTN" value=",," />
+ <parameter name="MEM_QDR4_AVL_CHNLS" value="8" />
<parameter name="MEM_DDR3_TIS_AC_MV" value="135" />
<parameter name="MEM_DDR3_TRCD_NS" value="13.09" />
<parameter name="MEM_DDR4_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
@@ -820,6 +839,7 @@
<parameter name="BOARD_QDR4_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="MEM_DDR4_RCD_ODT_IBT_ENUM" value="DDR4_RCD_ODT_IBT_100" />
<parameter name="PHY_DDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="DIAG_HMC_HRC" value="auto" />
<parameter name="MEM_RLD2_DM_WIDTH" value="1" />
<parameter name="MEM_DDR3_W_ODT0_1X1" value="on" />
<parameter name="CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
@@ -847,6 +867,7 @@
<parameter name="BOARD_QDR4_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="MEM_DDR3_TTL_BANK_ADDR_WIDTH" value="3" />
<parameter name="DIAG_RLD3_INTERFACE_ID" value="0" />
+ <parameter name="DIAG_LPDDR3_SIM_VERBOSE" value="true" />
<parameter name="BOARD_RLD3_WCLK_SLEW_RATE" value="4.0" />
<parameter name="MEM_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
<parameter name="BOARD_DDR3_AC_SLEW_RATE" value="2.0" />
@@ -872,6 +893,7 @@
<parameter name="BOARD_DDR3_WCLK_SLEW_RATE" value="4.0" />
<parameter name="BOARD_LPDDR3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
<parameter name="MEM_LPDDR3_DQS_WIDTH" value="1" />
+ <parameter name="CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC" value="4" />
<parameter name="PHY_DDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="CTRL_DDR4_STARVE_LIMIT" value="63" />
<parameter name="BOARD_DDR4_USER_WDATA_ISI_NS" value="0.063" />
@@ -891,12 +913,14 @@
<parameter name="CTRL_DDR4_ECC_AUTO_CORRECTION_EN" value="false" />
<parameter name="MEM_DDR4_TDQSQ_UI" value="0.16" />
<parameter name="DIAG_DDR3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="MEM_QDR4_MEM_TYPE_ENUM" value="MEM_XP" />
<parameter name="PHY_RLD2_MEM_CLK_FREQ_MHZ" value="533.333" />
<parameter name="MEM_RLD3_DEVICE_DEPTH" value="1" />
<parameter name="EX_DESIGN_GUI_DDR4_GEN_SYNTH" value="true" />
<parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_Q_NS" value="0.02" />
<parameter name="BOARD_DDR3_MAX_CK_DELAY_NS" value="0.6" />
<parameter name="CTRL_LPDDR3_STARVE_LIMIT" value="10" />
+ <parameter name="CTRL_REORDER_EN" value="true" />
<parameter name="BOARD_DDR4_RDATA_ISI_NS" value="0.155" />
<parameter name="CTRL_DDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="PHY_LPDDR3_USER_DATA_OUT_MODE_ENUM" value="unset" />
@@ -965,6 +989,7 @@
<parameter
name="MEM_DDR4_AC_PARITY_LATENCY"
value="DDR4_AC_PARITY_LATENCY_DISABLE" />
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PHY_LPDDR3_DATA_IO_STD_ENUM" value="unset" />
<parameter name="BOARD_RLD3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="CTRL_DDR4_ECC_EN" value="false" />
@@ -1040,6 +1065,7 @@
<parameter name="MEM_LPDDR3_TIS_AC_MV" value="150" />
<parameter name="DIAG_QDR4_BYPASS_USER_STAGE" value="true" />
<parameter name="PHY_QDR4_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_IDEAL_VREF_IN_PCT" value="61.0" />
<parameter name="PHY_QDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR3_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
<parameter name="PHY_PING_PONG_EN" value="false" />
@@ -1226,17 +1252,18 @@
<parameter name="DIAG_DDR4_CAL_ADDR0" value="0" />
<parameter
name="MEM_DDR4_W_DERIVED_ODT0"
- value="(Nominal) ODT Disabled,ODT Disabled,-,-" />
+ value="(Park) Park ODT off,ODT Disabled,-,-" />
<parameter name="DIAG_DDR4_CAL_ADDR1" value="8" />
<parameter
name="MEM_DDR4_W_DERIVED_ODT1"
- value="ODT Disabled,(Nominal) ODT Disabled,-,-" />
+ value="ODT Disabled,(Park) Park ODT off,-,-" />
<parameter name="BOARD_QDR4_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter
name="EX_DESIGN_GUI_QDR4_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
<parameter name="PHY_DDR4_REF_CLK_FREQ_MHZ" value="25.0" />
<parameter name="MEM_QDR2_THA_NS" value="0.18" />
+ <parameter name="DIAG_DDR3_SIM_VERBOSE" value="true" />
<parameter name="BOARD_LPDDR3_WDATA_SLEW_RATE" value="2.0" />
<parameter name="MEM_DDR4_SPD_137_RCD_CA_DRV" value="101" />
<parameter name="BOARD_RLD3_AC_TO_CK_SKEW_NS" value="0.0" />
@@ -1254,6 +1281,7 @@
<parameter name="BOARD_QDR4_DK_TO_CK_SKEW_NS" value="-0.02" />
<parameter name="MEM_DDR4_CTRL_CFG_WRITE_ODT_RANK" value="33" />
<parameter name="BOARD_QDR4_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PHY_DDR4_USER_PING_PONG_EN" value="false" />
<parameter name="MEM_DDR4_RCD_CS_IBT_ENUM" value="DDR4_RCD_CS_IBT_100" />
<parameter name="CTRL_DDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS" value="0" />
@@ -1268,6 +1296,7 @@
<parameter name="DIAG_LPDDR3_EX_DESIGN_SEPARATE_RZQS" value="false" />
<parameter name="MEM_DDR4_TINIT_US" value="500" />
<parameter name="MEM_DDR4_TRP_CYC" value="17" />
+ <parameter name="PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="DIAG_QDR4_ABSTRACT_PHY" value="false" />
<parameter name="MEM_LPDDR3_R_ODT1_2X2" value="off,off" />
<parameter name="MEM_DDR4_CKE_WIDTH" value="2" />
@@ -1278,6 +1307,7 @@
<parameter
name="CTRL_LPDDR3_ADDR_ORDER_ENUM"
value="LPDDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
+ <parameter name="SYS_INFO_DEVICE_DIE_REVISIONS" value="" />
<parameter name="DIAG_RLD2_BYPASS_STRESS_STAGE" value="true" />
<parameter name="PHY_QDR2_USER_STARTING_VREFIN" value="70.0" />
<parameter name="MEM_DDR3_CFG_GEN_DBE" value="false" />
@@ -1296,6 +1326,7 @@
<parameter name="CTRL_DDR4_REORDER_EN" value="true" />
<parameter name="MEM_LPDDR3_CTRL_CFG_WRITE_ODT_CHIP" value="0" />
<parameter name="BOARD_DDR4_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="DIAG_RLD3_CA_LEVEL_EN" value="false" />
<parameter
name="EX_DESIGN_GUI_RLD3_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
@@ -1305,6 +1336,7 @@
<parameter name="MEM_LPDDR3_TMRW_CK_CYC" value="10" />
<parameter name="BOARD_RLD3_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="PHY_DDR3_DEFAULT_IO" value="true" />
+ <parameter name="MEM_DDR4_IDEAL_VREF_OUT_PCT" value="50.0" />
<parameter name="MEM_LPDDR3_BANK_ADDR_WIDTH" value="3" />
<parameter name="PHY_QDR4_AC_MODE_ENUM" value="unset" />
<parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER" value="true" />
@@ -1316,6 +1348,7 @@
<parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="EX_DESIGN_GUI_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="MEM_DDR3_ODT_WIDTH" value="1" />
+ <parameter name="MEM_DDR4_TWLS_CYC" value="0.13" />
<parameter name="BOARD_DDR4_AC_ISI_NS" value="0.22" />
<parameter name="MEM_DDR3_BL_ENUM" value="DDR3_BL_BL8" />
<parameter name="MEM_DDR3_LRDIMM_EXTENDED_CONFIG" value="0x000000000000000000" />
@@ -1361,6 +1394,7 @@
<parameter
name="DIAG_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
+ <parameter name="PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="MEM_DDR4_MR6" value="394327" />
<parameter name="MEM_DDR4_MR1" value="65537" />
<parameter name="MEM_DDR4_MR0" value="2112" />
@@ -1408,6 +1442,7 @@
<parameter name="MEM_DDR4_SPD_148_DRAM_DRV" value="0" />
<parameter name="MEM_RLD3_SPEEDBIN_ENUM" value="RLD3_SPEEDBIN_093E" />
<parameter name="MEM_DDR4_TRFC_NS" value="160.0" />
+ <parameter name="MEM_QDR4_SKIP_ODT_SWEEPING" value="true" />
<parameter name="MEM_QDR4_TRL_CYC" value="8" />
<parameter name="MEM_DDR3_NUM_OF_DIMMS" value="1" />
<parameter
@@ -1473,6 +1508,7 @@
name="PHY_QDR2_CORE_CLKS_SHARING_ENUM"
value="CORE_CLKS_SHARING_DISABLED" />
<parameter name="MEM_DDR3_TDS_PS" value="53" />
+ <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PHY_QDR4_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR3_TTL_RM_WIDTH" value="0" />
<parameter name="PHY_QDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
@@ -1508,6 +1544,7 @@
<parameter name="MEM_LPDDR3_MR1" value="0" />
<parameter name="PREV_PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
<parameter name="MEM_LPDDR3_MR11" value="0" />
+ <parameter name="PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="EX_DESIGN_GUI_QDR4_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="MEM_LPDDR3_USE_DEFAULT_ODT" value="true" />
<parameter name="MEM_DDR3_DM_EN" value="true" />
@@ -1571,6 +1608,7 @@
<parameter name="PHY_QDR2_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR3_W_DERIVED_ODT0" value=",," />
<parameter name="MEM_DDR4_TQH_CYC" value="0.38" />
+ <parameter name="DIAG_RLD3_SIM_VERBOSE" value="true" />
<parameter name="MEM_DDR3_W_DERIVED_ODT3" value=",," />
<parameter name="MEM_DDR3_W_DERIVED_ODT1" value=",," />
<parameter name="MEM_DDR3_W_DERIVED_ODT2" value=",," />
@@ -1626,6 +1664,7 @@
<parameter name="MEM_RLD3_WIDTH_EXPANDED" value="false" />
<parameter name="MEM_RLD3_OUTPUT_DRIVE_MODE_ENUM" value="RLD3_OUTPUT_DRIVE_40" />
<parameter name="DIAG_TG_AVL_2_NUM_CFG_INTERFACES" value="0" />
+ <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="BOARD_QDR2_AC_SLEW_RATE" value="2.0" />
<parameter name="MEM_DDR4_W_ODT2_4X4" value="off,off,on,on" />
<parameter name="BOARD_QDR2_USER_RDATA_SLEW_RATE" value="2.0" />
@@ -1947,47 +1986,47 @@
<parameter name="PHY_DDR3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/emif/hwtcl/altera_emif/altera_emif_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/hwtcl/altera_emif/altera_emif_hw.tcl" />
</sourceFiles>
<childSourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
</childSourceFiles>
<instantiator instantiator="ip_arria10_e1sg_ddr4_8g_2400" as="ddr4_inst" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_avalon_mm_bridge"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"</message>
- <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]</message>
- <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"</message>
+ <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]</message>
+ <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_master_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_slave_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_reset_controller"</message>
@@ -1995,48 +2034,1593 @@
</entity>
<entity
kind="altera_emif_arch_nf"
- version="17.0"
- name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i">
+ version="18.0"
+ name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i">
+ <parameter name="SEC_HMC_CFG_WR_TO_WR_DIFF_CHIP" value="3" />
+ <parameter name="CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC" value="11" />
+ <parameter name="DIAG_QDR2_EX_DESIGN_ISSP_EN" value="true" />
+ <parameter name="PHY_QDR2_STARTING_VREFIN" value="70.0" />
+ <parameter name="DIAG_DDR3_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="MEM_QDR4_USE_ADDR_PARITY" value="false" />
+ <parameter name="MEM_DDR3_NUM_OF_PHYSICAL_RANKS" value="1" />
+ <parameter name="DIAG_EX_DESIGN_SEPARATE_RESETS" value="false" />
+ <parameter name="SEC_HMC_CFG_TCL" value="18" />
+ <parameter name="DIAG_VERBOSE_IOAUX" value="false" />
+ <parameter name="MEM_LPDDR3_TQH_CYC" value="0.38" />
+ <parameter name="PORT_MEM_Q_WIDTH" value="1" />
+ <parameter name="PORT_MEM_RPS_N_PINLOC_AUTOGEN_WCNT" value="1" />
+ <parameter name="MEM_RLD2_TCKH_CYC" value="0.45" />
+ <parameter name="MEM_DDR3_TIS_PS" value="60" />
+ <parameter name="MEM_DDR3_TIH_PS" value="95" />
+ <parameter name="PHY_RLD3_USER_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_TCCD_S_CYC" value="4" />
+ <parameter name="PHY_DDR3_REF_CLK_JITTER_PS" value="10.0" />
+ <parameter name="PORT_MEM_RM_WIDTH" value="1" />
+ <parameter name="PHY_LPDDR3_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_RLD3_USER_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="BOARD_RLD3_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="DIAG_FAST_SIM" value="true" />
+ <parameter
+ name="PHY_QDR2_USER_PERIODIC_OCT_RECAL_ENUM"
+ value="PERIODIC_OCT_RECAL_AUTO" />
+ <parameter
+ name="MEM_DDR4_FINE_GRANULARITY_REFRESH"
+ value="DDR4_FINE_REFRESH_FIXED_1X" />
+ <parameter name="PHY_DDR3_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="MEM_RLD2_MR" value="0" />
+ <parameter name="PLL_ADD_EXTRA_CLKS" value="false" />
+ <parameter name="PHY_QDR4_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_RLD3_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="PHY_DDR4_PLL_REF_CLK_IO_STD_ENUM" value="IO_STD_LVDS" />
+ <parameter name="PRI_HMC_CFG_ACT_TO_ACT" value="29" />
+ <parameter name="BOARD_DDR4_TIS_DERATING_PS" value="0" />
+ <parameter name="DIAG_TG_BE_PATTERN_LENGTH" value="8" />
+ <parameter name="MEM_DDR4_TWTR_L_CYC" value="4" />
+ <parameter name="MEM_DDR3_R_ODT1_4X4" value="off,off,on,on" />
+ <parameter name="MEM_DDR3_R_ODT1_4X2" value="on,on,off,off" />
+ <parameter name="BOARD_DDR4_CK_SLEW_RATE" value="4.0" />
+ <parameter name="PORT_MEM_QK_N_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="DIAG_DDR4_CAL_ENABLE_NON_DES" value="false" />
+ <parameter name="PHY_RLD2_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="BOARD_DDR3_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR4_PER_DRAM_ADDR" value="false" />
+ <parameter name="DIAG_SIM_VERBOSE_LEVEL" value="5" />
+ <parameter name="PORT_DFT_NF_PA_DPRIO_READDATA_WIDTH" value="8" />
+ <parameter name="MEM_DDR3_MIRROR_ADDRESSING_EN" value="false" />
+ <parameter name="BOARD_LPDDR3_USER_RDATA_SLEW_RATE" value="2.0" />
+ <parameter name="PORT_MEM_DBI_N_WIDTH" value="9" />
+ <parameter name="BOARD_DDR3_USER_CK_SLEW_RATE" value="2.0" />
+ <parameter name="PORT_MEM_CFG_N_WIDTH" value="1" />
+ <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="SEC_HMC_CFG_SLOT_ROTATE_EN" value="0" />
+ <parameter name="PHY_TARGET_IS_ES3" value="false" />
+ <parameter name="PHY_TARGET_IS_ES2" value="false" />
+ <parameter name="PHY_LPDDR3_USER_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="BOARD_QDR2_USER_RCLK_ISI_NS" value="0.094" />
+ <parameter name="PORT_AFI_RDATA_DBI_N_WIDTH" value="1" />
+ <parameter name="DIAG_LPDDR3_INFI_TG2_ERR_TEST" value="false" />
+ <parameter name="PHY_DDR4_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="MEM_LPDDR3_SEQ_ODT_TABLE_HI" value="0" />
+ <parameter name="DIAG_LPDDR3_INTERFACE_ID" value="0" />
+ <parameter name="BOARD_LPDDR3_IS_SKEW_WITHIN_DQS_DESKEWED" value="false" />
+ <parameter name="MEM_RLD2_TCKDK_MIN_NS" value="-0.3" />
+ <parameter name="MEM_QDR2_DATA_PER_DEVICE" value="36" />
+ <parameter name="SEC_HMC_CFG_ZQCS_TO_VALID" value="65" />
+ <parameter name="BOARD_QDR4_USER_WDATA_ISI_NS" value="0.0" />
+ <parameter name="MEM_DDR3_R_ODTN_2X2" value="Rank 0,Rank 1" />
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="EX_DESIGN_GUI_RLD2_GEN_SYNTH" value="true" />
+ <parameter name="C2P_P2C_CLK_RATIO" value="4" />
+ <parameter name="SEC_HMC_CFG_WR_TO_RD_DIFF_BG" value="16" />
+ <parameter name="SEQ_SIM_CPU_CLK_DIVIDE" value="1" />
+ <parameter name="DIAG_DDR4_SKIP_VREF_CAL" value="true" />
+ <parameter name="MEM_LPDDR3_TDQSCK_PS" value="5500" />
+ <parameter name="BOARD_QDR4_AC_TO_CK_SKEW_NS" value="0.0" />
+ <parameter name="NUM_OF_HMC_PORTS" value="1" />
+ <parameter name="PRI_HMC_CFG_RD_TO_RD_DIFF_BG" value="2" />
+ <parameter name="PHY_LPDDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
+ <parameter name="MEM_DDR3_RANKS_PER_DIMM" value="1" />
+ <parameter name="MEM_DDR3_TDSS_CYC" value="0.18" />
+ <parameter name="SEC_HMC_CFG_SLOT_OFFSET" value="2" />
+ <parameter name="BOARD_DDR4_SKEW_BETWEEN_DQS_NS" value="0.02" />
+ <parameter name="DIAG_QDR2_SIM_VERBOSE" value="true" />
+ <parameter name="PHY_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
+ <parameter name="SEC_HMC_CFG_MRS_TO_VALID" value="7" />
+ <parameter name="MEM_DDR4_TWLH_PS" value="0.0" />
+ <parameter name="MEM_DDR3_TDSH_CYC" value="0.18" />
+ <parameter name="BOARD_RLD3_DK_TO_CK_SKEW_NS" value="-0.02" />
+ <parameter name="DIAG_DDR4_TG_DATA_PATTERN_LENGTH" value="8" />
+ <parameter name="PORT_MEM_CFG_N_PINLOC_0" value="0" />
+ <parameter name="DIAG_RLD3_EX_DESIGN_ISSP_EN" value="true" />
+ <parameter name="PORT_CAL_DEBUG_WDATA_WIDTH" value="32" />
+ <parameter name="MEM_QDR4_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
+ <parameter name="CTRL_DDR4_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
+ <parameter name="PHY_QDR2_USER_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="SEC_HMC_CFG_READ_ODT_CHIP" value="0" />
+ <parameter name="MEM_LPDDR3_SEQ_ODT_TABLE_LO" value="0" />
+ <parameter
+ name="CTRL_DDR3_ADDR_ORDER_ENUM"
+ value="DDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
+ <parameter name="EX_DESIGN_GUI_DDR3_GEN_SIM" value="true" />
+ <parameter name="SEC_HMC_CFG_DQSTRK_TO_VALID" value="3" />
+ <parameter name="MEM_DDR4_TWLS_PS" value="0.0" />
+ <parameter name="EX_DESIGN_GUI_RLD2_GEN_SIM" value="true" />
+ <parameter name="PRI_RDATA_TILE_INDEX" value="0" />
+ <parameter name="PHY_QDR4_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="DIAG_DDR4_BYPASS_STRESS_STAGE" value="true" />
+ <parameter name="SEC_HMC_CFG_ENABLE_ECC" value="disable" />
+ <parameter name="DIAG_QDR2_INTERFACE_ID" value="0" />
+ <parameter name="BOARD_QDR2_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_LPDDR3_PDODT" value="LPDDR3_PDODT_DISABLED" />
+ <parameter name="BOARD_QDR4_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
+ <parameter name="MEM_DDR3_SPEEDBIN_ENUM" value="DDR3_SPEEDBIN_2133" />
+ <parameter name="PRI_HMC_CFG_PCH_TO_VALID" value="9" />
+ <parameter name="LANES_USAGE_1" value="365" />
+ <parameter name="LANES_USAGE_0" value="757373805" />
+ <parameter name="MEM_DDR4_DISCRETE_CS_WIDTH" value="1" />
+ <parameter name="LANES_USAGE_3" value="0" />
+ <parameter name="LANES_USAGE_2" value="0" />
+ <parameter name="MEM_DDR3_R_ODT0_2X2" value="off,on" />
+ <parameter name="MEM_LPDDR3_TRRD_CYC" value="2" />
+ <parameter name="PORT_MEM_RAS_N_PINLOC_0" value="0" />
+ <parameter name="PORT_MEM_LDB_N_PINLOC_0" value="0" />
+ <parameter name="PORT_MEM_RAS_N_PINLOC_1" value="0" />
+ <parameter
+ name="DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE"
+ value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
+ <parameter name="MEM_DDR3_TTL_DM_WIDTH" value="1" />
+ <parameter name="PHY_TARGET_SPEEDGRADE" value="E1" />
+ <parameter name="CENTER_TIDS_1" value="3" />
+ <parameter name="MEM_DDR4_DISCRETE_MIRROR_ADDRESSING_EN" value="false" />
+ <parameter name="CENTER_TIDS_2" value="0" />
+ <parameter name="BOARD_QDR4_MAX_DK_DELAY_NS" value="0.6" />
+ <parameter name="MEM_DDR3_TTL_CS_WIDTH" value="1" />
+ <parameter name="PORT_MEM_D_PINLOC_AUTOGEN_WCNT" value="49" />
+ <parameter name="PHY_CORE_CLKS_SHARING_ENUM" value="CORE_CLKS_SHARING_DISABLED" />
+ <parameter name="MEM_HAS_SIM_SUPPORT" value="true" />
+ <parameter name="MEM_QDR2_WIDTH_EXPANDED" value="false" />
+ <parameter name="CENTER_TIDS_0" value="542119940" />
+ <parameter name="MEM_DDR4_TTL_DQ_WIDTH" value="72" />
+ <parameter name="PLL_M_CNT_EVEN_DUTY_EN" value="false" />
+ <parameter name="PHY_LPDDR3_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="PORT_MEM_DQ_PINLOC_9" value="45131815" />
+ <parameter name="PORT_MEM_DQ_PINLOC_8" value="39883810" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_110" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_7" value="34635807" />
+ <parameter name="MEM_LPDDR3_TDSS_CYC" value="0.2" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_111" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_6" value="31484954" />
+ <parameter name="EX_DESIGN_GUI_QDR4_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_112" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_5" value="26236949" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_113" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_4" value="20990994" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_114" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_3" value="15742989" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_115" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_2" value="10494984" />
+ <parameter name="PORT_MEM_DQ_PINLOC_1" value="7346179" />
+ <parameter name="PORT_MEM_DQ_PINLOC_0" value="2098248" />
+ <parameter name="CTRL_DDR4_AUTO_PRECHARGE_EN" value="false" />
+ <parameter name="PORT_AFI_WDATA_DBI_N_WIDTH" value="1" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_116" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_117" value="0" />
+ <parameter name="SEC_HMC_CFG_MRR_TO_VALID" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_118" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_119" value="0" />
+ <parameter name="PLL_VCO_TO_MEM_CLK_FREQ_RATIO" value="1" />
+ <parameter name="MEM_DDR4_R_ODT0_2X2" value="off,on" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_120" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_121" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_122" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_123" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_124" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_125" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_126" value="0" />
+ <parameter name="PHY_DDR4_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
+ <parameter name="EX_DESIGN_GUI_DDR4_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="MEM_LPDDR3_W_ODT0_1X1" value="on" />
+ <parameter name="PLL_C_CNT_PRST_0" value="1" />
+ <parameter name="PLL_C_CNT_PRST_1" value="1" />
+ <parameter name="PLL_C_CNT_PRST_2" value="1" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_127" value="0" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_0" value="0" />
+ <parameter name="PLL_C_CNT_PRST_3" value="1" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_128" value="0" />
+ <parameter name="PLL_C_CNT_PRST_4" value="1" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_2" value="0" />
+ <parameter name="PLL_C_CNT_PRST_5" value="1" />
+ <parameter name="MEM_DDR3_CTRL_CFG_READ_ODT_CHIP" value="0" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_1" value="0" />
+ <parameter name="PLL_C_CNT_PRST_6" value="1" />
+ <parameter name="PLL_C_CNT_PRST_7" value="1" />
+ <parameter name="DIAG_RLD2_ABSTRACT_PHY" value="false" />
+ <parameter name="PLL_C_CNT_PRST_8" value="1" />
+ <parameter name="PHY_LPDDR3_AC_MODE_ENUM" value="unset" />
+ <parameter name="PRI_HMC_CFG_ACT_TO_ACT_DIFF_BG" value="2" />
+ <parameter name="MEM_NUM_OF_DATA_ENDPOINTS" value="2" />
+ <parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_4" value="0" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_3" value="0" />
+ <parameter name="PORT_MEM_DK_N_PINLOC_5" value="0" />
+ <parameter name="BOARD_LPDDR3_WCLK_ISI_NS" value="0.0" />
+ <parameter name="EX_DESIGN_GUI_QDR2_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="MEM_DDR3_DM_WIDTH" value="1" />
+ <parameter name="BOARD_LPDDR3_USE_DEFAULT_ISI_VALUES" value="true" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_100" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_101" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_102" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_103" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_104" value="0" />
+ <parameter name="PHY_QDR2_CONFIG_ENUM" value="CONFIG_PHY_AND_SOFT_CTRL" />
+ <parameter name="PHY_DDR3_USER_CK_MODE_ENUM" value="unset" />
+ <parameter name="SEQ_SYNTH_OSC_FREQ_MHZ" value="450" />
+ <parameter name="PRI_HMC_CFG_SRF_TO_VALID" value="513" />
+ <parameter name="MEM_LPDDR3_CTRL_CFG_READ_ODT_RANK" value="0" />
+ <parameter name="DIAG_BOARD_DELAY_CONFIG_STR" value="" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_105" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_106" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_107" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_108" value="0" />
+ <parameter name="MEM_DDR3_SEQ_ODT_TABLE_HI" value="0" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_109" value="0" />
+ <parameter name="BOARD_LPDDR3_USER_AC_ISI_NS" value="0.0" />
+ <parameter name="PHY_LPDDR3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="PHY_RLD2_REF_CLK_JITTER_PS" value="10.0" />
+ <parameter name="DIAG_CPA_OUT_1_EN" value="false" />
+ <parameter name="INTERNAL_TESTING_MODE" value="false" />
+ <parameter name="PHY_DDR3_USER_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="MEM_DDR4_TCL" value="18" />
+ <parameter name="BOARD_LPDDR3_USER_WCLK_SLEW_RATE" value="4.0" />
+ <parameter name="BOARD_LPDDR3_DQS_TO_CK_SKEW_NS" value="0.02" />
+ <parameter name="BOARD_DDR3_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
+ <parameter name="PRI_HMC_CFG_MRS_TO_VALID" value="7" />
+ <parameter name="PHY_DDR4_DATA_IO_STD_ENUM" value="IO_STD_POD_12" />
+ <parameter name="PHY_RLD2_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="BOARD_RLD3_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="EX_DESIGN_GUI_QDR2_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="PHY_RLD2_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="MEM_DDR3_TMRD_CK_CYC" value="4" />
+ <parameter name="CTRL_QDR2_AVL_SYMBOL_WIDTH" value="9" />
+ <parameter name="DIAG_QDR2_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="BOARD_DDR3_USER_WCLK_ISI_NS" value="0.031" />
+ <parameter name="MEM_RLD3_TDS_PS" value="-30" />
+ <parameter name="PHY_RLD3_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_RLD3_TDH_PS" value="5" />
+ <parameter name="PORT_AFI_CFG_N_WIDTH" value="1" />
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="PHY_QDR2_RATE_ENUM" value="RATE_HALF" />
+ <parameter name="BOARD_QDR2_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR3_SEQ_ODT_TABLE_LO" value="0" />
+ <parameter name="BOARD_RLD3_RDATA_ISI_NS" value="0.0" />
+ <parameter name="MEM_DDR4_RCD_CKE_IBT_ENUM" value="DDR4_RCD_CKE_IBT_100" />
+ <parameter name="BOARD_DDR3_WCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_RLD3_PKG_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
+ <parameter name="DIAG_DDR4_SIM_VERBOSE" value="true" />
+ <parameter name="PORT_CAL_MASTER_BYTEEN_WIDTH" value="4" />
+ <parameter name="MEM_DDR4_READ_DBI" value="false" />
+ <parameter name="PORT_AFI_LBK1_N_WIDTH" value="1" />
+ <parameter name="DIAG_DDR3_EX_DESIGN_SEPARATE_RZQS" value="false" />
+ <parameter name="PINS_DB_OE_BYPASS_10" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_11" value="0" />
+ <parameter name="PORT_MEM_LDA_N_PINLOC_0" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_12" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_1" value="6298637" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_0" value="14695431" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_3" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_2" value="4101" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_5" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_4" value="0" />
+ <parameter name="MEM_DDR4_RM_WIDTH" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_7" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_6" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_9" value="0" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_8" value="0" />
+ <parameter name="PORT_MEM_RPS_N_WIDTH" value="1" />
+ <parameter name="PHY_LPDDR3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="DIAG_QDR2_EX_DESIGN_SEPARATE_RZQS" value="false" />
+ <parameter name="PORT_CTRL_ECC_RDATA_ID_WIDTH" value="13" />
+ <parameter name="PORT_AFI_DM_WIDTH" value="1" />
+ <parameter name="PLL_C_CNT_LOW_3" value="4" />
+ <parameter name="PLL_C_CNT_LOW_2" value="2" />
+ <parameter name="PHY_RLD3_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PLL_C_CNT_LOW_1" value="1" />
+ <parameter name="PLL_C_CNT_LOW_0" value="2" />
+ <parameter name="PHY_RLD3_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PLL_C_CNT_LOW_8" value="256" />
+ <parameter name="PLL_C_CNT_LOW_7" value="256" />
+ <parameter name="BOARD_DDR4_USE_DEFAULT_SLEW_RATES" value="true" />
+ <parameter name="PLL_C_CNT_LOW_6" value="256" />
+ <parameter name="PLL_C_CNT_LOW_5" value="256" />
+ <parameter name="PLL_C_CNT_LOW_4" value="4" />
+ <parameter name="PHY_HAS_DCC" value="true" />
+ <parameter name="PHY_QDR4_USER_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="BOARD_LPDDR3_TIS_DERATING_PS" value="0" />
+ <parameter name="PHY_DDR3_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_DDR3_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_MEM_QKB_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="PHY_QDR2_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="PRI_HMC_CFG_RD_TO_RD_DIFF_CHIP" value="3" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_8" value="false" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_7" value="false" />
+ <parameter name="PRI_HMC_CFG_RD_ODT_PERIOD" value="6" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_6" value="false" />
+ <parameter name="PORT_HPS_EMIF_E2H_GP_WIDTH" value="1" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_5" value="false" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_4" value="false" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_3" value="false" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_2" value="false" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_1" value="false" />
+ <parameter name="PHY_DDR4_USER_DATA_IN_MODE_ENUM" value="unset" />
+ <parameter name="PORT_MEM_CAS_N_PINLOC_AUTOGEN_WCNT" value="2" />
+ <parameter name="EX_DESIGN_GUI_GEN_SYNTH" value="true" />
+ <parameter name="PHY_QDR4_USER_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_LPDDR3_W_ODTN_2X2" value="Rank 0,Rank 1" />
+ <parameter name="SYS_INFO_DEVICE_SPEEDGRADE" value="1" />
+ <parameter name="PHY_QDR2_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PHY_RLD2_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="BOARD_QDR2_SKEW_WITHIN_D_NS" value="0.0" />
+ <parameter name="EX_DESIGN_GUI_RLD3_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="PHY_QDR4_MEM_CLK_FREQ_MHZ" value="1066.667" />
+ <parameter name="PHY_QDR4_USER_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="MEM_LPDDR3_R_ODT3_4X4" value="off,off,off,off" />
+ <parameter name="BOARD_DDR4_USER_RDATA_SLEW_RATE" value="4.0" />
+ <parameter name="PORT_CTRL_AMM_RDATA_WIDTH" value="576" />
+ <parameter name="MEM_DDR3_CTRL_CFG_WRITE_ODT_RANK" value="0" />
+ <parameter name="MEM_DDR3_ADDRESS_MIRROR_BITVEC" value="0" />
+ <parameter name="MEM_DDR4_TTL_NUM_OF_LOGICAL_RANKS" value="2" />
+ <parameter name="BOARD_DDR4_RCLK_SLEW_RATE" value="8.0" />
+ <parameter name="PHY_DDR4_USER_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="AC_PIN_MAP_SCHEME" value="use_0_1_2_3_lane" />
+ <parameter name="BOARD_RLD3_USER_RCLK_ISI_NS" value="0.094" />
+ <parameter name="PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
+ <parameter name="MEM_DDR3_CS_PER_DIMM" value="1" />
+ <parameter name="PHY_RLD3_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_DM_EN" value="true" />
+ <parameter name="PHY_DDR3_AC_MODE_ENUM" value="unset" />
+ <parameter name="PLL_C_CNT_EVEN_DUTY_EN_0" value="false" />
+ <parameter name="PORT_CAL_DEBUG_OUT_WDATA_WIDTH" value="32" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_7" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_8" value="0.0" />
+ <parameter name="DIAG_QDR4_SKIP_VREF_CAL" value="false" />
+ <parameter name="MEM_DDR4_TQH_UI" value="0.76" />
+ <parameter name="BOARD_QDR4_AC_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR3_TRP_CYC" value="14" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_3" value="0 ps" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_4" value="0 ps" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_1" value="104 ps" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_2" value="104 ps" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_0" value="104 ps" />
+ <parameter name="PHY_LPDDR3_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="MEM_DDR4_TRRD_S_CYC" value="4" />
+ <parameter name="PHY_LPDDR3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="DBI_RD_ENABLE" value="false" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_7" value="0 ps" />
+ <parameter name="PLL_VCO_CLK_FREQ_MHZ" value="1200.0" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_8" value="0 ps" />
+ <parameter name="DIAG_DDR3_CA_DESKEW_EN" value="false" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_5" value="0 ps" />
+ <parameter name="PLL_C_CNT_PHASE_PS_STR_6" value="0 ps" />
+ <parameter name="SEC_HMC_CFG_ARF_TO_VALID" value="97" />
+ <parameter name="PORT_MEM_RWB_N_PINLOC_AUTOGEN_WCNT" value="1" />
+ <parameter name="SEC_WDATA_TILE_INDEX" value="0" />
+ <parameter name="MEM_DDR4_TCCD_L_CYC" value="5" />
+ <parameter name="PLL_N_CNT_EVEN_DUTY_EN" value="false" />
+ <parameter name="MEM_DDR4_SEQ_ODT_TABLE_LO" value="4194308" />
+ <parameter name="MEM_RLD3_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
+ <parameter name="PORT_MEM_CQ_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_CQ_PINLOC_0" value="0" />
+ <parameter name="MEM_LPDDR3_TDSH_CYC" value="0.2" />
+ <parameter name="BOARD_LPDDR3_SKEW_WITHIN_DQS_NS" value="0.0" />
+ <parameter name="DIAG_RLD2_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="BOARD_DDR3_SKEW_WITHIN_DQS_NS" value="0.0" />
+ <parameter name="MEM_DDR4_ODT_WIDTH" value="2" />
+ <parameter name="MEM_DDR3_RDIMM_CONFIG" value="0000000000000000" />
+ <parameter name="PINS_INVERT_WR_AUTOGEN_WCNT" value="13" />
+ <parameter name="CTRL_LPDDR3_REORDER_EN" value="true" />
+ <parameter name="DIAG_DDR3_INTERFACE_ID" value="0" />
+ <parameter name="DIAG_USE_CPA_LOCK" value="false" />
+ <parameter name="MEM_RLD3_TQH_CYC" value="0.38" />
+ <parameter name="BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
+ <parameter name="PRI_HMC_CFG_RLD3_MULTIBANK_REF_DELAY" value="0" />
+ <parameter name="CTRL_LPDDR3_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
+ <parameter name="MEM_DDR4_W_ODT3_4X4" value="on,on,off,off" />
+ <parameter name="PRI_HMC_CFG_ENABLE_RC" value="enable" />
+ <parameter name="PORT_MEM_A_PINLOC_AUTOGEN_WCNT" value="17" />
+ <parameter
+ name="PHY_FPGA_SPEEDGRADE_GUI"
+ value="E1 (Production) - change device under 'View'->'Device Family'" />
+ <parameter name="PRI_HMC_CFG_MEM_IF_ROWADDR_WIDTH" value="row_width_15" />
+ <parameter name="PINS_WDB_15" value="224694" />
+ <parameter name="PINS_WDB_14" value="316345782" />
+ <parameter
+ name="MEM_DDR4_USER_VREFDQ_TRAINING_RANGE"
+ value="DDR4_VREFDQ_TRAINING_RANGE_1" />
+ <parameter name="PINS_WDB_13" value="910912566" />
+ <parameter name="PINS_WDB_12" value="920202672" />
+ <parameter name="PINS_WDB_11" value="920347830" />
+ <parameter name="PINS_WDB_10" value="819686802" />
+ <parameter name="PHY_DDR3_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="PINS_WDB_19" value="0" />
+ <parameter name="PINS_WDB_18" value="0" />
+ <parameter name="PINS_WDB_17" value="0" />
+ <parameter name="PHY_DDR4_USER_REF_CLK_FREQ_MHZ" value="25.0" />
+ <parameter name="DIAG_RLD3_TG_BE_PATTERN_LENGTH" value="8" />
+ <parameter name="PINS_WDB_16" value="0" />
+ <parameter name="MEM_LPDDR3_CS_WIDTH" value="1" />
+ <parameter name="DIAG_DDR3_INFI_TG2_ERR_TEST" value="false" />
+ <parameter name="SEC_HMC_CFG_WR_AP_TO_VALID" value="29" />
+ <parameter name="BOARD_DDR4_USER_WCLK_ISI_NS" value="0.031" />
+ <parameter name="MEM_RLD2_BANK_ADDR_WIDTH" value="3" />
+ <parameter name="MEM_RLD3_DM_EN" value="true" />
+ <parameter name="DIAG_QDR4_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="PINS_WDB_26" value="0" />
+ <parameter name="PINS_WDB_25" value="0" />
+ <parameter name="PINS_WDB_24" value="0" />
+ <parameter name="PINS_WDB_23" value="0" />
+ <parameter name="PINS_WDB_22" value="0" />
+ <parameter name="PINS_WDB_21" value="0" />
+ <parameter name="DIAG_DDR3_BYPASS_USER_STAGE" value="true" />
+ <parameter name="PINS_WDB_20" value="0" />
+ <parameter name="DIAG_DDR3_CAL_ENABLE_MICRON_AP" value="false" />
+ <parameter name="PINS_WDB_29" value="0" />
+ <parameter name="PINS_WDB_28" value="0" />
+ <parameter name="OCT_SIZE" value="3" />
+ <parameter name="PINS_WDB_27" value="0" />
+ <parameter name="EX_DESIGN_GUI_DDR4_GEN_SIM" value="true" />
+ <parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_D_NS" value="0.02" />
+ <parameter name="MEM_DDR4_TIH_DC_MV" value="75" />
+ <parameter name="PINS_WDB_37" value="0" />
+ <parameter name="MEM_DDR4_SEQ_ODT_TABLE_HI" value="0" />
+ <parameter name="PINS_WDB_36" value="0" />
+ <parameter name="PINS_WDB_35" value="0" />
+ <parameter name="BOARD_DDR3_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="PINS_WDB_34" value="0" />
+ <parameter name="PINS_WDB_33" value="0" />
+ <parameter name="PINS_WDB_32" value="0" />
+ <parameter name="BOARD_RLD3_TIH_DERATING_PS" value="0" />
+ <parameter name="PINS_WDB_31" value="0" />
+ <parameter name="DIAG_RLD2_SEPARATE_READ_WRITE_ITFS" value="false" />
+ <parameter name="PINS_WDB_30" value="0" />
+ <parameter name="PINS_WDB_38" value="0" />
+ <parameter name="BOARD_QDR2_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_RLD3_TDS_DERATING_PS" value="0" />
+ <parameter name="PORT_MEM_ACT_N_PINLOC_AUTOGEN_WCNT" value="2" />
+ <parameter name="MEM_LPDDR3_TFAW_NS" value="50.0" />
+ <parameter name="PRI_HMC_CFG_SRF_TO_ZQ_CAL" value="449" />
+ <parameter name="PORT_AFI_RPS_N_WIDTH" value="1" />
+ <parameter name="MEM_LPDDR3_TDH_PS" value="100" />
+ <parameter name="MEM_QDR2_TCQD_NS" value="0.09" />
+ <parameter name="BOARD_RLD3_USER_AC_ISI_NS" value="0.094" />
+ <parameter name="SEC_HMC_CFG_ACT_TO_RDWR" value="8" />
+ <parameter name="DIAG_EX_DESIGN_NUM_OF_SLAVES" value="1" />
+ <parameter name="MEM_DDR4_RANKS_PER_DIMM" value="2" />
+ <parameter name="BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
+ <parameter name="PORT_MEM_CA_PINLOC_AUTOGEN_WCNT" value="17" />
+ <parameter name="PRI_HMC_CFG_MPS_EXIT_CKE_TO_CS" value="6" />
+ <parameter name="CTRL_DDR4_WR_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
+ <parameter name="MEM_LPDDR3_TDS_PS" value="75" />
+ <parameter name="SEC_HMC_CFG_MPS_TO_VALID" value="768" />
+ <parameter name="PHY_QDR4_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="BOARD_RLD3_AC_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR4_TDQSQ_PS" value="66" />
+ <parameter name="MEM_LPDDR3_TWLH_PS" value="175.0" />
+ <parameter name="MEM_QDR2_K_WIDTH" value="1" />
+ <parameter name="PINS_OCT_MODE_AUTOGEN_WCNT" value="13" />
+ <parameter name="MEM_LPDDR3_W_DERIVED_ODTN" value="," />
+ <parameter name="MEM_DDR3_TIS_AC_MV" value="135" />
+ <parameter name="MEM_DDR4_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="MEM_DDR4_WRITE_CMD_LATENCY" value="5" />
+ <parameter name="MEM_QDR2_TSA_NS" value="0.23" />
+ <parameter name="SEC_HMC_CFG_LOCAL_IF_CS_WIDTH" value="cs_width_1" />
+ <parameter name="PHY_RLD3_RATE_ENUM" value="RATE_QUARTER" />
+ <parameter name="MEM_DDR4_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="MEM_RLD3_DQ_PER_RD_GROUP" value="9" />
+ <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER" value="false" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_0" value="0.0" />
+ <parameter name="DIAG_SEQ_RESET_AUTO_RELEASE" value="avl" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_1" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_2" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_3" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_4" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_5" value="0.0" />
+ <parameter name="MEM_DDR4_TRP_NS" value="14.06" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_6" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_7" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_8" value="0.0" />
+ <parameter name="REGISTER_AFI" value="true" />
+ <parameter name="MEM_DDR3_ASR_ENUM" value="DDR3_ASR_MANUAL" />
+ <parameter name="PORT_CTRL_ECC_READ_INFO_WIDTH" value="3" />
+ <parameter name="PHY_RLD2_USER_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_AFI_AP_WIDTH" value="1" />
+ <parameter name="PHY_DDR3_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="PRI_HMC_CFG_REORDER_READ" value="enable" />
+ <parameter name="MEM_DDR4_RCD_ODT_IBT_ENUM" value="DDR4_RCD_ODT_IBT_100" />
+ <parameter name="SEC_HMC_CFG_MEM_IF_BANKADDR_WIDTH" value="bank_width_2" />
+ <parameter name="PHY_DDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="SEC_HMC_CFG_ARBITER_TYPE" value="twot" />
+ <parameter name="MEM_RLD2_DM_WIDTH" value="1" />
+ <parameter name="PORT_CAL_MASTER_WDATA_WIDTH" value="32" />
+ <parameter name="CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
+ <parameter name="MEM_DDR4_BANK_GROUP_WIDTH" value="2" />
+ <parameter name="MEM_DDR4_R_ODT1_4X2" value="on,on,off,off" />
+ <parameter name="MEM_DDR4_R_ODT1_4X4" value="off,off,on,on" />
+ <parameter name="PINS_C2L_DRIVEN_AUTOGEN_WCNT" value="13" />
+ <parameter name="MEM_LPDDR3_W_DERIVED_ODT0" value="," />
+ <parameter name="MEM_DDR3_R_ODT0_1X1" value="off" />
+ <parameter name="MEM_LPDDR3_W_DERIVED_ODT2" value="," />
+ <parameter name="MEM_LPDDR3_W_DERIVED_ODT1" value="," />
+ <parameter name="MEM_LPDDR3_TWLS_PS" value="175.0" />
+ <parameter name="MEM_LPDDR3_W_DERIVED_ODT3" value="," />
+ <parameter name="PHY_RLD3_USER_DATA_IN_MODE_ENUM" value="unset" />
+ <parameter name="PHY_DDR3_PING_PONG_EN" value="false" />
+ <parameter name="MEM_DDR3_HIDE_ADV_MR_SETTINGS" value="true" />
+ <parameter name="DIAG_DDR4_INTERFACE_ID" value="0" />
+ <parameter name="MEM_DDR3_TTL_BANK_ADDR_WIDTH" value="3" />
+ <parameter name="PINS_DB_IN_BYPASS_10" value="0" />
+ <parameter name="SEC_HMC_CFG_SB_CG_DISABLE" value="disable" />
+ <parameter name="PINS_DB_IN_BYPASS_11" value="0" />
+ <parameter name="PINS_DB_IN_BYPASS_12" value="0" />
+ <parameter name="MEM_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
+ <parameter name="DIAG_DDR3_SEPARATE_READ_WRITE_ITFS" value="false" />
+ <parameter name="BOARD_RLD3_USE_DEFAULT_SLEW_RATES" value="true" />
+ <parameter name="PORT_MEM_RESET_N_PINLOC_0" value="50177" />
+ <parameter name="PORT_MEM_RESET_N_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_AUTOGEN_WCNT" value="49" />
+ <parameter name="EX_DESIGN_GUI_RLD3_GEN_SIM" value="true" />
+ <parameter name="PHY_LPDDR3_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="SEQ_SYNTH_CPU_CLK_DIVIDE" value="2" />
+ <parameter name="PHY_DATA_CALIBRATED_OCT" value="true" />
+ <parameter name="PHY_QDR4_STARTING_VREFIN" value="70.0" />
+ <parameter name="PHY_RLD2_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="SEC_HMC_CFG_ROW_CMD_SLOT" value="1" />
+ <parameter name="PHY_RATE_ENUM" value="RATE_QUARTER" />
+ <parameter name="SEC_HMC_CFG_RD_AP_TO_VALID" value="14" />
+ <parameter name="MEM_LPDDR3_DQS_WIDTH" value="1" />
+ <parameter name="SEC_HMC_CFG_WR_ODT_PERIOD" value="6" />
+ <parameter name="SEC_HMC_CFG_PERIOD_DQSTRK_CTRL_EN" value="disable" />
+ <parameter name="PHY_DDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="CTRL_DDR4_STARVE_LIMIT" value="63" />
+ <parameter name="BOARD_DDR4_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="PORT_MEM_RAS_N_PINLOC_AUTOGEN_WCNT" value="2" />
+ <parameter name="PHY_RLD2_USER_CK_MODE_ENUM" value="unset" />
+ <parameter name="PHY_QDR4_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="CTRL_DDR4_ECC_AUTO_CORRECTION_EN" value="false" />
+ <parameter name="PRI_HMC_CFG_WR_TO_WR_DIFF_BG" value="2" />
+ <parameter name="MEM_DDR4_TDQSQ_UI" value="0.16" />
+ <parameter name="DIAG_DDR3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="PORT_AFI_WDATA_DINV_WIDTH" value="1" />
+ <parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_Q_NS" value="0.02" />
+ <parameter name="PRI_HMC_CFG_DDR4_MPS_ADDR_MIRROR" value="0" />
+ <parameter name="CTRL_LPDDR3_STARVE_LIMIT" value="10" />
+ <parameter name="SEC_HMC_CFG_WR_ODT_ON" value="0" />
+ <parameter name="PHY_RLD3_PING_PONG_EN" value="false" />
+ <parameter name="BOARD_QDR2_IS_SKEW_WITHIN_Q_DESKEWED" value="false" />
+ <parameter name="DIAG_LPDDR3_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="MEM_RLD3_DATA_LATENCY_MODE_ENUM" value="RLD3_DL_RL16_WL17" />
+ <parameter name="SEC_HMC_CFG_RD_TO_WR" value="5" />
+ <parameter name="MEM_DDR4_TDQSCK_DERV_PS" value="2" />
+ <parameter name="MEM_DDR4_CKE_PER_DIMM" value="1" />
+ <parameter name="PHY_QDR4_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_MEM_CLK_FREQ_MHZ" value="1200.0" />
+ <parameter name="PRI_HMC_CFG_WR_TO_RD" value="16" />
+ <parameter name="DIAG_QDR2_BYPASS_REPEAT_STAGE" value="true" />
+ <parameter name="MEM_DDR3_TDQSCK_DERV_PS" value="2" />
+ <parameter name="CTRL_DDR3_USER_REFRESH_EN" value="false" />
+ <parameter
+ name="PHY_RLD3_CORE_CLKS_SHARING_ENUM"
+ value="CORE_CLKS_SHARING_DISABLED" />
+ <parameter name="MEM_QDR4_DATA_INV_ENA" value="false" />
+ <parameter name="PINS_RATE_AUTOGEN_WCNT" value="13" />
+ <parameter name="MEM_DDR4_R_ODT0_1X1" value="off" />
+ <parameter name="DIAG_RLD3_USE_TG_AVL_2" value="false" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="DIAG_RLD2_BYPASS_USER_STAGE" value="true" />
+ <parameter name="MEM_RLD2_CONFIG_ENUM" value="RLD2_CONFIG_TRC_8_TRL_8_TWL_9" />
+ <parameter name="PHY_RLD3_USER_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_LPDDR3_TMRR_CK_CYC" value="4" />
+ <parameter name="MEM_DDR4_TRAS_CYC" value="40" />
+ <parameter name="PHY_RLD2_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="DIAG_LPDDR3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="BOARD_DDR4_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
+ <parameter name="MEM_RLD3_TDH_DC_MV" value="100" />
+ <parameter name="PORT_AFI_RM_WIDTH" value="1" />
+ <parameter name="DIAG_RLD2_INFI_TG2_ERR_TEST" value="false" />
+ <parameter name="MEM_DDR3_TWR_CYC" value="16" />
+ <parameter name="BOARD_DDR3_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="PRI_HMC_CFG_WR_TO_WR" value="3" />
+ <parameter name="DIAG_FAST_SIM_OVERRIDE" value="FAST_SIM_OVERRIDE_DEFAULT" />
+ <parameter name="BOARD_QDR2_WCLK_ISI_NS" value="0.0" />
+ <parameter name="DIAG_DDR3_USE_TG_AVL_2" value="false" />
+ <parameter name="BOARD_QDR4_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="PRI_HMC_CFG_CS_TO_CHIP_MAPPING" value="33825" />
+ <parameter name="MEM_RLD2_CS_WIDTH" value="1" />
+ <parameter name="SEC_HMC_CFG_CS_TO_CHIP_MAPPING" value="33825" />
+ <parameter name="PHY_QDR4_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PORT_MEM_DM_PINLOC_12" value="0" />
+ <parameter
+ name="MEM_DDR4_AC_PARITY_LATENCY"
+ value="DDR4_AC_PARITY_LATENCY_DISABLE" />
+ <parameter name="PORT_MEM_DM_PINLOC_11" value="0" />
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="PORT_MEM_DM_PINLOC_10" value="0" />
+ <parameter name="PHY_LPDDR3_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="CTRL_DDR4_ECC_EN" value="false" />
+ <parameter name="PHY_DDR3_USER_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="PHY_RLD2_CK_MODE_ENUM" value="unset" />
+ <parameter name="MEM_LPDDR3_W_ODT0_2X2" value="on,off" />
+ <parameter name="PORT_AFI_WLAT_WIDTH" value="6" />
+ <parameter name="PRI_HMC_CFG_RFSH_WARN_THRESHOLD" value="4" />
+ <parameter name="MEM_DDR4_BANK_ADDR_WIDTH" value="2" />
+ <parameter name="PRI_HMC_CFG_ROW_CMD_SLOT" value="1" />
+ <parameter name="MEM_DDR4_TINIT_CK" value="600000" />
+ <parameter name="PLL_NUM_OF_EXTRA_CLKS" value="0" />
+ <parameter name="MEM_DDR3_TRFC_NS" value="160.0" />
+ <parameter name="PORT_MEM_DINVA_PINLOC_0" value="0" />
+ <parameter name="MEM_DDR4_CHIP_ID_WIDTH" value="0" />
+ <parameter name="DIAG_LPDDR3_BYPASS_USER_STAGE" value="true" />
+ <parameter name="PHY_QDR4_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_AFI_RDATA_WIDTH" value="1" />
+ <parameter name="PORT_MEM_K_N_WIDTH" value="1" />
+ <parameter name="BOARD_QDR4_USER_CK_SLEW_RATE" value="4.0" />
+ <parameter name="PORT_MEM_DINVA_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_DINVA_PINLOC_2" value="0" />
+ <parameter name="MEM_DDR4_NUM_OF_DIMMS" value="1" />
+ <parameter name="MEM_DDR4_TTL_BANK_GROUP_WIDTH" value="2" />
+ <parameter name="SEC_HMC_CFG_REORDER_READ" value="enable" />
+ <parameter name="PHY_RLD3_STARTING_VREFIN" value="70.0" />
+ <parameter name="PRI_HMC_CFG_LOCAL_IF_CS_WIDTH" value="cs_width_1" />
+ <parameter name="PORT_MEM_DQ_PINLOC_15" value="122802291" />
+ <parameter name="BOARD_QDR4_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_16" value="128050294" />
+ <parameter name="PORT_MEM_DQ_PINLOC_13" value="114403433" />
+ <parameter name="PORT_MEM_DQ_PINLOC_14" value="119651438" />
+ <parameter name="PORT_MEM_DQ_PINLOC_11" value="103909473" />
+ <parameter name="PHY_LPDDR3_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="PORT_MEM_DQ_PINLOC_12" value="109157478" />
+ <parameter name="PORT_MEM_DQ_PINLOC_10" value="48280620" />
+ <parameter name="PHY_LPDDR3_PING_PONG_EN" value="false" />
+ <parameter name="BOARD_LPDDR3_MAX_CK_DELAY_NS" value="0.6" />
+ <parameter name="PORT_MEM_DQ_PINLOC_19" value="141695109" />
+ <parameter name="PORT_MEM_DQ_PINLOC_17" value="133298299" />
+ <parameter
+ name="PHY_DDR3_USER_PERIODIC_OCT_RECAL_ENUM"
+ value="PERIODIC_OCT_RECAL_AUTO" />
+ <parameter name="PORT_MEM_DQ_PINLOC_18" value="136447104" />
+ <parameter name="BOARD_QDR4_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="PRI_HMC_CFG_MMR_CMD_TO_VALID" value="16" />
+ <parameter name="MEM_DDR3_DQS_WIDTH" value="8" />
+ <parameter name="PORT_MEM_DKB_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="DIAG_EX_DESIGN_ISSP_EN" value="true" />
+ <parameter name="DIAG_RLD2_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="MEM_RLD3_TCKDK_MAX_CYC" value="0.27" />
+ <parameter name="PRI_HMC_CFG_PDN_PERIOD" value="0" />
+ <parameter name="MEM_NUM_OF_LOGICAL_RANKS" value="2" />
+ <parameter name="PHY_DDR4_USER_STARTING_VREFIN" value="70.0" />
+ <parameter name="PRI_HMC_CFG_USER_RFSH_EN" value="disable" />
+ <parameter name="MEM_DDR3_TDQSCK_PS" value="180" />
+ <parameter name="MEM_LPDDR3_TIS_AC_MV" value="150" />
+ <parameter name="MEM_DDR3_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="MEM_DDR4_TDQSS_CYC" value="0.27" />
+ <parameter name="MEM_DDR3_CS_WIDTH" value="1" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_5" value="0.0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_40" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_4" value="0.0" />
+ <parameter name="MEM_DDR3_BANK_ADDR_WIDTH" value="3" />
+ <parameter name="PORT_MEM_DQ_PINLOC_41" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_3" value="0.0" />
+ <parameter name="DIAG_QDR2_BYPASS_STRESS_STAGE" value="true" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_2" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_1" value="0.0" />
+ <parameter name="PINS_C2L_DRIVEN_10" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_0" value="0.0" />
+ <parameter name="MEM_DDR3_W_ODT3_4X4" value="on,on,off,off" />
+ <parameter name="PORT_MEM_DQ_PINLOC_48" value="0" />
+ <parameter name="PINS_C2L_DRIVEN_12" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_46" value="0" />
+ <parameter name="PINS_C2L_DRIVEN_11" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_47" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_44" value="0" />
+ <parameter name="DIAG_LPDDR3_BYPASS_REPEAT_STAGE" value="true" />
+ <parameter name="PORT_MEM_DQ_PINLOC_45" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_42" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_43" value="0" />
+ <parameter name="SEC_HMC_CFG_RD_TO_RD" value="3" />
+ <parameter name="PORT_AFI_WDATA_VALID_WIDTH" value="1" />
+ <parameter name="PORT_MEM_K_PINLOC_5" value="0" />
+ <parameter name="PORT_MEM_K_PINLOC_4" value="0" />
+ <parameter name="PINS_USAGE_12" value="0" />
+ <parameter name="PORT_MEM_K_PINLOC_1" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_8" value="0.0" />
+ <parameter name="PORT_MEM_K_PINLOC_0" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_7" value="0.0" />
+ <parameter name="PORT_MEM_K_PINLOC_3" value="0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_6" value="0.0" />
+ <parameter name="DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES" value="1" />
+ <parameter name="PORT_MEM_K_PINLOC_2" value="0" />
+ <parameter name="PHY_RLD3_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PORT_MEM_Q_PINLOC_7" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_6" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_9" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_8" value="0" />
+ <parameter name="BOARD_DDR4_MAX_CK_DELAY_NS" value="0.6" />
+ <parameter name="PORT_MEM_Q_PINLOC_3" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_2" value="0" />
+ <parameter name="PRI_HMC_CFG_DQSTRK_TO_VALID_LAST" value="27" />
+ <parameter name="PORT_MEM_Q_PINLOC_5" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_4" value="0" />
+ <parameter name="BOARD_QDR4_RDATA_ISI_NS" value="0.0" />
+ <parameter name="MEM_LPDDR3_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="PORT_MEM_Q_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_Q_PINLOC_0" value="0" />
+ <parameter name="DIAG_BYPASS_DEFAULT_PATTERN" value="false" />
+ <parameter name="PINS_INVERT_WR_0" value="537002016" />
+ <parameter name="PINS_INVERT_WR_1" value="2048" />
+ <parameter name="PINS_INVERT_WR_2" value="0" />
+ <parameter name="DIAG_QDR4_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="PINS_INVERT_WR_3" value="8390656" />
+ <parameter name="DIAG_EXPORT_PLL_REF_CLK_OUT" value="false" />
+ <parameter name="PINS_INVERT_WR_4" value="537002016" />
+ <parameter name="PINS_INVERT_WR_5" value="0" />
+ <parameter name="PINS_INVERT_WR_6" value="0" />
+ <parameter name="PINS_INVERT_WR_7" value="0" />
+ <parameter name="PINS_INVERT_WR_8" value="0" />
+ <parameter name="PINS_INVERT_WR_9" value="0" />
+ <parameter name="DBI_WR_ENABLE" value="false" />
+ <parameter name="PORT_DFT_NF_IOAUX_PIO_OUT_WIDTH" value="8" />
+ <parameter name="MEM_RLD2_BL" value="4" />
+ <parameter name="PORT_MEM_DQ_PINLOC_26" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_27" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_24" value="154" />
+ <parameter name="PORT_MEM_DQ_PINLOC_25" value="0" />
+ <parameter name="PRI_HMC_CFG_MPS_DQSTRK_DISABLE" value="disable" />
+ <parameter name="PORT_MEM_DQ_PINLOC_22" value="157437074" />
+ <parameter name="PORT_MEM_DQ_PINLOC_23" value="160587927" />
+ <parameter name="PRI_HMC_CFG_MRR_TO_VALID" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_20" value="146943114" />
+ <parameter name="EX_DESIGN_GUI_QDR2_GEN_SIM" value="true" />
+ <parameter name="PORT_MEM_DQ_PINLOC_21" value="152189069" />
+ <parameter name="PORT_MEM_DQ_PINLOC_28" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_29" value="0" />
+ <parameter name="MEM_LPDDR3_W_ODT1_4X4" value="off,off,off,off" />
+ <parameter name="MEM_DDR4_SPD_144_DB_VREFDQ" value="37" />
+ <parameter name="MEM_DDR4_ALERT_PAR_EN" value="true" />
+ <parameter name="DIAG_DDR4_EX_DESIGN_ISSP_EN" value="true" />
+ <parameter name="PRI_HMC_CFG_POWER_SAVING_EXIT_CYC" value="3" />
+ <parameter name="PORT_MEM_DQ_PINLOC_30" value="0" />
+ <parameter name="PORT_AFI_LBK0_N_WIDTH" value="1" />
+ <parameter name="BOARD_RLD3_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
+ <parameter name="PINS_USAGE_10" value="0" />
+ <parameter name="PINS_USAGE_11" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_37" value="0" />
+ <parameter name="BOARD_DDR4_USE_DEFAULT_ISI_VALUES" value="true" />
+ <parameter name="PORT_MEM_DQ_PINLOC_38" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_35" value="0" />
+ <parameter name="BOARD_LPDDR3_AC_TO_CK_SKEW_NS" value="0.0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_36" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_33" value="0" />
+ <parameter name="MEM_LPDDR3_W_ODTN_1X1" value="Rank 0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_34" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_31" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_32" value="0" />
+ <parameter name="MEM_RLD2_TDS_NS" value="0.17" />
+ <parameter name="BOARD_LPDDR3_SKEW_WITHIN_AC_NS" value="0.0" />
+ <parameter name="PORT_MEM_REF_N_PINLOC_0" value="0" />
+ <parameter name="PORT_MEM_DQ_PINLOC_39" value="0" />
+ <parameter name="BOARD_DDR4_WCLK_ISI_NS" value="0.078" />
+ <parameter name="PRI_HMC_CFG_WR_TO_WR_DIFF_CHIP" value="3" />
+ <parameter name="DIAG_RLD2_TG_BE_PATTERN_LENGTH" value="8" />
+ <parameter name="PRI_HMC_CFG_WR_ODT_PERIOD" value="6" />
+ <parameter name="PORT_MEM_DKB_N_WIDTH" value="1" />
+ <parameter name="MEM_DDR4_TTL_CHIP_ID_WIDTH" value="0" />
+ <parameter name="MEM_DDR3_W_ODT1_2X2" value="on,on" />
+ <parameter name="DIAG_QDR2_USE_TG_AVL_2" value="false" />
+ <parameter name="PHY_RLD2_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR3_R_ODT1_2X2" value="on,off" />
+ <parameter name="MEM_DDR4_DEFAULT_VREFOUT" value="false" />
+ <parameter name="BOARD_QDR2_K_SLEW_RATE" value="4.0" />
+ <parameter name="MEM_LPDDR3_R_ODT2_4X4" value="on,on,off,off" />
+ <parameter name="MEM_DDR4_ASR_ENUM" value="DDR4_ASR_MANUAL_NORMAL" />
+ <parameter name="SEC_HMC_CFG_MMR_CMD_TO_VALID" value="16" />
+ <parameter name="CTRL_DDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
+ <parameter name="BOARD_RLD3_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
+ <parameter name="MEM_QDR2_TSD_NS" value="0.23" />
+ <parameter
+ name="PHY_RLD3_USER_PERIODIC_OCT_RECAL_ENUM"
+ value="PERIODIC_OCT_RECAL_AUTO" />
+ <parameter name="PHY_DDR4_DATA_OUT_MODE_ENUM" value="OUT_OCT_34_CAL" />
+ <parameter name="PORT_MEM_REF_N_WIDTH" value="1" />
+ <parameter name="PHY_QDR4_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="SEC_HMC_CFG_SB_DDR4_MR3" value="197120" />
+ <parameter name="EX_DESIGN_GUI_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="MEM_LPDDR3_W_ODT2_4X4" value="on,on,on,on" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_AUTOGEN_WCNT" value="129" />
+ <parameter name="PHY_DDR4_USER_AC_MODE_ENUM" value="unset" />
+ <parameter name="SEC_HMC_CFG_SB_DDR4_MR5" value="1056" />
+ <parameter name="SEC_HMC_CFG_SB_DDR4_MR4" value="262144" />
+ <parameter name="DIAG_DDR3_BYPASS_STRESS_STAGE" value="true" />
+ <parameter name="BOARD_LPDDR3_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="SEC_HMC_CFG_SRF_TO_ZQ_CAL" value="449" />
+ <parameter name="PHY_QDR4_PING_PONG_EN" value="false" />
+ <parameter name="PORT_MEM_DKB_WIDTH" value="1" />
+ <parameter name="PORT_MEM_CQ_N_PINLOC_1" value="0" />
+ <parameter name="CTRL_QDR4_AVL_SYMBOL_WIDTH" value="9" />
+ <parameter name="PORT_MEM_CQ_N_PINLOC_0" value="0" />
+ <parameter name="MEM_LPDDR3_ODT_WIDTH" value="1" />
+ <parameter name="MEM_DDR4_TTL_CS_WIDTH" value="2" />
+ <parameter name="MEM_DDR4_TDVWP_UI" value="0.72" />
+ <parameter name="PHY_LPDDR3_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PORT_CTRL_SELF_REFRESH_REQ_WIDTH" value="4" />
+ <parameter name="CTRL_RLD2_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
+ <parameter name="MEM_DDR4_TRCD_CYC" value="17" />
+ <parameter name="PHY_RLD3_USER_STARTING_VREFIN" value="70.0" />
+ <parameter name="PRI_HMC_CFG_RD_TO_WR_DIFF_BG" value="5" />
+ <parameter name="PORT_MEM_DQS_PINLOC_12" value="0" />
+ <parameter name="PORT_MEM_DQS_PINLOC_11" value="0" />
+ <parameter name="MEM_DDR3_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="PORT_MEM_DQS_PINLOC_10" value="0" />
+ <parameter name="PHY_QDR2_MEM_CLK_FREQ_MHZ" value="633.333" />
+ <parameter name="BOARD_RLD3_MAX_CK_DELAY_NS" value="0.6" />
+ <parameter name="PORT_MEM_LDB_N_PINLOC_AUTOGEN_WCNT" value="1" />
+ <parameter name="MEM_LPDDR3_TRCD_CYC" value="17" />
+ <parameter name="PRI_HMC_CFG_REORDER_RDATA" value="enable" />
+ <parameter name="BOARD_DDR3_CK_SLEW_RATE" value="4.0" />
+ <parameter name="PRI_HMC_CFG_RB_RESERVED_ENTRY" value="8" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_1" value="196276413" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_0" value="199425082" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_3" value="189978807" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_2" value="193127610" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_5" value="183681201" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_4" value="186830004" />
+ <parameter name="BOARD_LPDDR3_USER_WDATA_ISI_NS" value="0.0" />
+ <parameter name="DIAG_USE_RS232_UART" value="false" />
+ <parameter name="MEM_RLD3_WRITE_PROTOCOL_ENUM" value="RLD3_WRITE_1BANK" />
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_7" value="177383595" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_6" value="180532398" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_9" value="171085989" />
+ <parameter name="UNUSED_MEM_PINS_PINLOC_8" value="174234792" />
+ <parameter name="MEM_DDR4_ALERT_N_DQS_GROUP" value="0" />
+ <parameter name="PRI_HMC_CFG_SRF_AUTOEXIT_EN" value="disable" />
+ <parameter name="MEM_DDR4_TRCD_NS" value="14.06" />
+ <parameter name="MEM_DDR3_DQ_WIDTH" value="72" />
+ <parameter name="MEM_LPDDR3_TWL_CYC" value="6" />
+ <parameter name="BOARD_LPDDR3_TDS_DERATING_PS" value="0" />
+ <parameter
+ name="MEM_DDR4_VREFDQ_TRAINING_RANGE_DISP"
+ value="Range 2 - 45% to 77.5%" />
+ <parameter
+ name="DIAG_DDR3_EXPORT_SEQ_AVALON_SLAVE"
+ value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
+ <parameter name="MEM_LPDDR3_DM_EN" value="true" />
+ <parameter name="PORT_MEM_QKB_N_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="PHY_DDR4_REF_CLK_FREQ_MHZ" value="25.0" />
+ <parameter name="MEM_QDR2_THA_NS" value="0.18" />
+ <parameter name="DIAG_DDR3_SIM_VERBOSE" value="true" />
+ <parameter name="BOARD_LPDDR3_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR4_SPD_137_RCD_CA_DRV" value="101" />
+ <parameter name="PHY_RLD2_RATE_ENUM" value="RATE_HALF" />
+ <parameter name="DIAG_DDR4_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
+ <parameter name="CTRL_LPDDR3_MMR_EN" value="false" />
+ <parameter name="PHY_QDR2_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="EX_DESIGN_GUI_LPDDR3_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
+ <parameter name="MEM_DDR3_CKE_WIDTH" value="1" />
+ <parameter name="PLL_REF_CLK_FREQ_PS_STR" value="40032 ps" />
+ <parameter name="PRI_HMC_CFG_DQS_TRACKING_EN" value="disable" />
+ <parameter name="BOARD_QDR4_DK_TO_CK_SKEW_NS" value="-0.02" />
+ <parameter name="MEM_DDR4_CTRL_CFG_WRITE_ODT_RANK" value="33" />
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="PORT_MEM_BWS_N_PINLOC_AUTOGEN_WCNT" value="3" />
+ <parameter name="MEM_DDR4_RCD_CS_IBT_ENUM" value="DDR4_RCD_CS_IBT_100" />
+ <parameter name="PHY_DDR3_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="SEC_HMC_CFG_SRF_ENTRY_EXIT_BLOCK" value="presrfexit" />
+ <parameter name="MEM_QDR4_DQ_PER_RD_GROUP" value="18" />
+ <parameter name="PHY_DDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
+ <parameter name="PINS_DB_OE_BYPASS_AUTOGEN_WCNT" value="13" />
+ <parameter name="MEM_LPDDR3_R_ODT1_2X2" value="off,off" />
+ <parameter name="SEC_HMC_CFG_USER_RFSH_EN" value="disable" />
+ <parameter name="PHY_RLD2_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="MEM_LPDDR3_TIH_DC_MV" value="100" />
+ <parameter name="PORT_HPS_EMIF_E2H_WIDTH" value="4096" />
+ <parameter
+ name="CTRL_LPDDR3_ADDR_ORDER_ENUM"
+ value="LPDDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
+ <parameter name="DIAG_RLD2_BYPASS_STRESS_STAGE" value="true" />
+ <parameter name="PORT_MEM_ACT_N_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_ACT_N_PINLOC_0" value="52225" />
+ <parameter name="PHY_QDR2_USER_STARTING_VREFIN" value="70.0" />
+ <parameter name="PORT_MEM_RESET_N_WIDTH" value="1" />
+ <parameter name="MEM_DDR4_RCD_COMMAND_LATENCY" value="1" />
+ <parameter name="PHY_QDR2_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_SPD_142_DRAM_VREFDQ_R2" value="29" />
+ <parameter name="MEM_LPDDR3_TRTP_CYC" value="4" />
+ <parameter name="PORT_MEM_CK_WIDTH" value="2" />
+ <parameter name="MEM_RLD2_WIDTH_EXPANDED" value="false" />
+ <parameter name="PRI_HMC_CFG_ARBITER_TYPE" value="twot" />
+ <parameter name="PHY_QDR2_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="MEM_RLD2_TQKQ_MIN_NS" value="-0.12" />
+ <parameter name="CTRL_LPDDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
+ <parameter name="CTRL_DDR4_REORDER_EN" value="true" />
+ <parameter name="MEM_LPDDR3_CTRL_CFG_WRITE_ODT_CHIP" value="0" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_1" value="false" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_0" value="false" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_3" value="false" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_2" value="false" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_5" value="true" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_4" value="false" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_7" value="true" />
+ <parameter name="BOARD_DDR4_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_6" value="true" />
+ <parameter name="MEM_DDR4_TMRD_CK_CYC" value="8" />
+ <parameter name="PLL_C_CNT_BYPASS_EN_8" value="true" />
+ <parameter name="PORT_MEM_A_PINLOC_4" value="79768647" />
+ <parameter name="PORT_MEM_A_PINLOC_5" value="82917453" />
+ <parameter name="PORT_MEM_A_PINLOC_2" value="70322241" />
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="PORT_MEM_A_PINLOC_3" value="73471044" />
+ <parameter name="PORT_MEM_DQA_PINLOC_9" value="0" />
+ <parameter name="PORT_MEM_A_PINLOC_0" value="64024593" />
+ <parameter name="PORT_MEM_A_PINLOC_1" value="67173438" />
+ <parameter name="PORT_MEM_DQA_PINLOC_4" value="0" />
+ <parameter name="BOARD_QDR2_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="PORT_MEM_DQA_PINLOC_3" value="0" />
+ <parameter name="MEM_DDR3_USE_DEFAULT_ODT" value="true" />
+ <parameter name="PORT_MEM_DQA_PINLOC_2" value="0" />
+ <parameter name="PORT_MEM_DQA_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_A_PINLOC_8" value="0" />
+ <parameter name="PORT_MEM_DQA_PINLOC_8" value="0" />
+ <parameter name="PORT_MEM_A_PINLOC_9" value="0" />
+ <parameter name="PORT_MEM_DQA_PINLOC_7" value="0" />
+ <parameter name="PORT_MEM_A_PINLOC_6" value="0" />
+ <parameter name="PORT_MEM_DQA_PINLOC_6" value="0" />
+ <parameter name="PORT_MEM_A_PINLOC_7" value="0" />
+ <parameter name="PORT_MEM_DQA_PINLOC_5" value="0" />
+ <parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
+ <parameter name="PORT_MEM_DQA_PINLOC_0" value="0" />
+ <parameter name="MEM_DDR4_TWLS_CYC" value="0.13" />
+ <parameter name="PORT_MEM_QKA_PINLOC_0" value="0" />
+ <parameter name="PORT_MEM_QKA_PINLOC_1" value="0" />
+ <parameter name="BOARD_DDR4_AC_ISI_NS" value="0.22" />
+ <parameter name="PORT_MEM_QKA_PINLOC_2" value="0" />
+ <parameter name="PORT_MEM_QKA_PINLOC_3" value="0" />
+ <parameter name="PORT_CTRL_MMR_SLAVE_BCOUNT_WIDTH" value="2" />
+ <parameter name="MEM_DDR3_BL_ENUM" value="DDR3_BL_BL8" />
+ <parameter name="PORT_MEM_QKA_PINLOC_4" value="0" />
+ <parameter name="PORT_MEM_QKA_PINLOC_5" value="0" />
+ <parameter name="MEM_DDR3_LRDIMM_EXTENDED_CONFIG" value="0x000000000000000000" />
+ <parameter name="PRI_HMC_CFG_MPS_TO_VALID" value="768" />
+ <parameter name="PHY_RLD3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="BOARD_RLD3_SKEW_WITHIN_QK_NS" value="0.0" />
+ <parameter name="MEM_DDR4_TEMP_SENSOR_READOUT" value="false" />
+ <parameter name="PORT_MEM_RWB_N_PINLOC_0" value="0" />
+ <parameter name="MEM_QDR4_DQ_PER_PORT_WIDTH" value="36" />
+ <parameter name="DIAG_USE_BOARD_DELAY_MODEL" value="false" />
+ <parameter name="DIAG_LPDDR3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
+ <parameter name="CTRL_DDR3_AUTO_POWER_DOWN_EN" value="false" />
+ <parameter name="PLL_CP_SETTING" value="pll_cp_setting28" />
+ <parameter name="MEM_QDR4_TQH_CYC" value="0.4" />
+ <parameter name="MEM_RLD2_REFRESH_INTERVAL_US" value="0.24" />
+ <parameter name="PINS_GPIO_MODE_0" value="1" />
+ <parameter name="PRI_HMC_CFG_READ_ODT_CHIP" value="0" />
+ <parameter name="PINS_GPIO_MODE_2" value="0" />
+ <parameter name="PINS_GPIO_MODE_1" value="0" />
+ <parameter name="PINS_GPIO_MODE_4" value="0" />
+ <parameter name="PINS_GPIO_MODE_3" value="0" />
+ <parameter name="PINS_GPIO_MODE_6" value="0" />
+ <parameter name="PINS_GPIO_MODE_5" value="0" />
+ <parameter name="PINS_GPIO_MODE_8" value="0" />
+ <parameter name="PINS_GPIO_MODE_7" value="0" />
+ <parameter name="SEC_HMC_CFG_SRF_TO_VALID" value="513" />
+ <parameter name="PINS_GPIO_MODE_9" value="0" />
+ <parameter name="MEM_DDR4_SPD_141_DRAM_VREFDQ_R1" value="29" />
+ <parameter name="MEM_DDR4_MR5" value="328736" />
+ <parameter name="MEM_DDR4_MR4" value="262144" />
+ <parameter name="PLL_C_CNT_OUT_EN_8" value="false" />
+ <parameter name="MEM_DDR4_MR6" value="394327" />
+ <parameter name="MEM_DDR4_MR1" value="65537" />
+ <parameter name="PLL_C_CNT_OUT_EN_5" value="false" />
+ <parameter name="MEM_DDR4_MR0" value="2112" />
+ <parameter name="PLL_C_CNT_OUT_EN_4" value="true" />
+ <parameter name="MEM_DDR4_MR3" value="197120" />
+ <parameter name="PLL_C_CNT_OUT_EN_7" value="false" />
+ <parameter name="MEM_DDR4_MR2" value="131120" />
+ <parameter name="PLL_C_CNT_OUT_EN_6" value="false" />
+ <parameter name="CTRL_DDR4_SELF_REFRESH_EN" value="false" />
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="PORT_MEM_BG_WIDTH" value="2" />
+ <parameter name="PLL_N_CNT_BYPASS_EN" value="true" />
+ <parameter name="PORT_CAL_DEBUG_ADDRESS_WIDTH" value="24" />
+ <parameter name="PLL_C_CNT_OUT_EN_1" value="true" />
+ <parameter name="MEM_RLD2_DQ_WIDTH" value="9" />
+ <parameter name="PORT_DFT_NF_CORE_CLK_LOCKED_WIDTH" value="2" />
+ <parameter name="PLL_C_CNT_OUT_EN_0" value="true" />
+ <parameter name="PLL_C_CNT_OUT_EN_3" value="true" />
+ <parameter name="PLL_C_CNT_OUT_EN_2" value="true" />
+ <parameter name="PHY_RLD2_USER_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="MEM_LPDDR3_BL" value="LPDDR3_BL_BL8" />
+ <parameter name="PORT_MEM_LBK0_N_PINLOC_0" value="0" />
+ <parameter name="CENTER_TIDS_AUTOGEN_WCNT" value="3" />
+ <parameter name="DIAG_DDR4_EX_DESIGN_SEPARATE_RZQS" value="false" />
+ <parameter name="MEM_DDR3_DRV_STR_ENUM" value="DDR3_DRV_STR_RZQ_6" />
+ <parameter name="BOARD_LPDDR3_AC_ISI_NS" value="0.0" />
+ <parameter name="SEC_HMC_CFG_MPR_TO_VALID" value="16" />
+ <parameter name="BOARD_DDR3_RDATA_ISI_NS" value="0.0" />
+ <parameter name="MEM_DDR4_R_ODTN_1X1" value="Rank 0" />
+ <parameter name="SEC_HMC_CFG_PDN_TO_VALID" value="5" />
+ <parameter name="PORT_MEM_QKA_N_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="CTRL_DDR3_STARVE_LIMIT" value="63" />
+ <parameter name="PORT_CAL_DEBUG_RDATA_WIDTH" value="32" />
+ <parameter name="MEM_QDR2_DATA_WIDTH" value="36" />
+ <parameter name="BOARD_RLD3_WCLK_ISI_NS" value="0.0" />
+ <parameter name="MEM_QDR4_WIDTH_EXPANDED" value="false" />
+ <parameter name="MEM_LPDDR3_WLSELECT" value="Set A" />
+ <parameter name="MEM_DDR4_TRAS_NS" value="33.0" />
+ <parameter name="MEM_LPDDR3_TRFC_NS" value="210.0" />
+ <parameter name="DIAG_QDR4_SEPARATE_READ_WRITE_ITFS" value="false" />
+ <parameter name="PHY_QDR2_DEFAULT_REF_CLK_FREQ" value="true" />
+ <parameter name="PHY_QDR4_DATA_IN_MODE_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_SPD_148_DRAM_DRV" value="0" />
+ <parameter name="MEM_DDR3_NUM_OF_DIMMS" value="1" />
+ <parameter
+ name="PHY_QDR4_USER_PERIODIC_OCT_RECAL_ENUM"
+ value="PERIODIC_OCT_RECAL_AUTO" />
+ <parameter name="MEM_QDR4_CK_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
+ <parameter name="PHY_RLD2_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="BOARD_RLD3_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="MEM_QDR4_DQ_PER_WR_GROUP" value="18" />
+ <parameter name="PORT_CTRL_AMM_BYTEEN_WIDTH" value="72" />
+ <parameter name="PHY_LPDDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_DFT_NF_PA_DPRIO_WRITEDATA_WIDTH" value="8" />
+ <parameter name="MEM_DDR4_R_ODT0_4X4" value="off,off,off,off" />
+ <parameter name="MEM_DDR4_R_ODT0_4X2" value="off,off,on,on" />
+ <parameter name="MEM_DDR3_R_ODT2_4X4" value="off,off,off,off" />
+ <parameter name="PHY_DDR4_PING_PONG_EN" value="false" />
+ <parameter name="MEM_QDR2_TCCQO_NS" value="0.45" />
+ <parameter name="IS_HPS" value="false" />
+ <parameter name="SEC_HMC_CFG_ZQCL_TO_VALID" value="257" />
+ <parameter name="BOARD_RLD3_MAX_DK_DELAY_NS" value="0.6" />
+ <parameter name="CTRL_LPDDR3_AUTO_POWER_DOWN_CYCS" value="32" />
+ <parameter name="PORT_MEM_DKA_N_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED" value="false" />
+ <parameter name="SEC_HMC_CFG_RD_TO_RD_DIFF_CHIP" value="3" />
+ <parameter name="SEC_HMC_CFG_ACT_TO_ACT_DIFF_BANK" value="3" />
+ <parameter name="PORT_AFI_REF_N_WIDTH" value="1" />
+ <parameter name="MEM_DDR3_DQ_PER_DQS" value="8" />
+ <parameter name="BOARD_QDR4_IS_SKEW_WITHIN_QK_DESKEWED" value="false" />
+ <parameter name="MEM_RLD3_TDS_AC_MV" value="150" />
+ <parameter name="PHY_RLD2_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_QDR2_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_RLD3_AC_MODE_ENUM" value="unset" />
+ <parameter name="EX_DESIGN_GUI_DDR3_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="MEM_DDR4_TWR_NS" value="15.0" />
+ <parameter name="MEM_LPDDR3_TRL_CYC" value="10" />
+ <parameter name="CTRL_LPDDR3_USER_REFRESH_EN" value="false" />
+ <parameter name="MEM_LPDDR3_TDQSCK_DERV_PS" value="2" />
+ <parameter name="BOARD_QDR4_USER_RDATA_SLEW_RATE" value="3.5" />
+ <parameter name="PORT_CLKS_SHARING_SLAVE_IN_WIDTH" value="32" />
+ <parameter name="PINS_INVERT_OE_9" value="0" />
+ <parameter name="PORT_MEM_PAR_PINLOC_0" value="60417" />
+ <parameter name="PLL_VCO_FREQ_MHZ_INT" value="1200" />
+ <parameter name="PORT_MEM_PAR_PINLOC_1" value="0" />
+ <parameter name="PINS_INVERT_OE_6" value="0" />
+ <parameter name="PINS_INVERT_OE_5" value="63" />
+ <parameter name="PINS_INVERT_OE_8" value="0" />
+ <parameter name="PINS_INVERT_OE_7" value="0" />
+ <parameter name="BOARD_QDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
+ <parameter name="PINS_INVERT_OE_2" value="955224063" />
+ <parameter name="PINS_INVERT_OE_1" value="763363263" />
+ <parameter name="PINS_INVERT_OE_4" value="1056960510" />
+ <parameter name="PINS_INVERT_OE_3" value="1073479600" />
+ <parameter name="PHY_LPDDR3_USER_DATA_IN_MODE_ENUM" value="unset" />
+ <parameter name="BOARD_RLD3_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="MEM_DDR3_TDH_PS" value="55" />
+ <parameter name="PINS_INVERT_OE_0" value="1056960510" />
+ <parameter name="SEC_HMC_CFG_ENABLE_RC" value="enable" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_AUTOGEN_WCNT" value="13" />
+ <parameter name="MEM_DDR3_TDS_PS" value="53" />
+ <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
+ <parameter name="SEC_HMC_CFG_ADDR_ORDER" value="chip_row_bank_col" />
+ <parameter
+ name="PHY_LPDDR3_USER_PERIODIC_OCT_RECAL_ENUM"
+ value="PERIODIC_OCT_RECAL_AUTO" />
+ <parameter name="BOARD_QDR4_USER_RDATA_ISI_NS" value="0.0" />
+ <parameter name="PHY_QDR4_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="BOARD_RLD3_AC_ISI_NS" value="0.0" />
+ <parameter name="PHY_RLD2_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
+ <parameter name="PHY_RLD2_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="DIAG_SIM_CHECKER_SKIP_TG" value="false" />
+ <parameter name="DIAG_QDR4_BYPASS_REPEAT_STAGE" value="true" />
+ <parameter name="PORT_AFI_RLAT_WIDTH" value="6" />
+ <parameter name="PORT_AFI_AINV_WIDTH" value="1" />
+ <parameter name="BOARD_QDR4_RCLK_SLEW_RATE" value="5.0" />
+ <parameter name="PORT_AFI_ADDR_WIDTH" value="1" />
+ <parameter name="PLL_BW_SEL" value="high" />
+ <parameter name="MEM_LPDDR3_MR3" value="0" />
+ <parameter name="MEM_LPDDR3_MR2" value="0" />
+ <parameter name="MEM_LPDDR3_MR1" value="0" />
+ <parameter name="PREV_PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
+ <parameter name="PHY_RLD3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
+ <parameter name="EX_DESIGN_GUI_QDR4_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="MEM_LPDDR3_USE_DEFAULT_ODT" value="true" />
+ <parameter name="EX_DESIGN_GUI_RLD2_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
+ <parameter name="SEQ_SIM_OSC_FREQ_MHZ" value="2390" />
+ <parameter name="MEM_QDR4_TQKQ_MAX_PS" value="75" />
+ <parameter name="PORT_MEM_DQB_WIDTH" value="1" />
+ <parameter name="PHY_LPDDR3_USER_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_TWR_CYC" value="18" />
+ <parameter name="DIAG_LPDDR3_ABSTRACT_PHY" value="false" />
+ <parameter name="CTRL_DDR4_AUTO_POWER_DOWN_EN" value="false" />
+ <parameter name="MEM_QDR2_BWS_N_WIDTH" value="4" />
+ <parameter name="PORT_MEM_BA_WIDTH" value="2" />
+ <parameter name="PORT_MEM_DQB_PINLOC_16" value="0" />
+ <parameter name="TRAIT_SUPPORTS_VID" value="0" />
+ <parameter name="MEM_LPDDR3_TREFI_CYC" value="3120" />
+ <parameter name="PORT_MEM_DQB_PINLOC_15" value="0" />
+ <parameter name="SEC_RDATA_LANE_INDEX" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_14" value="0" />
+ <parameter name="MEM_DDR4_VDIVW_TOTAL" value="136" />
+ <parameter name="PORT_MEM_DQB_PINLOC_13" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_12" value="0" />
+ <parameter name="MEM_DDR3_RM_WIDTH" value="0" />
+ <parameter name="MEM_DDR4_TDSH_CYC" value="0.18" />
+ <parameter name="MEM_DDR4_TFAW_CYC" value="30" />
+ <parameter name="PORT_MEM_DQB_PINLOC_11" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_10" value="0" />
+ <parameter name="PORT_MEM_WPS_N_PINLOC_AUTOGEN_WCNT" value="1" />
+ <parameter name="MEM_DDR3_RTT_NOM_ENUM" value="DDR3_RTT_NOM_ODT_DISABLED" />
+ <parameter name="PORT_MEM_DQB_PINLOC_19" value="0" />
+ <parameter name="BOARD_DDR3_RCLK_SLEW_RATE" value="5.0" />
+ <parameter name="DIAG_RLD2_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
+ <parameter name="PORT_MEM_DQB_PINLOC_18" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_17" value="0" />
+ <parameter name="PORT_CAL_DEBUG_OUT_RDATA_WIDTH" value="32" />
+ <parameter name="DIAG_DB_RESET_AUTO_RELEASE" value="avl_release" />
+ <parameter name="PRI_HMC_CFG_RD_ODT_ON" value="0" />
+ <parameter name="BOARD_QDR4_WCLK_SLEW_RATE" value="4.0" />
+ <parameter name="PORT_CTRL_ECC_WB_POINTER_WIDTH" value="12" />
+ <parameter name="BOARD_RLD3_USE_DEFAULT_ISI_VALUES" value="true" />
+ <parameter name="DIAG_SIM_REGTEST_MODE" value="false" />
+ <parameter name="PHY_QDR4_USER_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_CTRL_MMR_SLAVE_ADDRESS_WIDTH" value="10" />
+ <parameter name="MEM_DDR4_TDIVW_DJ_CYC" value="0.1" />
+ <parameter name="MEM_RLD3_ADDR_WIDTH" value="20" />
+ <parameter name="MEM_DDR4_RDIMM_CONFIG" value="" />
+ <parameter name="MEM_QDR4_TISH_PS" value="150" />
+ <parameter name="PHY_QDR2_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_MEM_DQB_PINLOC_41" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_40" value="0" />
+ <parameter name="PRI_HMC_CFG_RD_TO_RD" value="3" />
+ <parameter name="PORT_MEM_DQB_PINLOC_38" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_37" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_36" value="0" />
+ <parameter name="DIAG_RLD3_SIM_VERBOSE" value="true" />
+ <parameter name="PORT_MEM_DQB_PINLOC_35" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_34" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_33" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_32" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_31" value="0" />
+ <parameter name="PRI_HMC_CFG_4_ACT_TO_ACT" value="14" />
+ <parameter name="CTRL_MMR_EN" value="false" />
+ <parameter name="PORT_MEM_DQB_PINLOC_39" value="0" />
+ <parameter name="PHY_TARGET_IS_PRODUCTION" value="true" />
+ <parameter name="PORT_MEM_DQB_PINLOC_30" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_27" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_26" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_25" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_24" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_23" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_22" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_21" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_20" value="0" />
+ <parameter name="PORT_MEM_BG_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="DIAG_USE_TG_AVL_2" value="false" />
+ <parameter name="PORT_MEM_DQB_PINLOC_29" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_28" value="0" />
+ <parameter name="PHY_QDR4_USER_PING_PONG_EN" value="false" />
+ <parameter name="PINS_DB_OE_BYPASS_7" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_6" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_9" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_8" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_1" value="763101184" />
+ <parameter name="PINS_DB_OE_BYPASS_0" value="1" />
+ <parameter name="PRI_HMC_CFG_RD_TO_WR" value="5" />
+ <parameter name="PINS_DB_OE_BYPASS_3" value="48" />
+ <parameter name="PINS_DB_OE_BYPASS_2" value="955224063" />
+ <parameter name="PINS_DB_OE_BYPASS_5" value="0" />
+ <parameter name="PINS_DB_OE_BYPASS_4" value="0" />
+ <parameter name="PORT_MEM_DQS_N_WIDTH" value="9" />
+ <parameter name="MEM_DDR3_TWLS_PS" value="125.0" />
+ <parameter name="PORT_MEM_RM_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_8" value="0" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_7" value="0" />
+ <parameter name="EX_DESIGN_GUI_RLD2_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="BOARD_QDR2_WCLK_SLEW_RATE" value="4.0" />
+ <parameter name="BOARD_RLD3_RDATA_SLEW_RATE" value="3.5" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_4" value="0" />
+ <parameter
+ name="EX_DESIGN_GUI_LPDDR3_SEL_DESIGN"
+ value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
+ <parameter name="PRI_HMC_CFG_TCL" value="18" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_3" value="0" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_6" value="0" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_5" value="0" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_0" value="1" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_2" value="1" />
+ <parameter name="PLL_C_CNT_PH_MUX_PRST_1" value="1" />
+ <parameter name="BOARD_DDR3_SKEW_WITHIN_AC_NS" value="0.0" />
+ <parameter name="SEC_HMC_CFG_ARF_PERIOD" value="4681" />
+ <parameter name="PHY_RZQ" value="240" />
+ <parameter name="MEM_RLD3_T_RC_MODE_ENUM" value="RLD3_TRC_9" />
+ <parameter name="MEM_RLD3_WIDTH_EXPANDED" value="false" />
+ <parameter name="PORT_AFI_DM_N_WIDTH" value="1" />
+ <parameter name="PORT_AFI_WDATA_WIDTH" value="1" />
+ <parameter name="BOARD_QDR2_AC_SLEW_RATE" value="2.0" />
+ <parameter name="BOARD_QDR2_USER_RDATA_SLEW_RATE" value="2.0" />
+ <parameter name="MEM_DDR3_TWLH_PS" value="125.0" />
+ <parameter name="PHY_DDR3_DATA_IN_MODE_ENUM" value="unset" />
+ <parameter name="BOARD_DDR3_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
+ <parameter name="MEM_DDR4_LRDIMM_VREFDQ_VALUE" value="1D" />
+ <parameter name="PINS_DATA_IN_MODE_7" value="153387017" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_5" value="0" />
+ <parameter name="BOARD_DDR3_USE_DEFAULT_ISI_VALUES" value="true" />
+ <parameter name="PINS_DATA_IN_MODE_6" value="153391689" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_4" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_9" value="153350144" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_3" value="149" />
+ <parameter name="PINS_DATA_IN_MODE_8" value="153092680" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_2" value="143783025" />
+ <parameter name="MEM_QDR4_TCKDK_MAX_PS" value="150" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_9" value="0" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_8" value="0" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_7" value="0" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_6" value="0" />
+ <parameter name="CTRL_QDR4_AVL_MAX_BURST_COUNT" value="4" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_1" value="105948189" />
+ <parameter name="PHY_DDR3_DEFAULT_REF_CLK_FREQ" value="false" />
+ <parameter name="PORT_MEM_DQS_N_PINLOC_0" value="17830921" />
+ <parameter name="PORT_AFI_RST_N_WIDTH" value="1" />
+ <parameter name="MEM_QDR4_DK_PER_PORT_WIDTH" value="2" />
+ <parameter name="DIAG_EX_DESIGN_SEPARATE_RZQS" value="true" />
+ <parameter name="MEM_DDR4_CTRL_CFG_READ_ODT_CHIP" value="0" />
+ <parameter name="MEM_RLD2_TCKQK_MAX_NS" value="0.2" />
+ <parameter name="PORT_MEM_LDB_N_WIDTH" value="1" />
+ <parameter name="PHY_DDR3_USER_PING_PONG_EN" value="false" />
+ <parameter name="PHY_DDR4_AUTO_STARTING_VREFIN_EN" value="true" />
+ <parameter name="BOARD_DDR3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
+ <parameter
+ name="EX_DESIGN_GUI_LPDDR3_TARGET_DEV_KIT"
+ value="TARGET_DEV_KIT_NONE" />
+ <parameter name="PORT_CTRL_MMR_SLAVE_WDATA_WIDTH" value="32" />
+ <parameter
+ name="DIAG_RLD3_EXPORT_SEQ_AVALON_SLAVE"
+ value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
+ <parameter name="MEM_DDR4_SPD_135_RCD_REV" value="0" />
+ <parameter name="MEM_DDR4_TIS_AC_MV" value="100" />
+ <parameter name="MEM_QDR4_TCSH_PS" value="170" />
+ <parameter name="MEM_DDR4_SPD_143_DRAM_VREFDQ_R3" value="29" />
+ <parameter name="PINS_DB_IN_BYPASS_0" value="1" />
+ <parameter name="PORT_MEM_CAS_N_PINLOC_0" value="0" />
+ <parameter name="EX_DESIGN_GUI_QDR4_GEN_SYNTH" value="true" />
+ <parameter name="PINS_DB_IN_BYPASS_3" value="48" />
+ <parameter name="PINS_DB_IN_BYPASS_4" value="0" />
+ <parameter name="PINS_DB_IN_BYPASS_1" value="763101184" />
+ <parameter name="PINS_DB_IN_BYPASS_2" value="955224063" />
+ <parameter name="PINS_DB_IN_BYPASS_7" value="0" />
+ <parameter name="PINS_DB_IN_BYPASS_8" value="0" />
+ <parameter name="PINS_DB_IN_BYPASS_5" value="0" />
+ <parameter name="PINS_DB_IN_BYPASS_6" value="0" />
+ <parameter
+ name="PHY_QDR4_CORE_CLKS_SHARING_ENUM"
+ value="CORE_CLKS_SHARING_DISABLED" />
+ <parameter name="PINS_DB_IN_BYPASS_9" value="0" />
+ <parameter name="MEM_LPDDR3_TRP_CYC" value="17" />
+ <parameter name="UNUSED_DQS_BUSES_LANELOC_10" value="0" />
+ <parameter name="PORT_MEM_CAS_N_PINLOC_1" value="0" />
+ <parameter name="EX_DESIGN_GUI_QDR4_GEN_SIM" value="true" />
+ <parameter name="PHY_LPDDR3_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_LPDDR3_CK_MODE_ENUM" value="unset" />
+ <parameter name="DIAG_LPDDR3_SKIP_CA_DESKEW" value="false" />
+ <parameter name="MEM_DDR4_DQ_WIDTH" value="72" />
+ <parameter name="PRI_HMC_CFG_STARVE_LIMIT" value="63" />
+ <parameter name="MEM_DDR3_TRAS_CYC" value="36" />
+ <parameter name="PHY_RLD2_USER_STARTING_VREFIN" value="70.0" />
+ <parameter name="MEM_DDR4_R_ODTN_2X2" value="Rank 0,Rank 1" />
+ <parameter name="PORT_AFI_SEQ_BUSY_WIDTH" value="4" />
+ <parameter name="BOARD_RLD3_IS_SKEW_WITHIN_QK_DESKEWED" value="false" />
+ <parameter name="SEC_HMC_CFG_RD_TO_RD_DIFF_BG" value="2" />
+ <parameter name="MEM_DDR4_ODT_IN_POWERDOWN" value="true" />
+ <parameter
+ name="MEM_DDR4_ALERT_N_PLACEMENT_ENUM"
+ value="DDR4_ALERT_N_PLACEMENT_DATA_LANES" />
+ <parameter name="MEM_DDR3_DISCRETE_CS_WIDTH" value="1" />
+ <parameter name="BOARD_DDR3_DQS_TO_CK_SKEW_NS" value="0.02" />
+ <parameter name="PORT_MEM_CK_N_WIDTH" value="2" />
+ <parameter name="PHY_DDR4_IO_VOLTAGE" value="1.2" />
+ <parameter name="PINS_USAGE_AUTOGEN_WCNT" value="13" />
+ <parameter name="PHY_TARGET_IS_ES" value="false" />
+ <parameter name="DIAG_BYPASS_REPEAT_STAGE" value="true" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_AUTOGEN_WCNT" value="7" />
+ <parameter name="PLL_REF_CLK_FREQ_PS" value="40032" />
+ <parameter name="BOARD_DDR3_USE_DEFAULT_SLEW_RATES" value="true" />
+ <parameter name="PRI_HMC_CFG_WR_TO_PCH" value="21" />
+ <parameter name="PHY_QDR2_USER_PING_PONG_EN" value="false" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_5" value="100.0" />
+ <parameter name="MEM_LPDDR3_NUM_OF_PHYSICAL_RANKS" value="1" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_6" value="100.0" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_3" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_4" value="0.0" />
+ <parameter name="MEM_DDR4_W_ODT0_4X4" value="on,on,off,off" />
+ <parameter name="MEM_DDR4_W_ODT0_4X2" value="off,off,on,on" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_7" value="100.0" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_8" value="100.0" />
+ <parameter name="DIAG_DDR3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
+ <parameter name="PHY_DDR3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_1" value="0.0" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_2" value="0.0" />
+ <parameter name="DIAG_RLD3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
+ <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_0" value="0.0" />
+ <parameter name="PLL_SIM_PHY_CLK_VCO_PHASE_PS" value="105" />
+ <parameter name="CRC_EN" value="crc_disable" />
+ <parameter name="BOARD_RLD3_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="MEM_LPDDR3_TDQSQ_PS" value="135" />
+ <parameter name="PINS_DATA_IN_MODE_1" value="167547401" />
+ <parameter name="PINS_DATA_IN_MODE_0" value="153612873" />
+ <parameter name="PINS_DATA_IN_MODE_3" value="153129545" />
+ <parameter name="PINS_DATA_IN_MODE_2" value="1059357257" />
+ <parameter name="PINS_DATA_IN_MODE_5" value="150736969" />
+ <parameter name="PINS_DATA_IN_MODE_4" value="153391743" />
+ <parameter name="MEM_DDR3_TTL_NUM_OF_LOGICAL_RANKS" value="1" />
+ <parameter name="MEM_QDR4_DINV_PER_PORT_WIDTH" value="2" />
+ <parameter name="MEM_DDR4_MAX_POWERDOWN" value="false" />
+ <parameter name="DIAG_DDR4_SKIP_CA_DESKEW" value="false" />
+ <parameter name="SEC_HMC_CFG_WR_TO_WR_DIFF_BG" value="2" />
+ <parameter name="PORT_MEM_K_WIDTH" value="1" />
+ <parameter name="PHY_RLD2_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="PINS_RATE_7" value="0" />
+ <parameter name="PINS_RATE_6" value="0" />
+ <parameter name="PINS_RATE_9" value="0" />
+ <parameter name="PINS_RATE_8" value="0" />
+ <parameter name="MEM_DDR4_BL_ENUM" value="DDR4_BL_BL8" />
+ <parameter name="PINS_RATE_3" value="0" />
+ <parameter name="PINS_RATE_2" value="955224063" />
+ <parameter name="PRI_HMC_CFG_MPS_ZQCAL_DISABLE" value="disable" />
+ <parameter name="MEM_LPDDR3_TRFC_CYC" value="168" />
+ <parameter name="PINS_RATE_5" value="0" />
+ <parameter name="PINS_RATE_4" value="0" />
+ <parameter name="PHY_DDR3_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
+ <parameter name="MEM_DDR4_LRDIMM_ODT_LESS_BS" value="true" />
+ <parameter name="PINS_RATE_1" value="561774592" />
+ <parameter name="EX_DESIGN_GUI_DDR3_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="PINS_RATE_0" value="1" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_0" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_1" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_2" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_3" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_4" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_5" value="50.0" />
+ <parameter name="CTRL_AUTO_PRECHARGE_EN" value="false" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_6" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_7" value="50.0" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_8" value="50.0" />
+ <parameter name="MEM_LPDDR3_NWR" value="LPDDR3_NWR_NWR12" />
+ <parameter name="MEM_DDR3_TINIT_CK" value="499" />
+ <parameter name="DIAG_EX_DESIGN_ADD_TEST_EMIFS" value="" />
+ <parameter name="MEM_DDR4_TDSS_CYC" value="0.18" />
+ <parameter name="SEC_HMC_CFG_MEM_IF_ROWADDR_WIDTH" value="row_width_15" />
+ <parameter name="NUM_OF_RTL_TILES" value="4" />
+ <parameter name="MEM_RLD2_DQ_PER_WR_GROUP" value="9" />
+ <parameter name="CTRL_LPDDR3_USER_PRIORITY_EN" value="false" />
+ <parameter name="MEM_LPDDR3_SPEEDBIN_ENUM" value="LPDDR3_SPEEDBIN_1600" />
+ <parameter name="DIAG_DDR3_CAL_ADDR1" value="8" />
+ <parameter name="DIAG_DDR3_CAL_ADDR0" value="0" />
+ <parameter name="DIAG_DDR3_ABSTRACT_PHY" value="false" />
+ <parameter name="MEM_RLD3_MR0" value="0" />
+ <parameter name="MEM_DDR4_ADDR_WIDTH" value="17" />
+ <parameter name="MEM_DDR4_RCD_PARITY_CONTROL_WORD" value="13" />
+ <parameter name="CTRL_DDR4_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
+ <parameter name="BOARD_QDR4_SKEW_WITHIN_AC_NS" value="0.0" />
+ <parameter name="MEM_QDR2_THD_NS" value="0.18" />
+ <parameter name="CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC" value="4" />
+ <parameter
+ name="SYS_INFO_UNIQUE_ID"
+ value="ip_arria10_e1sg_ddr4_8g_2400_ddr4_inst" />
+ <parameter name="MEM_RLD3_MR2" value="0" />
+ <parameter name="PORT_CAL_DEBUG_BYTEEN_WIDTH" value="4" />
+ <parameter name="MEM_RLD3_MR1" value="0" />
+ <parameter name="PORT_DFT_NF_PLL_CNTSEL_WIDTH" value="4" />
+ <parameter
+ name="PHY_DDR4_CORE_CLKS_SHARING_ENUM"
+ value="CORE_CLKS_SHARING_DISABLED" />
+ <parameter name="MEM_LPDDR3_TWTR_CYC" value="4" />
+ <parameter name="PHY_AC_CALIBRATED_OCT" value="true" />
+ <parameter name="BOARD_RLD3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
+ <parameter name="MEM_DDR4_CFG_GEN_DBE" value="false" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_4" value="0" />
+ <parameter name="BOARD_LPDDR3_WCLK_SLEW_RATE" value="4.0" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_3" value="0" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_5" value="0" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_0" value="0" />
+ <parameter name="PORT_AFI_CKE_WIDTH" value="1" />
+ <parameter name="MEM_LPDDR3_COL_ADDR_WIDTH" value="10" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_2" value="0" />
+ <parameter name="PORT_MEM_DKB_N_PINLOC_1" value="0" />
+ <parameter name="PORT_MEM_LDA_N_PINLOC_AUTOGEN_WCNT" value="1" />
+ <parameter name="BOARD_QDR2_USER_K_SLEW_RATE" value="4.0" />
+ <parameter name="BOARD_QDR2_SKEW_WITHIN_AC_NS" value="0.0" />
+ <parameter name="PINS_DATA_IN_MODE_24" value="0" />
+ <parameter
+ name="MEM_QDR4_PU_OUTPUT_DRIVE_MODE_ENUM"
+ value="QDR4_OUTPUT_DRIVE_25_PCT" />
+ <parameter name="PINS_DATA_IN_MODE_25" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_26" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_27" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_28" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_29" value="0" />
+ <parameter name="PORT_MEM_A_WIDTH" value="17" />
+ <parameter name="PINS_DATA_IN_MODE_20" value="0" />
+ <parameter name="MEM_RLD3_TIH_DC_MV" value="100" />
+ <parameter name="PINS_DATA_IN_MODE_21" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_22" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_23" value="0" />
+ <parameter name="PORT_MEM_AP_WIDTH" value="1" />
+ <parameter name="PHY_HPS_ENABLE_EARLY_RELEASE" value="false" />
+ <parameter name="MEM_LPDDR3_TDQSS_CYC" value="1.25" />
+ <parameter name="PINS_DATA_IN_MODE_13" value="167547401" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_4" value="0" />
+ <parameter name="MEM_LPDDR3_TDS_AC_MV" value="150" />
+ <parameter name="PINS_DATA_IN_MODE_14" value="1059357257" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_3" value="155" />
+ <parameter name="PINS_DATA_IN_MODE_15" value="37449" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_6" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_16" value="0" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_5" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_17" value="0" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_0" value="24128521" />
+ <parameter name="PINS_DATA_IN_MODE_18" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_19" value="0" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_2" value="150080631" />
+ <parameter name="PORT_MEM_DBI_N_PINLOC_1" value="112245795" />
+ <parameter name="PINS_DATA_IN_MODE_10" value="136614527" />
+ <parameter name="PINS_DATA_IN_MODE_11" value="153395145" />
+ <parameter name="PINS_DATA_IN_MODE_12" value="153612872" />
+ <parameter name="PHY_RLD3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
+ <parameter name="PHY_QDR4_DEFAULT_REF_CLK_FREQ" value="true" />
+ <parameter name="PORT_AFI_RDATA_VALID_WIDTH" value="1" />
+ <parameter name="PHY_QDR2_USER_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_RATE_ENUM" value="RATE_QUARTER" />
+ <parameter name="DLL_CODEWORD" value="0" />
+ <parameter name="DIAG_ENABLE_JTAG_UART_HEX" value="false" />
+ <parameter name="PHY_QDR2_AC_MODE_ENUM" value="unset" />
+ <parameter name="SEC_HMC_CFG_MEM_CLK_DISABLE_ENTRY_CYC" value="15" />
+ <parameter name="BOARD_DDR3_WDATA_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_AC_SLEW_RATE" value="2.0" />
+ <parameter name="PINS_DATA_IN_MODE_35" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_36" value="0" />
+ <parameter name="DIAG_RLD3_TG_DATA_PATTERN_LENGTH" value="8" />
+ <parameter name="PINS_DATA_IN_MODE_37" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_38" value="0" />
+ <parameter name="PORT_MEM_CQ_N_PINLOC_AUTOGEN_WCNT" value="2" />
+ <parameter name="PINS_DATA_IN_MODE_30" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_31" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_32" value="0" />
+ <parameter name="BOARD_DDR3_RDATA_SLEW_RATE" value="2.5" />
+ <parameter name="PINS_DATA_IN_MODE_33" value="0" />
+ <parameter name="PINS_DATA_IN_MODE_34" value="0" />
+ <parameter name="DLL_MODE" value="ctl_dynamic" />
+ <parameter name="PHY_LPDDR3_USER_AC_MODE_ENUM" value="unset" />
+ <parameter name="DIAG_INTERFACE_ID" value="0" />
+ <parameter name="PHY_QDR2_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_LPDDR3_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_SPD_152_DRAM_RTT_PARK" value="39" />
+ <parameter name="MEM_RLD3_DQ_WIDTH" value="36" />
+ <parameter name="PHY_CALIBRATED_OCT" value="true" />
+ <parameter name="PORT_MEM_C_WIDTH" value="1" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_1" value="201326592" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_0" value="0" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_5" value="0" />
+ <parameter name="SEC_HMC_CFG_WB_RESERVED_ENTRY" value="8" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_4" value="0" />
+ <parameter name="MEM_DDR4_AC_PERSISTENT_ERROR" value="false" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_3" value="48" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_2" value="0" />
+ <parameter name="PHY_LPDDR3_REF_CLK_JITTER_PS" value="10.0" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_9" value="0" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_8" value="0" />
+ <parameter name="BOARD_LPDDR3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_7" value="0" />
+ <parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_D_NS" value="0.02" />
+ <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_6" value="0" />
+ <parameter name="PORT_MEM_ACT_N_WIDTH" value="1" />
+ <parameter name="PRI_HMC_CFG_PERIOD_DQSTRK_CTRL_EN" value="disable" />
+ <parameter name="MEM_RLD3_DK_WIDTH" value="2" />
+ <parameter name="PORT_CTRL_USER_REFRESH_BANK_WIDTH" value="16" />
+ <parameter name="MEM_DDR4_W_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="MEM_DDR4_W_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
+ <parameter name="MEM_LPDDR3_W_ODT1_2X2" value="off,on" />
+ <parameter name="MEM_DDR4_TTL_CK_WIDTH" value="2" />
+ <parameter name="PORT_MEM_CKE_PINLOC_1" value="0" />
+ <parameter name="BOARD_LPDDR3_MAX_DQS_DELAY_NS" value="0.6" />
+ <parameter name="PORT_MEM_CKE_PINLOC_0" value="93378562" />
+ <parameter name="PORT_MEM_CKE_PINLOC_5" value="0" />
+ <parameter name="BOARD_LPDDR3_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="PORT_MEM_CKE_PINLOC_4" value="0" />
+ <parameter name="PORT_MEM_CKE_PINLOC_3" value="0" />
+ <parameter name="PORT_MEM_CKE_PINLOC_2" value="0" />
+ <parameter name="PORT_CLKS_SHARING_MASTER_OUT_WIDTH" value="32" />
+ <parameter name="PORT_MEM_K_PINLOC_AUTOGEN_WCNT" value="6" />
+ <parameter name="BOARD_LPDDR3_USER_CK_SLEW_RATE" value="4.0" />
+ <parameter name="MEM_DDR4_DLL_EN" value="true" />
+ <parameter name="MEM_QDR4_QK_WIDTH" value="4" />
+ <parameter name="PHY_RLD3_USER_PING_PONG_EN" value="false" />
+ <parameter name="MEM_DDR4_TDIVW_TOTAL_UI" value="0.2" />
+ <parameter name="PHY_DDR4_DEFAULT_REF_CLK_FREQ" value="false" />
+ <parameter name="BOARD_QDR2_RCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_QDR4_USER_WCLK_SLEW_RATE" value="4.0" />
+ <parameter name="PINS_DB_OUT_BYPASS_6" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_7" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_8" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_9" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_2" value="955224063" />
+ <parameter name="BOARD_QDR2_AC_ISI_NS" value="0.0" />
+ <parameter name="EX_DESIGN_GUI_LPDDR3_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
+ <parameter name="PINS_DB_OUT_BYPASS_3" value="48" />
+ <parameter name="PINS_DB_OUT_BYPASS_4" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_5" value="0" />
+ <parameter name="PORT_MEM_ALERT_N_PINLOC_0" value="1" />
+ <parameter name="PHY_RLD3_MEM_CLK_FREQ_MHZ" value="1066.667" />
+ <parameter name="PORT_MEM_ALERT_N_PINLOC_1" value="0" />
+ <parameter name="PINS_DB_OUT_BYPASS_0" value="1" />
+ <parameter name="PINS_DB_OUT_BYPASS_1" value="763101184" />
+ <parameter name="DIAG_DDR4_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
+ <parameter name="DIAG_RLD2_EX_DESIGN_SEPARATE_RZQS" value="false" />
+ <parameter name="DIAG_RLD3_BYPASS_STRESS_STAGE" value="true" />
+ <parameter name="MEM_DDR3_TRRD_CYC" value="6" />
+ <parameter name="DIAG_TIMING_REGTEST_MODE" value="false" />
+ <parameter name="PORT_MEM_DQB_PINLOC_48" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_47" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_46" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_45" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_44" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_43" value="0" />
+ <parameter name="PORT_MEM_DQB_PINLOC_42" value="0" />
+ <parameter name="PRI_HMC_CFG_SRF_ZQCAL_DISABLE" value="disable" />
+ <parameter name="MEM_DDR4_SPD_134_RCD_DB_VENDOR_MSB" value="0" />
+ <parameter name="PHY_PERIODIC_OCT_RECAL" value="false" />
+ <parameter name="MEM_QDR4_DATA_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
+ <parameter name="PHY_QDR2_USER_AC_IO_STD_ENUM" value="unset" />
+ <parameter name="SEC_HMC_CFG_DQS_TRACKING_EN" value="disable" />
+ <parameter name="MEM_DDR4_TRRD_DLR_CYC" value="4" />
+ <parameter name="LANES_PER_TILE" value="4" />
+ <parameter name="PHY_RLD3_IO_VOLTAGE" value="1.2" />
+ <parameter name="BOARD_DDR3_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
+ <parameter name="MEM_LPDDR3_DISCRETE_CS_WIDTH" value="1" />
+ <parameter name="MEM_QDR4_QK_PER_PORT_WIDTH" value="2" />
+ <parameter name="MEM_RLD3_DM_WIDTH" value="2" />
+ <parameter name="MEM_DDR3_W_ODT2_4X4" value="off,off,on,on" />
+ <parameter name="PHY_DDR3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="BOARD_QDR4_USE_DEFAULT_SLEW_RATES" value="true" />
- <parameter name="SEC_HMC_CFG_WR_TO_WR_DIFF_CHIP" value="3" />
- <parameter name="CTRL_QDR4_WAR_TURNAROUND_DELAY_CYC" value="11" />
<parameter name="PHY_DDR4_DATA_IN_MODE_ENUM" value="IN_OCT_120_CAL" />
- <parameter name="DIAG_QDR2_EX_DESIGN_ISSP_EN" value="true" />
<parameter name="MEM_DDR4_RTT_PARK" value="DDR4_RTT_PARK_ODT_DISABLED" />
- <parameter name="PHY_QDR2_STARTING_VREFIN" value="70.0" />
- <parameter name="DIAG_DDR3_BYPASS_DEFAULT_PATTERN" value="false" />
- <parameter name="MEM_QDR4_USE_ADDR_PARITY" value="false" />
- <parameter name="MEM_DDR3_NUM_OF_PHYSICAL_RANKS" value="1" />
<parameter name="MEM_DDR3_W_ODTN_2X2" value="Rank 0,Rank 1" />
<parameter name="BOARD_QDR2_USER_RCLK_SLEW_RATE" value="2.0" />
- <parameter name="DIAG_EX_DESIGN_SEPARATE_RESETS" value="false" />
<parameter name="SEC_HMC_CFG_DDR4_MPS_ADDR_MIRROR" value="0" />
- <parameter name="SEC_HMC_CFG_TCL" value="18" />
<parameter name="PHY_RLD3_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="BOARD_QDR4_USER_WCLK_ISI_NS" value="0.0" />
<parameter name="MEM_LPDDR3_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
<parameter name="BOARD_QDR2_RDATA_ISI_NS" value="0.0" />
- <parameter name="DIAG_VERBOSE_IOAUX" value="false" />
<parameter name="PORT_AFI_BWS_N_WIDTH" value="1" />
<parameter name="PHY_DDR4_RZQ_IO_STD_ENUM" value="IO_STD_CMOS_12" />
- <parameter name="MEM_LPDDR3_TQH_CYC" value="0.38" />
<parameter name="MEM_RLD2_DK_WIDTH" value="1" />
<parameter name="EX_DESIGN_GUI_DDR3_GEN_SYNTH" value="true" />
<parameter name="PORT_MEM_CKE_WIDTH" value="2" />
<parameter name="CTRL_QDR4_ADD_WAR_TURNAROUND_DELAY_CYC" value="0" />
- <parameter name="PORT_MEM_Q_WIDTH" value="1" />
- <parameter name="PORT_MEM_RPS_N_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter
name="CTRL_RLD3_ADDR_ORDER_ENUM"
value="RLD3_CTRL_ADDR_ORDER_CS_R_B_C" />
- <parameter name="MEM_RLD2_TCKH_CYC" value="0.45" />
- <parameter name="MEM_DDR3_TIS_PS" value="60" />
- <parameter name="MEM_DDR3_TIH_PS" value="95" />
<parameter name="MEM_READ_LATENCY" value="18.0" />
<parameter name="CTRL_LPDDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="PHY_RLD3_USER_DATA_IO_STD_ENUM" value="unset" />
<parameter name="PHY_DDR3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="MEM_DDR4_TCCD_S_CYC" value="4" />
<parameter name="PORT_MEM_DQS_PINLOC_8" value="0" />
<parameter name="PHY_DDR3_USER_DATA_IO_STD_ENUM" value="unset" />
<parameter name="PORT_MEM_DQS_PINLOC_7" value="0" />
@@ -2051,35 +3635,19 @@
<parameter name="MEM_DDR3_TTL_ADDR_WIDTH" value="1" />
<parameter name="PINS_C2L_DRIVEN_8" value="0" />
<parameter name="PINS_C2L_DRIVEN_9" value="0" />
- <parameter name="PHY_DDR3_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="MEM_LPDDR3_ROW_ADDR_WIDTH" value="15" />
<parameter name="MEM_RLD2_DQ_PER_RD_GROUP" value="9" />
- <parameter name="PORT_MEM_RM_WIDTH" value="1" />
<parameter name="BOARD_DDR4_SKEW_WITHIN_AC_NS" value="0.18" />
<parameter name="SILICON_REV" value="20nm5" />
<parameter name="PRI_HMC_CFG_SLOT_ROTATE_EN" value="0" />
- <parameter name="PHY_LPDDR3_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_LPDDR3_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PHY_RLD3_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="BOARD_RLD3_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="PINS_INVERT_OE_12" value="0" />
<parameter name="PRI_HMC_CFG_MEM_IF_BANKADDR_WIDTH" value="bank_width_2" />
<parameter name="PINS_INVERT_OE_10" value="0" />
<parameter name="PINS_INVERT_OE_11" value="0" />
<parameter name="SEC_HMC_CFG_MEM_IF_BGADDR_WIDTH" value="bg_width_2" />
- <parameter name="DIAG_FAST_SIM" value="true" />
- <parameter
- name="PHY_QDR2_USER_PERIODIC_OCT_RECAL_ENUM"
- value="PERIODIC_OCT_RECAL_AUTO" />
- <parameter
- name="MEM_DDR4_FINE_GRANULARITY_REFRESH"
- value="DDR4_FINE_REFRESH_FIXED_1X" />
- <parameter name="PHY_DDR3_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="MEM_RLD2_MR" value="0" />
- <parameter name="PLL_ADD_EXTRA_CLKS" value="false" />
<parameter name="PINS_C2L_DRIVEN_0" value="251457486" />
<parameter name="PINS_C2L_DRIVEN_1" value="259007" />
- <parameter name="PHY_QDR4_AC_IO_STD_ENUM" value="unset" />
<parameter name="PINS_C2L_DRIVEN_2" value="0" />
<parameter name="PINS_C2L_DRIVEN_3" value="1060893568" />
<parameter name="PINS_C2L_DRIVEN_4" value="251457486" />
@@ -2089,38 +3657,18 @@
<parameter name="PLL_SIM_PHYCLK_0_FREQ_PS" value="1680" />
<parameter name="MEM_DDR4_MPR_READ_FORMAT" value="DDR4_MPR_READ_FORMAT_SERIAL" />
<parameter name="PHY_QDR4_IO_VOLTAGE" value="1.2" />
- <parameter name="PHY_RLD3_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="PORT_DFT_NF_CORE_CLK_BUF_OUT_WIDTH" value="2" />
- <parameter name="MEM_DDR4_VREFDQ_TRAINING_VALUE" value="60.0" />
- <parameter name="PHY_DDR4_PLL_REF_CLK_IO_STD_ENUM" value="IO_STD_LVDS" />
- <parameter name="PHY_RLD3_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PRI_HMC_CFG_ACT_TO_ACT" value="29" />
- <parameter name="BOARD_DDR4_TIS_DERATING_PS" value="0" />
- <parameter name="DIAG_TG_BE_PATTERN_LENGTH" value="8" />
- <parameter name="MEM_DDR4_TWTR_L_CYC" value="4" />
- <parameter name="MEM_DDR3_R_ODT1_4X4" value="off,off,on,on" />
+ <parameter name="MEM_DDR4_VREFDQ_TRAINING_VALUE" value="60.0" />
+ <parameter name="PHY_RLD3_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="DIAG_DDR4_BYPASS_USER_STAGE" value="true" />
<parameter name="PHY_LPDDR3_USER_STARTING_VREFIN" value="70.0" />
- <parameter name="MEM_DDR3_R_ODT1_4X2" value="on,on,off,off" />
- <parameter name="BOARD_DDR4_CK_SLEW_RATE" value="4.0" />
- <parameter name="PORT_MEM_QK_N_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="DIAG_DDR4_CAL_ENABLE_NON_DES" value="false" />
- <parameter name="PHY_RLD2_DATA_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR3_WTCL" value="6" />
- <parameter name="BOARD_DDR3_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="MEM_DDR3_W_ODT0_2X2" value="on,on" />
- <parameter name="MEM_DDR4_PER_DRAM_ADDR" value="false" />
- <parameter name="PORT_DFT_NF_PA_DPRIO_READDATA_WIDTH" value="8" />
- <parameter name="MEM_DDR3_MIRROR_ADDRESSING_EN" value="false" />
- <parameter name="BOARD_LPDDR3_USER_RDATA_SLEW_RATE" value="2.0" />
<parameter name="PORT_MEM_RM_PINLOC_3" value="0" />
<parameter name="PORT_MEM_RM_PINLOC_2" value="0" />
<parameter name="PORT_MEM_RM_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_DBI_N_WIDTH" value="9" />
- <parameter name="BOARD_DDR3_USER_CK_SLEW_RATE" value="2.0" />
<parameter name="PORT_MEM_RM_PINLOC_0" value="0" />
<parameter name="PORT_MEM_RM_PINLOC_5" value="0" />
- <parameter name="PORT_MEM_CFG_N_WIDTH" value="1" />
<parameter name="MEM_QDR4_TCKQK_MAX_PS" value="225" />
<parameter name="PORT_MEM_RM_PINLOC_4" value="0" />
<parameter name="PORT_MEM_DQS_PINLOC_0" value="16781321" />
@@ -2129,129 +3677,65 @@
<parameter name="SEC_HMC_CFG_GEAR_DOWN_EN" value="disable" />
<parameter name="PORT_MEM_DINVA_WIDTH" value="1" />
<parameter name="PORT_MEM_DQS_PINLOC_1" value="104898588" />
- <parameter name="SEC_HMC_CFG_SLOT_ROTATE_EN" value="0" />
- <parameter name="PHY_TARGET_IS_ES3" value="false" />
<parameter name="MEM_LPDDR3_W_ODT3_4X4" value="off,off,off,off" />
- <parameter name="PHY_TARGET_IS_ES2" value="false" />
<parameter name="PHY_DDR4_MEM_CLK_FREQ_MHZ" value="1200.0" />
- <parameter name="PHY_LPDDR3_USER_CK_IO_STD_ENUM" value="unset" />
- <parameter name="BOARD_QDR2_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="PORT_AFI_RDATA_DBI_N_WIDTH" value="1" />
<parameter name="MEM_DDR4_COL_ADDR_WIDTH" value="10" />
- <parameter name="DIAG_LPDDR3_INFI_TG2_ERR_TEST" value="false" />
<parameter name="DIAG_QDR2_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
<parameter name="BOARD_LPDDR3_RCLK_SLEW_RATE" value="4.0" />
<parameter name="PHY_LPDDR3_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="DIAG_DDR4_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="PHY_DDR4_HPS_ENABLE_EARLY_RELEASE" value="false" />
- <parameter name="MEM_LPDDR3_SEQ_ODT_TABLE_HI" value="0" />
<parameter name="DIAG_DDR4_TG_BE_PATTERN_LENGTH" value="8" />
<parameter name="CTRL_DDR3_ECC_AUTO_CORRECTION_EN" value="false" />
<parameter name="EX_DESIGN_GUI_RLD2_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
<parameter name="MEM_LPDDR3_R_ODT1_4X4" value="off,off,off,off" />
- <parameter name="DIAG_LPDDR3_INTERFACE_ID" value="0" />
- <parameter name="BOARD_LPDDR3_IS_SKEW_WITHIN_DQS_DESKEWED" value="false" />
<parameter name="BOARD_DDR4_MAX_DQS_DELAY_NS" value="0.6" />
<parameter name="BOARD_RLD3_SKEW_BETWEEN_DK_NS" value="0.02" />
- <parameter name="MEM_RLD2_TCKDK_MIN_NS" value="-0.3" />
- <parameter name="MEM_QDR2_DATA_PER_DEVICE" value="36" />
- <parameter name="SEC_HMC_CFG_ZQCS_TO_VALID" value="65" />
<parameter name="BOARD_DDR3_AC_TO_CK_SKEW_NS" value="0.0" />
<parameter name="SEC_HMC_CFG_ACT_TO_ACT" value="29" />
<parameter name="PORT_CTRL_MMR_SLAVE_RDATA_WIDTH" value="32" />
<parameter name="PHY_HMC_CLK_RATIO" value="2" />
<parameter name="BOARD_LPDDR3_RDATA_ISI_NS" value="0.0" />
- <parameter name="BOARD_QDR4_USER_WDATA_ISI_NS" value="0.0" />
<parameter name="CTRL_DDR4_USER_REFRESH_EN" value="false" />
- <parameter name="MEM_DDR3_R_ODTN_2X2" value="Rank 0,Rank 1" />
<parameter name="PORT_MEM_CAS_N_WIDTH" value="1" />
<parameter name="MEM_LPDDR3_DATA_LATENCY" value="LPDDR3_DL_RL12_WL6" />
<parameter name="BOARD_RLD3_RCLK_ISI_NS" value="0.0" />
- <parameter name="EX_DESIGN_GUI_RLD2_GEN_SYNTH" value="true" />
<parameter name="MEM_DDR3_AC_PAR_EN" value="false" />
- <parameter name="C2P_P2C_CLK_RATIO" value="4" />
- <parameter name="SEC_HMC_CFG_WR_TO_RD_DIFF_BG" value="16" />
- <parameter name="SEQ_SIM_CPU_CLK_DIVIDE" value="1" />
- <parameter name="DIAG_DDR4_SKIP_VREF_CAL" value="true" />
- <parameter name="MEM_LPDDR3_TDQSCK_PS" value="5500" />
- <parameter name="BOARD_QDR4_AC_TO_CK_SKEW_NS" value="0.0" />
<parameter name="MEM_QDR4_SPEEDBIN_ENUM" value="QDR4_SPEEDBIN_2133" />
<parameter name="MEM_QDR4_AC_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
- <parameter name="NUM_OF_HMC_PORTS" value="1" />
<parameter name="DIAG_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="PRI_HMC_CFG_ENABLE_ECC" value="disable" />
<parameter name="PHY_LPDDR3_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="PRI_HMC_CFG_RD_TO_RD_DIFF_BG" value="2" />
<parameter name="SEC_HMC_CFG_REORDER_DATA" value="enable" />
- <parameter name="MEM_DDR3_RANKS_PER_DIMM" value="1" />
<parameter name="MEM_DDR4_DB_DQ_DRV_ENUM" value="DDR4_DB_DRV_STR_RZQ_7" />
- <parameter name="MEM_DDR3_TDSS_CYC" value="0.18" />
- <parameter name="SEC_HMC_CFG_SLOT_OFFSET" value="2" />
- <parameter name="BOARD_DDR4_SKEW_BETWEEN_DQS_NS" value="0.02" />
<parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_AUTOGEN_WCNT" value="13" />
<parameter name="MEM_DDR3_TREFI_US" value="7.8" />
<parameter name="DIAG_QDR4_EX_DESIGN_SEPARATE_RZQS" value="false" />
- <parameter name="SEC_HMC_CFG_MRS_TO_VALID" value="7" />
- <parameter name="MEM_DDR4_TWLH_PS" value="122.0" />
<parameter name="PLL_N_CNT_HIGH" value="256" />
- <parameter name="MEM_DDR3_TDSH_CYC" value="0.18" />
- <parameter name="BOARD_RLD3_DK_TO_CK_SKEW_NS" value="-0.02" />
- <parameter name="DIAG_DDR4_TG_DATA_PATTERN_LENGTH" value="8" />
- <parameter name="PORT_MEM_CFG_N_PINLOC_0" value="0" />
- <parameter name="DIAG_RLD3_EX_DESIGN_ISSP_EN" value="true" />
- <parameter name="PORT_CAL_DEBUG_WDATA_WIDTH" value="32" />
- <parameter name="MEM_QDR4_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
<parameter name="DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES" value="1" />
- <parameter name="CTRL_DDR4_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="CTRL_QDR2_AVL_MAX_BURST_COUNT" value="4" />
- <parameter name="PHY_QDR2_USER_DATA_IO_STD_ENUM" value="unset" />
<parameter name="PORT_MEM_QKB_N_PINLOC_0" value="0" />
<parameter name="PORT_MEM_QKB_N_PINLOC_1" value="0" />
- <parameter name="SEC_HMC_CFG_READ_ODT_CHIP" value="0" />
<parameter name="PORT_MEM_QKB_N_PINLOC_2" value="0" />
<parameter name="PORT_MEM_QKB_N_PINLOC_3" value="0" />
<parameter name="PORT_MEM_QKB_N_PINLOC_4" value="0" />
<parameter name="MEM_DDR4_CTRL_CFG_WRITE_ODT_CHIP" value="33" />
<parameter name="PORT_MEM_QKB_N_PINLOC_5" value="0" />
<parameter name="MEM_DDR4_LRDIMM_ODT_LESS_BS_PARK_OHM" value="240" />
- <parameter name="MEM_LPDDR3_SEQ_ODT_TABLE_LO" value="0" />
<parameter name="PHY_RLD3_USER_CK_MODE_ENUM" value="unset" />
- <parameter
- name="CTRL_DDR3_ADDR_ORDER_ENUM"
- value="DDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
<parameter name="SEQ_SYNTH_CAL_CLK_DIVIDE" value="8" />
<parameter name="PINS_DB_IN_BYPASS_AUTOGEN_WCNT" value="13" />
- <parameter name="EX_DESIGN_GUI_DDR3_GEN_SIM" value="true" />
- <parameter name="SEC_HMC_CFG_DQSTRK_TO_VALID" value="3" />
- <parameter name="MEM_DDR4_TWLS_PS" value="122.0" />
- <parameter name="EX_DESIGN_GUI_RLD2_GEN_SIM" value="true" />
- <parameter name="PRI_RDATA_TILE_INDEX" value="0" />
<parameter name="MEM_DDR4_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
<parameter name="PHY_DDR3_USER_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="PHY_QDR4_HPS_ENABLE_EARLY_RELEASE" value="false" />
- <parameter name="DIAG_DDR4_BYPASS_STRESS_STAGE" value="true" />
<parameter name="PRI_HMC_CFG_SRF_ENTRY_EXIT_BLOCK" value="presrfexit" />
- <parameter name="SEC_HMC_CFG_ENABLE_ECC" value="disable" />
- <parameter name="DIAG_QDR2_INTERFACE_ID" value="0" />
<parameter name="MEM_DDR3_TFAW_CYC" value="27" />
- <parameter name="BOARD_QDR2_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="PRI_AC_TILE_INDEX" value="1" />
- <parameter name="MEM_LPDDR3_PDODT" value="LPDDR3_PDODT_DISABLED" />
- <parameter name="BOARD_QDR4_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
<parameter name="PRI_HMC_CFG_SLOT_OFFSET" value="2" />
<parameter name="PRI_HMC_CFG_OPEN_PAGE_EN" value="enable" />
<parameter name="CTRL_DDR3_USER_PRIORITY_EN" value="false" />
- <parameter name="MEM_DDR3_SPEEDBIN_ENUM" value="DDR3_SPEEDBIN_2133" />
- <parameter name="PRI_HMC_CFG_PCH_TO_VALID" value="9" />
<parameter name="MEM_DDR4_TQSH_CYC" value="0.38" />
<parameter name="DIAG_TG_AVL_2_EXPORT_CFG_INTERFACE" value="false" />
<parameter name="PORT_CTRL_AMM_WDATA_WIDTH" value="576" />
- <parameter name="LANES_USAGE_1" value="365" />
- <parameter name="LANES_USAGE_0" value="757373805" />
<parameter name="PHY_DDR3_HPS_ENABLE_EARLY_RELEASE" value="false" />
- <parameter name="MEM_DDR4_DISCRETE_CS_WIDTH" value="1" />
- <parameter name="LANES_USAGE_3" value="0" />
- <parameter name="LANES_USAGE_2" value="0" />
<parameter name="PORT_MEM_DM_PINLOC_1" value="0" />
<parameter name="PORT_MEM_DM_PINLOC_0" value="0" />
<parameter name="PORT_MEM_DM_PINLOC_3" value="0" />
@@ -2260,8 +3744,6 @@
<parameter name="PORT_MEM_DM_PINLOC_4" value="0" />
<parameter name="CTRL_DDR3_MMR_EN" value="false" />
<parameter name="MEM_DDR4_TRFC_DLR_NS" value="90.0" />
- <parameter name="MEM_DDR3_R_ODT0_2X2" value="off,on" />
- <parameter name="MEM_LPDDR3_TRRD_CYC" value="2" />
<parameter name="PRI_HMC_CFG_ACT_TO_RDWR" value="8" />
<parameter name="PORT_AFI_CA_WIDTH" value="1" />
<parameter name="PHY_DDR4_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
@@ -2271,24 +3753,16 @@
<parameter name="PORT_MEM_DM_PINLOC_6" value="0" />
<parameter name="PORT_MEM_DM_PINLOC_9" value="0" />
<parameter name="PORT_MEM_DM_PINLOC_8" value="0" />
- <parameter name="PORT_MEM_RAS_N_PINLOC_0" value="0" />
- <parameter name="PORT_MEM_LDB_N_PINLOC_0" value="0" />
<parameter name="PLL_M_CNT_LOW" value="24" />
<parameter name="PHY_QDR2_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="PORT_MEM_RAS_N_PINLOC_1" value="0" />
- <parameter
- name="DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE"
- value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
<parameter name="DIAG_RLD3_INFI_TG2_ERR_TEST" value="false" />
<parameter name="PHY_QDR2_DEFAULT_IO" value="true" />
- <parameter name="MEM_DDR3_TTL_DM_WIDTH" value="1" />
<parameter name="PORT_MEM_D_PINLOC_4" value="0" />
<parameter name="PHY_RLD2_CONFIG_ENUM" value="CONFIG_PHY_AND_SOFT_CTRL" />
<parameter name="PORT_MEM_D_PINLOC_3" value="0" />
<parameter name="PORT_MEM_D_PINLOC_2" value="0" />
<parameter name="PORT_MEM_D_PINLOC_1" value="0" />
- <parameter name="PHY_TARGET_SPEEDGRADE" value="E1" />
<parameter name="PHY_RLD3_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="MEM_DDR3_ATCL_ENUM" value="DDR3_ATCL_DISABLED" />
<parameter name="PORT_MEM_D_PINLOC_8" value="0" />
@@ -2299,10 +3773,7 @@
<parameter name="MEM_RLD2_DEVICE_DEPTH" value="1" />
<parameter name="PORT_MEM_D_PINLOC_9" value="0" />
<parameter name="PHY_LPDDR3_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="CENTER_TIDS_1" value="3" />
<parameter name="MEM_DDR3_TTL_NUM_OF_DIMMS" value="1" />
- <parameter name="MEM_DDR4_DISCRETE_MIRROR_ADDRESSING_EN" value="false" />
- <parameter name="CENTER_TIDS_2" value="0" />
<parameter name="MEM_RLD2_DEVICE_WIDTH" value="1" />
<parameter name="EX_DESIGN_GUI_DDR3_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
<parameter name="PHY_LPDDR3_USER_AC_IO_STD_ENUM" value="unset" />
@@ -2310,127 +3781,55 @@
<parameter name="MEM_DDR3_CFG_GEN_SBE" value="false" />
<parameter name="HMC_TIDS_1" value="3" />
<parameter name="HMC_TIDS_0" value="676600325" />
- <parameter name="BOARD_QDR4_MAX_DK_DELAY_NS" value="0.6" />
- <parameter name="MEM_DDR3_TTL_CS_WIDTH" value="1" />
- <parameter name="PORT_MEM_D_PINLOC_AUTOGEN_WCNT" value="49" />
- <parameter name="PHY_CORE_CLKS_SHARING_ENUM" value="CORE_CLKS_SHARING_DISABLED" />
<parameter name="PHY_QDR2_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="MEM_HAS_SIM_SUPPORT" value="true" />
- <parameter name="MEM_QDR2_WIDTH_EXPANDED" value="false" />
- <parameter name="CENTER_TIDS_0" value="542119940" />
<parameter name="HMC_TIDS_2" value="0" />
<parameter name="MEM_LPDDR3_R_ODT0_2X2" value="off,off" />
- <parameter name="MEM_DDR4_TTL_DQ_WIDTH" value="72" />
<parameter name="PORT_AFI_BG_WIDTH" value="1" />
<parameter name="MEM_DDR4_SPEEDBIN_ENUM" value="DDR4_SPEEDBIN_2400" />
<parameter name="CTRL_LPDDR3_SELF_REFRESH_EN" value="false" />
<parameter name="BOARD_RLD3_SKEW_WITHIN_AC_NS" value="0.0" />
<parameter name="SEC_HMC_CFG_RD_ODT_ON" value="0" />
<parameter name="PORT_MEM_D_PINLOC_0" value="0" />
- <parameter name="PLL_M_CNT_EVEN_DUTY_EN" value="false" />
- <parameter name="PHY_LPDDR3_HPS_ENABLE_EARLY_RELEASE" value="false" />
<parameter name="PORT_MEM_DOFF_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="PORT_MEM_DQ_PINLOC_9" value="45131815" />
- <parameter name="PORT_MEM_DQ_PINLOC_8" value="39883810" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_110" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_7" value="34635807" />
- <parameter name="MEM_LPDDR3_TDSS_CYC" value="0.2" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_111" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_6" value="31484954" />
- <parameter name="EX_DESIGN_GUI_QDR4_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_112" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_5" value="26236949" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_113" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_4" value="20990994" />
<parameter name="DIAG_EXPORT_SEQ_AVALON_MASTER" value="false" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_114" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_3" value="15742989" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_115" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_2" value="10494984" />
- <parameter name="PORT_MEM_DQ_PINLOC_1" value="7346179" />
- <parameter name="PORT_MEM_DQ_PINLOC_0" value="2098248" />
- <parameter name="CTRL_DDR4_AUTO_PRECHARGE_EN" value="false" />
<parameter name="PHY_DDR3_CK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_DDR3_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="PORT_AFI_WDATA_DBI_N_WIDTH" value="1" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_116" value="0" />
<parameter name="PORT_MEM_C_PINLOC_1" value="0" />
<parameter name="MEM_LPDDR3_DQODT" value="LPDDR3_DQODT_DISABLE" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_117" value="0" />
- <parameter name="SEC_HMC_CFG_MRR_TO_VALID" value="0" />
<parameter name="PORT_MEM_C_PINLOC_0" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_118" value="0" />
<parameter name="PORT_MEM_C_PINLOC_3" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_119" value="0" />
<parameter name="PORT_MEM_C_PINLOC_2" value="0" />
<parameter name="MEM_LPDDR3_TREFI_US" value="3.9" />
<parameter name="PORT_MEM_C_PINLOC_5" value="0" />
<parameter name="PORT_MEM_C_PINLOC_4" value="0" />
<parameter name="MEM_RLD3_TIS_AC_MV" value="150" />
- <parameter name="PLL_VCO_TO_MEM_CLK_FREQ_RATIO" value="1" />
- <parameter name="MEM_DDR4_R_ODT0_2X2" value="off,on" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_120" value="0" />
<parameter name="PHY_DDR3_CAL_ADDR1" value="8" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_121" value="0" />
<parameter name="PHY_DDR3_CAL_ADDR0" value="0" />
<parameter name="MEM_RLD2_TWL" value="9" />
<parameter name="MEM_LPDDR3_TDH_DC_MV" value="100" />
<parameter name="BOARD_DDR3_USER_RDATA_ISI_NS" value="0.063" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_122" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_123" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_124" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_125" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_126" value="0" />
<parameter name="MEM_DDR4_ATCL_ENUM" value="DDR4_ATCL_DISABLED" />
<parameter name="BOARD_DDR3_USER_AC_ISI_NS" value="0.094" />
- <parameter name="PHY_DDR4_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
- <parameter name="EX_DESIGN_GUI_DDR4_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
- <parameter name="MEM_LPDDR3_W_ODT0_1X1" value="on" />
<parameter name="SEC_HMC_CFG_POWER_SAVING_EXIT_CYC" value="3" />
<parameter name="SEQ_SIM_CAL_CLK_DIVIDE" value="32" />
<parameter name="MEM_LPDDR3_R_ODT0_1X1" value="off" />
<parameter name="PHY_DDR3_CK_MODE_ENUM" value="unset" />
<parameter name="MEM_DDR4_SPD_140_DRAM_VREFDQ_R0" value="29" />
<parameter name="HMC_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="PLL_C_CNT_PRST_0" value="1" />
- <parameter name="PLL_C_CNT_PRST_1" value="1" />
<parameter name="PHY_DDR3_MEM_CLK_FREQ_MHZ" value="1066.667" />
<parameter name="MEM_QDR2_SPEEDBIN_ENUM" value="QDR2_SPEEDBIN_633" />
- <parameter name="PLL_C_CNT_PRST_2" value="1" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_127" value="0" />
- <parameter name="PORT_MEM_DK_N_PINLOC_0" value="0" />
- <parameter name="PLL_C_CNT_PRST_3" value="1" />
<parameter
name="MEM_RLD2_DRIVE_IMPEDENCE_ENUM"
value="RLD2_DRIVE_IMPEDENCE_INTERNAL_50" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_128" value="0" />
- <parameter name="PLL_C_CNT_PRST_4" value="1" />
- <parameter name="PORT_MEM_DK_N_PINLOC_2" value="0" />
- <parameter name="PLL_C_CNT_PRST_5" value="1" />
- <parameter name="MEM_DDR3_CTRL_CFG_READ_ODT_CHIP" value="0" />
- <parameter name="PORT_MEM_DK_N_PINLOC_1" value="0" />
<parameter name="PORT_DFT_NF_PA_DPRIO_REG_ADDR_WIDTH" value="9" />
- <parameter name="PLL_C_CNT_PRST_6" value="1" />
- <parameter name="PLL_C_CNT_PRST_7" value="1" />
- <parameter name="DIAG_RLD2_ABSTRACT_PHY" value="false" />
- <parameter name="PLL_C_CNT_PRST_8" value="1" />
<parameter name="PHY_DDR3_USER_CK_IO_STD_ENUM" value="unset" />
- <parameter name="PHY_LPDDR3_AC_MODE_ENUM" value="unset" />
<parameter name="BOARD_DDR4_USER_AC_ISI_NS" value="0.094" />
- <parameter name="PRI_HMC_CFG_ACT_TO_ACT_DIFF_BG" value="2" />
- <parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_NUM_OF_LOGICAL_RANKS" value="2" />
- <parameter name="PORT_MEM_DK_N_PINLOC_4" value="0" />
- <parameter name="PORT_MEM_DK_N_PINLOC_3" value="0" />
- <parameter name="PORT_MEM_DK_N_PINLOC_5" value="0" />
<parameter name="PHY_QDR2_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="EX_DESIGN_GUI_QDR4_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
<parameter name="MEM_DDR3_TFAW_NS" value="25.0" />
- <parameter name="BOARD_LPDDR3_WCLK_ISI_NS" value="0.0" />
<parameter name="PORT_MEM_WPS_N_PINLOC_0" value="0" />
<parameter name="PRI_RDATA_LANE_INDEX" value="0" />
- <parameter name="EX_DESIGN_GUI_QDR2_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
- <parameter name="MEM_DDR3_DM_WIDTH" value="1" />
<parameter name="PHY_RLD2_USER_AC_MODE_ENUM" value="unset" />
<parameter name="PORT_AFI_DQS_BURST_WIDTH" value="1" />
<parameter name="PORT_MEM_DKB_PINLOC_0" value="0" />
@@ -2440,62 +3839,30 @@
<parameter name="PINS_OCT_MODE_12" value="0" />
<parameter name="PORT_MEM_DKB_PINLOC_2" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_48" value="0" />
- <parameter name="BOARD_LPDDR3_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter name="PINS_OCT_MODE_11" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_100" value="0" />
<parameter name="PORT_MEM_DKB_PINLOC_3" value="0" />
<parameter name="PINS_OCT_MODE_10" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_101" value="0" />
<parameter name="PORT_MEM_DKB_PINLOC_4" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_102" value="0" />
<parameter name="PORT_MEM_DKB_PINLOC_5" value="0" />
<parameter name="MEM_RLD3_QK_WIDTH" value="4" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_103" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_104" value="0" />
- <parameter name="PHY_QDR2_CONFIG_ENUM" value="CONFIG_PHY_AND_SOFT_CTRL" />
<parameter name="BOARD_RLD3_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="PHY_DDR3_USER_CK_MODE_ENUM" value="unset" />
<parameter name="PHY_QDR4_CONFIG_ENUM" value="CONFIG_PHY_AND_SOFT_CTRL" />
- <parameter name="SEQ_SYNTH_OSC_FREQ_MHZ" value="450" />
- <parameter name="PRI_HMC_CFG_SRF_TO_VALID" value="513" />
<parameter name="PORT_MEM_DKA_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="FAMILY_ENUM" value="FAMILY_ARRIA10" />
- <parameter name="MEM_LPDDR3_CTRL_CFG_READ_ODT_RANK" value="0" />
<parameter name="PHY_DDR3_STARTING_VREFIN" value="70.0" />
<parameter name="MEM_RLD2_ADDR_WIDTH" value="21" />
- <parameter name="DIAG_BOARD_DELAY_CONFIG_STR" value="" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_105" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_106" value="0" />
<parameter name="MEM_LPDDR3_TRP_NS" value="18.75" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_107" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_108" value="0" />
- <parameter name="MEM_DDR3_SEQ_ODT_TABLE_HI" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_109" value="0" />
<parameter name="MEM_DDR3_R_ODT3_4X4" value="on,on,off,off" />
- <parameter name="BOARD_LPDDR3_USER_AC_ISI_NS" value="0.0" />
<parameter name="CTRL_DDR3_AUTO_PRECHARGE_EN" value="false" />
- <parameter name="PHY_LPDDR3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="CTRL_LPDDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
- <parameter name="PHY_RLD2_REF_CLK_JITTER_PS" value="10.0" />
- <parameter name="DIAG_CPA_OUT_1_EN" value="false" />
- <parameter name="INTERNAL_TESTING_MODE" value="false" />
<parameter name="BOARD_RLD3_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="PHY_DDR3_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="MEM_RLD3_BL" value="2" />
<parameter name="MEM_RLD3_TIS_PS" value="85" />
- <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER" value="true" />
<parameter name="SEC_HMC_CFG_SHORT_DQSTRK_CTRL_EN" value="disable" />
- <parameter name="MEM_DDR4_TCL" value="18" />
- <parameter name="BOARD_LPDDR3_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_LPDDR3_DQS_TO_CK_SKEW_NS" value="0.02" />
<parameter name="PORT_MEM_QK_WIDTH" value="1" />
<parameter name="BOARD_DDR3_USER_RDATA_SLEW_RATE" value="2.5" />
- <parameter name="BOARD_DDR3_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
<parameter name="PHY_RLD2_USER_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="PORT_MEM_Q_PINLOC_AUTOGEN_WCNT" value="49" />
- <parameter name="PRI_HMC_CFG_MRS_TO_VALID" value="7" />
- <parameter name="PHY_DDR4_DATA_IO_STD_ENUM" value="IO_STD_POD_12" />
- <parameter name="PHY_RLD2_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="PINS_DB_OUT_BYPASS_11" value="0" />
<parameter name="PINS_DB_OUT_BYPASS_12" value="0" />
<parameter name="PRI_HMC_CFG_PCH_ALL_TO_VALID" value="9" />
@@ -2509,8 +3876,6 @@
<parameter name="MEM_DDR3_MR3" value="0" />
<parameter name="MEM_DDR3_MR2" value="0" />
<parameter name="MEM_DDR3_MR1" value="0" />
- <parameter name="BOARD_RLD3_WDATA_SLEW_RATE" value="2.0" />
- <parameter name="EX_DESIGN_GUI_QDR2_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="MEM_DDR3_MR0" value="0" />
<parameter name="PORT_MEM_K_N_PINLOC_2" value="0" />
<parameter name="PORT_MEM_K_N_PINLOC_1" value="0" />
@@ -2518,28 +3883,18 @@
<parameter name="PINS_PER_LANE" value="12" />
<parameter name="PORT_MEM_K_N_PINLOC_0" value="0" />
<parameter name="BOARD_DDR3_RCLK_ISI_NS" value="0.0" />
- <parameter name="PHY_RLD2_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="MEM_DDR3_TMRD_CK_CYC" value="4" />
<parameter name="PORT_MEM_K_N_PINLOC_5" value="0" />
<parameter name="MEM_RLD2_TRL" value="8" />
<parameter name="PORT_MEM_K_N_PINLOC_4" value="0" />
<parameter name="PORT_MEM_K_N_PINLOC_3" value="0" />
<parameter name="DIAG_QDR4_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
- <parameter name="CTRL_QDR2_AVL_SYMBOL_WIDTH" value="9" />
<parameter
name="MEM_DDR3_ALERT_N_PLACEMENT_ENUM"
value="DDR3_ALERT_N_PLACEMENT_AC_LANES" />
<parameter name="MEM_RLD2_TRC" value="8" />
- <parameter name="DIAG_QDR2_BYPASS_DEFAULT_PATTERN" value="false" />
- <parameter name="BOARD_DDR3_USER_WCLK_ISI_NS" value="0.031" />
- <parameter name="MEM_RLD3_TDS_PS" value="-30" />
- <parameter name="PHY_RLD3_USER_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_RLD3_TDH_PS" value="5" />
- <parameter name="PORT_AFI_CFG_N_WIDTH" value="1" />
<parameter name="DIAG_DDR3_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="PRI_HMC_CFG_SB_CG_DISABLE" value="disable" />
<parameter name="PORT_MEM_LDA_N_WIDTH" value="1" />
- <parameter name="PHY_QDR2_RATE_ENUM" value="RATE_HALF" />
<parameter name="PHY_QDR2_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR4_HIDE_ADV_MR_SETTINGS" value="true" />
<parameter name="PORT_MEM_ODT_WIDTH" value="2" />
@@ -2548,88 +3903,39 @@
name="PHY_DDR4_USER_PERIODIC_OCT_RECAL_ENUM"
value="PERIODIC_OCT_RECAL_AUTO" />
<parameter name="MEM_LPDDR3_R_ODTN_1X1" value="Rank 0" />
- <parameter name="BOARD_QDR2_WDATA_SLEW_RATE" value="2.0" />
<parameter name="DIAG_RLD2_USE_TG_AVL_2" value="false" />
- <parameter name="MEM_DDR3_SEQ_ODT_TABLE_LO" value="0" />
- <parameter name="BOARD_RLD3_RDATA_ISI_NS" value="0.0" />
+ <parameter name="PHY_QDR4_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="PHY_QDR2_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="BOARD_DDR3_IS_SKEW_WITHIN_AC_DESKEWED" value="false" />
<parameter name="PORT_MEM_CQ_WIDTH" value="1" />
- <parameter name="MEM_DDR4_RCD_CKE_IBT_ENUM" value="DDR4_RCD_CKE_IBT_100" />
- <parameter name="BOARD_DDR3_WCLK_ISI_NS" value="0.0" />
- <parameter name="BOARD_RLD3_PKG_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
<parameter name="MEM_QDR2_BWS_N_PER_DEVICE" value="4" />
- <parameter name="PORT_CAL_MASTER_BYTEEN_WIDTH" value="4" />
- <parameter name="MEM_DDR4_READ_DBI" value="false" />
<parameter name="MEM_DDR3_TTL_CK_WIDTH" value="1" />
<parameter name="EX_DESIGN_GUI_DDR4_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="DIAG_DDR3_CAL_ENABLE_NON_DES" value="false" />
- <parameter name="PORT_AFI_LBK1_N_WIDTH" value="1" />
<parameter name="MEM_DDR4_NUM_OF_PHYSICAL_RANKS" value="2" />
- <parameter name="DIAG_DDR3_EX_DESIGN_SEPARATE_RZQS" value="false" />
- <parameter name="PINS_DB_OE_BYPASS_10" value="0" />
<parameter name="PHY_RLD2_USER_DATA_IO_STD_ENUM" value="unset" />
- <parameter name="PINS_DB_OE_BYPASS_11" value="0" />
- <parameter name="PORT_MEM_LDA_N_PINLOC_0" value="0" />
- <parameter name="PINS_DB_OE_BYPASS_12" value="0" />
<parameter name="MEM_DDR4_SPD_138_RCD_CK_DRV" value="5" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_1" value="6298637" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_0" value="14695431" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_3" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_2" value="4101" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_5" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_4" value="0" />
- <parameter name="MEM_DDR4_RM_WIDTH" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_7" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_6" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_9" value="0" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_8" value="0" />
- <parameter name="PORT_MEM_RPS_N_WIDTH" value="1" />
- <parameter name="PHY_LPDDR3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="DIAG_QDR2_EX_DESIGN_SEPARATE_RZQS" value="false" />
<parameter name="MEM_DDR4_TTL_NUM_OF_DIMMS" value="1" />
<parameter name="PHY_LPDDR3_MEM_CLK_FREQ_MHZ" value="800.0" />
<parameter name="DIAG_SOFT_NIOS_CLOCK_FREQUENCY" value="100" />
<parameter name="MEM_DDR4_TDQSCKDS" value="450" />
<parameter name="MEM_QDR2_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
- <parameter name="PORT_CTRL_ECC_RDATA_ID_WIDTH" value="13" />
<parameter name="BOARD_QDR4_USER_AC_ISI_NS" value="0.0" />
<parameter name="MEM_DDR4_TDQSCKDL" value="1200" />
<parameter name="MEM_DDR4_TDQSCKDM" value="900" />
<parameter name="BOARD_QDR4_CK_SLEW_RATE" value="4.0" />
<parameter
name="MEM_DDR4_DB_RTT_PARK_ENUM"
- value="DDR4_DB_RTT_PARK_ODT_DISABLED" />
- <parameter name="PORT_AFI_DM_WIDTH" value="1" />
- <parameter name="PLL_C_CNT_LOW_3" value="4" />
- <parameter name="PLL_C_CNT_LOW_2" value="2" />
- <parameter name="PHY_RLD3_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="PLL_C_CNT_LOW_1" value="1" />
- <parameter name="PLL_C_CNT_LOW_0" value="2" />
- <parameter name="PINS_RATE_10" value="0" />
- <parameter name="PHY_RLD3_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="PINS_RATE_12" value="0" />
- <parameter name="PINS_RATE_11" value="0" />
- <parameter name="PLL_C_CNT_LOW_8" value="256" />
- <parameter name="PLL_C_CNT_LOW_7" value="256" />
- <parameter name="BOARD_DDR4_USE_DEFAULT_SLEW_RATES" value="true" />
- <parameter name="PLL_C_CNT_LOW_6" value="256" />
- <parameter name="PLL_C_CNT_LOW_5" value="256" />
- <parameter name="PLL_C_CNT_LOW_4" value="4" />
- <parameter name="PHY_HAS_DCC" value="true" />
- <parameter name="PHY_QDR4_USER_DATA_IO_STD_ENUM" value="unset" />
- <parameter name="BOARD_LPDDR3_TIS_DERATING_PS" value="0" />
- <parameter name="PHY_DDR3_AC_IO_STD_ENUM" value="unset" />
+ value="DDR4_DB_RTT_PARK_ODT_DISABLED" />
+ <parameter name="PINS_RATE_10" value="0" />
+ <parameter name="PINS_RATE_12" value="0" />
+ <parameter name="PINS_RATE_11" value="0" />
<parameter name="BOARD_RLD3_RCLK_SLEW_RATE" value="7.0" />
<parameter name="PHY_QDR2_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="PORT_AFI_RDATA_EN_FULL_WIDTH" value="1" />
<parameter name="DIAG_QDR4_INTERFACE_ID" value="0" />
<parameter name="CTRL_DDR3_AUTO_POWER_DOWN_CYCS" value="32" />
<parameter name="SEC_HMC_CFG_PDN_PERIOD" value="0" />
- <parameter name="PHY_DDR3_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="PORT_MEM_QKB_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="PHY_QDR2_HPS_ENABLE_EARLY_RELEASE" value="false" />
- <parameter name="PRI_HMC_CFG_RD_TO_RD_DIFF_CHIP" value="3" />
<parameter name="PHY_QDR4_CK_IO_STD_ENUM" value="unset" />
<parameter
name="EX_DESIGN_GUI_DDR4_SEL_DESIGN"
@@ -2638,54 +3944,31 @@
<parameter name="PORT_MEM_QK_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="BOARD_LPDDR3_RCLK_ISI_NS" value="0.0" />
<parameter name="PORT_AFI_RDATA_DINV_WIDTH" value="1" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_8" value="false" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_7" value="false" />
<parameter name="PHY_QDR4_USER_AC_MODE_ENUM" value="unset" />
- <parameter name="PRI_HMC_CFG_RD_ODT_PERIOD" value="6" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_6" value="false" />
<parameter name="MEM_QDR4_DEVICE_DEPTH" value="1" />
- <parameter name="PORT_HPS_EMIF_E2H_GP_WIDTH" value="1" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_5" value="false" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_4" value="false" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_3" value="false" />
<parameter name="PHY_LPDDR3_DEFAULT_REF_CLK_FREQ" value="true" />
<parameter name="MEM_QDR2_ADDR_WIDTH" value="19" />
<parameter name="LANES_USAGE_AUTOGEN_WCNT" value="4" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_2" value="false" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_1" value="false" />
- <parameter name="PHY_DDR4_USER_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="PORT_MEM_DK_N_WIDTH" value="1" />
<parameter name="PORT_CAL_MASTER_RDATA_WIDTH" value="32" />
<parameter name="DIAG_DDR3_BYPASS_REPEAT_STAGE" value="true" />
- <parameter name="PORT_MEM_CAS_N_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_6" value="0.0 MHz" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_7" value="0.0 MHz" />
<parameter name="PRI_WDATA_TILE_INDEX" value="0" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_4" value="6672 ps" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_5" value="0.0 MHz" />
- <parameter name="EX_DESIGN_GUI_GEN_SYNTH" value="true" />
<parameter name="PORT_MEM_BWS_N_PINLOC_0" value="0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_8" value="50.0" />
<parameter name="PORT_MEM_BWS_N_PINLOC_1" value="0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_7" value="50.0" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_8" value="0.0 MHz" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_6" value="50.0" />
- <parameter name="PHY_QDR4_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="PORT_MEM_BWS_N_PINLOC_2" value="0" />
- <parameter name="MEM_LPDDR3_W_ODTN_2X2" value="Rank 0,Rank 1" />
- <parameter name="SYS_INFO_DEVICE_SPEEDGRADE" value="1" />
- <parameter name="PHY_QDR2_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="PHY_RLD2_CK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_QDR2_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="BOARD_LPDDR3_TDH_DERATING_PS" value="0" />
<parameter name="PORT_AFI_C_WIDTH" value="1" />
- <parameter name="BOARD_QDR2_SKEW_WITHIN_D_NS" value="0.0" />
- <parameter name="EX_DESIGN_GUI_RLD3_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="PRI_HMC_CFG_GEAR_DOWN_EN" value="disable" />
- <parameter name="PHY_QDR4_MEM_CLK_FREQ_MHZ" value="1066.667" />
- <parameter name="PHY_QDR4_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="PORT_MEM_DKA_N_WIDTH" value="1" />
- <parameter name="MEM_LPDDR3_R_ODT3_4X4" value="off,off,off,off" />
<parameter name="BOARD_LPDDR3_USER_WCLK_ISI_NS" value="0.0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_5" value="50.0" />
<parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_Q_NS" value="0.02" />
@@ -2694,7 +3977,6 @@
<parameter name="BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_2" value="50.0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_1" value="50.0" />
- <parameter name="BOARD_DDR4_USER_RDATA_SLEW_RATE" value="4.0" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_2" value="3336 ps" />
<parameter name="PLL_EXTRA_CLK_DESIRED_DUTY_CYCLE_GUI_0" value="50.0" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_3" value="6672 ps" />
@@ -2702,16 +3984,9 @@
<parameter name="PLL_C_CNT_FREQ_PS_STR_0" value="3336 ps" />
<parameter name="PLL_C_CNT_FREQ_PS_STR_1" value="1668 ps" />
<parameter name="PORT_AFI_PAR_WIDTH" value="1" />
- <parameter name="PORT_CTRL_AMM_RDATA_WIDTH" value="576" />
- <parameter name="MEM_DDR3_CTRL_CFG_WRITE_ODT_RANK" value="0" />
<parameter name="PHY_RLD2_DEFAULT_IO" value="true" />
- <parameter name="MEM_DDR3_ADDRESS_MIRROR_BITVEC" value="0" />
- <parameter name="MEM_DDR4_TTL_NUM_OF_LOGICAL_RANKS" value="2" />
- <parameter name="BOARD_DDR4_RCLK_SLEW_RATE" value="8.0" />
- <parameter name="PHY_DDR4_USER_DATA_IO_STD_ENUM" value="unset" />
<parameter name="DIAG_RLD2_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="PORT_MEM_DKA_N_PINLOC_2" value="0" />
- <parameter name="AC_PIN_MAP_SCHEME" value="use_0_1_2_3_lane" />
<parameter name="PORT_MEM_DKA_N_PINLOC_3" value="0" />
<parameter name="PORT_MEM_DKA_N_PINLOC_4" value="0" />
<parameter name="PORT_MEM_DKA_N_PINLOC_5" value="0" />
@@ -2720,105 +3995,54 @@
<parameter name="PORT_MEM_DKA_N_PINLOC_1" value="0" />
<parameter name="BOARD_DDR3_IS_SKEW_WITHIN_DQS_DESKEWED" value="false" />
<parameter name="PRI_HMC_CFG_MEM_IF_COLADDR_WIDTH" value="col_width_10" />
- <parameter name="BOARD_RLD3_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
- <parameter name="MEM_DDR3_CS_PER_DIMM" value="1" />
+ <parameter name="DIAG_QDR4_SIM_VERBOSE" value="true" />
<parameter name="MEM_DDR3_TINIT_US" value="500" />
- <parameter name="PHY_RLD3_DATA_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_DDR4_DM_EN" value="true" />
<parameter name="PHY_RLD2_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PHY_DDR3_AC_MODE_ENUM" value="unset" />
- <parameter name="PLL_C_CNT_EVEN_DUTY_EN_0" value="false" />
<parameter name="MEM_DDR4_TRFC_DLR_CYC" value="108" />
- <parameter name="PORT_CAL_DEBUG_OUT_WDATA_WIDTH" value="32" />
<parameter name="PORT_MEM_DQA_WIDTH" value="1" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_7" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_8" value="0.0" />
- <parameter name="DIAG_QDR4_SKIP_VREF_CAL" value="false" />
<parameter name="PHY_QDR2_USER_CK_MODE_ENUM" value="unset" />
<parameter name="MEM_LPDDR3_TWR_NS" value="15.0" />
<parameter name="PHY_DDR4_USER_CK_MODE_ENUM" value="unset" />
<parameter name="BOARD_LPDDR3_USER_RDATA_ISI_NS" value="0.0" />
- <parameter name="MEM_DDR4_TQH_UI" value="0.76" />
<parameter name="MEM_QDR2_CQ_WIDTH" value="1" />
- <parameter name="BOARD_QDR4_AC_SLEW_RATE" value="2.0" />
- <parameter name="MEM_DDR3_TRP_CYC" value="14" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_3" value="0 ps" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_4" value="0 ps" />
<parameter name="PORT_MEM_WE_N_PINLOC_0" value="0" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_1" value="104 ps" />
<parameter name="PORT_MEM_WE_N_PINLOC_1" value="0" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_2" value="104 ps" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_0" value="104 ps" />
- <parameter name="PHY_LPDDR3_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="MEM_DDR4_TRRD_S_CYC" value="4" />
<parameter
name="DIAG_QDR2_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
<parameter name="MEM_DDR4_R_ODT3_4X4" value="on,on,off,off" />
<parameter name="PORT_AFI_ACT_N_WIDTH" value="1" />
<parameter name="PORT_MEM_ODT_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="PHY_LPDDR3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="DBI_RD_ENABLE" value="false" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_7" value="0 ps" />
- <parameter name="PLL_VCO_CLK_FREQ_MHZ" value="1200.0" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_8" value="0 ps" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_5" value="0 ps" />
- <parameter name="PLL_C_CNT_PHASE_PS_STR_6" value="0 ps" />
<parameter name="DIAG_QDR2_SEPARATE_READ_WRITE_ITFS" value="false" />
- <parameter name="SEC_HMC_CFG_ARF_TO_VALID" value="97" />
- <parameter name="PORT_MEM_RWB_N_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="PORT_HPS_EMIF_H2E_WIDTH" value="4096" />
- <parameter name="SEC_WDATA_TILE_INDEX" value="0" />
- <parameter name="MEM_DDR4_TCCD_L_CYC" value="5" />
<parameter name="PHY_RLD3_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="DIAG_ENABLE_SOFT_M20K" value="true" />
- <parameter name="PLL_N_CNT_EVEN_DUTY_EN" value="false" />
- <parameter name="MEM_DDR4_SEQ_ODT_TABLE_LO" value="4194308" />
- <parameter name="MEM_RLD3_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
- <parameter name="PORT_MEM_CQ_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_CQ_PINLOC_0" value="0" />
<parameter name="PORT_MEM_QKB_PINLOC_3" value="0" />
- <parameter name="MEM_LPDDR3_TDSH_CYC" value="0.2" />
<parameter name="PORT_MEM_QKB_PINLOC_4" value="0" />
- <parameter name="BOARD_LPDDR3_SKEW_WITHIN_DQS_NS" value="0.0" />
<parameter name="PORT_MEM_QKB_PINLOC_1" value="0" />
<parameter name="PORT_MEM_QKB_PINLOC_2" value="0" />
<parameter name="MEM_LPDDR3_TWR_CYC" value="12" />
- <parameter name="DIAG_RLD2_BYPASS_DEFAULT_PATTERN" value="false" />
<parameter name="PORT_MEM_QKB_PINLOC_0" value="0" />
- <parameter name="BOARD_DDR3_SKEW_WITHIN_DQS_NS" value="0.0" />
- <parameter name="MEM_DDR4_ODT_WIDTH" value="2" />
<parameter name="PHY_DDR3_USER_AC_MODE_ENUM" value="unset" />
<parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter
name="CTRL_DDR4_ADDR_ORDER_ENUM"
value="DDR4_CTRL_ADDR_ORDER_CS_R_B_C_BG" />
- <parameter name="MEM_DDR3_RDIMM_CONFIG" value="0000000000000000" />
- <parameter name="PINS_INVERT_WR_AUTOGEN_WCNT" value="13" />
<parameter name="MEM_LPDDR3_DQ_PER_DQS" value="8" />
<parameter name="PORT_MEM_QKB_N_WIDTH" value="1" />
<parameter name="MEM_DDR4_MIRROR_ADDRESSING_EN" value="false" />
<parameter name="PHY_QDR4_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="PLL_M_CNT_HIGH" value="24" />
- <parameter name="CTRL_LPDDR3_REORDER_EN" value="true" />
- <parameter name="DIAG_DDR3_INTERFACE_ID" value="0" />
- <parameter name="DIAG_USE_CPA_LOCK" value="false" />
<parameter name="PORT_MEM_QKB_PINLOC_5" value="0" />
<parameter name="PORT_AFI_RRANK_WIDTH" value="1" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_7" value="50.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_6" value="50.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_5" value="50.0" />
<parameter name="MEM_DDR3_W_ODTN_1X1" value="Rank 0" />
- <parameter name="MEM_RLD3_TQH_CYC" value="0.38" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_4" value="50.0" />
<parameter name="CTRL_LPDDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="PORT_AFI_ODT_WIDTH" value="1" />
- <parameter name="BOARD_LPDDR3_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="PRI_HMC_CFG_RLD3_MULTIBANK_REF_DELAY" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_8" value="50.0" />
- <parameter name="CTRL_LPDDR3_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="MEM_DDR4_W_ODT3_4X4" value="on,on,off,off" />
<parameter name="PRI_HMC_CFG_ZQCS_TO_VALID" value="65" />
<parameter name="MEM_DDR3_TRCD_CYC" value="14" />
<parameter name="MEM_DDR4_READ_PREAMBLE" value="1" />
@@ -2830,195 +4054,74 @@
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_1" value="50.0" />
<parameter name="BOARD_QDR2_RDATA_SLEW_RATE" value="2.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_0" value="50.0" />
+ <parameter name="DIAG_RLD2_SIM_VERBOSE" value="true" />
<parameter name="PORT_MEM_DQS_N_PINLOC_10" value="0" />
- <parameter name="PRI_HMC_CFG_ENABLE_RC" value="enable" />
- <parameter name="PORT_MEM_A_PINLOC_AUTOGEN_WCNT" value="17" />
- <parameter
- name="PHY_FPGA_SPEEDGRADE_GUI"
- value="E1 (Production) - change device under 'View'->'Device Family'" />
- <parameter name="PRI_HMC_CFG_MEM_IF_ROWADDR_WIDTH" value="row_width_15" />
<parameter name="DIAG_QDR2_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
- <parameter name="PINS_WDB_15" value="224694" />
- <parameter name="PINS_WDB_14" value="316345782" />
- <parameter
- name="MEM_DDR4_USER_VREFDQ_TRAINING_RANGE"
- value="DDR4_VREFDQ_TRAINING_RANGE_1" />
- <parameter name="PINS_WDB_13" value="910912566" />
- <parameter name="PINS_WDB_12" value="920202672" />
- <parameter name="PINS_WDB_11" value="920347830" />
- <parameter name="PINS_WDB_10" value="819686802" />
<parameter name="MEM_DDR4_ALERT_N_AC_LANE" value="0" />
- <parameter name="PHY_DDR3_DATA_IO_STD_ENUM" value="unset" />
- <parameter name="PINS_WDB_19" value="0" />
- <parameter name="PINS_WDB_18" value="0" />
- <parameter name="PINS_WDB_17" value="0" />
- <parameter name="PHY_DDR4_USER_REF_CLK_FREQ_MHZ" value="25.0" />
- <parameter name="DIAG_RLD3_TG_BE_PATTERN_LENGTH" value="8" />
- <parameter name="PINS_WDB_16" value="0" />
- <parameter name="MEM_LPDDR3_CS_WIDTH" value="1" />
<parameter name="PHY_QDR2_USER_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="DIAG_DDR3_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="SEC_HMC_CFG_WR_AP_TO_VALID" value="29" />
- <parameter name="BOARD_DDR4_USER_WCLK_ISI_NS" value="0.031" />
<parameter name="PHY_RLD2_USER_CK_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_ADDRESS_MIRROR_BITVEC" value="0" />
<parameter name="PORT_MEM_DINVA_PINLOC_AUTOGEN_WCNT" value="3" />
- <parameter name="MEM_RLD2_BANK_ADDR_WIDTH" value="3" />
<parameter name="PRI_HMC_CFG_WRITE_ODT_CHIP" value="33" />
- <parameter name="MEM_RLD3_DM_EN" value="true" />
<parameter name="MEM_DDR3_COL_ADDR_WIDTH" value="10" />
<parameter name="MEM_DDR3_CK_WIDTH" value="1" />
- <parameter name="DIAG_QDR4_BYPASS_DEFAULT_PATTERN" value="false" />
- <parameter name="PINS_WDB_26" value="0" />
<parameter name="PORT_MEM_REF_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="PINS_WDB_25" value="0" />
<parameter name="MEM_DDR3_TDH_DC_MV" value="100" />
<parameter name="MEM_QDR4_ADDR_INV_ENA" value="false" />
- <parameter name="PINS_WDB_24" value="0" />
- <parameter name="PINS_WDB_23" value="0" />
<parameter name="BOARD_DDR3_TDS_DERATING_PS" value="0" />
- <parameter name="PINS_WDB_22" value="0" />
+ <parameter name="DIAG_RLD3_CA_DESKEW_EN" value="false" />
<parameter name="BOARD_DDR4_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="PINS_WDB_21" value="0" />
- <parameter name="DIAG_DDR3_BYPASS_USER_STAGE" value="true" />
- <parameter name="PINS_WDB_20" value="0" />
<parameter name="MEM_DDR4_ROW_ADDR_WIDTH" value="15" />
<parameter name="CTRL_DDR4_MMR_EN" value="false" />
- <parameter name="DIAG_DDR3_CAL_ENABLE_MICRON_AP" value="false" />
- <parameter name="PINS_WDB_29" value="0" />
- <parameter name="PINS_WDB_28" value="0" />
- <parameter name="OCT_SIZE" value="3" />
<parameter name="MEM_DDR4_TTL_ADDR_WIDTH" value="17" />
- <parameter name="PINS_WDB_27" value="0" />
- <parameter name="EX_DESIGN_GUI_DDR4_GEN_SIM" value="true" />
<parameter name="SEC_HMC_CFG_RLD3_REFRESH_SEQ3" value="61440" />
<parameter name="SEC_HMC_CFG_RLD3_REFRESH_SEQ2" value="3840" />
<parameter name="SEC_HMC_CFG_RLD3_REFRESH_SEQ1" value="240" />
<parameter name="SEC_HMC_CFG_RLD3_REFRESH_SEQ0" value="15" />
- <parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_D_NS" value="0.02" />
- <parameter name="MEM_DDR4_TIH_DC_MV" value="75" />
- <parameter name="PINS_WDB_37" value="0" />
- <parameter name="MEM_DDR4_SEQ_ODT_TABLE_HI" value="0" />
- <parameter name="PINS_WDB_36" value="0" />
- <parameter name="PINS_WDB_35" value="0" />
- <parameter name="BOARD_DDR3_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="PINS_WDB_34" value="0" />
- <parameter name="PINS_WDB_33" value="0" />
- <parameter name="PINS_WDB_32" value="0" />
- <parameter name="BOARD_RLD3_TIH_DERATING_PS" value="0" />
- <parameter name="PINS_WDB_31" value="0" />
- <parameter name="DIAG_RLD2_SEPARATE_READ_WRITE_ITFS" value="false" />
- <parameter name="PINS_WDB_30" value="0" />
+ <parameter name="PHY_RLD2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="PORT_MEM_CS_N_PINLOC_5" value="0" />
- <parameter name="PINS_WDB_38" value="0" />
<parameter name="PORT_MEM_DK_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="PORT_MEM_CS_N_PINLOC_4" value="0" />
+ <parameter name="MEM_DDR4_TWLH_CYC" value="0.13" />
<parameter name="PORT_MEM_CS_N_PINLOC_3" value="0" />
<parameter name="PORT_MEM_CS_N_PINLOC_2" value="0" />
<parameter name="PORT_MEM_CS_N_PINLOC_1" value="0" />
<parameter name="PORT_MEM_CS_N_PINLOC_0" value="91277314" />
- <parameter name="BOARD_QDR2_USER_RDATA_ISI_NS" value="0.063" />
- <parameter name="BOARD_RLD3_TDS_DERATING_PS" value="0" />
- <parameter name="PORT_MEM_ACT_N_PINLOC_AUTOGEN_WCNT" value="2" />
- <parameter name="MEM_LPDDR3_TFAW_NS" value="50.0" />
- <parameter name="PRI_HMC_CFG_SRF_TO_ZQ_CAL" value="449" />
+ <parameter name="PHY_DDR3_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="SEC_HMC_CFG_MPS_EXIT_CKE_TO_CS" value="6" />
- <parameter name="PORT_AFI_RPS_N_WIDTH" value="1" />
- <parameter name="MEM_LPDDR3_TDH_PS" value="100" />
- <parameter name="MEM_QDR2_TCQD_NS" value="0.09" />
<parameter name="PHY_QDR2_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="BOARD_QDR4_WDATA_ISI_NS" value="0.0" />
- <parameter name="BOARD_RLD3_USER_AC_ISI_NS" value="0.094" />
<parameter name="MEM_RLD3_AREF_PROTOCOL_ENUM" value="RLD3_AREF_BAC" />
<parameter name="PORT_AFI_CAS_N_WIDTH" value="1" />
- <parameter name="SEC_HMC_CFG_ACT_TO_RDWR" value="8" />
<parameter name="PHY_QDR2_IO_VOLTAGE" value="1.5" />
<parameter name="PHY_QDR2_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="DIAG_EX_DESIGN_NUM_OF_SLAVES" value="1" />
- <parameter name="MEM_DDR4_RANKS_PER_DIMM" value="2" />
- <parameter name="BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
+ <parameter name="DIAG_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PHY_USERMODE_OCT" value="false" />
<parameter name="PORT_MEM_PE_N_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="MEM_BURST_LENGTH" value="8" />
- <parameter name="PORT_MEM_CA_PINLOC_AUTOGEN_WCNT" value="17" />
<parameter name="MEM_DDR4_CTRL_CFG_READ_ODT_RANK" value="0" />
- <parameter name="PRI_HMC_CFG_MPS_EXIT_CKE_TO_CS" value="6" />
- <parameter name="CTRL_DDR4_WR_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="DIAG_LPDDR3_TG_DATA_PATTERN_LENGTH" value="8" />
- <parameter name="MEM_LPDDR3_TDS_PS" value="75" />
- <parameter name="SEC_HMC_CFG_MPS_TO_VALID" value="768" />
<parameter name="PORT_MEM_AP_PINLOC_0" value="0" />
<parameter name="PHY_DDR4_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="PHY_RLD3_DEFAULT_IO" value="true" />
- <parameter name="PHY_QDR4_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
<parameter name="DIAG_RLD2_EX_DESIGN_ISSP_EN" value="true" />
<parameter name="MEM_DDR3_TCL" value="7" />
- <parameter name="BOARD_RLD3_AC_SLEW_RATE" value="2.0" />
- <parameter name="MEM_DDR4_TDQSQ_PS" value="66" />
- <parameter name="MEM_LPDDR3_TWLH_PS" value="175.0" />
<parameter name="BOARD_QDR2_USER_WCLK_ISI_NS" value="0.031" />
- <parameter name="MEM_QDR2_K_WIDTH" value="1" />
- <parameter name="PINS_OCT_MODE_AUTOGEN_WCNT" value="13" />
- <parameter name="MEM_LPDDR3_W_DERIVED_ODTN" value="," />
- <parameter name="MEM_DDR3_TIS_AC_MV" value="135" />
+ <parameter name="MEM_QDR4_AVL_CHNLS" value="8" />
<parameter name="MEM_DDR3_TRCD_NS" value="13.09" />
- <parameter name="MEM_DDR4_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="MEM_DDR4_WRITE_CMD_LATENCY" value="5" />
- <parameter name="MEM_QDR2_TSA_NS" value="0.23" />
- <parameter name="SEC_HMC_CFG_LOCAL_IF_CS_WIDTH" value="cs_width_1" />
- <parameter name="PHY_RLD3_RATE_ENUM" value="RATE_QUARTER" />
- <parameter name="MEM_DDR4_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="MEM_RLD3_DQ_PER_RD_GROUP" value="9" />
- <parameter name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="BOARD_DDR4_AC_SLEW_RATE" value="2.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_0" value="0.0" />
- <parameter name="DIAG_SEQ_RESET_AUTO_RELEASE" value="avl" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_1" value="0.0" />
<parameter name="MEM_QDR4_ADDR_WIDTH" value="21" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_2" value="0.0" />
<parameter name="PHY_RLD2_AC_IO_STD_ENUM" value="unset" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_3" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_4" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_5" value="0.0" />
- <parameter name="MEM_DDR4_TRP_NS" value="14.06" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_6" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_7" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_8" value="0.0" />
<parameter name="BOARD_QDR2_USE_DEFAULT_ISI_VALUES" value="true" />
- <parameter name="REGISTER_AFI" value="true" />
- <parameter name="MEM_DDR3_ASR_ENUM" value="DDR3_ASR_MANUAL" />
<parameter name="MEM_DDR4_W_ODT1_4X2" value="on,on,off,off" />
<parameter name="MEM_DDR4_W_ODT1_4X4" value="off,off,on,on" />
- <parameter name="PORT_CTRL_ECC_READ_INFO_WIDTH" value="3" />
- <parameter name="PHY_RLD2_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="PRI_HMC_CFG_MPS_EXIT_CS_TO_CKE" value="5" />
- <parameter name="PORT_AFI_AP_WIDTH" value="1" />
- <parameter name="PHY_DDR3_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="BOARD_QDR2_RCLK_SLEW_RATE" value="4.0" />
<parameter name="MEM_DDR4_TFAW_DLR_CYC" value="16" />
<parameter name="BOARD_QDR4_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="PRI_HMC_CFG_REORDER_READ" value="enable" />
- <parameter name="MEM_DDR4_RCD_ODT_IBT_ENUM" value="DDR4_RCD_ODT_IBT_100" />
- <parameter name="SEC_HMC_CFG_MEM_IF_BANKADDR_WIDTH" value="bank_width_2" />
- <parameter name="PHY_DDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="SEC_HMC_CFG_ARBITER_TYPE" value="twot" />
- <parameter name="MEM_RLD2_DM_WIDTH" value="1" />
- <parameter name="PORT_CAL_MASTER_WDATA_WIDTH" value="32" />
+ <parameter name="DIAG_HMC_HRC" value="auto" />
<parameter name="MEM_DDR3_W_ODT0_1X1" value="on" />
- <parameter name="CTRL_DDR4_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
- <parameter name="MEM_DDR4_BANK_GROUP_WIDTH" value="2" />
- <parameter name="MEM_DDR4_R_ODT1_4X2" value="on,on,off,off" />
- <parameter name="MEM_DDR4_R_ODT1_4X4" value="off,off,on,on" />
- <parameter name="PINS_C2L_DRIVEN_AUTOGEN_WCNT" value="13" />
- <parameter name="MEM_LPDDR3_W_DERIVED_ODT0" value="," />
- <parameter name="MEM_DDR3_R_ODT0_1X1" value="off" />
- <parameter name="MEM_LPDDR3_W_DERIVED_ODT2" value="," />
- <parameter name="MEM_LPDDR3_W_DERIVED_ODT1" value="," />
- <parameter name="MEM_LPDDR3_TWLS_PS" value="175.0" />
- <parameter name="MEM_LPDDR3_W_DERIVED_ODT3" value="," />
- <parameter name="PHY_RLD3_USER_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="PRI_HMC_CFG_COL_CMD_SLOT" value="2" />
- <parameter name="PHY_DDR3_PING_PONG_EN" value="false" />
<parameter
name="EX_DESIGN_GUI_DDR3_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
@@ -3026,292 +4129,159 @@
<parameter name="BOARD_QDR4_RCLK_ISI_NS" value="0.0" />
<parameter name="SEC_HMC_CFG_MPS_EXIT_CS_TO_CKE" value="5" />
<parameter name="PHY_REF_CLK_FREQ_MHZ" value="25.0" />
- <parameter name="MEM_DDR3_HIDE_ADV_MR_SETTINGS" value="true" />
- <parameter name="DIAG_DDR4_INTERFACE_ID" value="0" />
<parameter name="PLL_SIM_PHYCLK_FB_FREQ_PS" value="3360" />
<parameter name="PHY_QDR2_CK_MODE_ENUM" value="unset" />
<parameter name="PHY_RLD3_DEFAULT_REF_CLK_FREQ" value="true" />
<parameter name="PORT_MEM_PAR_WIDTH" value="1" />
<parameter name="BOARD_QDR4_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="MEM_DDR3_TTL_BANK_ADDR_WIDTH" value="3" />
- <parameter name="PINS_DB_IN_BYPASS_10" value="0" />
- <parameter name="SEC_HMC_CFG_SB_CG_DISABLE" value="disable" />
<parameter name="DIAG_RLD3_INTERFACE_ID" value="0" />
- <parameter name="PINS_DB_IN_BYPASS_11" value="0" />
- <parameter name="PINS_DB_IN_BYPASS_12" value="0" />
+ <parameter name="DIAG_LPDDR3_SIM_VERBOSE" value="true" />
<parameter name="BOARD_RLD3_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="MEM_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
<parameter name="BOARD_DDR3_AC_SLEW_RATE" value="2.0" />
- <parameter name="DIAG_DDR3_SEPARATE_READ_WRITE_ITFS" value="false" />
<parameter name="PORT_MEM_QKB_WIDTH" value="1" />
<parameter name="PHY_RLD2_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="BOARD_RLD3_USE_DEFAULT_SLEW_RATES" value="true" />
<parameter name="SYS_INFO_DEVICE" value="10AX115S2F45E1SG" />
- <parameter name="PORT_MEM_RESET_N_PINLOC_0" value="50177" />
<parameter name="PHY_RLD3_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR3_TDQSCKDS" value="450" />
- <parameter name="PORT_MEM_RESET_N_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_AUTOGEN_WCNT" value="49" />
<parameter name="MEM_DDR3_ALERT_N_DQS_GROUP" value="0" />
<parameter name="BOARD_QDR2_USE_DEFAULT_SLEW_RATES" value="true" />
<parameter name="MEM_DDR3_TDQSCKDM" value="900" />
<parameter name="PORT_AFI_RAS_N_WIDTH" value="1" />
<parameter name="MEM_DDR3_TDQSCKDL" value="1200" />
- <parameter name="EX_DESIGN_GUI_RLD3_GEN_SIM" value="true" />
- <parameter name="PHY_LPDDR3_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="SEQ_SYNTH_CPU_CLK_DIVIDE" value="2" />
<parameter name="CTRL_QDR2_AVL_ENABLE_POWER_OF_TWO_BUS" value="false" />
<parameter name="BOARD_LPDDR3_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="PHY_DATA_CALIBRATED_OCT" value="true" />
- <parameter name="PHY_QDR4_STARTING_VREFIN" value="70.0" />
- <parameter name="PHY_RLD2_REF_CLK_FREQ_MHZ" value="-1.0" />
<parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_10" value="0" />
<parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_11" value="0" />
<parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_12" value="0" />
<parameter name="DIAG_RLD3_BYPASS_USER_STAGE" value="true" />
- <parameter name="SEC_HMC_CFG_ROW_CMD_SLOT" value="1" />
- <parameter name="PHY_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="BOARD_DDR3_WCLK_SLEW_RATE" value="4.0" />
<parameter name="BOARD_LPDDR3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
- <parameter name="SEC_HMC_CFG_RD_AP_TO_VALID" value="14" />
- <parameter name="MEM_LPDDR3_DQS_WIDTH" value="1" />
- <parameter name="SEC_HMC_CFG_WR_ODT_PERIOD" value="6" />
- <parameter name="SEC_HMC_CFG_PERIOD_DQSTRK_CTRL_EN" value="disable" />
- <parameter name="PHY_DDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="CTRL_DDR4_STARVE_LIMIT" value="63" />
- <parameter name="BOARD_DDR4_USER_WDATA_ISI_NS" value="0.063" />
- <parameter name="PORT_MEM_RAS_N_PINLOC_AUTOGEN_WCNT" value="2" />
+ <parameter name="CTRL_QDR4_DEF_RAW_TURNAROUND_DELAY_CYC" value="4" />
<parameter name="BOARD_QDR2_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
<parameter name="SEC_HMC_CFG_RD_ODT_PERIOD" value="6" />
<parameter name="SEC_HMC_CFG_WR_TO_PCH" value="21" />
<parameter name="BOARD_RLD3_USER_RDATA_SLEW_RATE" value="3.5" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_8" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_7" value="0" />
- <parameter name="PHY_RLD2_USER_CK_MODE_ENUM" value="unset" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_6" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_5" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_4" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_3" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_2" value="0" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_1" value="0" />
- <parameter name="PHY_QDR4_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_0" value="0" />
- <parameter name="CTRL_DDR4_ECC_AUTO_CORRECTION_EN" value="false" />
- <parameter name="PRI_HMC_CFG_WR_TO_WR_DIFF_BG" value="2" />
- <parameter name="MEM_DDR4_TDQSQ_UI" value="0.16" />
<parameter name="PORT_MEM_QKA_WIDTH" value="1" />
- <parameter name="DIAG_DDR3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
- <parameter name="PORT_AFI_WDATA_DINV_WIDTH" value="1" />
+ <parameter name="MEM_QDR4_MEM_TYPE_ENUM" value="MEM_XP" />
<parameter name="PHY_RLD2_MEM_CLK_FREQ_MHZ" value="533.333" />
<parameter name="MEM_RLD3_DEVICE_DEPTH" value="1" />
<parameter name="EX_DESIGN_GUI_DDR4_GEN_SYNTH" value="true" />
- <parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_Q_NS" value="0.02" />
<parameter name="BOARD_DDR3_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="PRI_HMC_CFG_DDR4_MPS_ADDR_MIRROR" value="0" />
<parameter name="PORT_CAL_DEBUG_OUT_BYTEEN_WIDTH" value="4" />
- <parameter name="CTRL_LPDDR3_STARVE_LIMIT" value="10" />
+ <parameter name="CTRL_REORDER_EN" value="true" />
<parameter name="BOARD_DDR4_RDATA_ISI_NS" value="0.155" />
<parameter name="PRI_HMC_CFG_MPR_TO_VALID" value="16" />
<parameter name="PORT_MEM_DINVB_WIDTH" value="1" />
<parameter name="CTRL_DDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="SEC_HMC_CFG_WR_ODT_ON" value="0" />
<parameter name="PORT_MEM_WE_N_WIDTH" value="1" />
<parameter name="PHY_LPDDR3_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="PHY_RLD3_PING_PONG_EN" value="false" />
<parameter name="PORT_MEM_DQA_PINLOC_20" value="0" />
<parameter name="MEM_DDR4_TEMP_CONTROLLED_RFSH_ENA" value="false" />
<parameter name="PORT_MEM_DQA_PINLOC_12" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_13" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_10" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_11" value="0" />
- <parameter name="BOARD_QDR2_IS_SKEW_WITHIN_Q_DESKEWED" value="false" />
<parameter name="PORT_MEM_DQA_PINLOC_16" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_17" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_14" value="0" />
- <parameter name="DIAG_LPDDR3_BYPASS_DEFAULT_PATTERN" value="false" />
<parameter name="PORT_MEM_DQA_PINLOC_15" value="0" />
- <parameter name="MEM_RLD3_DATA_LATENCY_MODE_ENUM" value="RLD3_DL_RL16_WL17" />
<parameter name="PORT_MEM_DQA_PINLOC_18" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_19" value="0" />
- <parameter name="SEC_HMC_CFG_RD_TO_WR" value="5" />
- <parameter name="MEM_DDR4_TDQSCK_DERV_PS" value="2" />
- <parameter name="MEM_DDR4_CKE_PER_DIMM" value="1" />
- <parameter name="PHY_QDR4_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="DIAG_QDR4_TG_DATA_PATTERN_LENGTH" value="8" />
- <parameter name="PHY_MEM_CLK_FREQ_MHZ" value="1200.0" />
<parameter name="BOARD_DDR3_MAX_DQS_DELAY_NS" value="0.6" />
<parameter name="MEM_QDR2_BWS_EN" value="true" />
- <parameter name="PRI_HMC_CFG_WR_TO_RD" value="16" />
- <parameter name="DIAG_QDR2_BYPASS_REPEAT_STAGE" value="true" />
<parameter name="MEM_DDR3_TQSH_CYC" value="0.4" />
- <parameter name="MEM_DDR3_TDQSCK_DERV_PS" value="2" />
<parameter name="BOARD_DDR3_TIH_DERATING_PS" value="0" />
- <parameter name="CTRL_DDR3_USER_REFRESH_EN" value="false" />
<parameter name="MEM_DDR4_TTL_NUM_OF_PHYSICAL_RANKS" value="2" />
<parameter name="MEM_DDR4_W_ODT0_2X2" value="on,on" />
<parameter name="MEM_RLD3_TQKQ_MAX_PS" value="75" />
- <parameter
- name="PHY_RLD3_CORE_CLKS_SHARING_ENUM"
- value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="MEM_QDR4_DATA_INV_ENA" value="false" />
<parameter name="DIAG_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="PINS_RATE_AUTOGEN_WCNT" value="13" />
<parameter name="MEM_DDR4_RCD_CA_IBT_ENUM" value="DDR4_RCD_CA_IBT_100" />
- <parameter name="MEM_DDR4_R_ODT0_1X1" value="off" />
- <parameter name="DIAG_RLD3_USE_TG_AVL_2" value="false" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="MEM_DDR4_TTL_BANK_ADDR_WIDTH" value="2" />
- <parameter name="DIAG_RLD2_BYPASS_USER_STAGE" value="true" />
<parameter name="PHY_RLD2_STARTING_VREFIN" value="70.0" />
- <parameter name="MEM_RLD2_CONFIG_ENUM" value="RLD2_CONFIG_TRC_8_TRL_8_TWL_9" />
- <parameter name="PHY_RLD3_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="MEM_QDR4_DINV_WIDTH" value="4" />
- <parameter name="MEM_LPDDR3_TMRR_CK_CYC" value="4" />
<parameter name="PHY_DDR4_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_LPDDR3_NUM_OF_LOGICAL_RANKS" value="1" />
- <parameter name="MEM_DDR4_TRAS_CYC" value="40" />
- <parameter name="PHY_RLD2_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="DIAG_LPDDR3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="PHY_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
<parameter name="DIAG_BYPASS_USER_STAGE" value="true" />
<parameter name="BOARD_LPDDR3_AC_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_DDR4_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
<parameter name="PORT_MEM_QKA_N_WIDTH" value="1" />
<parameter name="PHY_DDR3_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="MEM_RLD3_TDH_DC_MV" value="100" />
<parameter name="PRI_HMC_CFG_16_ACT_TO_ACT" value="0" />
<parameter name="PORT_MEM_CQ_PINLOC_AUTOGEN_WCNT" value="2" />
- <parameter name="PORT_AFI_RM_WIDTH" value="1" />
- <parameter name="DIAG_RLD2_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="MEM_DDR3_TWR_CYC" value="16" />
- <parameter name="BOARD_DDR3_USER_WDATA_ISI_NS" value="0.063" />
<parameter name="PORT_MEM_QKA_N_PINLOC_2" value="0" />
<parameter name="PORT_MEM_QKA_N_PINLOC_1" value="0" />
<parameter name="PORT_MEM_QKA_N_PINLOC_0" value="0" />
<parameter name="DIAG_ABSTRACT_PHY_RLAT" value="18" />
- <parameter name="PRI_HMC_CFG_WR_TO_WR" value="3" />
<parameter name="SHORT_QSYS_INTERFACE_NAMES" value="false" />
<parameter name="PLL_M_CNT_BYPASS_EN" value="false" />
- <parameter name="DIAG_FAST_SIM_OVERRIDE" value="FAST_SIM_OVERRIDE_DEFAULT" />
<parameter name="SEC_WDATA_LANE_INDEX" value="0" />
<parameter name="MEM_LPDDR3_CK_WIDTH" value="1" />
<parameter name="PRI_HMC_CFG_MEM_CLK_DISABLE_ENTRY_CYC" value="15" />
- <parameter name="BOARD_QDR2_WCLK_ISI_NS" value="0.0" />
- <parameter name="DIAG_DDR3_USE_TG_AVL_2" value="false" />
<parameter name="PORT_MEM_QKA_N_PINLOC_5" value="0" />
<parameter name="PORT_MEM_QKA_N_PINLOC_4" value="0" />
<parameter name="PORT_MEM_QKA_N_PINLOC_3" value="0" />
<parameter name="DIAG_RLD3_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="MEM_DDR4_W_ODTN_2X2" value="Rank 0,Rank 1" />
- <parameter name="BOARD_QDR4_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="PRI_HMC_CFG_CS_TO_CHIP_MAPPING" value="33825" />
<parameter name="MEM_DDR4_TREFI_US" value="7.8" />
- <parameter name="MEM_RLD2_CS_WIDTH" value="1" />
- <parameter name="SEC_HMC_CFG_CS_TO_CHIP_MAPPING" value="33825" />
- <parameter name="PHY_QDR4_REF_CLK_FREQ_MHZ" value="-1.0" />
<parameter name="SEC_HMC_CFG_16_ACT_TO_ACT" value="0" />
<parameter name="PRI_HMC_CFG_DQSTRK_TO_VALID" value="3" />
<parameter name="PHY_DDR3_CAL_ENABLE_NON_DES" value="true" />
<parameter name="MEM_DDR4_CFG_GEN_SBE" value="false" />
- <parameter name="PORT_MEM_DM_PINLOC_12" value="0" />
- <parameter
- name="MEM_DDR4_AC_PARITY_LATENCY"
- value="DDR4_AC_PARITY_LATENCY_DISABLE" />
- <parameter name="PORT_MEM_DM_PINLOC_11" value="0" />
- <parameter name="PORT_MEM_DM_PINLOC_10" value="0" />
- <parameter name="PHY_LPDDR3_DATA_IO_STD_ENUM" value="unset" />
<parameter name="BOARD_RLD3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="CTRL_DDR4_ECC_EN" value="false" />
<parameter name="MEM_RLD2_DM_EN" value="true" />
<parameter name="BOARD_QDR2_MAX_K_DELAY_NS" value="0.6" />
- <parameter name="PHY_DDR3_USER_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="DIAG_QDR2_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="PHY_RLD2_CK_MODE_ENUM" value="unset" />
- <parameter name="MEM_LPDDR3_W_ODT0_2X2" value="on,off" />
- <parameter name="PORT_AFI_WLAT_WIDTH" value="6" />
<parameter name="MEM_DDR4_GEARDOWN" value="DDR4_GEARDOWN_HR" />
<parameter name="PORT_MEM_ODT_PINLOC_3" value="0" />
<parameter name="PORT_AFI_BA_WIDTH" value="1" />
<parameter name="PORT_MEM_ODT_PINLOC_2" value="0" />
- <parameter name="PRI_HMC_CFG_RFSH_WARN_THRESHOLD" value="4" />
<parameter name="PORT_MEM_ODT_PINLOC_1" value="0" />
<parameter name="PORT_MEM_ODT_PINLOC_0" value="92327938" />
- <parameter name="MEM_DDR4_BANK_ADDR_WIDTH" value="2" />
<parameter name="PORT_MEM_ODT_PINLOC_5" value="0" />
<parameter name="PORT_MEM_ODT_PINLOC_4" value="0" />
- <parameter name="PRI_HMC_CFG_ROW_CMD_SLOT" value="1" />
- <parameter name="MEM_DDR4_TINIT_CK" value="600000" />
<parameter name="PORT_MEM_PAR_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="MEM_DDR3_R_DERIVED_ODT1" value="," />
<parameter name="PHY_DDR3_USER_STARTING_VREFIN" value="70.0" />
<parameter name="MEM_DDR3_R_DERIVED_ODT0" value="," />
<parameter name="DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES" value="1" />
- <parameter name="PLL_NUM_OF_EXTRA_CLKS" value="0" />
<parameter name="MEM_DDR3_R_DERIVED_ODT3" value="," />
<parameter name="MEM_DDR3_R_DERIVED_ODT2" value="," />
- <parameter name="MEM_DDR3_TRFC_NS" value="160.0" />
- <parameter name="PORT_MEM_DINVA_PINLOC_0" value="0" />
- <parameter name="MEM_DDR4_CHIP_ID_WIDTH" value="0" />
- <parameter name="DIAG_LPDDR3_BYPASS_USER_STAGE" value="true" />
- <parameter name="PHY_QDR4_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="PORT_MEM_CA_WIDTH" value="1" />
- <parameter name="PORT_AFI_RDATA_WIDTH" value="1" />
<parameter name="PORT_CTRL_ECC_WRITE_INFO_WIDTH" value="15" />
<parameter name="PHY_LPDDR3_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PORT_MEM_K_N_WIDTH" value="1" />
<parameter name="PORT_MEM_CS_N_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="BOARD_QDR4_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="PORT_MEM_DINVA_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_DINVA_PINLOC_2" value="0" />
<parameter name="PHY_LPDDR3_IO_VOLTAGE" value="1.2" />
- <parameter name="MEM_DDR4_NUM_OF_DIMMS" value="1" />
- <parameter name="MEM_DDR4_TTL_BANK_GROUP_WIDTH" value="2" />
- <parameter name="SEC_HMC_CFG_REORDER_READ" value="enable" />
<parameter name="CTRL_DDR4_USER_PRIORITY_EN" value="false" />
<parameter name="MEM_DDR4_USE_DEFAULT_ODT" value="true" />
- <parameter name="PHY_RLD3_STARTING_VREFIN" value="70.0" />
<parameter name="MEM_DDR4_RTT_WR_ENUM" value="DDR4_RTT_WR_ODT_DISABLED" />
<parameter name="BOARD_LPDDR3_USER_AC_SLEW_RATE" value="2.0" />
- <parameter name="PRI_HMC_CFG_LOCAL_IF_CS_WIDTH" value="cs_width_1" />
<parameter name="MEM_DDR3_R_DERIVED_ODTN" value="," />
<parameter name="MEM_NUM_OF_PHYSICAL_RANKS" value="2" />
<parameter
name="EX_DESIGN_GUI_RLD2_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
- <parameter name="PORT_MEM_DQ_PINLOC_15" value="122802291" />
<parameter name="PORT_DFT_NF_PLL_NUM_SHIFT_WIDTH" value="3" />
- <parameter name="BOARD_QDR4_USER_WDATA_SLEW_RATE" value="2.0" />
- <parameter name="PORT_MEM_DQ_PINLOC_16" value="128050294" />
- <parameter name="PORT_MEM_DQ_PINLOC_13" value="114403433" />
- <parameter name="PORT_MEM_DQ_PINLOC_14" value="119651438" />
- <parameter name="PORT_MEM_DQ_PINLOC_11" value="103909473" />
- <parameter name="PHY_LPDDR3_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="PORT_MEM_DQ_PINLOC_12" value="109157478" />
<parameter name="BOARD_DDR4_AC_TO_CK_SKEW_NS" value="0.0" />
- <parameter name="PORT_MEM_DQ_PINLOC_10" value="48280620" />
- <parameter name="PHY_LPDDR3_PING_PONG_EN" value="false" />
<parameter name="PORT_MEM_RWA_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="BOARD_LPDDR3_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="PORT_MEM_DQ_PINLOC_19" value="141695109" />
- <parameter name="PORT_MEM_DQ_PINLOC_17" value="133298299" />
- <parameter
- name="PHY_DDR3_USER_PERIODIC_OCT_RECAL_ENUM"
- value="PERIODIC_OCT_RECAL_AUTO" />
- <parameter name="PORT_MEM_DQ_PINLOC_18" value="136447104" />
- <parameter name="BOARD_QDR4_WDATA_SLEW_RATE" value="2.0" />
<parameter name="PORT_MEM_RESET_N_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="MEM_DDR3_DISCRETE_MIRROR_ADDRESSING_EN" value="false" />
- <parameter name="PRI_HMC_CFG_MMR_CMD_TO_VALID" value="16" />
<parameter name="DIAG_LPDDR3_BYPASS_STRESS_STAGE" value="true" />
- <parameter name="MEM_DDR3_DQS_WIDTH" value="8" />
<parameter name="PHY_LPDDR3_USER_CK_MODE_ENUM" value="unset" />
- <parameter name="PORT_MEM_DKB_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter
name="MEM_DDR4_R_DERIVED_ODT0"
value="(Drive) RZQ/7 (34 Ohm),ODT Disabled,-,-" />
<parameter name="DIAG_QDR2_BYPASS_USER_STAGE" value="true" />
<parameter name="MEM_QDR4_TWL_CYC" value="5" />
- <parameter name="DIAG_EX_DESIGN_ISSP_EN" value="true" />
<parameter name="PHY_DDR4_AC_MODE_ENUM" value="OUT_OCT_40_CAL" />
<parameter name="MEM_DDR4_R_DERIVED_ODT3" value="-,-,-,-" />
<parameter name="PORT_MEM_DINVB_PINLOC_AUTOGEN_WCNT" value="3" />
@@ -3319,149 +4289,62 @@
<parameter
name="MEM_DDR4_R_DERIVED_ODT1"
value="ODT Disabled,(Drive) RZQ/7 (34 Ohm),-,-" />
- <parameter name="DIAG_RLD2_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="PHY_CK_CALIBRATED_OCT" value="true" />
- <parameter name="MEM_RLD3_TCKDK_MAX_CYC" value="0.27" />
- <parameter name="PRI_HMC_CFG_PDN_PERIOD" value="0" />
<parameter name="MEM_DDR3_ROW_ADDR_WIDTH" value="14" />
- <parameter name="MEM_NUM_OF_LOGICAL_RANKS" value="2" />
<parameter name="SEC_HMC_CFG_OPEN_PAGE_EN" value="enable" />
<parameter name="CTRL_USER_PRIORITY_EN" value="false" />
- <parameter name="PHY_DDR4_USER_STARTING_VREFIN" value="70.0" />
- <parameter name="PRI_HMC_CFG_USER_RFSH_EN" value="disable" />
- <parameter name="MEM_DDR3_TDQSCK_PS" value="180" />
<parameter name="PHY_RLD3_USER_CK_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_LPDDR3_TIS_AC_MV" value="150" />
<parameter name="PRI_HMC_CFG_RLD3_REFRESH_SEQ0" value="15" />
<parameter name="DIAG_QDR4_BYPASS_USER_STAGE" value="true" />
<parameter name="PHY_QDR4_DATA_IO_STD_ENUM" value="unset" />
+ <parameter name="MEM_DDR4_IDEAL_VREF_IN_PCT" value="61.0" />
<parameter name="PRI_HMC_CFG_RLD3_REFRESH_SEQ3" value="61440" />
<parameter name="PRI_HMC_CFG_RLD3_REFRESH_SEQ2" value="3840" />
<parameter name="PHY_QDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="MEM_DDR3_R_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
<parameter name="PRI_HMC_CFG_RLD3_REFRESH_SEQ1" value="240" />
<parameter name="PHY_PING_PONG_EN" value="false" />
- <parameter name="MEM_DDR4_TDQSS_CYC" value="0.27" />
<parameter name="DIAG_DDR3_EX_DESIGN_ISSP_EN" value="true" />
- <parameter name="MEM_DDR3_CS_WIDTH" value="1" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_5" value="0.0" />
<parameter name="BOARD_DDR4_USER_WDATA_SLEW_RATE" value="2.0" />
- <parameter name="PORT_MEM_DQ_PINLOC_40" value="0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_4" value="0.0" />
- <parameter name="MEM_DDR3_BANK_ADDR_WIDTH" value="3" />
- <parameter name="PORT_MEM_DQ_PINLOC_41" value="0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_3" value="0.0" />
- <parameter name="DIAG_QDR2_BYPASS_STRESS_STAGE" value="true" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_2" value="0.0" />
<parameter name="MEM_QDR4_DEVICE_WIDTH" value="1" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_1" value="0.0" />
- <parameter name="PINS_C2L_DRIVEN_10" value="0" />
<parameter name="PORT_MEM_A_PINLOC_14" value="0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_0" value="0.0" />
<parameter name="PORT_MEM_A_PINLOC_13" value="0" />
- <parameter name="MEM_DDR3_W_ODT3_4X4" value="on,on,off,off" />
<parameter name="PORT_MEM_A_PINLOC_16" value="0" />
<parameter name="PORT_MEM_A_PINLOC_15" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_48" value="0" />
<parameter name="PHY_QDR4_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="PINS_C2L_DRIVEN_12" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_46" value="0" />
- <parameter name="PINS_C2L_DRIVEN_11" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_47" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_44" value="0" />
- <parameter name="DIAG_LPDDR3_BYPASS_REPEAT_STAGE" value="true" />
- <parameter name="PORT_MEM_DQ_PINLOC_45" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_42" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_43" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_45" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_46" value="0" />
- <parameter name="SEC_HMC_CFG_RD_TO_RD" value="3" />
<parameter name="PORT_MEM_DQA_PINLOC_43" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_44" value="0" />
- <parameter name="PORT_AFI_WDATA_VALID_WIDTH" value="1" />
<parameter name="MEM_DDR3_W_ODT1_4X4" value="off,off,on,on" />
<parameter name="MEM_DDR3_W_ODT1_4X2" value="on,on,off,off" />
<parameter name="DIAG_EXPORT_PLL_LOCKED" value="false" />
<parameter name="PORT_MEM_DQA_PINLOC_47" value="0" />
<parameter name="PRI_HMC_CFG_ADDR_ORDER" value="chip_row_bank_col" />
<parameter name="PORT_MEM_DQA_PINLOC_48" value="0" />
- <parameter name="PORT_MEM_K_PINLOC_5" value="0" />
<parameter name="PORT_MEM_A_PINLOC_10" value="0" />
- <parameter name="PORT_MEM_K_PINLOC_4" value="0" />
- <parameter name="PINS_USAGE_12" value="0" />
<parameter name="PORT_MEM_A_PINLOC_12" value="0" />
<parameter name="PORT_MEM_A_PINLOC_11" value="0" />
- <parameter name="PORT_MEM_K_PINLOC_1" value="0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_8" value="0.0" />
<parameter name="MEM_RLD2_TCKDK_MAX_NS" value="0.3" />
- <parameter name="PORT_MEM_K_PINLOC_0" value="0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_7" value="0.0" />
<parameter name="BOARD_DDR3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
- <parameter name="PORT_MEM_K_PINLOC_3" value="0" />
<parameter name="PORT_MEM_CS_N_WIDTH" value="2" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_PS_GUI_6" value="0.0" />
- <parameter name="DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES" value="1" />
- <parameter name="PORT_MEM_K_PINLOC_2" value="0" />
- <parameter name="PHY_RLD3_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
<parameter name="MEM_LPDDR3_TDQSCKDL" value="614" />
<parameter name="BOARD_DDR4_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="PORT_MEM_Q_PINLOC_7" value="0" />
<parameter name="MEM_LPDDR3_TDQSCKDM" value="511" />
- <parameter name="PORT_MEM_Q_PINLOC_6" value="0" />
- <parameter name="PORT_MEM_Q_PINLOC_9" value="0" />
- <parameter name="PORT_MEM_Q_PINLOC_8" value="0" />
- <parameter name="BOARD_DDR4_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="PORT_MEM_Q_PINLOC_3" value="0" />
- <parameter name="PORT_MEM_Q_PINLOC_2" value="0" />
- <parameter name="PRI_HMC_CFG_DQSTRK_TO_VALID_LAST" value="27" />
- <parameter name="PORT_MEM_Q_PINLOC_5" value="0" />
- <parameter name="PORT_MEM_Q_PINLOC_4" value="0" />
- <parameter name="BOARD_QDR4_RDATA_ISI_NS" value="0.0" />
- <parameter name="MEM_LPDDR3_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="PORT_MEM_Q_PINLOC_1" value="0" />
<parameter name="MEM_LPDDR3_TDQSCKDS" value="220" />
- <parameter name="PORT_MEM_Q_PINLOC_0" value="0" />
<parameter name="MEM_DDR4_R_DERIVED_ODTN" value="Rank 0,Rank 1,-,-" />
- <parameter name="DIAG_BYPASS_DEFAULT_PATTERN" value="false" />
- <parameter name="PINS_INVERT_WR_0" value="537002016" />
<parameter
name="DIAG_LPDDR3_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
- <parameter name="PINS_INVERT_WR_1" value="2048" />
- <parameter name="PINS_INVERT_WR_2" value="0" />
<parameter name="BOARD_DDR4_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="DIAG_QDR4_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
- <parameter name="PINS_INVERT_WR_3" value="8390656" />
- <parameter name="DIAG_EXPORT_PLL_REF_CLK_OUT" value="false" />
<parameter name="DIAG_QDR4_INFI_TG2_ERR_TEST" value="false" />
- <parameter name="PINS_INVERT_WR_4" value="537002016" />
- <parameter name="PINS_INVERT_WR_5" value="0" />
- <parameter name="PINS_INVERT_WR_6" value="0" />
- <parameter name="PINS_INVERT_WR_7" value="0" />
- <parameter name="PINS_INVERT_WR_8" value="0" />
- <parameter name="PINS_INVERT_WR_9" value="0" />
- <parameter name="DBI_WR_ENABLE" value="false" />
- <parameter name="PORT_DFT_NF_IOAUX_PIO_OUT_WIDTH" value="8" />
<parameter name="PORT_AFI_PE_N_WIDTH" value="1" />
- <parameter name="MEM_RLD2_BL" value="4" />
- <parameter name="PORT_MEM_DQ_PINLOC_26" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_27" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_24" value="154" />
- <parameter name="PORT_MEM_DQ_PINLOC_25" value="0" />
<parameter name="MEM_RLD2_QK_WIDTH" value="1" />
<parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER" value="true" />
- <parameter name="PRI_HMC_CFG_MPS_DQSTRK_DISABLE" value="disable" />
- <parameter name="PORT_MEM_DQ_PINLOC_22" value="157437074" />
<parameter name="PORT_MEM_DQA_PINLOC_30" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_23" value="160587927" />
<parameter name="PORT_MEM_DQA_PINLOC_31" value="0" />
- <parameter name="PRI_HMC_CFG_MRR_TO_VALID" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_20" value="146943114" />
<parameter
name="MEM_QDR4_PD_OUTPUT_DRIVE_MODE_ENUM"
value="QDR4_OUTPUT_DRIVE_25_PCT" />
- <parameter name="EX_DESIGN_GUI_QDR2_GEN_SIM" value="true" />
- <parameter name="PORT_MEM_DQ_PINLOC_21" value="152189069" />
<parameter name="EX_DESIGN_GUI_RLD3_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
<parameter name="PORT_MEM_DQA_PINLOC_23" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_24" value="0" />
@@ -3470,50 +4353,24 @@
<parameter name="PORT_MEM_DQA_PINLOC_22" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_27" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_28" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_28" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_25" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_29" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_26" value="0" />
<parameter name="SEC_HMC_CFG_MPS_DQSTRK_DISABLE" value="disable" />
<parameter name="PORT_MEM_DQA_PINLOC_29" value="0" />
- <parameter name="MEM_LPDDR3_W_ODT1_4X4" value="off,off,off,off" />
<parameter name="CTRL_DDR3_WR_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="MEM_DDR4_SPD_144_DB_VREFDQ" value="37" />
<parameter name="PHY_LPDDR3_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="DIAG_EXT_DOCS" value="false" />
- <parameter name="MEM_DDR4_ALERT_PAR_EN" value="true" />
- <parameter name="DIAG_DDR4_EX_DESIGN_ISSP_EN" value="true" />
- <parameter name="PRI_HMC_CFG_POWER_SAVING_EXIT_CYC" value="3" />
- <parameter name="PORT_MEM_DQ_PINLOC_30" value="0" />
- <parameter name="PORT_AFI_LBK0_N_WIDTH" value="1" />
- <parameter name="BOARD_RLD3_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="PINS_USAGE_10" value="0" />
<parameter name="DIAG_DDR4_SKIP_CA_LEVEL" value="false" />
- <parameter name="PINS_USAGE_11" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_37" value="0" />
- <parameter name="BOARD_DDR4_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter name="DIAG_LPDDR3_EX_DESIGN_ISSP_EN" value="true" />
- <parameter name="PORT_MEM_DQ_PINLOC_38" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_35" value="0" />
- <parameter name="BOARD_LPDDR3_AC_TO_CK_SKEW_NS" value="0.0" />
- <parameter name="PORT_MEM_DQ_PINLOC_36" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_33" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_41" value="0" />
<parameter name="MEM_DDR4_TTL_RM_WIDTH" value="0" />
- <parameter name="MEM_LPDDR3_W_ODTN_1X1" value="Rank 0" />
- <parameter name="PORT_MEM_DQ_PINLOC_34" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_42" value="0" />
<parameter name="MEM_LPDDR3_DRV_STR" value="LPDDR3_DRV_STR_40D_40U" />
- <parameter name="PORT_MEM_DQ_PINLOC_31" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_32" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_40" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_34" value="0" />
- <parameter name="MEM_RLD2_TDS_NS" value="0.17" />
<parameter name="PORT_MEM_DKA_PINLOC_5" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_35" value="0" />
- <parameter name="BOARD_LPDDR3_SKEW_WITHIN_AC_NS" value="0.0" />
<parameter name="PORT_MEM_DKA_PINLOC_4" value="0" />
- <parameter name="PORT_MEM_REF_N_PINLOC_0" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_32" value="0" />
<parameter name="MEM_QDR4_BL" value="2" />
<parameter name="PORT_MEM_DKA_PINLOC_3" value="0" />
@@ -3523,36 +4380,22 @@
<parameter name="PORT_MEM_DKA_PINLOC_1" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_39" value="0" />
<parameter name="PORT_MEM_DKA_PINLOC_0" value="0" />
- <parameter name="PORT_MEM_DQ_PINLOC_39" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_36" value="0" />
<parameter name="PORT_MEM_DQA_PINLOC_37" value="0" />
<parameter name="PHY_QDR4_USER_STARTING_VREFIN" value="70.0" />
- <parameter name="BOARD_DDR4_WCLK_ISI_NS" value="0.078" />
<parameter name="SEC_RDATA_TILE_INDEX" value="0" />
<parameter name="DIAG_DDR4_BYPASS_DEFAULT_PATTERN" value="false" />
<parameter name="BOARD_DDR3_SKEW_BETWEEN_DQS_NS" value="0.02" />
- <parameter name="PRI_HMC_CFG_WR_TO_WR_DIFF_CHIP" value="3" />
- <parameter name="DIAG_RLD2_TG_BE_PATTERN_LENGTH" value="8" />
<parameter name="MEM_DDR4_TTL_ODT_WIDTH" value="2" />
<parameter name="MEM_RLD2_TDH_NS" value="0.17" />
<parameter name="DIAG_LPDDR3_SEPARATE_READ_WRITE_ITFS" value="false" />
- <parameter name="PRI_HMC_CFG_WR_ODT_PERIOD" value="6" />
- <parameter name="PORT_MEM_DKB_N_WIDTH" value="1" />
<parameter name="MEM_DDR3_ADDR_WIDTH" value="1" />
<parameter name="MEM_DDR3_R_ODT0_4X4" value="off,off,off,off" />
<parameter name="MEM_DDR3_R_ODT0_4X2" value="off,off,on,on" />
- <parameter name="MEM_DDR4_TTL_CHIP_ID_WIDTH" value="0" />
- <parameter name="MEM_DDR3_W_ODT1_2X2" value="on,on" />
<parameter name="MEM_RLD3_DEVICE_WIDTH" value="1" />
- <parameter name="DIAG_QDR2_USE_TG_AVL_2" value="false" />
<parameter name="PORT_CTRL_AMM_BCOUNT_WIDTH" value="7" />
- <parameter name="PHY_RLD2_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_DDR3_R_ODT1_2X2" value="on,off" />
- <parameter name="MEM_DDR4_DEFAULT_VREFOUT" value="false" />
<parameter name="MEM_DDR3_W_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR3_W_ODT0_4X4" value="on,on,off,off" />
- <parameter name="BOARD_QDR2_K_SLEW_RATE" value="4.0" />
- <parameter name="MEM_LPDDR3_R_ODT2_4X4" value="on,on,off,off" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_5" value="100.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_6" value="100.0" />
<parameter name="MEM_DDR3_DLL_EN" value="true" />
@@ -3560,153 +4403,74 @@
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_8" value="100.0" />
<parameter name="PHY_DDR3_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="SEC_HMC_CFG_ACT_TO_PCH" value="20" />
- <parameter name="MEM_DDR4_ASR_ENUM" value="DDR4_ASR_MANUAL_NORMAL" />
- <parameter name="SEC_HMC_CFG_MMR_CMD_TO_VALID" value="16" />
<parameter name="SEC_HMC_CFG_4_ACT_TO_ACT" value="14" />
- <parameter name="CTRL_DDR3_RD_TO_WR_SAME_CHIP_DELTA_CYCS" value="0" />
- <parameter name="BOARD_RLD3_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
- <parameter name="MEM_QDR2_TSD_NS" value="0.23" />
- <parameter
- name="PHY_RLD3_USER_PERIODIC_OCT_RECAL_ENUM"
- value="PERIODIC_OCT_RECAL_AUTO" />
<parameter name="DIAG_EXPORT_VJI" value="false" />
<parameter name="DIAG_QDR4_EX_DESIGN_ISSP_EN" value="true" />
<parameter name="PLL_VCO_FREQ_PS_STR" value="834 ps" />
- <parameter name="PHY_DDR4_DATA_OUT_MODE_ENUM" value="OUT_OCT_34_CAL" />
- <parameter name="PORT_MEM_REF_N_WIDTH" value="1" />
<parameter name="PORT_MEM_LBK1_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="PHY_QDR4_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="SEC_HMC_CFG_SB_DDR4_MR3" value="197120" />
- <parameter name="EX_DESIGN_GUI_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
- <parameter name="MEM_LPDDR3_W_ODT2_4X4" value="on,on,on,on" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_AUTOGEN_WCNT" value="129" />
<parameter name="PHY_QDR2_PING_PONG_EN" value="false" />
- <parameter name="PHY_DDR4_USER_AC_MODE_ENUM" value="unset" />
- <parameter name="SEC_HMC_CFG_SB_DDR4_MR5" value="1056" />
- <parameter name="SEC_HMC_CFG_SB_DDR4_MR4" value="262144" />
<parameter name="DIAG_EXPOSE_DFT_SIGNALS" value="false" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_0" value="0.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_1" value="0.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_2" value="0.0" />
<parameter name="MEM_DDR4_TREFI_CYC" value="9360" />
- <parameter name="DIAG_DDR3_BYPASS_STRESS_STAGE" value="true" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_3" value="0.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_4" value="0.0" />
- <parameter name="BOARD_LPDDR3_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="SEC_HMC_CFG_SRF_TO_ZQ_CAL" value="449" />
- <parameter name="PHY_QDR4_PING_PONG_EN" value="false" />
- <parameter name="BOARD_RLD3_USER_WCLK_ISI_NS" value="0.031" />
- <parameter name="PORT_MEM_DKB_WIDTH" value="1" />
- <parameter name="PORT_MEM_CQ_N_PINLOC_1" value="0" />
- <parameter name="CTRL_QDR4_AVL_SYMBOL_WIDTH" value="9" />
+ <parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_GUI_4" value="0.0" />
+ <parameter name="BOARD_RLD3_USER_WCLK_ISI_NS" value="0.031" />
<parameter name="DIAG_QDR2_ABSTRACT_PHY" value="false" />
- <parameter name="PORT_MEM_CQ_N_PINLOC_0" value="0" />
<parameter name="MEM_RLD2_TQKH_HCYC" value="0.9" />
- <parameter name="MEM_LPDDR3_ODT_WIDTH" value="1" />
- <parameter name="MEM_DDR4_TTL_CS_WIDTH" value="2" />
<parameter name="MEM_DDR3_TTL_DQ_WIDTH" value="72" />
<parameter name="DIAG_LPDDR3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="MEM_TTL_DATA_WIDTH" value="72" />
- <parameter name="MEM_DDR4_TDVWP_UI" value="0.72" />
- <parameter name="PHY_LPDDR3_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="PORT_CTRL_SELF_REFRESH_REQ_WIDTH" value="4" />
- <parameter name="CTRL_RLD2_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="MEM_DDR4_TRCD_CYC" value="17" />
<parameter name="PORT_MEM_RPS_N_PINLOC_0" value="0" />
- <parameter name="PHY_RLD3_USER_STARTING_VREFIN" value="70.0" />
- <parameter name="PRI_HMC_CFG_RD_TO_WR_DIFF_BG" value="5" />
<parameter name="BOARD_RLD3_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
<parameter
name="MEM_DDR4_VREFDQ_TRAINING_RANGE"
value="DDR4_VREFDQ_TRAINING_RANGE_1" />
<parameter name="MEM_LPDDR3_TIH_PS" value="100" />
- <parameter name="PORT_MEM_DQS_PINLOC_12" value="0" />
<parameter name="PHY_RLD2_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="PORT_MEM_DQS_PINLOC_11" value="0" />
- <parameter name="MEM_DDR3_R_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
<parameter name="DIAG_QDR4_USE_TG_AVL_2" value="false" />
- <parameter name="PORT_MEM_DQS_PINLOC_10" value="0" />
- <parameter name="PHY_QDR2_MEM_CLK_FREQ_MHZ" value="633.333" />
<parameter name="MEM_DDR3_TTL_ODT_WIDTH" value="1" />
- <parameter name="BOARD_RLD3_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="PORT_MEM_LDB_N_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="MEM_DDR4_DQS_WIDTH" value="9" />
- <parameter name="MEM_LPDDR3_TRCD_CYC" value="17" />
- <parameter name="PRI_HMC_CFG_REORDER_RDATA" value="enable" />
<parameter name="PRI_HMC_CFG_WR_ODT_ON" value="0" />
- <parameter name="BOARD_DDR3_CK_SLEW_RATE" value="4.0" />
- <parameter name="PRI_HMC_CFG_RB_RESERVED_ENTRY" value="8" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_1" value="196276413" />
<parameter name="PORT_MEM_WE_N_PINLOC_AUTOGEN_WCNT" value="2" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_0" value="199425082" />
<parameter name="MEM_DDR4_DQ_PER_DQS" value="8" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_3" value="189978807" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_2" value="193127610" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_5" value="183681201" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_4" value="186830004" />
- <parameter name="BOARD_LPDDR3_USER_WDATA_ISI_NS" value="0.0" />
- <parameter name="DIAG_USE_RS232_UART" value="false" />
<parameter name="PRI_HMC_CFG_SHORT_DQSTRK_CTRL_EN" value="disable" />
<parameter name="MEM_LPDDR3_TIS_PS" value="75" />
- <parameter name="MEM_RLD3_WRITE_PROTOCOL_ENUM" value="RLD3_WRITE_1BANK" />
<parameter name="DIAG_SOFT_NIOS_MODE" value="SOFT_NIOS_MODE_DISABLED" />
<parameter name="PINS_GPIO_MODE_11" value="0" />
<parameter name="MEM_RLD3_ODT_MODE_ENUM" value="RLD3_ODT_40" />
<parameter name="PINS_GPIO_MODE_10" value="0" />
- <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER" value="true" />
<parameter name="PINS_GPIO_MODE_12" value="0" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_7" value="177383595" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_6" value="180532398" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_9" value="171085989" />
- <parameter name="UNUSED_MEM_PINS_PINLOC_8" value="174234792" />
<parameter name="PHY_DDR4_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="PHY_RLD3_CONFIG_ENUM" value="CONFIG_PHY_ONLY" />
<parameter name="BOARD_QDR2_SKEW_WITHIN_Q_NS" value="0.0" />
<parameter name="PHY_QDR4_USER_CK_MODE_ENUM" value="unset" />
<parameter name="SEC_HMC_CFG_DQSTRK_TO_VALID_LAST" value="27" />
- <parameter name="MEM_DDR4_ALERT_N_DQS_GROUP" value="0" />
<parameter name="PORT_MEM_DK_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="PRI_HMC_CFG_SRF_AUTOEXIT_EN" value="disable" />
<parameter name="PLL_FBCLK_MUX_1" value="pll_fbclk_mux_1_glb" />
<parameter name="PRI_HMC_CFG_ACT_TO_PCH" value="20" />
<parameter name="PLL_FBCLK_MUX_2" value="pll_fbclk_mux_2_m_cnt" />
<parameter name="MEM_DDR4_TRRD_L_CYC" value="5" />
<parameter name="MEM_DDR4_W_DERIVED_ODTN" value="Rank 0,Rank 1,-,-" />
- <parameter name="MEM_DDR4_TRCD_NS" value="14.06" />
<parameter name="PORT_MEM_LBK0_N_WIDTH" value="1" />
- <parameter name="MEM_DDR3_DQ_WIDTH" value="72" />
- <parameter name="MEM_LPDDR3_TWL_CYC" value="6" />
<parameter name="MEM_DDR4_W_DERIVED_ODT2" value="-,-,-,-" />
- <parameter name="BOARD_LPDDR3_TDS_DERATING_PS" value="0" />
<parameter name="MEM_DDR4_W_DERIVED_ODT3" value="-,-,-,-" />
<parameter name="MEM_DDR4_TRTP_CYC" value="9" />
<parameter name="PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter
- name="MEM_DDR4_VREFDQ_TRAINING_RANGE_DISP"
- value="Range 2 - 45% to 77.5%" />
- <parameter
- name="DIAG_DDR3_EXPORT_SEQ_AVALON_SLAVE"
- value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
- <parameter name="MEM_LPDDR3_DM_EN" value="true" />
<parameter name="DIAG_DDR4_CAL_ADDR0" value="0" />
<parameter
name="MEM_DDR4_W_DERIVED_ODT0"
- value="(Nominal) ODT Disabled,ODT Disabled,-,-" />
+ value="(Park) Park ODT off,ODT Disabled,-,-" />
<parameter name="DIAG_DDR4_CAL_ADDR1" value="8" />
<parameter
name="MEM_DDR4_W_DERIVED_ODT1"
- value="ODT Disabled,(Nominal) ODT Disabled,-,-" />
+ value="ODT Disabled,(Park) Park ODT off,-,-" />
<parameter name="BOARD_QDR4_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter
name="EX_DESIGN_GUI_QDR4_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
- <parameter name="PORT_MEM_QKB_N_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="PHY_DDR4_REF_CLK_FREQ_MHZ" value="25.0" />
- <parameter name="MEM_QDR2_THA_NS" value="0.18" />
- <parameter name="BOARD_LPDDR3_WDATA_SLEW_RATE" value="2.0" />
- <parameter name="MEM_DDR4_SPD_137_RCD_CA_DRV" value="101" />
<parameter name="BOARD_RLD3_AC_TO_CK_SKEW_NS" value="0.0" />
- <parameter name="PHY_RLD2_RATE_ENUM" value="RATE_HALF" />
<parameter name="UNUSED_DQS_BUSES_LANELOC_AUTOGEN_WCNT" value="11" />
<parameter name="PORT_MEM_D_PINLOC_13" value="0" />
<parameter name="PORT_MEM_D_PINLOC_12" value="0" />
@@ -3714,7 +4478,6 @@
<parameter name="PORT_MEM_D_PINLOC_11" value="0" />
<parameter name="PORT_MEM_D_PINLOC_10" value="0" />
<parameter name="PORT_MEM_D_PINLOC_17" value="0" />
- <parameter name="DIAG_DDR4_SIM_CAL_MODE_ENUM" value="SIM_CAL_MODE_SKIP" />
<parameter name="PORT_MEM_D_PINLOC_16" value="0" />
<parameter name="MEM_DDR4_ALERT_N_AC_PIN" value="0" />
<parameter name="PORT_MEM_D_PINLOC_15" value="0" />
@@ -3722,154 +4485,77 @@
<parameter name="PORT_MEM_BA_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="PORT_MEM_D_PINLOC_19" value="0" />
<parameter name="PORT_MEM_D_PINLOC_18" value="0" />
- <parameter name="CTRL_LPDDR3_MMR_EN" value="false" />
<parameter name="PORT_CTRL_ECC_CMD_INFO_WIDTH" value="3" />
- <parameter name="PHY_QDR2_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="EX_DESIGN_GUI_LPDDR3_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
<parameter name="EX_DESIGN_GUI_QDR2_GEN_SYNTH" value="true" />
<parameter name="PORT_MEM_QK_PINLOC_3" value="0" />
<parameter name="PORT_MEM_QK_PINLOC_4" value="0" />
<parameter name="PREAMBLE_MODE" value="preamble_one_cycle" />
<parameter name="PORT_MEM_QK_PINLOC_5" value="0" />
- <parameter name="MEM_DDR3_CKE_WIDTH" value="1" />
<parameter name="CTRL_DDR4_RD_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="PORT_MEM_D_PINLOC_20" value="0" />
<parameter name="PORT_MEM_QK_PINLOC_0" value="0" />
- <parameter name="PLL_REF_CLK_FREQ_PS_STR" value="40032 ps" />
<parameter name="PORT_MEM_QK_PINLOC_1" value="0" />
<parameter name="PORT_MEM_QK_PINLOC_2" value="0" />
<parameter name="PORT_MEM_D_PINLOC_24" value="0" />
<parameter name="PORT_MEM_D_PINLOC_23" value="0" />
- <parameter name="PRI_HMC_CFG_DQS_TRACKING_EN" value="disable" />
<parameter name="PORT_MEM_D_PINLOC_22" value="0" />
<parameter name="PORT_MEM_D_PINLOC_21" value="0" />
<parameter name="BOARD_LPDDR3_TIH_DERATING_PS" value="0" />
<parameter name="PORT_MEM_D_PINLOC_28" value="0" />
<parameter name="PORT_MEM_D_PINLOC_27" value="0" />
- <parameter name="BOARD_QDR4_DK_TO_CK_SKEW_NS" value="-0.02" />
<parameter name="PORT_MEM_D_PINLOC_26" value="0" />
- <parameter name="MEM_DDR4_CTRL_CFG_WRITE_ODT_RANK" value="33" />
<parameter name="PORT_MEM_D_PINLOC_25" value="0" />
<parameter name="BOARD_QDR4_BRD_SKEW_WITHIN_QK_NS" value="0.02" />
<parameter name="PHY_DDR4_USER_PING_PONG_EN" value="false" />
- <parameter name="PORT_MEM_BWS_N_PINLOC_AUTOGEN_WCNT" value="3" />
- <parameter name="MEM_DDR4_RCD_CS_IBT_ENUM" value="DDR4_RCD_CS_IBT_100" />
<parameter name="CTRL_DDR3_WR_TO_RD_SAME_CHIP_DELTA_CYCS" value="0" />
<parameter name="PORT_MEM_D_PINLOC_29" value="0" />
<parameter name="BOARD_DDR4_USER_RCLK_ISI_NS" value="0.094" />
<parameter name="CTRL_DDR3_REORDER_EN" value="true" />
- <parameter name="PHY_DDR3_DATA_OUT_MODE_ENUM" value="unset" />
<parameter name="BOARD_DDR4_WCLK_SLEW_RATE" value="4.0" />
<parameter name="CTRL_DDR3_SELF_REFRESH_EN" value="false" />
- <parameter name="SEC_HMC_CFG_SRF_ENTRY_EXIT_BLOCK" value="presrfexit" />
- <parameter name="MEM_QDR4_DQ_PER_RD_GROUP" value="18" />
<parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="MEM_DDR3_PD_ENUM" value="DDR3_PD_OFF" />
<parameter name="DIAG_LPDDR3_EX_DESIGN_SEPARATE_RZQS" value="false" />
<parameter name="MEM_DDR4_TINIT_US" value="500" />
<parameter name="MEM_DDR4_TRP_CYC" value="17" />
- <parameter name="PINS_DB_OE_BYPASS_AUTOGEN_WCNT" value="13" />
<parameter name="SEC_HMC_CFG_COL_CMD_SLOT" value="2" />
<parameter name="DIAG_QDR4_ABSTRACT_PHY" value="false" />
- <parameter name="MEM_LPDDR3_R_ODT1_2X2" value="off,off" />
- <parameter name="SEC_HMC_CFG_USER_RFSH_EN" value="disable" />
<parameter name="MEM_DDR4_CKE_WIDTH" value="2" />
- <parameter name="PHY_RLD2_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="MEM_LPDDR3_R_ODT0_4X4" value="off,off,on,on" />
<parameter name="PORT_MEM_BA_PINLOC_5" value="0" />
<parameter name="PORT_MEM_BA_PINLOC_4" value="0" />
<parameter name="PORT_MEM_BA_PINLOC_3" value="0" />
<parameter name="PORT_MEM_BA_PINLOC_2" value="0" />
- <parameter name="MEM_LPDDR3_TIH_DC_MV" value="100" />
<parameter name="PORT_MEM_BA_PINLOC_1" value="0" />
<parameter name="BOARD_LPDDR3_USER_RCLK_ISI_NS" value="0.0" />
<parameter name="PORT_MEM_BA_PINLOC_0" value="86066178" />
- <parameter name="PORT_HPS_EMIF_E2H_WIDTH" value="4096" />
- <parameter
- name="CTRL_LPDDR3_ADDR_ORDER_ENUM"
- value="LPDDR3_CTRL_ADDR_ORDER_CS_R_B_C" />
- <parameter name="DIAG_RLD2_BYPASS_STRESS_STAGE" value="true" />
- <parameter name="PORT_MEM_ACT_N_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_ACT_N_PINLOC_0" value="52225" />
+ <parameter name="SYS_INFO_DEVICE_DIE_REVISIONS" value="" />
<parameter name="PRI_HMC_CFG_PDN_TO_VALID" value="5" />
- <parameter name="PHY_QDR2_USER_STARTING_VREFIN" value="70.0" />
<parameter name="MEM_DDR3_CFG_GEN_DBE" value="false" />
- <parameter name="PORT_MEM_RESET_N_WIDTH" value="1" />
- <parameter name="MEM_DDR4_RCD_COMMAND_LATENCY" value="1" />
<parameter name="DIAG_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="BOARD_DDR4_RDATA_SLEW_RATE" value="4.0" />
- <parameter name="PHY_QDR2_AC_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_DDR4_SPD_142_DRAM_VREFDQ_R2" value="29" />
- <parameter name="MEM_LPDDR3_TRTP_CYC" value="4" />
- <parameter name="PORT_MEM_CK_WIDTH" value="2" />
- <parameter name="MEM_RLD2_WIDTH_EXPANDED" value="false" />
- <parameter name="PRI_HMC_CFG_ARBITER_TYPE" value="twot" />
- <parameter name="PHY_QDR2_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="MEM_RLD2_TQKQ_MIN_NS" value="-0.12" />
- <parameter name="CTRL_LPDDR3_WR_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="MEM_DDR3_NUM_OF_LOGICAL_RANKS" value="1" />
<parameter name="EX_DESIGN_GUI_QDR2_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
- <parameter name="CTRL_DDR4_REORDER_EN" value="true" />
- <parameter name="MEM_LPDDR3_CTRL_CFG_WRITE_ODT_CHIP" value="0" />
- <parameter name="PLL_C_CNT_BYPASS_EN_1" value="false" />
- <parameter name="PLL_C_CNT_BYPASS_EN_0" value="false" />
- <parameter name="PLL_C_CNT_BYPASS_EN_3" value="false" />
<parameter name="PORT_CTRL_USER_REFRESH_REQ_WIDTH" value="4" />
- <parameter name="PLL_C_CNT_BYPASS_EN_2" value="false" />
- <parameter name="PLL_C_CNT_BYPASS_EN_5" value="true" />
- <parameter name="PLL_C_CNT_BYPASS_EN_4" value="false" />
- <parameter name="PLL_C_CNT_BYPASS_EN_7" value="true" />
- <parameter name="BOARD_DDR4_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="DIAG_RLD3_CA_LEVEL_EN" value="false" />
<parameter
name="EX_DESIGN_GUI_RLD3_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
- <parameter name="PLL_C_CNT_BYPASS_EN_6" value="true" />
<parameter name="BOARD_DDR4_TIH_DERATING_PS" value="0" />
<parameter name="PHY_DDR3_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
- <parameter name="MEM_DDR4_TMRD_CK_CYC" value="8" />
- <parameter name="PLL_C_CNT_BYPASS_EN_8" value="true" />
<parameter name="MEM_LPDDR3_TMRW_CK_CYC" value="10" />
<parameter name="BOARD_RLD3_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="PHY_DDR3_DEFAULT_IO" value="true" />
+ <parameter name="MEM_DDR4_IDEAL_VREF_OUT_PCT" value="50.0" />
<parameter name="MEM_LPDDR3_BANK_ADDR_WIDTH" value="3" />
<parameter name="PRI_HMC_CFG_ARF_TO_VALID" value="97" />
<parameter name="PHY_QDR4_AC_MODE_ENUM" value="unset" />
- <parameter name="PORT_MEM_A_PINLOC_4" value="79768647" />
- <parameter name="PORT_MEM_A_PINLOC_5" value="82917453" />
- <parameter name="PORT_MEM_A_PINLOC_2" value="70322241" />
- <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER" value="true" />
- <parameter name="PORT_MEM_A_PINLOC_3" value="73471044" />
- <parameter name="PORT_MEM_DQA_PINLOC_9" value="0" />
- <parameter name="PORT_MEM_A_PINLOC_0" value="64024593" />
- <parameter name="PORT_MEM_A_PINLOC_1" value="67173438" />
- <parameter name="PORT_MEM_DQA_PINLOC_4" value="0" />
<parameter name="PORT_MEM_QK_N_WIDTH" value="1" />
- <parameter name="BOARD_QDR2_USER_WDATA_ISI_NS" value="0.063" />
- <parameter name="PORT_MEM_DQA_PINLOC_3" value="0" />
- <parameter name="MEM_DDR3_USE_DEFAULT_ODT" value="true" />
- <parameter name="PORT_MEM_DQA_PINLOC_2" value="0" />
- <parameter name="PORT_MEM_DQA_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_A_PINLOC_8" value="0" />
- <parameter name="PORT_MEM_DQA_PINLOC_8" value="0" />
- <parameter name="PORT_MEM_A_PINLOC_9" value="0" />
- <parameter name="PORT_MEM_DQA_PINLOC_7" value="0" />
- <parameter name="PORT_MEM_A_PINLOC_6" value="0" />
- <parameter name="PORT_MEM_DQA_PINLOC_6" value="0" />
- <parameter name="PORT_MEM_A_PINLOC_7" value="0" />
- <parameter name="PORT_MEM_DQA_PINLOC_5" value="0" />
<parameter name="BOARD_LPDDR3_IS_SKEW_WITHIN_AC_DESKEWED" value="true" />
<parameter name="PHY_DDR4_USER_CK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_QDR2_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="EX_DESIGN_GUI_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
- <parameter name="PORT_MEM_DQA_PINLOC_0" value="0" />
<parameter name="MEM_DDR3_ODT_WIDTH" value="1" />
- <parameter name="PORT_MEM_QKA_PINLOC_0" value="0" />
- <parameter name="PORT_MEM_QKA_PINLOC_1" value="0" />
- <parameter name="BOARD_DDR4_AC_ISI_NS" value="0.22" />
- <parameter name="PORT_MEM_QKA_PINLOC_2" value="0" />
- <parameter name="PORT_MEM_QKA_PINLOC_3" value="0" />
- <parameter name="PORT_CTRL_MMR_SLAVE_BCOUNT_WIDTH" value="2" />
<parameter name="PINS_OCT_MODE_2" value="0" />
<parameter name="PORT_MEM_DINVB_PINLOC_1" value="0" />
<parameter name="PLL_C_CNT_HIGH_0" value="2" />
@@ -3881,36 +4567,23 @@
<parameter name="PINS_OCT_MODE_1" value="262079" />
<parameter name="SEC_HMC_CFG_RB_RESERVED_ENTRY" value="8" />
<parameter name="PLL_C_CNT_HIGH_3" value="4" />
- <parameter name="MEM_DDR3_BL_ENUM" value="DDR3_BL_BL8" />
- <parameter name="PORT_MEM_QKA_PINLOC_4" value="0" />
- <parameter name="PORT_MEM_QKA_PINLOC_5" value="0" />
- <parameter name="MEM_DDR3_LRDIMM_EXTENDED_CONFIG" value="0x000000000000000000" />
<parameter name="MEM_QDR2_TWL_CYC" value="1" />
<parameter name="PLL_C_CNT_HIGH_8" value="256" />
<parameter name="PINS_OCT_MODE_8" value="0" />
<parameter name="PINS_OCT_MODE_9" value="0" />
- <parameter name="PRI_HMC_CFG_MPS_TO_VALID" value="768" />
<parameter name="PINS_OCT_MODE_6" value="0" />
<parameter name="PLL_C_CNT_HIGH_4" value="4" />
<parameter name="PINS_OCT_MODE_7" value="0" />
<parameter name="PLL_C_CNT_HIGH_5" value="256" />
- <parameter name="PHY_RLD3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="PINS_OCT_MODE_4" value="1056960510" />
<parameter name="PLL_C_CNT_HIGH_6" value="256" />
- <parameter name="BOARD_RLD3_SKEW_WITHIN_QK_NS" value="0.0" />
<parameter name="PINS_OCT_MODE_5" value="63" />
<parameter name="PLL_C_CNT_HIGH_7" value="256" />
- <parameter name="MEM_DDR4_TEMP_SENSOR_READOUT" value="false" />
<parameter name="CTRL_LPDDR3_AUTO_PRECHARGE_EN" value="false" />
- <parameter name="PORT_MEM_RWB_N_PINLOC_0" value="0" />
<parameter name="PHY_RLD3_USER_AC_MODE_ENUM" value="unset" />
<parameter name="MEM_RLD3_BANK_ADDR_WIDTH" value="4" />
- <parameter name="MEM_QDR4_DQ_PER_PORT_WIDTH" value="36" />
<parameter name="BOARD_DDR4_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="MEM_LPDDR3_TINIT_US" value="500" />
- <parameter name="DIAG_USE_BOARD_DELAY_MODEL" value="false" />
- <parameter name="DIAG_LPDDR3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
- <parameter name="CTRL_DDR3_AUTO_POWER_DOWN_EN" value="false" />
<parameter name="PORT_MEM_DINVB_PINLOC_2" value="0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_PHASE_GUI_7" value="0.0" />
<parameter name="MEM_DDR4_W_ODTN_1X1" value="Rank 0" />
@@ -3925,86 +4598,37 @@
<parameter name="PLL_EXTRA_CLK_DESIRED_PHASE_GUI_0" value="0.0" />
<parameter name="PHY_QDR2_DATA_IO_STD_ENUM" value="unset" />
<parameter name="PRI_HMC_CFG_PERIOD_DQSTRK_INTERVAL" value="512" />
- <parameter name="PLL_CP_SETTING" value="pll_cp_setting28" />
- <parameter name="MEM_QDR4_TQH_CYC" value="0.4" />
<parameter name="PHY_LPDDR3_USER_PING_PONG_EN" value="false" />
- <parameter name="MEM_RLD2_REFRESH_INTERVAL_US" value="0.24" />
<parameter name="DIAG_DDR4_ABSTRACT_PHY" value="false" />
<parameter name="MEM_DDR3_CTRL_CFG_READ_ODT_RANK" value="0" />
- <parameter name="PINS_GPIO_MODE_0" value="1" />
<parameter name="MEM_DATA_MASK_EN" value="true" />
- <parameter name="PRI_HMC_CFG_READ_ODT_CHIP" value="0" />
<parameter name="MEM_LPDDR3_R_DERIVED_ODT0" value="," />
- <parameter name="PINS_GPIO_MODE_2" value="0" />
<parameter name="MEM_LPDDR3_R_DERIVED_ODT1" value="," />
- <parameter name="PINS_GPIO_MODE_1" value="0" />
<parameter name="MEM_LPDDR3_R_DERIVED_ODT2" value="," />
- <parameter name="PINS_GPIO_MODE_4" value="0" />
<parameter name="MEM_LPDDR3_R_DERIVED_ODT3" value="," />
- <parameter name="PINS_GPIO_MODE_3" value="0" />
<parameter name="PORT_MEM_AINV_PINLOC_0" value="0" />
- <parameter name="PINS_GPIO_MODE_6" value="0" />
<parameter name="PORT_AFI_WE_N_WIDTH" value="1" />
- <parameter name="PINS_GPIO_MODE_5" value="0" />
- <parameter name="PINS_GPIO_MODE_8" value="0" />
- <parameter name="PINS_GPIO_MODE_7" value="0" />
- <parameter name="SEC_HMC_CFG_SRF_TO_VALID" value="513" />
- <parameter name="PINS_GPIO_MODE_9" value="0" />
<parameter name="PLL_EXTRA_CLK_DESIRED_PHASE_GUI_8" value="0.0" />
- <parameter name="MEM_DDR4_SPD_141_DRAM_VREFDQ_R1" value="29" />
- <parameter name="MEM_DDR4_MR5" value="328736" />
- <parameter name="MEM_DDR4_MR4" value="262144" />
<parameter
name="DIAG_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
- <parameter name="PLL_C_CNT_OUT_EN_8" value="false" />
- <parameter name="MEM_DDR4_MR6" value="394327" />
- <parameter name="MEM_DDR4_MR1" value="65537" />
- <parameter name="PLL_C_CNT_OUT_EN_5" value="false" />
- <parameter name="MEM_DDR4_MR0" value="2112" />
- <parameter name="PLL_C_CNT_OUT_EN_4" value="true" />
+ <parameter name="PHY_QDR2_CORE_CLKS_SHARING_EXPOSE_SLAVE_OUT" value="false" />
<parameter name="PHY_RLD2_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="MEM_DDR4_MR3" value="197120" />
- <parameter name="PLL_C_CNT_OUT_EN_7" value="false" />
- <parameter name="MEM_DDR4_MR2" value="131120" />
- <parameter name="PLL_C_CNT_OUT_EN_6" value="false" />
<parameter name="LANE_TIDS_1" value="168067584" />
<parameter name="LANE_TIDS_0" value="403177984" />
<parameter name="MEM_LPDDR3_R_DERIVED_ODTN" value="," />
<parameter name="LANE_TIDS_3" value="140518930" />
<parameter name="LANE_TIDS_2" value="35717208" />
<parameter name="LANE_TIDS_5" value="0" />
- <parameter name="CTRL_DDR4_SELF_REFRESH_EN" value="false" />
<parameter name="LANE_TIDS_4" value="886403" />
<parameter name="LANE_TIDS_7" value="0" />
<parameter name="LANE_TIDS_6" value="0" />
- <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER" value="true" />
<parameter name="LANE_TIDS_9" value="0" />
<parameter name="LANE_TIDS_8" value="0" />
- <parameter name="PORT_MEM_BG_WIDTH" value="2" />
- <parameter name="PLL_N_CNT_BYPASS_EN" value="true" />
- <parameter name="PORT_CAL_DEBUG_ADDRESS_WIDTH" value="24" />
- <parameter name="PLL_C_CNT_OUT_EN_1" value="true" />
- <parameter name="MEM_RLD2_DQ_WIDTH" value="9" />
- <parameter name="PORT_DFT_NF_CORE_CLK_LOCKED_WIDTH" value="2" />
- <parameter name="PLL_C_CNT_OUT_EN_0" value="true" />
- <parameter name="PLL_C_CNT_OUT_EN_3" value="true" />
- <parameter name="PLL_C_CNT_OUT_EN_2" value="true" />
- <parameter name="PHY_RLD2_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="BOARD_DDR4_USER_RDATA_ISI_NS" value="0.063" />
- <parameter name="MEM_LPDDR3_BL" value="LPDDR3_BL_BL8" />
- <parameter name="PORT_MEM_LBK0_N_PINLOC_0" value="0" />
- <parameter name="CENTER_TIDS_AUTOGEN_WCNT" value="3" />
- <parameter name="DIAG_DDR4_EX_DESIGN_SEPARATE_RZQS" value="false" />
- <parameter name="MEM_DDR3_DRV_STR_ENUM" value="DDR3_DRV_STR_RZQ_6" />
- <parameter name="BOARD_LPDDR3_AC_ISI_NS" value="0.0" />
<parameter name="MEM_LPDDR3_CTRL_CFG_READ_ODT_CHIP" value="0" />
- <parameter name="SEC_HMC_CFG_MPR_TO_VALID" value="16" />
<parameter name="MEM_QDR4_DK_WIDTH" value="4" />
- <parameter name="BOARD_DDR3_RDATA_ISI_NS" value="0.0" />
<parameter name="PORT_MEM_QKA_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="MEM_DDR4_R_ODTN_1X1" value="Rank 0" />
- <parameter name="SEC_HMC_CFG_PDN_TO_VALID" value="5" />
<parameter name="PORT_MEM_QK_N_PINLOC_2" value="0" />
<parameter name="PINS_WDB_AUTOGEN_WCNT" value="39" />
<parameter name="PORT_MEM_QK_N_PINLOC_3" value="0" />
@@ -4016,18 +4640,12 @@
<parameter name="SEC_HMC_CFG_ACT_TO_ACT_DIFF_BG" value="2" />
<parameter name="PORT_MEM_QK_N_PINLOC_1" value="0" />
<parameter name="BOARD_DDR4_WDATA_ISI_NS" value="0.16" />
- <parameter name="PORT_MEM_QKA_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="SEC_HMC_CFG_WR_TO_RD_DIFF_CHIP" value="6" />
- <parameter name="CTRL_DDR3_STARVE_LIMIT" value="63" />
- <parameter name="PORT_CAL_DEBUG_RDATA_WIDTH" value="32" />
<parameter name="PORT_MEM_CKE_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="MEM_QDR2_DATA_WIDTH" value="36" />
<parameter name="MEM_LPDDR3_TRAS_NS" value="42.5" />
- <parameter name="BOARD_RLD3_WCLK_ISI_NS" value="0.0" />
<parameter name="PHY_RLD3_AC_IO_STD_ENUM" value="unset" />
<parameter name="PHY_RLD2_DEFAULT_REF_CLK_FREQ" value="true" />
<parameter name="MEM_DDR3_CKE_PER_DIMM" value="1" />
- <parameter name="MEM_QDR4_WIDTH_EXPANDED" value="false" />
<parameter name="PORT_MEM_DQB_PINLOC_0" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_1" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_6" value="0" />
@@ -4036,167 +4654,91 @@
<parameter name="PORT_MEM_DQB_PINLOC_8" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_9" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_2" value="0" />
- <parameter name="MEM_LPDDR3_WLSELECT" value="Set A" />
<parameter name="PORT_MEM_DQB_PINLOC_3" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_4" value="0" />
<parameter name="PORT_MEM_DQB_PINLOC_5" value="0" />
<parameter name="MEM_DDR4_W_ODT0_1X1" value="on" />
- <parameter name="MEM_DDR4_TRAS_NS" value="33.0" />
- <parameter name="MEM_LPDDR3_TRFC_NS" value="210.0" />
<parameter name="PHY_DDR4_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter
name="DIAG_QDR4_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
<parameter name="PHY_QDR2_USER_AC_MODE_ENUM" value="unset" />
- <parameter name="DIAG_QDR4_SEPARATE_READ_WRITE_ITFS" value="false" />
<parameter name="MEM_DDR4_CK_WIDTH" value="2" />
<parameter name="SEC_HMC_CFG_SRF_AUTOEXIT_EN" value="disable" />
- <parameter name="PHY_QDR2_DEFAULT_REF_CLK_FREQ" value="true" />
- <parameter name="PHY_QDR4_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="MEM_DDR4_SPD_148_DRAM_DRV" value="0" />
<parameter name="PORT_CTRL_AMM_ADDRESS_WIDTH" value="27" />
<parameter name="MEM_RLD3_SPEEDBIN_ENUM" value="RLD3_SPEEDBIN_093E" />
<parameter name="MEM_DDR4_TRFC_NS" value="160.0" />
+ <parameter name="MEM_QDR4_SKIP_ODT_SWEEPING" value="true" />
<parameter name="MEM_QDR4_TRL_CYC" value="8" />
- <parameter name="MEM_DDR3_NUM_OF_DIMMS" value="1" />
- <parameter
- name="PHY_QDR4_USER_PERIODIC_OCT_RECAL_ENUM"
- value="PERIODIC_OCT_RECAL_AUTO" />
<parameter name="PORT_MEM_CA_PINLOC_2" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_1" value="0" />
- <parameter name="MEM_QDR4_CK_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
<parameter name="PORT_MEM_CA_PINLOC_0" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_6" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_5" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_4" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_3" value="0" />
- <parameter name="PHY_RLD2_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_QDR4_CR0" value="0" />
- <parameter name="BOARD_RLD3_USER_RCLK_SLEW_RATE" value="4.0" />
<parameter name="PORT_MEM_CA_PINLOC_9" value="0" />
<parameter name="MEM_QDR4_CR1" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_8" value="0" />
<parameter name="MEM_QDR4_CR2" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_7" value="0" />
- <parameter name="MEM_QDR4_DQ_PER_WR_GROUP" value="18" />
- <parameter name="PORT_CTRL_AMM_BYTEEN_WIDTH" value="72" />
<parameter name="SEC_HMC_CFG_RD_TO_PCH" value="5" />
- <parameter name="PHY_LPDDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_WRITE_DBI" value="false" />
- <parameter name="PORT_DFT_NF_PA_DPRIO_WRITEDATA_WIDTH" value="8" />
<parameter name="PHY_DDR4_CK_IO_STD_ENUM" value="IO_STD_SSTL_12" />
- <parameter name="MEM_DDR4_R_ODT0_4X4" value="off,off,off,off" />
- <parameter name="MEM_DDR4_R_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR3_TTL_CKE_WIDTH" value="1" />
<parameter name="MEM_RLD3_DQ_PER_DEVICE" value="36" />
<parameter name="DIAG_EXTRA_CONFIGS" value="" />
- <parameter name="MEM_DDR3_R_ODT2_4X4" value="off,off,off,off" />
<parameter name="PORT_MEM_AINV_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="MEM_LPDDR3_ADDR_WIDTH" value="10" />
- <parameter name="PHY_DDR4_PING_PONG_EN" value="false" />
- <parameter name="MEM_QDR2_TCCQO_NS" value="0.45" />
- <parameter name="IS_HPS" value="false" />
- <parameter name="SEC_HMC_CFG_ZQCL_TO_VALID" value="257" />
<parameter name="PORT_MEM_WPS_N_WIDTH" value="1" />
- <parameter name="BOARD_RLD3_MAX_DK_DELAY_NS" value="0.6" />
- <parameter name="CTRL_LPDDR3_AUTO_POWER_DOWN_CYCS" value="32" />
- <parameter name="PORT_MEM_DKA_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="BOARD_LPDDR3_RDATA_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED" value="false" />
- <parameter name="SEC_HMC_CFG_RD_TO_RD_DIFF_CHIP" value="3" />
<parameter name="PRI_HMC_CFG_WB_RESERVED_ENTRY" value="8" />
- <parameter name="SEC_HMC_CFG_ACT_TO_ACT_DIFF_BANK" value="3" />
- <parameter name="PORT_AFI_REF_N_WIDTH" value="1" />
- <parameter name="MEM_DDR3_DQ_PER_DQS" value="8" />
<parameter name="MEM_DDR4_SPD_139_DB_REV" value="0" />
- <parameter name="BOARD_QDR4_IS_SKEW_WITHIN_QK_DESKEWED" value="false" />
<parameter name="MEM_DDR4_LRDIMM_EXTENDED_CONFIG" value="" />
<parameter name="SEC_AC_TILE_INDEX" value="1" />
<parameter name="SEC_HMC_CFG_PCH_ALL_TO_VALID" value="9" />
- <parameter name="MEM_RLD3_TDS_AC_MV" value="150" />
<parameter name="MEM_LPDDR3_TINIT_CK" value="499" />
<parameter name="PORT_MEM_CK_PINLOC_5" value="0" />
<parameter name="MEM_DDR4_SELF_RFSH_ABORT" value="false" />
- <parameter name="PHY_RLD2_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="MEM_LPDDR3_W_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="PHY_QDR2_CK_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_BT_ENUM" value="DDR4_BT_SEQUENTIAL" />
- <parameter name="PHY_RLD3_AC_MODE_ENUM" value="unset" />
<parameter name="MEM_DDR4_CAL_MODE" value="0" />
<parameter name="MEM_DDR3_TRFC_CYC" value="171" />
<parameter name="SEC_HMC_CFG_PCH_TO_VALID" value="9" />
- <parameter name="EX_DESIGN_GUI_DDR3_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
<parameter name="BOARD_QDR4_RDATA_SLEW_RATE" value="2.5" />
- <parameter name="MEM_DDR4_TWR_NS" value="15.0" />
- <parameter name="MEM_LPDDR3_TRL_CYC" value="10" />
- <parameter name="CTRL_LPDDR3_USER_REFRESH_EN" value="false" />
<parameter name="PORT_MEM_CK_PINLOC_0" value="98623490" />
<parameter name="PORT_MEM_CK_PINLOC_3" value="0" />
<parameter name="PORT_MEM_CK_PINLOC_4" value="0" />
- <parameter name="MEM_LPDDR3_TDQSCK_DERV_PS" value="2" />
<parameter name="PORT_MEM_CK_PINLOC_1" value="0" />
- <parameter name="PHY_RLD3_CK_IO_STD_ENUM" value="unset" />
- <parameter name="BOARD_QDR4_USER_RDATA_SLEW_RATE" value="3.5" />
- <parameter name="PORT_MEM_CK_PINLOC_2" value="0" />
- <parameter name="PORT_CLKS_SHARING_SLAVE_IN_WIDTH" value="32" />
- <parameter name="PINS_INVERT_OE_9" value="0" />
- <parameter name="PORT_MEM_PAR_PINLOC_0" value="60417" />
- <parameter name="PLL_VCO_FREQ_MHZ_INT" value="1200" />
+ <parameter name="PHY_RLD3_CK_IO_STD_ENUM" value="unset" />
+ <parameter name="PORT_MEM_CK_PINLOC_2" value="0" />
<parameter name="PHY_DDR4_USER_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="PORT_MEM_PAR_PINLOC_1" value="0" />
<parameter name="MEM_DDR4_WTCL" value="18" />
- <parameter name="PINS_INVERT_OE_6" value="0" />
- <parameter name="PINS_INVERT_OE_5" value="63" />
<parameter name="MEM_RLD3_DEPTH_EXPANDED" value="false" />
- <parameter name="PINS_INVERT_OE_8" value="0" />
- <parameter name="PINS_INVERT_OE_7" value="0" />
- <parameter name="BOARD_QDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
- <parameter name="PINS_INVERT_OE_2" value="955224063" />
<parameter name="PRI_HMC_CFG_SB_DDR4_MR4" value="262144" />
- <parameter name="PINS_INVERT_OE_1" value="763363263" />
<parameter name="PRI_HMC_CFG_SB_DDR4_MR5" value="1056" />
- <parameter name="PINS_INVERT_OE_4" value="1056960510" />
- <parameter name="PINS_INVERT_OE_3" value="1073479600" />
<parameter name="PRI_HMC_CFG_SB_DDR4_MR3" value="197120" />
- <parameter name="PHY_LPDDR3_USER_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="BOARD_RLD3_USER_WDATA_ISI_NS" value="0.063" />
- <parameter name="MEM_DDR3_TDH_PS" value="55" />
- <parameter name="PINS_INVERT_OE_0" value="1056960510" />
<parameter
name="PHY_DDR3_CORE_CLKS_SHARING_ENUM"
value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="SEC_HMC_CFG_ENABLE_RC" value="enable" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_AUTOGEN_WCNT" value="13" />
<parameter name="MEM_RLD2_ODT_MODE_ENUM" value="RLD2_ODT_ON" />
<parameter
name="PHY_QDR2_CORE_CLKS_SHARING_ENUM"
value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="MEM_DDR3_TDS_PS" value="53" />
<parameter name="PHY_QDR4_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR3_TTL_RM_WIDTH" value="0" />
- <parameter name="SEC_HMC_CFG_ADDR_ORDER" value="chip_row_bank_col" />
<parameter name="PHY_QDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
- <parameter
- name="PHY_LPDDR3_USER_PERIODIC_OCT_RECAL_ENUM"
- value="PERIODIC_OCT_RECAL_AUTO" />
<parameter name="PRI_HMC_CFG_RLD3_MULTIBANK_MODE" value="singlebank" />
- <parameter name="BOARD_QDR4_USER_RDATA_ISI_NS" value="0.0" />
<parameter name="MEM_LPDDR3_TRAS_CYC" value="34" />
<parameter name="PHY_QDR4_RATE_ENUM" value="RATE_QUARTER" />
- <parameter name="PHY_QDR4_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="BOARD_RLD3_AC_ISI_NS" value="0.0" />
<parameter name="USER_CLK_RATIO" value="4" />
<parameter name="PORT_MEM_DQA_PINLOC_AUTOGEN_WCNT" value="49" />
- <parameter name="PHY_RLD2_USER_REF_CLK_FREQ_MHZ" value="-1.0" />
- <parameter name="PHY_RLD2_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="DIAG_SIM_CHECKER_SKIP_TG" value="false" />
<parameter name="MEM_DDR4_DB_RTT_NOM_ENUM" value="DDR4_DB_RTT_NOM_ODT_DISABLED" />
<parameter name="CTRL_DDR4_WR_TO_RD_SAME_CHIP_DELTA_CYCS" value="0" />
- <parameter name="DIAG_QDR4_BYPASS_REPEAT_STAGE" value="true" />
<parameter name="PORT_MEM_CK_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="MEM_DDR3_W_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
<parameter name="IS_ED_SLAVE" value="false" />
- <parameter name="PORT_AFI_RLAT_WIDTH" value="6" />
<parameter name="MEM_DDR3_W_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
<parameter name="PLL_USER_NUM_OF_EXTRA_CLKS" value="0" />
<parameter name="DIAG_DDR3_CAL_FULL_CAL_ON_RESET" value="true" />
@@ -4205,216 +4747,118 @@
<parameter name="MEM_RLD3_CS_WIDTH" value="1" />
<parameter name="MEM_DDR3_CTRL_CFG_WRITE_ODT_CHIP" value="0" />
<parameter name="PHY_LPDDR3_STARTING_VREFIN" value="70.0" />
- <parameter name="PORT_AFI_AINV_WIDTH" value="1" />
<parameter name="EX_DESIGN_GUI_LPDDR3_GEN_SYNTH" value="true" />
<parameter name="HMC_TIDS_AUTOGEN_WCNT" value="3" />
<parameter name="PORT_MEM_AP_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="DIAG_LPDDR3_USE_TG_AVL_2" value="false" />
<parameter name="SEC_HMC_CFG_RLD3_MULTIBANK_REF_DELAY" value="0" />
- <parameter name="BOARD_QDR4_RCLK_SLEW_RATE" value="5.0" />
- <parameter name="PORT_AFI_ADDR_WIDTH" value="1" />
- <parameter name="PLL_BW_SEL" value="high" />
<parameter name="MEM_LPDDR3_CKE_WIDTH" value="1" />
- <parameter name="MEM_LPDDR3_MR3" value="0" />
- <parameter name="MEM_LPDDR3_MR2" value="0" />
- <parameter name="MEM_LPDDR3_MR1" value="0" />
- <parameter name="PREV_PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
<parameter name="MEM_LPDDR3_MR11" value="0" />
- <parameter name="EX_DESIGN_GUI_QDR4_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
- <parameter name="MEM_LPDDR3_USE_DEFAULT_ODT" value="true" />
<parameter name="PORT_MEM_ALERT_N_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="MEM_DDR3_DM_EN" value="true" />
- <parameter name="EX_DESIGN_GUI_RLD2_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
- <parameter name="SEQ_SIM_OSC_FREQ_MHZ" value="2390" />
<parameter name="CAL_DEBUG_CLOCK_FREQUENCY" value="50000000" />
<parameter
name="MEM_DDR4_TEMP_CONTROLLED_RFSH_RANGE"
value="DDR4_TEMP_CONTROLLED_RFSH_NORMAL" />
<parameter name="DIAG_QDR4_BYPASS_STRESS_STAGE" value="true" />
- <parameter name="MEM_QDR4_TQKQ_MAX_PS" value="75" />
- <parameter name="PORT_MEM_DQB_WIDTH" value="1" />
- <parameter name="PHY_LPDDR3_USER_DATA_IO_STD_ENUM" value="unset" />
<parameter name="PHY_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="PHY_DDR4_STARTING_VREFIN" value="61.0" />
<parameter name="PHY_QDR4_REF_CLK_JITTER_PS" value="10.0" />
- <parameter name="MEM_DDR4_TWR_CYC" value="18" />
<parameter name="PORT_MEM_CK_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="MEM_QDR2_TCQDOH_NS" value="-0.09" />
- <parameter name="DIAG_LPDDR3_ABSTRACT_PHY" value="false" />
<parameter name="PHY_DDR4_AC_IO_STD_ENUM" value="IO_STD_SSTL_12" />
<parameter name="PLL_SIM_CAL_SLAVE_CLK_FREQ_PS" value="6720" />
- <parameter name="CTRL_DDR4_AUTO_POWER_DOWN_EN" value="false" />
<parameter name="PORT_CTRL_AST_RD_DATA_WIDTH" value="1" />
<parameter name="MEM_DDR4_WRITE_CRC" value="false" />
<parameter name="MEM_DDR3_TTL_DQS_WIDTH" value="8" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_5" value="0.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_6" value="0.0" />
- <parameter name="MEM_QDR2_BWS_N_WIDTH" value="4" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_3" value="0.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_4" value="0.0" />
<parameter name="CTRL_LPDDR3_AUTO_POWER_DOWN_EN" value="false" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_1" value="0.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_2" value="0.0" />
- <parameter name="PORT_MEM_BA_WIDTH" value="2" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_PHASE_DEG_GUI_0" value="0.0" />
<parameter name="DIAG_QDR2_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="UNUSED_MEM_PINS_PINLOC_25" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_16" value="0" />
- <parameter name="TRAIT_SUPPORTS_VID" value="0" />
- <parameter name="MEM_LPDDR3_TREFI_CYC" value="3120" />
<parameter name="UNUSED_MEM_PINS_PINLOC_24" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_15" value="0" />
<parameter name="MEM_RLD3_TCKDK_MIN_CYC" value="-0.27" />
- <parameter name="SEC_RDATA_LANE_INDEX" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_27" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_14" value="0" />
- <parameter name="MEM_DDR4_VDIVW_TOTAL" value="136" />
<parameter name="UNUSED_MEM_PINS_PINLOC_26" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_13" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_29" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_12" value="0" />
- <parameter name="MEM_DDR3_RM_WIDTH" value="0" />
- <parameter name="MEM_DDR4_TDSH_CYC" value="0.18" />
- <parameter name="MEM_DDR4_TFAW_CYC" value="30" />
<parameter name="CTRL_RLD3_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
<parameter name="UNUSED_MEM_PINS_PINLOC_28" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_11" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_10" value="0" />
- <parameter name="PORT_MEM_WPS_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="MEM_DDR3_RTT_NOM_ENUM" value="DDR3_RTT_NOM_ODT_DISABLED" />
<parameter name="UNUSED_MEM_PINS_PINLOC_21" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_20" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_19" value="0" />
- <parameter name="BOARD_DDR3_RCLK_SLEW_RATE" value="5.0" />
- <parameter name="DIAG_RLD2_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
<parameter name="UNUSED_MEM_PINS_PINLOC_23" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_18" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_22" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_17" value="0" />
<parameter name="PORT_MEM_PE_N_WIDTH" value="1" />
- <parameter name="PORT_CAL_DEBUG_OUT_RDATA_WIDTH" value="32" />
<parameter name="PHY_QDR4_DEFAULT_IO" value="true" />
- <parameter name="DIAG_DB_RESET_AUTO_RELEASE" value="avl_release" />
<parameter name="MEM_DDR3_TDS_AC_MV" value="135" />
<parameter name="MEM_DDR3_W_DERIVED_ODTN" value="," />
<parameter name="PRI_HMC_CFG_WR_TO_RD_DIFF_BG" value="16" />
<parameter name="MEM_DDR3_R_ODTN_1X1" value="Rank 0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_36" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_35" value="0" />
- <parameter name="PRI_HMC_CFG_RD_ODT_ON" value="0" />
<parameter name="MEM_RLD2_FORMAT_ENUM" value="MEM_FORMAT_DISCRETE" />
<parameter name="UNUSED_MEM_PINS_PINLOC_38" value="0" />
- <parameter name="BOARD_QDR4_WCLK_SLEW_RATE" value="4.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_37" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_39" value="0" />
- <parameter name="PORT_CTRL_ECC_WB_POINTER_WIDTH" value="12" />
<parameter name="UNUSED_MEM_PINS_PINLOC_30" value="0" />
- <parameter name="BOARD_RLD3_USE_DEFAULT_ISI_VALUES" value="true" />
- <parameter name="DIAG_SIM_REGTEST_MODE" value="false" />
<parameter name="UNUSED_MEM_PINS_PINLOC_32" value="0" />
- <parameter name="PHY_QDR4_USER_CK_IO_STD_ENUM" value="unset" />
<parameter name="UNUSED_MEM_PINS_PINLOC_31" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_34" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_33" value="0" />
- <parameter name="PORT_CTRL_MMR_SLAVE_ADDRESS_WIDTH" value="10" />
- <parameter name="MEM_DDR4_TDIVW_DJ_CYC" value="0.1" />
<parameter name="PINS_INVERT_WR_12" value="0" />
- <parameter name="MEM_RLD3_ADDR_WIDTH" value="20" />
<parameter name="PINS_INVERT_WR_11" value="0" />
- <parameter name="MEM_DDR4_RDIMM_CONFIG" value="" />
- <parameter name="MEM_QDR4_TISH_PS" value="150" />
<parameter name="BOARD_LPDDR3_WDATA_ISI_NS" value="0.0" />
<parameter
name="DIAG_RLD2_EXPORT_SEQ_AVALON_SLAVE"
value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
<parameter name="PINS_INVERT_WR_10" value="0" />
- <parameter name="PHY_QDR2_USER_RZQ_IO_STD_ENUM" value="unset" />
- <parameter name="PORT_MEM_DQB_PINLOC_41" value="0" />
<parameter name="MEM_DDR3_W_DERIVED_ODT0" value="," />
- <parameter name="PORT_MEM_DQB_PINLOC_40" value="0" />
<parameter name="PLL_M_CNT_IN_SRC" value="c_m_cnt_in_src_ph_mux_clk" />
<parameter name="MEM_DDR4_TQH_CYC" value="0.38" />
- <parameter name="PRI_HMC_CFG_RD_TO_RD" value="3" />
- <parameter name="PORT_MEM_DQB_PINLOC_38" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_37" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_36" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_35" value="0" />
<parameter name="MEM_DDR3_W_DERIVED_ODT3" value="," />
- <parameter name="PORT_MEM_DQB_PINLOC_34" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_33" value="0" />
<parameter name="MEM_DDR3_W_DERIVED_ODT1" value="," />
- <parameter name="PORT_MEM_DQB_PINLOC_32" value="0" />
<parameter name="MEM_DDR3_W_DERIVED_ODT2" value="," />
- <parameter name="PORT_MEM_DQB_PINLOC_31" value="0" />
- <parameter name="PRI_HMC_CFG_4_ACT_TO_ACT" value="14" />
- <parameter name="CTRL_MMR_EN" value="false" />
<parameter name="SEC_HMC_CFG_WR_TO_WR" value="3" />
<parameter name="BOARD_LPDDR3_SKEW_BETWEEN_DQS_NS" value="0.02" />
<parameter name="CTRL_DDR3_ECC_EN" value="false" />
- <parameter name="PORT_MEM_DQB_PINLOC_39" value="0" />
- <parameter name="PHY_TARGET_IS_PRODUCTION" value="true" />
<parameter name="MEM_DDR4_DB_RTT_WR_ENUM" value="DDR4_DB_RTT_WR_RZQ_3" />
- <parameter name="PORT_MEM_DQB_PINLOC_30" value="0" />
<parameter name="MEM_QDR4_DQ_WIDTH" value="72" />
<parameter name="BOARD_DDR3_WDATA_SLEW_RATE" value="2.0" />
<parameter name="BOARD_RLD3_TIS_DERATING_PS" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_14" value="95514717" />
- <parameter name="PORT_MEM_DQB_PINLOC_27" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_13" value="100774008" />
- <parameter name="PORT_MEM_DQB_PINLOC_26" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_16" value="77676628" />
- <parameter name="PORT_MEM_DQB_PINLOC_25" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_15" value="89217114" />
- <parameter name="PORT_MEM_DQB_PINLOC_24" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_18" value="37803063" />
- <parameter name="PORT_MEM_DQB_PINLOC_23" value="0" />
<parameter name="MEM_DDR3_TWR_NS" value="15.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_17" value="60891209" />
- <parameter name="PORT_MEM_DQB_PINLOC_22" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_21" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_19" value="12312" />
- <parameter name="PORT_MEM_DQB_PINLOC_20" value="0" />
- <parameter name="PORT_MEM_BG_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="MEM_LPDDR3_TFAW_CYC" value="40" />
<parameter name="UNUSED_MEM_PINS_PINLOC_10" value="167937186" />
- <parameter name="DIAG_USE_TG_AVL_2" value="false" />
<parameter name="DIAG_USE_ABSTRACT_PHY" value="false" />
<parameter name="UNUSED_MEM_PINS_PINLOC_12" value="138559644" />
- <parameter name="PORT_MEM_DQB_PINLOC_29" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_11" value="164788383" />
- <parameter name="PORT_MEM_DQB_PINLOC_28" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_4" value="0.0" />
- <parameter name="PHY_QDR4_USER_PING_PONG_EN" value="false" />
- <parameter name="PINS_DB_OE_BYPASS_7" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_3" value="0.0" />
- <parameter name="PINS_DB_OE_BYPASS_6" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_2" value="0.0" />
- <parameter name="PINS_DB_OE_BYPASS_9" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_1" value="0.0" />
- <parameter name="PINS_DB_OE_BYPASS_8" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_8" value="1200.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_7" value="1200.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_6" value="1200.0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_5" value="1200.0" />
<parameter name="SEC_HMC_CFG_WRITE_ODT_CHIP" value="33" />
- <parameter name="PINS_DB_OE_BYPASS_1" value="763101184" />
- <parameter name="PINS_DB_OE_BYPASS_0" value="1" />
- <parameter name="PRI_HMC_CFG_RD_TO_WR" value="5" />
- <parameter name="PINS_DB_OE_BYPASS_3" value="48" />
<parameter name="DIAG_RS232_UART_BAUDRATE" value="57600" />
- <parameter name="PINS_DB_OE_BYPASS_2" value="955224063" />
- <parameter name="PINS_DB_OE_BYPASS_5" value="0" />
- <parameter name="PINS_DB_OE_BYPASS_4" value="0" />
<parameter name="PINS_USAGE_2" value="955224063" />
<parameter name="MEM_DDR4_SPD_133_RCD_DB_VENDOR_LSB" value="0" />
<parameter name="PINS_USAGE_1" value="763363263" />
- <parameter name="PORT_MEM_DQS_N_WIDTH" value="9" />
<parameter name="MEM_DDR3_SRT_ENUM" value="DDR3_SRT_NORMAL" />
<parameter name="PINS_USAGE_0" value="1056960511" />
<parameter name="PORT_CTRL_AST_WR_DATA_WIDTH" value="1" />
- <parameter name="MEM_DDR3_TWLS_PS" value="125.0" />
<parameter name="PINS_USAGE_6" value="0" />
- <parameter name="PORT_MEM_RM_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="PINS_USAGE_5" value="63" />
<parameter name="PINS_USAGE_4" value="1056960510" />
<parameter name="PINS_USAGE_3" value="1073479600" />
@@ -4424,114 +4868,52 @@
<parameter name="MEM_DDR4_TTL_DQS_WIDTH" value="9" />
<parameter name="DIAG_ABSTRACT_PHY_WLAT" value="9" />
<parameter name="MEM_DDR4_USER_VREFDQ_TRAINING_VALUE" value="60.0" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_8" value="0" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_7" value="0" />
- <parameter name="EX_DESIGN_GUI_RLD2_TARGET_DEV_KIT" value="TARGET_DEV_KIT_NONE" />
- <parameter name="BOARD_QDR2_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_RLD3_RDATA_SLEW_RATE" value="3.5" />
<parameter name="PORT_MEM_AINV_WIDTH" value="1" />
<parameter name="LANE_TIDS_AUTOGEN_WCNT" value="10" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_4" value="0" />
- <parameter
- name="EX_DESIGN_GUI_LPDDR3_SEL_DESIGN"
- value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
- <parameter name="PRI_HMC_CFG_TCL" value="18" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_3" value="0" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_6" value="0" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_5" value="0" />
<parameter name="PLL_EXTRA_CLK_ACTUAL_FREQ_MHZ_0" value="0.0" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_0" value="1" />
<parameter
name="PHY_RLD2_CORE_CLKS_SHARING_ENUM"
value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_2" value="1" />
- <parameter name="PLL_C_CNT_PH_MUX_PRST_1" value="1" />
- <parameter name="BOARD_DDR3_SKEW_WITHIN_AC_NS" value="0.0" />
<parameter name="PHY_DDR4_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="EX_DESIGN_GUI_GEN_SIM" value="true" />
- <parameter name="SEC_HMC_CFG_ARF_PERIOD" value="4681" />
- <parameter name="PHY_RZQ" value="240" />
<parameter
name="EX_DESIGN_GUI_QDR2_SEL_DESIGN"
value="AVAIL_EX_DESIGNS_GEN_DESIGN" />
<parameter name="PORT_MEM_DOFF_N_WIDTH" value="1" />
<parameter name="MEM_DDR4_RTT_NOM_ENUM" value="DDR4_RTT_NOM_ODT_DISABLED" />
- <parameter name="MEM_RLD3_T_RC_MODE_ENUM" value="RLD3_TRC_9" />
<parameter name="PORT_MEM_ALERT_N_WIDTH" value="1" />
<parameter name="BOARD_DDR4_USER_WCLK_SLEW_RATE" value="4.0" />
<parameter name="MEM_LPDDR3_TRCD_NS" value="18.75" />
<parameter name="EX_DESIGN_GUI_DDR4_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
- <parameter name="MEM_RLD3_WIDTH_EXPANDED" value="false" />
<parameter name="MEM_RLD3_OUTPUT_DRIVE_MODE_ENUM" value="RLD3_OUTPUT_DRIVE_40" />
- <parameter name="PORT_AFI_DM_N_WIDTH" value="1" />
<parameter name="DIAG_TG_AVL_2_NUM_CFG_INTERFACES" value="0" />
+ <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_HEAD_OF_CHAIN" value="true" />
<parameter name="PORT_MEM_PE_N_PINLOC_1" value="0" />
<parameter name="PORT_MEM_PE_N_PINLOC_0" value="0" />
- <parameter name="PORT_AFI_WDATA_WIDTH" value="1" />
- <parameter name="BOARD_QDR2_AC_SLEW_RATE" value="2.0" />
<parameter name="PRI_HMC_CFG_ARF_PERIOD" value="4681" />
<parameter name="MEM_DDR4_W_ODT2_4X4" value="off,off,on,on" />
- <parameter name="BOARD_QDR2_USER_RDATA_SLEW_RATE" value="2.0" />
<parameter name="MEM_LPDDR3_DQ_WIDTH" value="32" />
<parameter name="PLL_N_CNT_LOW" value="256" />
- <parameter name="MEM_DDR3_TWLH_PS" value="125.0" />
- <parameter name="PHY_DDR3_DATA_IN_MODE_ENUM" value="unset" />
<parameter name="PORT_MEM_RWB_N_WIDTH" value="1" />
- <parameter name="BOARD_DDR3_PKG_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
<parameter name="BOARD_QDR4_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="MEM_DDR4_LRDIMM_VREFDQ_VALUE" value="1D" />
<parameter name="SEC_HMC_CFG_RFSH_WARN_THRESHOLD" value="4" />
<parameter name="PORT_MEM_DK_PINLOC_5" value="0" />
<parameter name="PHY_QDR4_CK_MODE_ENUM" value="unset" />
<parameter name="PORT_MEM_DK_PINLOC_4" value="0" />
- <parameter name="PINS_DATA_IN_MODE_7" value="153387017" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_5" value="0" />
- <parameter name="BOARD_DDR3_USE_DEFAULT_ISI_VALUES" value="true" />
- <parameter name="PINS_DATA_IN_MODE_6" value="153391689" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_4" value="0" />
- <parameter name="PINS_DATA_IN_MODE_9" value="153350144" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_3" value="149" />
- <parameter name="PINS_DATA_IN_MODE_8" value="153092680" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_2" value="143783025" />
- <parameter name="MEM_QDR4_TCKDK_MAX_PS" value="150" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_9" value="0" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_8" value="0" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_7" value="0" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_6" value="0" />
- <parameter name="CTRL_QDR4_AVL_MAX_BURST_COUNT" value="4" />
<parameter name="MEM_QDR4_TASH_PS" value="170" />
<parameter name="PORT_HPS_EMIF_H2E_GP_WIDTH" value="2" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_1" value="105948189" />
- <parameter name="PHY_DDR3_DEFAULT_REF_CLK_FREQ" value="false" />
- <parameter name="PORT_MEM_DQS_N_PINLOC_0" value="17830921" />
- <parameter name="PORT_AFI_RST_N_WIDTH" value="1" />
<parameter name="MEM_RLD3_TCKQK_MAX_PS" value="135" />
<parameter name="PORT_MEM_DK_PINLOC_3" value="0" />
- <parameter name="MEM_QDR4_DK_PER_PORT_WIDTH" value="2" />
- <parameter name="DIAG_EX_DESIGN_SEPARATE_RZQS" value="true" />
<parameter name="DIAG_QDR2_TG_BE_PATTERN_LENGTH" value="8" />
<parameter name="PORT_MEM_DK_PINLOC_2" value="0" />
- <parameter name="MEM_DDR4_CTRL_CFG_READ_ODT_CHIP" value="0" />
<parameter name="PORT_MEM_DK_PINLOC_1" value="0" />
<parameter name="PORT_MEM_LBK1_N_WIDTH" value="1" />
- <parameter name="MEM_RLD2_TCKQK_MAX_NS" value="0.2" />
<parameter name="PORT_MEM_DK_PINLOC_0" value="0" />
<parameter name="CTRL_QDR4_AVL_ENABLE_POWER_OF_TWO_BUS" value="false" />
- <parameter name="PORT_MEM_LDB_N_WIDTH" value="1" />
- <parameter name="PHY_DDR3_USER_PING_PONG_EN" value="false" />
- <parameter name="PHY_DDR4_AUTO_STARTING_VREFIN_EN" value="true" />
<parameter name="EX_DESIGN_GUI_RLD3_HDL_FORMAT" value="HDL_FORMAT_VERILOG" />
<parameter name="MEM_TTL_NUM_OF_READ_GROUPS" value="9" />
- <parameter name="BOARD_DDR3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="SEC_HMC_CFG_SRF_ZQCAL_DISABLE" value="disable" />
<parameter name="MEM_DDR3_RTT_WR_ENUM" value="DDR3_RTT_WR_ODT_DISABLED" />
- <parameter
- name="EX_DESIGN_GUI_LPDDR3_TARGET_DEV_KIT"
- value="TARGET_DEV_KIT_NONE" />
- <parameter name="PORT_CTRL_MMR_SLAVE_WDATA_WIDTH" value="32" />
- <parameter
- name="DIAG_RLD3_EXPORT_SEQ_AVALON_SLAVE"
- value="CAL_DEBUG_EXPORT_MODE_DISABLED" />
<parameter name="PHY_RLD3_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="PINS_WDB_9" value="918589440" />
<parameter name="EX_DESIGN_GUI_RLD3_GEN_SYNTH" value="true" />
@@ -4544,13 +4926,9 @@
<parameter name="PINS_WDB_4" value="165375378" />
<parameter name="PINS_WDB_1" value="910912566" />
<parameter name="PINS_WDB_2" value="316345782" />
- <parameter name="MEM_DDR4_SPD_135_RCD_REV" value="0" />
- <parameter name="MEM_DDR4_TIS_AC_MV" value="100" />
<parameter name="PINS_WDB_0" value="920202678" />
<parameter name="PLL_PHY_CLK_VCO_PHASE" value="1" />
<parameter name="PORT_MEM_DQS_PINLOC_AUTOGEN_WCNT" value="13" />
- <parameter name="MEM_QDR4_TCSH_PS" value="170" />
- <parameter name="MEM_DDR4_SPD_143_DRAM_VREFDQ_R3" value="29" />
<parameter name="BOARD_LPDDR3_CK_SLEW_RATE" value="4.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_90" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_92" value="0" />
@@ -4558,48 +4936,29 @@
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Arria 10" />
<parameter name="MEM_DDR3_TTL_NUM_OF_PHYSICAL_RANKS" value="1" />
<parameter name="MEM_QDR2_TRL_CYC" value="2.5" />
- <parameter name="PINS_DB_IN_BYPASS_0" value="1" />
<parameter name="MEM_DDR4_WRITE_PREAMBLE" value="1" />
- <parameter name="PORT_MEM_CAS_N_PINLOC_0" value="0" />
- <parameter name="EX_DESIGN_GUI_QDR4_GEN_SYNTH" value="true" />
- <parameter name="PINS_DB_IN_BYPASS_3" value="48" />
- <parameter name="PINS_DB_IN_BYPASS_4" value="0" />
- <parameter name="PINS_DB_IN_BYPASS_1" value="763101184" />
- <parameter name="PINS_DB_IN_BYPASS_2" value="955224063" />
- <parameter name="PINS_DB_IN_BYPASS_7" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_83" value="0" />
- <parameter name="PINS_DB_IN_BYPASS_8" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_82" value="0" />
<parameter name="MEM_LPDDR3_DM_WIDTH" value="1" />
- <parameter name="PINS_DB_IN_BYPASS_5" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_85" value="0" />
- <parameter name="PINS_DB_IN_BYPASS_6" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_84" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_87" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_86" value="0" />
- <parameter
- name="PHY_QDR4_CORE_CLKS_SHARING_ENUM"
- value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="PINS_DB_IN_BYPASS_9" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_89" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_88" value="0" />
- <parameter name="MEM_LPDDR3_TRP_CYC" value="17" />
<parameter
name="PHY_RLD2_USER_PERIODIC_OCT_RECAL_ENUM"
value="PERIODIC_OCT_RECAL_AUTO" />
<parameter name="PORT_MEM_DQB_PINLOC_AUTOGEN_WCNT" value="49" />
- <parameter name="UNUSED_DQS_BUSES_LANELOC_10" value="0" />
<parameter name="CTRL_QDR4_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
<parameter
name="PHY_LPDDR3_CORE_CLKS_SHARING_ENUM"
value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="PORT_MEM_CAS_N_PINLOC_1" value="0" />
<parameter name="PHY_RLD3_CK_MODE_ENUM" value="unset" />
<parameter name="DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="BOARD_DDR3_USER_AC_SLEW_RATE" value="1.0" />
<parameter name="PORT_AFI_RW_N_WIDTH" value="1" />
<parameter name="BOARD_QDR2_IS_SKEW_WITHIN_D_DESKEWED" value="false" />
- <parameter name="EX_DESIGN_GUI_QDR4_GEN_SIM" value="true" />
<parameter name="UNUSED_MEM_PINS_PINLOC_94" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_93" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_96" value="0" />
@@ -4615,25 +4974,16 @@
<parameter name="PORT_MEM_Q_PINLOC_38" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_39" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_70" value="0" />
- <parameter name="PHY_LPDDR3_CK_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR4_INTERNAL_VREFDQ_MONITOR" value="false" />
- <parameter name="PHY_LPDDR3_CK_MODE_ENUM" value="unset" />
- <parameter name="DIAG_LPDDR3_SKIP_CA_DESKEW" value="false" />
<parameter name="PHY_RLD3_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_69" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_68" value="0" />
- <parameter name="MEM_DDR4_DQ_WIDTH" value="72" />
<parameter name="MEM_DDR4_DRV_STR_ENUM" value="DDR4_DRV_STR_RZQ_7" />
<parameter name="BOARD_DDR3_TDH_DERATING_PS" value="0" />
- <parameter name="PRI_HMC_CFG_STARVE_LIMIT" value="63" />
- <parameter name="MEM_DDR3_TRAS_CYC" value="36" />
<parameter name="UNUSED_MEM_PINS_PINLOC_61" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_60" value="0" />
- <parameter name="PHY_RLD2_USER_STARTING_VREFIN" value="70.0" />
- <parameter name="MEM_DDR4_R_ODTN_2X2" value="Rank 0,Rank 1" />
<parameter name="UNUSED_MEM_PINS_PINLOC_63" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_40" value="0" />
- <parameter name="PORT_AFI_SEQ_BUSY_WIDTH" value="4" />
<parameter name="UNUSED_MEM_PINS_PINLOC_62" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_41" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_65" value="0" />
@@ -4646,36 +4996,19 @@
<parameter name="UNUSED_MEM_PINS_PINLOC_66" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_45" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_24" value="0" />
- <parameter name="BOARD_RLD3_IS_SKEW_WITHIN_QK_DESKEWED" value="false" />
<parameter name="PORT_MEM_Q_PINLOC_25" value="0" />
<parameter name="CTRL_DDR4_AUTO_POWER_DOWN_CYCS" value="32" />
- <parameter name="SEC_HMC_CFG_RD_TO_RD_DIFF_BG" value="2" />
<parameter name="PORT_MEM_Q_PINLOC_26" value="0" />
- <parameter name="MEM_DDR4_ODT_IN_POWERDOWN" value="true" />
<parameter name="PORT_MEM_Q_PINLOC_27" value="0" />
- <parameter
- name="MEM_DDR4_ALERT_N_PLACEMENT_ENUM"
- value="DDR4_ALERT_N_PLACEMENT_DATA_LANES" />
<parameter name="PORT_MEM_Q_PINLOC_28" value="0" />
- <parameter name="MEM_DDR3_DISCRETE_CS_WIDTH" value="1" />
<parameter name="DIAG_RLD2_INTERFACE_ID" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_29" value="0" />
<parameter name="BOARD_DDR4_RCLK_ISI_NS" value="0.22" />
<parameter name="UNUSED_MEM_PINS_PINLOC_81" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_80" value="0" />
- <parameter name="BOARD_DDR3_DQS_TO_CK_SKEW_NS" value="0.02" />
- <parameter name="PORT_MEM_CK_N_WIDTH" value="2" />
- <parameter name="PHY_DDR4_IO_VOLTAGE" value="1.2" />
<parameter name="UNUSED_MEM_PINS_PINLOC_79" value="0" />
- <parameter name="PINS_USAGE_AUTOGEN_WCNT" value="13" />
- <parameter name="PHY_TARGET_IS_ES" value="false" />
- <parameter name="DIAG_BYPASS_REPEAT_STAGE" value="true" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_AUTOGEN_WCNT" value="7" />
- <parameter name="PLL_REF_CLK_FREQ_PS" value="40032" />
<parameter name="UNUSED_MEM_PINS_PINLOC_72" value="0" />
- <parameter name="BOARD_DDR3_USE_DEFAULT_SLEW_RATES" value="true" />
<parameter name="UNUSED_MEM_PINS_PINLOC_71" value="0" />
- <parameter name="PRI_HMC_CFG_WR_TO_PCH" value="21" />
<parameter name="UNUSED_MEM_PINS_PINLOC_74" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_73" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_30" value="0" />
@@ -4684,7 +5017,6 @@
<parameter name="BOARD_DDR3_AC_ISI_NS" value="0.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_75" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_32" value="0" />
- <parameter name="PHY_QDR2_USER_PING_PONG_EN" value="false" />
<parameter name="UNUSED_MEM_PINS_PINLOC_78" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_33" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_77" value="0" />
@@ -4701,64 +5033,39 @@
<parameter name="PORT_MEM_Q_PINLOC_19" value="0" />
<parameter name="MEM_DDR4_W_ODT1_2X2" value="on,on" />
<parameter name="MEM_DDR4_TRFC_CYC" value="192" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_5" value="100.0" />
- <parameter name="MEM_LPDDR3_NUM_OF_PHYSICAL_RANKS" value="1" />
<parameter name="UNUSED_MEM_PINS_PINLOC_47" value="0" />
<parameter name="PORT_DFT_NF_IOAUX_PIO_IN_WIDTH" value="8" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_6" value="100.0" />
<parameter name="BOARD_QDR2_USER_AC_ISI_NS" value="0.094" />
<parameter name="DIAG_LPDDR3_TG_BE_PATTERN_LENGTH" value="8" />
<parameter name="UNUSED_MEM_PINS_PINLOC_46" value="0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_3" value="0.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_49" value="0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_4" value="0.0" />
- <parameter name="MEM_DDR4_W_ODT0_4X4" value="on,on,off,off" />
<parameter name="UNUSED_MEM_PINS_PINLOC_48" value="0" />
- <parameter name="MEM_DDR4_W_ODT0_4X2" value="off,off,on,on" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_7" value="100.0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_8" value="100.0" />
<parameter name="PORT_AFI_ALERT_N_WIDTH" value="1" />
- <parameter name="DIAG_DDR3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
<parameter name="PINS_INVERT_OE_AUTOGEN_WCNT" value="13" />
<parameter name="UNUSED_MEM_PINS_PINLOC_41" value="0" />
- <parameter name="PHY_DDR3_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="DIAG_RLD2_BYPASS_REPEAT_STAGE" value="true" />
<parameter name="UNUSED_MEM_PINS_PINLOC_40" value="0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_1" value="0.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_43" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_20" value="0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_2" value="0.0" />
<parameter name="BOARD_QDR2_AC_TO_K_SKEW_NS" value="0.0" />
- <parameter name="DIAG_RLD3_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
<parameter name="UNUSED_MEM_PINS_PINLOC_42" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_21" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_45" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_22" value="0" />
- <parameter name="PLL_EXTRA_CLK_DESIRED_FREQ_MHZ_GUI_0" value="0.0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_44" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_23" value="0" />
<parameter name="CTRL_LPDDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="PLL_SIM_PHY_CLK_VCO_PHASE_PS" value="105" />
<parameter name="PORT_MEM_BG_PINLOC_1" value="0" />
<parameter name="PORT_MEM_BG_PINLOC_0" value="50416642" />
<parameter name="MEM_DDR4_CS_WIDTH" value="2" />
- <parameter name="CRC_EN" value="crc_disable" />
- <parameter name="BOARD_RLD3_USER_RDATA_ISI_NS" value="0.063" />
<parameter name="DBC_WB_RESERVED_ENTRY" value="8" />
- <parameter name="MEM_LPDDR3_TDQSQ_PS" value="135" />
<parameter name="UNUSED_MEM_PINS_PINLOC_58" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_57" value="0" />
- <parameter name="PINS_DATA_IN_MODE_1" value="167547401" />
- <parameter name="PINS_DATA_IN_MODE_0" value="153612873" />
<parameter name="UNUSED_MEM_PINS_PINLOC_59" value="0" />
- <parameter name="PINS_DATA_IN_MODE_3" value="153129545" />
<parameter name="PORT_MEM_BG_PINLOC_5" value="0" />
- <parameter name="PINS_DATA_IN_MODE_2" value="1059357257" />
<parameter name="PORT_MEM_BG_PINLOC_4" value="0" />
- <parameter name="PINS_DATA_IN_MODE_5" value="150736969" />
<parameter name="PORT_MEM_BG_PINLOC_3" value="0" />
<parameter name="PHY_RLD3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="PINS_DATA_IN_MODE_4" value="153391743" />
<parameter name="PORT_MEM_BG_PINLOC_2" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_50" value="0" />
<parameter name="UNUSED_MEM_PINS_PINLOC_52" value="0" />
@@ -4772,715 +5079,505 @@
<parameter name="UNUSED_MEM_PINS_PINLOC_55" value="0" />
<parameter name="PORT_MEM_Q_PINLOC_12" value="0" />
<parameter name="PLL_SIM_CAL_MASTER_CLK_FREQ_PS" value="6720" />
- <parameter name="MEM_DDR3_TTL_NUM_OF_LOGICAL_RANKS" value="1" />
- <parameter name="MEM_QDR4_DINV_PER_PORT_WIDTH" value="2" />
<parameter name="MEM_QDR4_DQ_PER_PORT_PER_DEVICE" value="36" />
<parameter name="BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED" value="true" />
<parameter name="PORT_MEM_CQ_N_WIDTH" value="1" />
- <parameter name="MEM_DDR4_MAX_POWERDOWN" value="false" />
<parameter name="PORT_MEM_C_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="PHY_DDR3_AUTO_STARTING_VREFIN_EN" value="true" />
- <parameter name="DIAG_DDR4_SKIP_CA_DESKEW" value="false" />
- <parameter name="SEC_HMC_CFG_WR_TO_WR_DIFF_BG" value="2" />
<parameter name="IS_VID" value="false" />
- <parameter name="PORT_MEM_K_WIDTH" value="1" />
<parameter name="PORT_MEM_DM_PINLOC_AUTOGEN_WCNT" value="13" />
- <parameter name="PHY_RLD2_HPS_ENABLE_EARLY_RELEASE" value="false" />
- <parameter name="PINS_RATE_7" value="0" />
- <parameter name="PINS_RATE_6" value="0" />
- <parameter name="PINS_RATE_9" value="0" />
- <parameter name="PINS_RATE_8" value="0" />
- <parameter name="MEM_DDR4_BL_ENUM" value="DDR4_BL_BL8" />
- <parameter name="PINS_RATE_3" value="0" />
- <parameter name="PINS_RATE_2" value="955224063" />
- <parameter name="PRI_HMC_CFG_MPS_ZQCAL_DISABLE" value="disable" />
- <parameter name="MEM_LPDDR3_TRFC_CYC" value="168" />
- <parameter name="PINS_RATE_5" value="0" />
- <parameter name="PINS_RATE_4" value="0" />
- <parameter name="PHY_DDR3_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
<parameter name="MEM_WRITE_LATENCY" value="18" />
- <parameter name="MEM_DDR4_LRDIMM_ODT_LESS_BS" value="true" />
- <parameter name="PINS_RATE_1" value="561774592" />
- <parameter name="EX_DESIGN_GUI_DDR3_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
- <parameter name="PINS_RATE_0" value="1" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_0" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_1" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_2" value="50.0" />
<parameter name="PORT_MEM_DQS_WIDTH" value="9" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_3" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_4" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_5" value="50.0" />
- <parameter name="CTRL_AUTO_PRECHARGE_EN" value="false" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_6" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_7" value="50.0" />
- <parameter name="PLL_EXTRA_CLK_ACTUAL_DUTY_CYCLE_GUI_8" value="50.0" />
<parameter name="BOARD_QDR4_AC_ISI_NS" value="0.0" />
- <parameter name="MEM_LPDDR3_NWR" value="LPDDR3_NWR_NWR12" />
<parameter name="DIAG_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
<parameter name="PORT_MEM_CK_N_PINLOC_2" value="0" />
- <parameter name="MEM_DDR3_TINIT_CK" value="499" />
<parameter name="BOARD_DDR3_TIS_DERATING_PS" value="0" />
<parameter name="PORT_MEM_CK_N_PINLOC_3" value="0" />
<parameter name="PHY_QDR4_USER_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="DIAG_EX_DESIGN_ADD_TEST_EMIFS" value="" />
<parameter name="DIAG_RLD3_ABSTRACT_PHY" value="false" />
<parameter name="PORT_MEM_CK_N_PINLOC_0" value="99673090" />
- <parameter name="MEM_DDR4_TDSS_CYC" value="0.18" />
<parameter name="DIAG_ENABLE_HPS_EMIF_DEBUG" value="false" />
- <parameter name="SEC_HMC_CFG_MEM_IF_ROWADDR_WIDTH" value="row_width_15" />
<parameter name="PORT_MEM_CK_N_PINLOC_1" value="0" />
- <parameter name="NUM_OF_RTL_TILES" value="4" />
<parameter name="PORT_MEM_CK_N_PINLOC_4" value="0" />
<parameter name="MEM_RLD2_SPEEDBIN_ENUM" value="RLD2_SPEEDBIN_18" />
<parameter name="PORT_MEM_CK_N_PINLOC_5" value="0" />
- <parameter name="MEM_RLD2_DQ_PER_WR_GROUP" value="9" />
<parameter name="BOARD_RLD3_WDATA_ISI_NS" value="0.0" />
<parameter name="PORT_MEM_CA_PINLOC_16" value="0" />
- <parameter name="CTRL_LPDDR3_USER_PRIORITY_EN" value="false" />
<parameter name="DIAG_ENABLE_JTAG_UART" value="false" />
- <parameter name="MEM_LPDDR3_SPEEDBIN_ENUM" value="LPDDR3_SPEEDBIN_1600" />
- <parameter name="DIAG_DDR3_CAL_ADDR1" value="8" />
- <parameter name="DIAG_DDR3_CAL_ADDR0" value="0" />
- <parameter name="DIAG_DDR3_ABSTRACT_PHY" value="false" />
<parameter name="SEC_HMC_CFG_MEM_IF_COLADDR_WIDTH" value="col_width_10" />
- <parameter name="MEM_RLD3_MR0" value="0" />
+ <parameter name="PORT_CLKS_SHARING_SLAVE_OUT_WIDTH" value="32" />
<parameter name="PLL_SIM_VCO_FREQ_PS" value="840" />
<parameter name="CTRL_DDR3_RD_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="MEM_DDR4_ADDR_WIDTH" value="17" />
- <parameter name="MEM_DDR4_RCD_PARITY_CONTROL_WORD" value="13" />
<parameter name="MEM_RLD2_TAS_NS" value="0.3" />
- <parameter name="CTRL_DDR4_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="BOARD_QDR4_SKEW_WITHIN_AC_NS" value="0.0" />
- <parameter name="MEM_QDR2_THD_NS" value="0.18" />
- <parameter name="CTRL_QDR4_RAW_TURNAROUND_DELAY_CYC" value="4" />
- <parameter
- name="SYS_INFO_UNIQUE_ID"
- value="ip_arria10_e1sg_ddr4_8g_2400_ddr4_inst" />
- <parameter name="MEM_RLD3_MR2" value="0" />
- <parameter name="PORT_CAL_DEBUG_BYTEEN_WIDTH" value="4" />
- <parameter name="MEM_RLD3_MR1" value="0" />
- <parameter name="PORT_DFT_NF_PLL_CNTSEL_WIDTH" value="4" />
- <parameter
- name="PHY_DDR4_CORE_CLKS_SHARING_ENUM"
- value="CORE_CLKS_SHARING_DISABLED" />
- <parameter name="MEM_LPDDR3_TWTR_CYC" value="4" />
- <parameter name="PHY_AC_CALIBRATED_OCT" value="true" />
<parameter name="MEM_DDR3_BT_ENUM" value="DDR3_BT_SEQUENTIAL" />
- <parameter name="BOARD_RLD3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
<parameter name="MEM_QDR2_DEVICE_WIDTH" value="1" />
<parameter name="DIAG_DDR4_BYPASS_REPEAT_STAGE" value="true" />
<parameter name="PHY_LPDDR3_DEFAULT_IO" value="true" />
- <parameter name="MEM_DDR4_CFG_GEN_DBE" value="false" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_4" value="0" />
- <parameter name="BOARD_LPDDR3_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_3" value="0" />
<parameter name="MEM_RLD2_DQ_PER_DEVICE" value="9" />
<parameter name="MEM_DDR3_TIH_DC_MV" value="100" />
<parameter name="MEM_DDR3_TQH_CYC" value="0.38" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_5" value="0" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_0" value="0" />
- <parameter name="PORT_AFI_CKE_WIDTH" value="1" />
- <parameter name="MEM_LPDDR3_COL_ADDR_WIDTH" value="10" />
<parameter name="SEC_HMC_CFG_RD_TO_WR_DIFF_CHIP" value="5" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_2" value="0" />
<parameter name="PHY_LPDDR3_CONFIG_ENUM" value="CONFIG_PHY_AND_HARD_CTRL" />
- <parameter name="PORT_MEM_DKB_N_PINLOC_1" value="0" />
- <parameter name="PORT_MEM_LDA_N_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="BOARD_DDR3_USER_RCLK_ISI_NS" value="0.094" />
<parameter name="CTRL_DDR4_RD_TO_WR_DIFF_CHIP_DELTA_CYCS" value="0" />
- <parameter name="BOARD_QDR2_USER_K_SLEW_RATE" value="4.0" />
<parameter name="BOARD_QDR2_USER_AC_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_QDR2_SKEW_WITHIN_AC_NS" value="0.0" />
- <parameter name="PINS_DATA_IN_MODE_24" value="0" />
- <parameter
- name="MEM_QDR4_PU_OUTPUT_DRIVE_MODE_ENUM"
- value="QDR4_OUTPUT_DRIVE_25_PCT" />
- <parameter name="PINS_DATA_IN_MODE_25" value="0" />
- <parameter name="PINS_DATA_IN_MODE_26" value="0" />
- <parameter name="PINS_DATA_IN_MODE_27" value="0" />
- <parameter name="PINS_DATA_IN_MODE_28" value="0" />
- <parameter name="PINS_DATA_IN_MODE_29" value="0" />
<parameter name="PORT_MEM_DK_WIDTH" value="1" />
- <parameter name="PORT_MEM_A_WIDTH" value="17" />
<parameter name="PRI_HMC_CFG_RD_TO_WR_DIFF_CHIP" value="5" />
<parameter name="MEM_RLD2_TQKQ_MAX_NS" value="0.12" />
- <parameter name="PINS_DATA_IN_MODE_20" value="0" />
- <parameter name="MEM_RLD3_TIH_DC_MV" value="100" />
- <parameter name="PINS_DATA_IN_MODE_21" value="0" />
- <parameter name="PINS_DATA_IN_MODE_22" value="0" />
<parameter name="BOARD_LPDDR3_USE_DEFAULT_SLEW_RATES" value="true" />
- <parameter name="PINS_DATA_IN_MODE_23" value="0" />
- <parameter name="PORT_MEM_AP_WIDTH" value="1" />
- <parameter name="PHY_HPS_ENABLE_EARLY_RELEASE" value="false" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_0" value="50" />
<parameter name="PHY_DDR4_CK_MODE_ENUM" value="OUT_OCT_40_CAL" />
- <parameter name="MEM_LPDDR3_TDQSS_CYC" value="1.25" />
- <parameter name="PINS_DATA_IN_MODE_13" value="167547401" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_4" value="0" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_5" value="50" />
- <parameter name="MEM_LPDDR3_TDS_AC_MV" value="150" />
- <parameter name="PINS_DATA_IN_MODE_14" value="1059357257" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_3" value="155" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_6" value="50" />
- <parameter name="PINS_DATA_IN_MODE_15" value="37449" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_6" value="0" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_7" value="50" />
- <parameter name="PINS_DATA_IN_MODE_16" value="0" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_5" value="0" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_8" value="50" />
- <parameter name="PINS_DATA_IN_MODE_17" value="0" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_0" value="24128521" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_1" value="50" />
- <parameter name="PINS_DATA_IN_MODE_18" value="0" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_2" value="50" />
- <parameter name="PINS_DATA_IN_MODE_19" value="0" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_2" value="150080631" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_3" value="50" />
- <parameter name="PORT_MEM_DBI_N_PINLOC_1" value="112245795" />
<parameter name="PLL_C_CNT_DUTY_CYCLE_4" value="50" />
<parameter name="MEM_RLD2_TAH_NS" value="0.3" />
<parameter name="MEM_DDR4_SPD_145_DB_MDQ_DRV" value="21" />
<parameter name="BOARD_DDR3_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="PINS_DATA_IN_MODE_10" value="136614527" />
<parameter name="BOARD_QDR4_WCLK_ISI_NS" value="0.0" />
- <parameter name="PINS_DATA_IN_MODE_11" value="153395145" />
- <parameter name="PINS_DATA_IN_MODE_12" value="153612872" />
- <parameter name="PHY_RLD3_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR4_TTL_CKE_WIDTH" value="2" />
<parameter name="PORT_MEM_CFG_N_PINLOC_AUTOGEN_WCNT" value="1" />
- <parameter name="PHY_QDR4_DEFAULT_REF_CLK_FREQ" value="true" />
<parameter name="PORT_MEM_RWA_N_PINLOC_0" value="0" />
- <parameter name="PORT_AFI_RDATA_VALID_WIDTH" value="1" />
<parameter name="PORT_MEM_D_PINLOC_31" value="0" />
- <parameter name="PHY_QDR2_USER_CK_IO_STD_ENUM" value="unset" />
<parameter name="PORT_MEM_D_PINLOC_30" value="0" />
<parameter name="DIAG_RLD3_EX_DESIGN_SEPARATE_RZQS" value="false" />
<parameter name="DIAG_RLD3_BYPASS_DEFAULT_PATTERN" value="false" />
<parameter name="PORT_MEM_D_PINLOC_35" value="0" />
- <parameter name="PHY_DDR4_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="PORT_MEM_D_PINLOC_34" value="0" />
<parameter name="PORT_MEM_D_PINLOC_33" value="0" />
- <parameter name="DLL_CODEWORD" value="0" />
<parameter name="PORT_MEM_D_PINLOC_32" value="0" />
<parameter name="PORT_MEM_D_PINLOC_39" value="0" />
<parameter name="PORT_MEM_DM_WIDTH" value="1" />
<parameter name="PORT_MEM_D_PINLOC_38" value="0" />
<parameter name="PORT_MEM_D_PINLOC_37" value="0" />
- <parameter name="DIAG_ENABLE_JTAG_UART_HEX" value="false" />
<parameter name="PORT_MEM_D_PINLOC_36" value="0" />
<parameter name="SEC_HMC_CFG_MPS_ZQCAL_DISABLE" value="disable" />
<parameter name="PRI_HMC_CFG_ACT_TO_ACT_DIFF_BANK" value="3" />
<parameter name="PORT_AFI_LD_N_WIDTH" value="1" />
- <parameter name="PHY_QDR2_AC_MODE_ENUM" value="unset" />
- <parameter name="SEC_HMC_CFG_MEM_CLK_DISABLE_ENTRY_CYC" value="15" />
<parameter name="MEM_DDR4_CS_PER_DIMM" value="2" />
<parameter name="DQS_PACK_MODE" value="packed" />
<parameter name="PHY_DDR3_USER_REF_CLK_FREQ_MHZ" value="133.333" />
- <parameter name="BOARD_DDR3_WDATA_ISI_NS" value="0.0" />
- <parameter name="BOARD_DDR4_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="PRI_HMC_CFG_PING_PONG_MODE" value="pingpong_off" />
<parameter name="PORT_AFI_WPS_N_WIDTH" value="1" />
<parameter name="PORT_MEM_D_PINLOC_42" value="0" />
<parameter name="PORT_MEM_D_PINLOC_41" value="0" />
<parameter name="PORT_MEM_D_PINLOC_40" value="0" />
<parameter name="MEM_DDR4_TIS_PS" value="60" />
- <parameter name="PINS_DATA_IN_MODE_35" value="0" />
<parameter name="PORT_MEM_D_PINLOC_46" value="0" />
<parameter name="MEM_DDR4_TIH_PS" value="95" />
- <parameter name="PINS_DATA_IN_MODE_36" value="0" />
<parameter name="PORT_MEM_D_PINLOC_45" value="0" />
- <parameter name="DIAG_RLD3_TG_DATA_PATTERN_LENGTH" value="8" />
- <parameter name="PINS_DATA_IN_MODE_37" value="0" />
<parameter name="PORT_MEM_D_PINLOC_44" value="0" />
<parameter name="MEM_DDR3_TRP_NS" value="13.09" />
- <parameter name="PINS_DATA_IN_MODE_38" value="0" />
<parameter name="PORT_MEM_D_PINLOC_43" value="0" />
<parameter name="PORT_MEM_D_PINLOC_48" value="0" />
- <parameter name="PORT_MEM_CQ_N_PINLOC_AUTOGEN_WCNT" value="2" />
<parameter name="PORT_MEM_D_PINLOC_47" value="0" />
<parameter name="ABPHY_WRITE_PROTOCOL" value="0" />
- <parameter name="PINS_DATA_IN_MODE_30" value="0" />
- <parameter name="PINS_DATA_IN_MODE_31" value="0" />
- <parameter name="PINS_DATA_IN_MODE_32" value="0" />
- <parameter name="BOARD_DDR3_RDATA_SLEW_RATE" value="2.5" />
- <parameter name="PINS_DATA_IN_MODE_33" value="0" />
- <parameter name="PINS_DATA_IN_MODE_34" value="0" />
<parameter name="CTRL_QDR2_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="DLL_MODE" value="ctl_dynamic" />
- <parameter name="PHY_LPDDR3_USER_AC_MODE_ENUM" value="unset" />
- <parameter name="DIAG_INTERFACE_ID" value="0" />
<parameter name="MEM_DDR4_TFAW_NS" value="25.0" />
- <parameter name="PHY_QDR2_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="MEM_DDR3_TDQSS_CYC" value="0.27" />
<parameter name="PORT_MEM_K_N_PINLOC_AUTOGEN_WCNT" value="6" />
<parameter name="SEC_HMC_CFG_RLD3_MULTIBANK_MODE" value="singlebank" />
- <parameter name="PHY_LPDDR3_AC_IO_STD_ENUM" value="unset" />
<parameter name="SEC_HMC_CFG_PING_PONG_MODE" value="pingpong_off" />
- <parameter name="MEM_DDR4_SPD_152_DRAM_RTT_PARK" value="39" />
- <parameter name="MEM_RLD3_DQ_WIDTH" value="36" />
- <parameter name="PHY_CALIBRATED_OCT" value="true" />
<parameter name="PORT_MEM_LBK0_N_PINLOC_AUTOGEN_WCNT" value="1" />
<parameter name="PLL_SIM_PHYCLK_1_FREQ_PS" value="3360" />
- <parameter name="PORT_MEM_C_WIDTH" value="1" />
<parameter name="MEM_LPDDR3_R_ODTN_2X2" value="Rank 0,Rank 1" />
<parameter name="MEM_RLD3_DQ_PER_WR_GROUP" value="18" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_1" value="201326592" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_0" value="0" />
<parameter name="DIAG_DDR4_SEPARATE_READ_WRITE_ITFS" value="false" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_5" value="0" />
- <parameter name="SEC_HMC_CFG_WB_RESERVED_ENTRY" value="8" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_4" value="0" />
<parameter name="PORT_AFI_DOFF_N_WIDTH" value="1" />
- <parameter name="MEM_DDR4_AC_PERSISTENT_ERROR" value="false" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_3" value="48" />
<parameter name="DIAG_ECLIPSE_DEBUG" value="false" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_2" value="0" />
- <parameter name="PHY_LPDDR3_REF_CLK_JITTER_PS" value="10.0" />
<parameter name="MEM_QDR2_BL" value="4" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_9" value="0" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_8" value="0" />
- <parameter name="BOARD_LPDDR3_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_7" value="0" />
- <parameter name="BOARD_QDR2_PKG_BRD_SKEW_WITHIN_D_NS" value="0.02" />
- <parameter name="PINS_AC_HMC_DATA_OVERRIDE_ENA_6" value="0" />
- <parameter name="PORT_MEM_ACT_N_WIDTH" value="1" />
<parameter name="DIAG_LPDDR3_SKIP_CA_LEVEL" value="false" />
<parameter name="PORT_MEM_BWS_N_WIDTH" value="1" />
<parameter name="MEM_QDR2_INTERNAL_JITTER_NS" value="0.08" />
<parameter name="HMC_CTRL_DIMM_TYPE" value="sodimm" />
- <parameter name="PRI_HMC_CFG_PERIOD_DQSTRK_CTRL_EN" value="disable" />
<parameter name="MEM_DDR3_TWTR_CYC" value="4" />
<parameter name="BOARD_RLD3_CK_SLEW_RATE" value="4.0" />
- <parameter name="MEM_RLD3_DK_WIDTH" value="2" />
<parameter name="SEC_HMC_CFG_STARVE_LIMIT" value="63" />
- <parameter name="PORT_CTRL_USER_REFRESH_BANK_WIDTH" value="16" />
- <parameter name="MEM_DDR4_W_ODTN_4X2" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="MEM_DDR4_W_ODTN_4X4" value="Rank 0,Rank 1,Rank 2,Rank 3" />
- <parameter name="MEM_LPDDR3_W_ODT1_2X2" value="off,on" />
<parameter name="MEM_TTL_NUM_OF_WRITE_GROUPS" value="9" />
- <parameter name="MEM_DDR4_TTL_CK_WIDTH" value="2" />
<parameter name="DIAG_QDR4_TG_BE_PATTERN_LENGTH" value="8" />
- <parameter name="PORT_MEM_CKE_PINLOC_1" value="0" />
- <parameter name="BOARD_LPDDR3_MAX_DQS_DELAY_NS" value="0.6" />
- <parameter name="PORT_MEM_CKE_PINLOC_0" value="93378562" />
<parameter name="PHY_DDR3_IO_VOLTAGE" value="1.5" />
- <parameter name="PORT_MEM_CKE_PINLOC_5" value="0" />
- <parameter name="BOARD_LPDDR3_USER_WDATA_SLEW_RATE" value="2.0" />
- <parameter name="PORT_MEM_CKE_PINLOC_4" value="0" />
- <parameter name="PORT_MEM_CKE_PINLOC_3" value="0" />
<parameter name="PRI_HMC_CFG_RD_TO_PCH" value="5" />
- <parameter name="PORT_MEM_CKE_PINLOC_2" value="0" />
- <parameter name="PORT_CLKS_SHARING_MASTER_OUT_WIDTH" value="32" />
- <parameter name="PORT_MEM_K_PINLOC_AUTOGEN_WCNT" value="6" />
- <parameter name="BOARD_LPDDR3_USER_CK_SLEW_RATE" value="4.0" />
<parameter name="MEM_LPDDR3_W_ODT0_4X4" value="on,on,on,on" />
- <parameter name="MEM_DDR4_DLL_EN" value="true" />
- <parameter name="MEM_QDR4_QK_WIDTH" value="4" />
<parameter name="MEM_DDR3_FORMAT_ENUM" value="MEM_FORMAT_UDIMM" />
- <parameter name="PHY_RLD3_USER_PING_PONG_EN" value="false" />
<parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="BOARD_QDR4_USER_RCLK_ISI_NS" value="0.0" />
- <parameter name="MEM_DDR4_TDIVW_TOTAL_UI" value="0.2" />
<parameter name="MEM_QDR4_TCKDK_MIN_PS" value="-150" />
<parameter
name="PHY_USER_PERIODIC_OCT_RECAL_ENUM"
value="PERIODIC_OCT_RECAL_AUTO" />
- <parameter name="PHY_DDR4_DEFAULT_REF_CLK_FREQ" value="false" />
<parameter name="PRI_HMC_CFG_REORDER_DATA" value="enable" />
- <parameter name="BOARD_QDR2_RCLK_ISI_NS" value="0.0" />
<parameter name="PORT_MEM_DKA_WIDTH" value="1" />
- <parameter name="BOARD_QDR4_USER_WCLK_SLEW_RATE" value="4.0" />
<parameter name="CTRL_DDR3_RD_TO_RD_DIFF_CHIP_DELTA_CYCS" value="0" />
<parameter name="PORT_CTRL_AST_CMD_DATA_WIDTH" value="1" />
<parameter name="MEM_DDR4_TDQSCK_PS" value="180" />
<parameter name="PORT_MEM_D_WIDTH" value="1" />
- <parameter name="PINS_DB_OUT_BYPASS_6" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_7" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_8" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_9" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_2" value="955224063" />
- <parameter name="BOARD_QDR2_AC_ISI_NS" value="0.0" />
- <parameter name="EX_DESIGN_GUI_LPDDR3_PREV_PRESET" value="TARGET_DEV_KIT_NONE" />
- <parameter name="PINS_DB_OUT_BYPASS_3" value="48" />
- <parameter name="PINS_DB_OUT_BYPASS_4" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_5" value="0" />
<parameter name="PORT_CAL_MASTER_ADDRESS_WIDTH" value="16" />
- <parameter name="PORT_MEM_ALERT_N_PINLOC_0" value="1" />
- <parameter name="PHY_RLD3_MEM_CLK_FREQ_MHZ" value="1066.667" />
- <parameter name="PORT_MEM_ALERT_N_PINLOC_1" value="0" />
- <parameter name="PINS_DB_OUT_BYPASS_0" value="1" />
- <parameter name="PINS_DB_OUT_BYPASS_1" value="763101184" />
<parameter name="MEM_DDR3_TRTP_CYC" value="8" />
- <parameter name="DIAG_DDR4_EFFICIENCY_MONITOR" value="EFFMON_MODE_DISABLED" />
- <parameter name="DIAG_RLD2_EX_DESIGN_SEPARATE_RZQS" value="false" />
<parameter name="CTRL_ECC_EN" value="false" />
- <parameter name="DIAG_RLD3_BYPASS_STRESS_STAGE" value="true" />
<parameter name="DIAG_RLD3_BYPASS_REPEAT_STAGE" value="true" />
- <parameter name="MEM_DDR3_TRRD_CYC" value="6" />
<parameter name="DIAG_RLD3_SEPARATE_READ_WRITE_ITFS" value="false" />
- <parameter name="DIAG_TIMING_REGTEST_MODE" value="false" />
<parameter name="PORT_AFI_WRANK_WIDTH" value="1" />
<parameter name="PHY_QDR4_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
<parameter name="MEM_DDR3_TREFI_CYC" value="8320" />
<parameter name="BOARD_QDR4_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="OCT_CONTROL_WIDTH" value="16" />
- <parameter name="PORT_MEM_DQB_PINLOC_48" value="0" />
<parameter name="DIAG_DDR4_CAL_FULL_CAL_ON_RESET" value="true" />
<parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER" value="true" />
<parameter name="PORT_MEM_CA_PINLOC_11" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_47" value="0" />
<parameter name="PHY_RLD2_AC_MODE_ENUM" value="unset" />
<parameter name="PORT_MEM_CA_PINLOC_10" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_46" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_13" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_45" value="0" />
<parameter name="PORT_MEM_CA_PINLOC_12" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_44" value="0" />
<parameter name="BOARD_QDR4_SKEW_BETWEEN_DK_NS" value="0.02" />
<parameter name="PORT_MEM_CA_PINLOC_15" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_43" value="0" />
<parameter name="PRI_HMC_CFG_MEM_IF_BGADDR_WIDTH" value="bg_width_2" />
<parameter name="PORT_MEM_CA_PINLOC_14" value="0" />
- <parameter name="PORT_MEM_DQB_PINLOC_42" value="0" />
<parameter name="SWAP_DQS_A_B" value="false" />
- <parameter name="PRI_HMC_CFG_SRF_ZQCAL_DISABLE" value="disable" />
<parameter name="PORT_MEM_RWA_N_WIDTH" value="1" />
<parameter name="PORT_MEM_DQ_WIDTH" value="72" />
- <parameter name="MEM_DDR4_SPD_134_RCD_DB_VENDOR_MSB" value="0" />
<parameter name="PINS_GPIO_MODE_AUTOGEN_WCNT" value="13" />
- <parameter name="PHY_PERIODIC_OCT_RECAL" value="false" />
- <parameter name="MEM_QDR4_DATA_ODT_MODE_ENUM" value="QDR4_ODT_25_PCT" />
- <parameter name="PHY_QDR2_USER_AC_IO_STD_ENUM" value="unset" />
<parameter name="SEC_HMC_CFG_PERIOD_DQSTRK_INTERVAL" value="512" />
<parameter name="DQS_BUS_MODE_ENUM" value="DQS_BUS_MODE_X8_X9" />
- <parameter name="SEC_HMC_CFG_DQS_TRACKING_EN" value="disable" />
<parameter name="PHY_RLD2_USER_PING_PONG_EN" value="false" />
- <parameter name="MEM_DDR4_TRRD_DLR_CYC" value="4" />
<parameter name="PORT_MEM_DOFF_N_PINLOC_0" value="0" />
- <parameter name="LANES_PER_TILE" value="4" />
<parameter name="CTRL_DDR3_AVL_PROTOCOL_ENUM" value="CTRL_AVL_PROTOCOL_MM" />
- <parameter name="PHY_RLD3_IO_VOLTAGE" value="1.2" />
<parameter name="PRI_WDATA_LANE_INDEX" value="0" />
<parameter name="BOARD_RLD3_TDH_DERATING_PS" value="0" />
<parameter name="MEM_DDR3_TDQSQ_PS" value="75" />
<parameter name="MEM_DDR4_TWTR_S_CYC" value="2" />
- <parameter name="BOARD_DDR3_PKG_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="MEM_LPDDR3_DISCRETE_CS_WIDTH" value="1" />
<parameter name="EX_DESIGN_GUI_LPDDR3_GEN_SIM" value="true" />
- <parameter name="MEM_QDR4_QK_PER_PORT_WIDTH" value="2" />
- <parameter name="MEM_RLD3_DM_WIDTH" value="2" />
<parameter name="PLL_BW_CTRL" value="pll_bw_res_setting5" />
- <parameter name="MEM_DDR3_W_ODT2_4X4" value="off,off,on,on" />
<parameter name="DIAG_DDR3_TG_BE_PATTERN_LENGTH" value="8" />
- <parameter name="PHY_DDR3_USER_AUTO_STARTING_VREFIN_EN" value="true" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_oct.sv"
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<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_df_o.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_bdir_df.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_bdir_se.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_cp_i.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_df_i.sv"
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_se_i.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_buf_udir_se_o.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_core_clks_rsts.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_io_tiles.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_io_tiles_abphy.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/twentynm_io_12_lane_abphy.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/twentynm_io_12_lane_encrypted_abphy.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv"
attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_bufs.sv"
attributes="" />
<file
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attributes="" />
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_cal_counter.sv"
attributes="" />
<file
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+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll_fast_sim.sv"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_170/synth/altera_emif_arch_nf_abphy_mux.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/altera_emif_arch_nf_pll_extra_clks.sv"
attributes="" />
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attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_readme.txt"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_arch_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_readme.txt"
attributes="" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_arch_nf/altera_emif_arch_nf_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
as="arch" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"</message>
</messages>
</entity>
<entity
kind="altera_emif_cal_slave_nf"
- version="17.0"
- name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy">
+ version="18.0"
+ name="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq">
<parameter
name="SOFT_RAM_HEXFILE"
value="../../emif/ip_arch_nf/src/seq_cal_soft_m20k.hex" />
@@ -5491,43 +5588,43 @@
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="1" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_emif_cal_slave_nf_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/emif/ip_cal_slave/ip_core_nf/altera_emif_cal_slave_nf_hw.tcl" />
</sourceFiles>
<childSourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
</childSourceFiles>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
as="cal_slave_component" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_avalon_mm_bridge"</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"</message>
- <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]</message>
- <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"</message>
+ <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]</message>
+ <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_master_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_slave_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_reset_controller"</message>
@@ -5535,26 +5632,26 @@
</entity>
<entity
kind="altera_avalon_mm_bridge"
- version="17.0"
+ version="18.0"
name="altera_avalon_mm_bridge">
<parameter name="MAX_BURST_SIZE" value="1" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_mm_bridge_170/synth/altera_avalon_mm_bridge.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_mm_bridge_180/synth/altera_avalon_mm_bridge.v"
attributes="" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_mm_bridge_170/synth/altera_avalon_mm_bridge.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_mm_bridge_180/synth/altera_avalon_mm_bridge.v"
attributes="" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_avalon_mm_bridge/altera_avalon_mm_bridge_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
as="ioaux_master_bridge" />
<messages>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_avalon_mm_bridge"</message>
@@ -5562,13 +5659,13 @@
</entity>
<entity
kind="altera_avalon_onchip_memory2"
- version="17.0"
- name="ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy">
+ version="18.0"
+ name="ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za">
<parameter name="derived_singleClockOperation" value="false" />
<parameter name="derived_is_hardcopy" value="false" />
<parameter
name="deviceFeatures"
- value="ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0" />
+ value="ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0" />
<parameter
name="autoInitializationFileName"
value="altera_emif_cal_slave_nf_ioaux_soft_ram" />
@@ -5609,107 +5706,107 @@
<parameter name="slave2Latency" value="1" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_170/synth/seq_cal_soft_m20k.hex"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/seq_cal_soft_m20k.hex"
attributes="" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_170/synth/seq_cal_soft_m20k.hex"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_avalon_onchip_memory2_180/synth/seq_cal_soft_m20k.hex"
attributes="" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
as="ioaux_soft_ram" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"</message>
- <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
- <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]</message>
- <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"</message>
+ <message level="Info" culprit="ioaux_soft_ram">Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
+ <message level="Info" culprit="ioaux_soft_ram"> Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]</message>
+ <message level="Info" culprit="ioaux_soft_ram">Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'</message>
</messages>
</entity>
<entity
kind="altera_mm_interconnect"
- version="17.0"
- name="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki">
+ version="18.0"
+ name="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq">
<parameter name="AUTO_DEVICE" value="10AX115S2F45E1SG" />
<parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
<parameter
name="COMPOSE_CONTENTS"
- value="add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};" />
+ value="add_instance {ioaux_master_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {SYNC_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_m0_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {ioaux_soft_ram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_W} {12};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESS_W} {16};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READ} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {ioaux_soft_ram_s1_translator} {SYNC_RESET} {0};add_instance {ioaux_master_bridge_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {ioaux_master_bridge_reset_reset_bridge} {SYNC_RESET} {0};add_instance {clk_bridge_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {0};set_instance_parameter_value {clk_bridge_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {ioaux_master_bridge_m0_translator.avalon_universal_master_0} {ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {ioaux_master_bridge_m0_translator.avalon_universal_master_0/ioaux_soft_ram_s1_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_master_bridge_m0_translator.reset} {reset};add_connection {ioaux_master_bridge_reset_reset_bridge.out_reset} {ioaux_soft_ram_s1_translator.reset} {reset};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_m0_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_soft_ram_s1_translator.clk} {clock};add_connection {clk_bridge_out_clk_clock_bridge.out_clk} {ioaux_master_bridge_reset_reset_bridge.clk} {clock};add_interface {clk_bridge_out_clk} {clock} {slave};set_interface_property {clk_bridge_out_clk} {EXPORT_OF} {clk_bridge_out_clk_clock_bridge.in_clk};add_interface {ioaux_master_bridge_m0} {avalon} {slave};set_interface_property {ioaux_master_bridge_m0} {EXPORT_OF} {ioaux_master_bridge_m0_translator.avalon_anti_master_0};add_interface {ioaux_master_bridge_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {ioaux_master_bridge_reset_reset_bridge_in_reset} {EXPORT_OF} {ioaux_master_bridge_reset_reset_bridge.in_reset};add_interface {ioaux_soft_ram_s1} {avalon} {master};set_interface_property {ioaux_soft_ram_s1} {EXPORT_OF} {ioaux_soft_ram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.ioaux_master_bridge.m0} {0};set_module_assignment {interconnect_id.ioaux_soft_ram.s1} {0};" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_170/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_mm_interconnect_180/synth/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.v"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
</sourceFiles>
<childSourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
</childSourceFiles>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
as="mm_interconnect_0" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_master_translator"</message>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_slave_translator"</message>
</messages>
</entity>
<entity
kind="altera_reset_controller"
- version="17.0"
+ version="18.0"
name="altera_reset_controller">
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_controller.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_controller.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_synchronizer.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_synchronizer.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_controller.sdc"
- attributes="" />
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_controller.sdc"
+ attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_controller.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_controller.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_synchronizer.v"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_synchronizer.v"
attributes="" />
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_170/synth/altera_reset_controller.sdc"
- attributes="" />
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_reset_controller_180/synth/altera_reset_controller.sdc"
+ attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
as="rst_controller" />
<messages>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_reset_controller"</message>
@@ -5717,26 +5814,26 @@
</entity>
<entity
kind="altera_merlin_master_translator"
- version="17.0"
+ version="18.0"
name="altera_merlin_master_translator">
- <parameter name="SYNC_RESET" value="0" />
+ <parameter name="WAITREQUEST_ALLOWANCE" value="0" />
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_master_translator_170/synth/altera_merlin_master_translator.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_master_translator_180/synth/altera_merlin_master_translator.sv"
attributes="" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_master_translator_170/synth/altera_merlin_master_translator.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_master_translator_180/synth/altera_merlin_master_translator.sv"
attributes="" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
as="ioaux_master_bridge_m0_translator" />
<messages>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_master_translator"</message>
@@ -5744,25 +5841,25 @@
</entity>
<entity
kind="altera_merlin_slave_translator"
- version="17.0"
+ version="18.0"
name="altera_merlin_slave_translator">
<generatedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_slave_translator_170/synth/altera_merlin_slave_translator.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_slave_translator_180/synth/altera_merlin_slave_translator.sv"
attributes="" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_slave_translator_170/synth/altera_merlin_slave_translator.sv"
+ path="/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/altera_merlin_slave_translator_180/synth/altera_merlin_slave_translator.sv"
attributes="" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/software/Altera/17.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
+ path="/home/software/Altera/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
- instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+ instantiator="ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
as="ioaux_soft_ram_s1_translator" />
<messages>
<message level="Info" culprit="ip_arria10_e1sg_ddr4_8g_2400">"Generating: altera_merlin_slave_translator"</message>
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_bb.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_bb.v
index 0f69ec0570a9984a09ccabc98858d980a99c42c3..46c391d93fa8f95ee2b3e064593e254e96048b61 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_bb.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_bb.v
@@ -1,68 +1,36 @@
-
module ip_arria10_e1sg_ddr4_8g_2400 (
- amm_ready_0,
- amm_read_0,
- amm_write_0,
- amm_address_0,
- amm_readdata_0,
- amm_writedata_0,
- amm_burstcount_0,
- amm_byteenable_0,
- amm_readdatavalid_0,
- emif_usr_clk,
- emif_usr_reset_n,
- global_reset_n,
- mem_ck,
- mem_ck_n,
- mem_a,
- mem_act_n,
- mem_ba,
- mem_bg,
- mem_cke,
- mem_cs_n,
- mem_odt,
- mem_reset_n,
- mem_par,
- mem_alert_n,
- mem_dqs,
- mem_dqs_n,
- mem_dq,
- mem_dbi_n,
- oct_rzqin,
- pll_ref_clk,
- local_cal_success,
- local_cal_fail);
-
- output amm_ready_0;
- input amm_read_0;
- input amm_write_0;
- input [26:0] amm_address_0;
- output [575:0] amm_readdata_0;
- input [575:0] amm_writedata_0;
- input [6:0] amm_burstcount_0;
- input [71:0] amm_byteenable_0;
- output amm_readdatavalid_0;
- output emif_usr_clk;
- output emif_usr_reset_n;
- input global_reset_n;
- output [1:0] mem_ck;
- output [1:0] mem_ck_n;
- output [16:0] mem_a;
- output [0:0] mem_act_n;
- output [1:0] mem_ba;
- output [1:0] mem_bg;
- output [1:0] mem_cke;
- output [1:0] mem_cs_n;
- output [1:0] mem_odt;
- output [0:0] mem_reset_n;
- output [0:0] mem_par;
- input [0:0] mem_alert_n;
- inout [8:0] mem_dqs;
- inout [8:0] mem_dqs_n;
- inout [71:0] mem_dq;
- inout [8:0] mem_dbi_n;
- input oct_rzqin;
- input pll_ref_clk;
- output local_cal_success;
- output local_cal_fail;
+ output wire amm_ready_0, // ctrl_amm_avalon_slave_0.waitrequest_n
+ input wire amm_read_0, // .read
+ input wire amm_write_0, // .write
+ input wire [26:0] amm_address_0, // .address
+ output wire [575:0] amm_readdata_0, // .readdata
+ input wire [575:0] amm_writedata_0, // .writedata
+ input wire [6:0] amm_burstcount_0, // .burstcount
+ input wire [71:0] amm_byteenable_0, // .byteenable
+ output wire amm_readdatavalid_0, // .readdatavalid
+ output wire emif_usr_clk, // emif_usr_clk_clock_source.clk
+ output wire emif_usr_reset_n, // emif_usr_reset_reset_source.reset_n
+ input wire global_reset_n, // global_reset_reset_sink.reset_n
+ output wire [1:0] mem_ck, // mem_conduit_end.mem_ck
+ output wire [1:0] mem_ck_n, // .mem_ck_n
+ output wire [16:0] mem_a, // .mem_a
+ output wire [0:0] mem_act_n, // .mem_act_n
+ output wire [1:0] mem_ba, // .mem_ba
+ output wire [1:0] mem_bg, // .mem_bg
+ output wire [1:0] mem_cke, // .mem_cke
+ output wire [1:0] mem_cs_n, // .mem_cs_n
+ output wire [1:0] mem_odt, // .mem_odt
+ output wire [0:0] mem_reset_n, // .mem_reset_n
+ output wire [0:0] mem_par, // .mem_par
+ input wire [0:0] mem_alert_n, // .mem_alert_n
+ inout wire [8:0] mem_dqs, // .mem_dqs
+ inout wire [8:0] mem_dqs_n, // .mem_dqs_n
+ inout wire [71:0] mem_dq, // .mem_dq
+ inout wire [8:0] mem_dbi_n, // .mem_dbi_n
+ input wire oct_rzqin, // oct_conduit_end.oct_rzqin
+ input wire pll_ref_clk, // pll_ref_clk_clock_sink.clk
+ output wire local_cal_success, // status_conduit_end.local_cal_success
+ output wire local_cal_fail // .local_cal_fail
+ );
endmodule
+
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation.rpt b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation.rpt
index 7feb0bbf6d7a32772a24c41ec00c283c469f5934..084cce4f35c7ad46fad2175acdc84244baa098c3 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation.rpt
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation.rpt
@@ -1,17 +1,23 @@
-Info: Generated by version: 17.0.2 build 297
+Info: Generated by version: 18.0 build 219
Info: Starting: Create simulation model
Info: qsys-generate /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400 --family="Arria 10" --part=10AX115S2F45E1SG
Progress: Loading ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys
Progress: Reading input file
Progress: Adding ddr4_inst [altera_emif 17.0]
+Warning: ddr4_inst: Used altera_emif 18.0 (instead of 17.0)
Progress: Parameterizing module ddr4_inst
+Info: ddr4_inst: Upgrading altera_emif from 17.0
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLH_PS" has been replaced by "MEM_DDR4_TWLH_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLS_PS" has been replaced by "MEM_DDR4_TWLS_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling Read DBI (under Memory Topology tab) is recommended for high-speed interfaces running at or above 1200 MHz.
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Read preamble of 1tCK is not recommended.
+Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling "Skip VREF calibration" is only recommended for diagnostic purposes. Timing analysis does not capture the effect of non-default calibration flow.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Periodic OCT re-calibration is disabled because the interface uses calibrated IO standards for either Address, Command or Clock signals.
+Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: The interface will have reduced Read Capture timing margin due to Periodic OCT re-calibration being disabled.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: PHY and controller running at 2x the frequency of user logic for improved efficiency.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Placement of address/command pins must follow "DDR4 Scheme 1: SODIMM".
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Interface estimated to require 4 I/O Bank(s) and 4 I/O PLL(s). This is only an estimation. Final usage depends on user pin location assignments and/or fitter behavior.
@@ -37,7 +43,7 @@ Info: ioaux_soft_ram: Running transform generation_view_transform took 0.000s
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser took 0.027s
Info: ddr4_inst: Running transform interconnect_transform_chooser
-Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.057s
+Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.066s
Info: cal_slave_component: Running transform interconnect_transform_chooser
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has waitrequest signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has readdatavalid signal 1 bit wide, but the slave is 0 bit wide.
@@ -46,41 +52,59 @@ Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave i
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has read signal 1 bit wide, but the slave is 0 bit wide.
Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.142s
Info: mm_interconnect_0: Running transform interconnect_transform_chooser
-Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.033s
+Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.036s
Info: ip_arria10_e1sg_ddr4_8g_2400: "Naming system components in system: ip_arria10_e1sg_ddr4_8g_2400"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Processing generation queue"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_avalon_mm_bridge"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"
-Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0004_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --vhdl --config=/tmp/alt8178_1526419091961342961.dir/0004_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=1 --sim_dir=/tmp/alt8178_1526419091961342961.dir/0004_ioaux_soft_ram_gen/ ]
-Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"
+Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0004_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --vhdl --config=/tmp/alt8179_6252425001817454136.dir/0004_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=1 --sim_dir=/tmp/alt8179_6252425001817454136.dir/0004_ioaux_soft_ram_gen/ ]
+Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_reset_controller"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_master_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_slave_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 66 files
+Info: Generating the following file(s) for MODELSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/modelsim_files.tcl
+Info: Generating the following file(s) for VCSMX simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/vcsmx_files.tcl
+Info: Generating the following file(s) for VCS simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/vcs_files.tcl
+Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/riviera_files.tcl
+Info: Generating the following file(s) for NCSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/ncsim_files.tcl
+Info: Generating the following file(s) for XCELIUM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/xcelium_files.tcl
+Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/.
+Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
Info: qsys-generate succeeded.
Info: Finished: Create simulation model
Info: Starting: Create Modelsim Project.
-Info: sim-script-gen --spd=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
-Info: Doing: ip-make-simscript --spd=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
+Info: sim-script-gen --system-file=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
Info: Generating the following file(s) for MODELSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: mentor/msim_setup.tcl
-Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
Info: Generating the following file(s) for VCSMX simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: synopsys/vcsmx/synopsys_sim.setup
Info: synopsys/vcsmx/vcsmx_setup.sh
+Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
+Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: aldec/rivierapro_setup.tcl
Info: Generating the following file(s) for NCSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: cadence/cds.lib
Info: cadence/hdl.var
Info: cadence/ncsim_setup.sh
Info: 10 .cds.lib files in cadence/cds_libs/ directory
-Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
-Info: aldec/rivierapro_setup.tcl
+Info: Generating the following file(s) for XCELIUM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: xcelium/cds.lib
+Info: xcelium/hdl.var
+Info: xcelium/xcelium_setup.sh
+Info: 10 .cds.lib files in xcelium/cds_libs/ directory
Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/.
Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
Info: Finished: Create Modelsim Project.
@@ -90,14 +114,20 @@ Info: qsys-generate /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/dd
Progress: Loading ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys
Progress: Reading input file
Progress: Adding ddr4_inst [altera_emif 17.0]
+Warning: ddr4_inst: Used altera_emif 18.0 (instead of 17.0)
Progress: Parameterizing module ddr4_inst
+Info: ddr4_inst: Upgrading altera_emif from 17.0
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLH_PS" has been replaced by "MEM_DDR4_TWLH_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLS_PS" has been replaced by "MEM_DDR4_TWLS_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling Read DBI (under Memory Topology tab) is recommended for high-speed interfaces running at or above 1200 MHz.
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Read preamble of 1tCK is not recommended.
+Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling "Skip VREF calibration" is only recommended for diagnostic purposes. Timing analysis does not capture the effect of non-default calibration flow.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Periodic OCT re-calibration is disabled because the interface uses calibrated IO standards for either Address, Command or Clock signals.
+Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: The interface will have reduced Read Capture timing margin due to Periodic OCT re-calibration being disabled.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: PHY and controller running at 2x the frequency of user logic for improved efficiency.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Placement of address/command pins must follow "DDR4 Scheme 1: SODIMM".
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Interface estimated to require 4 I/O Bank(s) and 4 I/O PLL(s). This is only an estimation. Final usage depends on user pin location assignments and/or fitter behavior.
@@ -123,31 +153,31 @@ Info: ioaux_soft_ram: Running transform generation_view_transform took 0.000s
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser took 0.008s
Info: ddr4_inst: Running transform interconnect_transform_chooser
-Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.033s
+Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.034s
Info: cal_slave_component: Running transform interconnect_transform_chooser
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has waitrequest signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has readdatavalid signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has burstcount signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has address signal 16 bit wide, but the slave is 12 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has read signal 1 bit wide, but the slave is 0 bit wide.
-Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.074s
+Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.077s
Info: mm_interconnect_0: Running transform interconnect_transform_chooser
-Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.032s
+Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.034s
Info: ip_arria10_e1sg_ddr4_8g_2400: "Naming system components in system: ip_arria10_e1sg_ddr4_8g_2400"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Processing generation queue"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_avalon_mm_bridge"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"
-Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1526419091961342961.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]
-Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"
+Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_6252425001817454136.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]
+Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_reset_controller"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_master_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_slave_translator"
-Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 60 files
+Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 63 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation_previous.rpt b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation_previous.rpt
index 279a17d42ecc1160d1fe40210575fa4663c1e436..ce07db2988d35f75eae79d5394c0de899eadd9a2 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation_previous.rpt
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_generation_previous.rpt
@@ -1,17 +1,23 @@
-Info: Generated by version: 17.0.2 build 297
+Info: Generated by version: 18.0 build 219
Info: Starting: Create simulation model
Info: qsys-generate /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400 --family="Arria 10" --part=10AX115S2F45E1SG
Progress: Loading ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys
Progress: Reading input file
Progress: Adding ddr4_inst [altera_emif 17.0]
+Warning: ddr4_inst: Used altera_emif 18.0 (instead of 17.0)
Progress: Parameterizing module ddr4_inst
+Info: ddr4_inst: Upgrading altera_emif from 17.0
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLH_PS" has been replaced by "MEM_DDR4_TWLH_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLS_PS" has been replaced by "MEM_DDR4_TWLS_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling Read DBI (under Memory Topology tab) is recommended for high-speed interfaces running at or above 1200 MHz.
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Read preamble of 1tCK is not recommended.
+Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling "Skip VREF calibration" is only recommended for diagnostic purposes. Timing analysis does not capture the effect of non-default calibration flow.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Periodic OCT re-calibration is disabled because the interface uses calibrated IO standards for either Address, Command or Clock signals.
+Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: The interface will have reduced Read Capture timing margin due to Periodic OCT re-calibration being disabled.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: PHY and controller running at 2x the frequency of user logic for improved efficiency.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Placement of address/command pins must follow "DDR4 Scheme 1: SODIMM".
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Interface estimated to require 4 I/O Bank(s) and 4 I/O PLL(s). This is only an estimation. Final usage depends on user pin location assignments and/or fitter behavior.
@@ -19,7 +25,7 @@ Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Valid memory frequencies for
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: For additional documentation about the interface, consult the *_readme.txt file after generation.
Info: ip_arria10_e1sg_ddr4_8g_2400: "Transforming system: ip_arria10_e1sg_ddr4_8g_2400"
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform generation_view_transform
-Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform generation_view_transform took 0.000s
+Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform generation_view_transform took 0.001s
Info: ddr4_inst: Running transform generation_view_transform
Info: ddr4_inst: Running transform generation_view_transform took 0.000s
Info: arch: Running transform generation_view_transform
@@ -35,52 +41,70 @@ Info: ioaux_master_bridge: Running transform generation_view_transform took 0.00
Info: ioaux_soft_ram: Running transform generation_view_transform
Info: ioaux_soft_ram: Running transform generation_view_transform took 0.000s
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser
-Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser took 0.027s
+Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser took 0.028s
Info: ddr4_inst: Running transform interconnect_transform_chooser
-Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.059s
+Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.063s
Info: cal_slave_component: Running transform interconnect_transform_chooser
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has waitrequest signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has readdatavalid signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has burstcount signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has address signal 16 bit wide, but the slave is 12 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has read signal 1 bit wide, but the slave is 0 bit wide.
-Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.149s
+Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.140s
Info: mm_interconnect_0: Running transform interconnect_transform_chooser
-Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.033s
+Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.036s
Info: ip_arria10_e1sg_ddr4_8g_2400: "Naming system components in system: ip_arria10_e1sg_ddr4_8g_2400"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Processing generation queue"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_avalon_mm_bridge"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"
-Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1705704913097557955.dir/0004_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --vhdl --config=/tmp/alt8178_1705704913097557955.dir/0004_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=1 --sim_dir=/tmp/alt8178_1705704913097557955.dir/0004_ioaux_soft_ram_gen/ ]
-Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"
+Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_273499616923139072.dir/0004_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --vhdl --config=/tmp/alt8179_273499616923139072.dir/0004_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=1 --sim_dir=/tmp/alt8179_273499616923139072.dir/0004_ioaux_soft_ram_gen/ ]
+Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_reset_controller"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_master_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_slave_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 66 files
+Info: Generating the following file(s) for MODELSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/modelsim_files.tcl
+Info: Generating the following file(s) for VCSMX simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/vcsmx_files.tcl
+Info: Generating the following file(s) for VCS simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/vcs_files.tcl
+Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/riviera_files.tcl
+Info: Generating the following file(s) for NCSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/ncsim_files.tcl
+Info: Generating the following file(s) for XCELIUM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: common/xcelium_files.tcl
+Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/.
+Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
Info: qsys-generate succeeded.
Info: Finished: Create simulation model
Info: Starting: Create Modelsim Project.
-Info: sim-script-gen --spd=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
-Info: Doing: ip-make-simscript --spd=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.spd --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
+Info: sim-script-gen --system-file=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys --output-directory=/home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ --use-relative-paths=true
Info: Generating the following file(s) for MODELSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: mentor/msim_setup.tcl
-Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
Info: Generating the following file(s) for VCSMX simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: synopsys/vcsmx/synopsys_sim.setup
Info: synopsys/vcsmx/vcsmx_setup.sh
+Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
+Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: aldec/rivierapro_setup.tcl
Info: Generating the following file(s) for NCSIM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
Info: cadence/cds.lib
Info: cadence/hdl.var
Info: cadence/ncsim_setup.sh
Info: 10 .cds.lib files in cadence/cds_libs/ directory
-Info: Generating the following file(s) for RIVIERA simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
-Info: aldec/rivierapro_setup.tcl
+Info: Generating the following file(s) for XCELIUM simulator in /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ directory:
+Info: xcelium/cds.lib
+Info: xcelium/hdl.var
+Info: xcelium/xcelium_setup.sh
+Info: 10 .cds.lib files in xcelium/cds_libs/ directory
Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/.
Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
Info: Finished: Create Modelsim Project.
@@ -90,14 +114,20 @@ Info: qsys-generate /home/donker/git/hdl/libraries/technology/ip_arria10_e1sg/dd
Progress: Loading ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400.qsys
Progress: Reading input file
Progress: Adding ddr4_inst [altera_emif 17.0]
+Warning: ddr4_inst: Used altera_emif 18.0 (instead of 17.0)
Progress: Parameterizing module ddr4_inst
+Info: ddr4_inst: Upgrading altera_emif from 17.0
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLH_PS" has been replaced by "MEM_DDR4_TWLH_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
+Warning: ddr4_inst: Parameter "MEM_DDR4_TWLS_PS" has been replaced by "MEM_DDR4_TWLS_CYC" in the current IP version. Please confirm that the value of the new parameter is correct.
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling Read DBI (under Memory Topology tab) is recommended for high-speed interfaces running at or above 1200 MHz.
Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Read preamble of 1tCK is not recommended.
+Warning: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst: Enabling "Skip VREF calibration" is only recommended for diagnostic purposes. Timing analysis does not capture the effect of non-default calibration flow.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Periodic OCT re-calibration is disabled because the interface uses calibrated IO standards for either Address, Command or Clock signals.
+Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: The interface will have reduced Read Capture timing margin due to Periodic OCT re-calibration being disabled.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: PHY and controller running at 2x the frequency of user logic for improved efficiency.
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Placement of address/command pins must follow "DDR4 Scheme 1: SODIMM".
Info: ip_arria10_e1sg_ddr4_8g_2400.ddr4_inst.arch: Interface estimated to require 4 I/O Bank(s) and 4 I/O PLL(s). This is only an estimation. Final usage depends on user pin location assignments and/or fitter behavior.
@@ -123,31 +153,31 @@ Info: ioaux_soft_ram: Running transform generation_view_transform took 0.000s
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser
Info: ip_arria10_e1sg_ddr4_8g_2400: Running transform interconnect_transform_chooser took 0.008s
Info: ddr4_inst: Running transform interconnect_transform_chooser
-Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.032s
+Info: ddr4_inst: Running transform interconnect_transform_chooser took 0.034s
Info: cal_slave_component: Running transform interconnect_transform_chooser
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has waitrequest signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has readdatavalid signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has burstcount signal 1 bit wide, but the slave is 0 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has address signal 16 bit wide, but the slave is 12 bit wide.
Info: Interconnect is inserted between master ioaux_master_bridge.m0 and slave ioaux_soft_ram.s1 because the master has read signal 1 bit wide, but the slave is 0 bit wide.
-Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.074s
+Info: cal_slave_component: Running transform interconnect_transform_chooser took 0.080s
Info: mm_interconnect_0: Running transform interconnect_transform_chooser
-Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.033s
+Info: mm_interconnect_0: Running transform interconnect_transform_chooser took 0.034s
Info: ip_arria10_e1sg_ddr4_8g_2400: "Naming system components in system: ip_arria10_e1sg_ddr4_8g_2400"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Processing generation queue"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_avalon_mm_bridge"
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy"
-Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/17.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/17.0/quartus/linux64/perl/lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/17.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/17.0/quartus/sopc_builder/bin -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/17.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy --dir=/tmp/alt8178_1705704913097557955.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/17.0/quartus --verilog --config=/tmp/alt8178_1705704913097557955.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy_component_configuration.pl --do_build_sim=0 ]
-Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy'
-Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki"
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za"
+Info: ioaux_soft_ram: Starting RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ioaux_soft_ram: Generation command is [exec /home/software/Altera/18.0/quartus/linux64/perl/bin/perl -I /home/software/Altera/18.0/quartus/linux64/perl/lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin/europa -I /home/software/Altera/18.0/quartus/sopc_builder/bin/perl_lib -I /home/software/Altera/18.0/quartus/sopc_builder/bin -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/common -I /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- /home/software/Altera/18.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za --dir=/tmp/alt8179_273499616923139072.dir/0011_ioaux_soft_ram_gen/ --quartus_dir=/home/software/Altera/18.0/quartus --verilog --config=/tmp/alt8179_273499616923139072.dir/0011_ioaux_soft_ram_gen//ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za_component_configuration.pl --do_build_sim=0 ]
+Info: ioaux_soft_ram: Done RTL generation for module 'ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za'
+Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_reset_controller"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_master_translator"
Info: ip_arria10_e1sg_ddr4_8g_2400: "Generating: altera_merlin_slave_translator"
-Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 60 files
+Info: ip_arria10_e1sg_ddr4_8g_2400: Done "ip_arria10_e1sg_ddr4_8g_2400" with 10 modules, 63 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_inst.v b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_inst.v
index fe2c985b0cbfca33a3acdd79b32399e2012b7972..16e3e46dc1872049dd58de58a76a38c41b815b5c 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_inst.v
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400_inst.v
@@ -1,35 +1,35 @@
ip_arria10_e1sg_ddr4_8g_2400 u0 (
- .amm_ready_0 (_connected_to_amm_ready_0_), // ctrl_amm_avalon_slave_0.waitrequest_n
- .amm_read_0 (_connected_to_amm_read_0_), // .read
- .amm_write_0 (_connected_to_amm_write_0_), // .write
- .amm_address_0 (_connected_to_amm_address_0_), // .address
- .amm_readdata_0 (_connected_to_amm_readdata_0_), // .readdata
- .amm_writedata_0 (_connected_to_amm_writedata_0_), // .writedata
- .amm_burstcount_0 (_connected_to_amm_burstcount_0_), // .burstcount
- .amm_byteenable_0 (_connected_to_amm_byteenable_0_), // .byteenable
- .amm_readdatavalid_0 (_connected_to_amm_readdatavalid_0_), // .readdatavalid
- .emif_usr_clk (_connected_to_emif_usr_clk_), // emif_usr_clk_clock_source.clk
- .emif_usr_reset_n (_connected_to_emif_usr_reset_n_), // emif_usr_reset_reset_source.reset_n
- .global_reset_n (_connected_to_global_reset_n_), // global_reset_reset_sink.reset_n
- .mem_ck (_connected_to_mem_ck_), // mem_conduit_end.mem_ck
- .mem_ck_n (_connected_to_mem_ck_n_), // .mem_ck_n
- .mem_a (_connected_to_mem_a_), // .mem_a
- .mem_act_n (_connected_to_mem_act_n_), // .mem_act_n
- .mem_ba (_connected_to_mem_ba_), // .mem_ba
- .mem_bg (_connected_to_mem_bg_), // .mem_bg
- .mem_cke (_connected_to_mem_cke_), // .mem_cke
- .mem_cs_n (_connected_to_mem_cs_n_), // .mem_cs_n
- .mem_odt (_connected_to_mem_odt_), // .mem_odt
- .mem_reset_n (_connected_to_mem_reset_n_), // .mem_reset_n
- .mem_par (_connected_to_mem_par_), // .mem_par
- .mem_alert_n (_connected_to_mem_alert_n_), // .mem_alert_n
- .mem_dqs (_connected_to_mem_dqs_), // .mem_dqs
- .mem_dqs_n (_connected_to_mem_dqs_n_), // .mem_dqs_n
- .mem_dq (_connected_to_mem_dq_), // .mem_dq
- .mem_dbi_n (_connected_to_mem_dbi_n_), // .mem_dbi_n
- .oct_rzqin (_connected_to_oct_rzqin_), // oct_conduit_end.oct_rzqin
- .pll_ref_clk (_connected_to_pll_ref_clk_), // pll_ref_clk_clock_sink.clk
- .local_cal_success (_connected_to_local_cal_success_), // status_conduit_end.local_cal_success
- .local_cal_fail (_connected_to_local_cal_fail_) // .local_cal_fail
+ .amm_ready_0 (_connected_to_amm_ready_0_), // output, width = 1, ctrl_amm_avalon_slave_0.waitrequest_n
+ .amm_read_0 (_connected_to_amm_read_0_), // input, width = 1, .read
+ .amm_write_0 (_connected_to_amm_write_0_), // input, width = 1, .write
+ .amm_address_0 (_connected_to_amm_address_0_), // input, width = 27, .address
+ .amm_readdata_0 (_connected_to_amm_readdata_0_), // output, width = 576, .readdata
+ .amm_writedata_0 (_connected_to_amm_writedata_0_), // input, width = 576, .writedata
+ .amm_burstcount_0 (_connected_to_amm_burstcount_0_), // input, width = 7, .burstcount
+ .amm_byteenable_0 (_connected_to_amm_byteenable_0_), // input, width = 72, .byteenable
+ .amm_readdatavalid_0 (_connected_to_amm_readdatavalid_0_), // output, width = 1, .readdatavalid
+ .emif_usr_clk (_connected_to_emif_usr_clk_), // output, width = 1, emif_usr_clk_clock_source.clk
+ .emif_usr_reset_n (_connected_to_emif_usr_reset_n_), // output, width = 1, emif_usr_reset_reset_source.reset_n
+ .global_reset_n (_connected_to_global_reset_n_), // input, width = 1, global_reset_reset_sink.reset_n
+ .mem_ck (_connected_to_mem_ck_), // output, width = 2, mem_conduit_end.mem_ck
+ .mem_ck_n (_connected_to_mem_ck_n_), // output, width = 2, .mem_ck_n
+ .mem_a (_connected_to_mem_a_), // output, width = 17, .mem_a
+ .mem_act_n (_connected_to_mem_act_n_), // output, width = 1, .mem_act_n
+ .mem_ba (_connected_to_mem_ba_), // output, width = 2, .mem_ba
+ .mem_bg (_connected_to_mem_bg_), // output, width = 2, .mem_bg
+ .mem_cke (_connected_to_mem_cke_), // output, width = 2, .mem_cke
+ .mem_cs_n (_connected_to_mem_cs_n_), // output, width = 2, .mem_cs_n
+ .mem_odt (_connected_to_mem_odt_), // output, width = 2, .mem_odt
+ .mem_reset_n (_connected_to_mem_reset_n_), // output, width = 1, .mem_reset_n
+ .mem_par (_connected_to_mem_par_), // output, width = 1, .mem_par
+ .mem_alert_n (_connected_to_mem_alert_n_), // input, width = 1, .mem_alert_n
+ .mem_dqs (_connected_to_mem_dqs_), // inout, width = 9, .mem_dqs
+ .mem_dqs_n (_connected_to_mem_dqs_n_), // inout, width = 9, .mem_dqs_n
+ .mem_dq (_connected_to_mem_dq_), // inout, width = 72, .mem_dq
+ .mem_dbi_n (_connected_to_mem_dbi_n_), // inout, width = 9, .mem_dbi_n
+ .oct_rzqin (_connected_to_oct_rzqin_), // input, width = 1, oct_conduit_end.oct_rzqin
+ .pll_ref_clk (_connected_to_pll_ref_clk_), // input, width = 1, pll_ref_clk_clock_sink.clk
+ .local_cal_success (_connected_to_local_cal_success_), // output, width = 1, status_conduit_end.local_cal_success
+ .local_cal_fail (_connected_to_local_cal_fail_) // output, width = 1, .local_cal_fail
);
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/aldec/rivierapro_setup.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/aldec/rivierapro_setup.tcl
index 821d232dcd9564aef0f16575b2812b4c3e5a41a6..8d913f4cbe591903e490679213213ce4c7965a12 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/aldec/rivierapro_setup.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/aldec/rivierapro_setup.tcl
@@ -12,13 +12,13 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# Auto-generated simulation script rivierapro_setup.tcl
# ----------------------------------------
# This script provides commands to simulate the following IP detected in
# your Quartus project:
-# ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400
+# ip_arria10_e1sg_ddr4_8g_2400
#
# Intel recommends that you source this Quartus-generated IP simulation
# script from your own customized top-level script, and avoid editing this
@@ -84,7 +84,7 @@
#
# IP SIMULATION SCRIPT
# ----------------------------------------
-# If ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
+# If ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
# Quartus project, you can generate a simulation script
# suitable for inclusion in your top-level simulation
# script by running the following command line:
@@ -113,29 +113,52 @@ if ![info exists QSYS_SIMDIR] {
}
if ![info exists QUARTUS_INSTALL_DIR] {
- set QUARTUS_INSTALL_DIR "/home/software/Altera/17.0/quartus/"
+ set QUARTUS_INSTALL_DIR "/home/software/Altera/18.0/quartus/"
}
if ![info exists USER_DEFINED_COMPILE_OPTIONS] {
set USER_DEFINED_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] {
set USER_DEFINED_VHDL_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] {
set USER_DEFINED_VERILOG_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_ELAB_OPTIONS] {
set USER_DEFINED_ELAB_OPTIONS ""
}
+if ![info exists SILENCE] {
+ set SILENCE "false"
+}
+
+
+# ----------------------------------------
+# Source Common Tcl File
+source $QSYS_SIMDIR/common/riviera_files.tcl
+
+
# ----------------------------------------
# Initialize simulation properties - DO NOT MODIFY!
set ELAB_OPTIONS ""
set SIM_OPTIONS ""
+set LD_LIBRARY_PATH [dict create]
if ![ string match "*-64 vsim*" [ vsim -version ] ] {
+ set SIMULATOR_TOOL_BITNESS "bit_32"
} else {
+ set SIMULATOR_TOOL_BITNESS "bit_64"
}
+set LD_LIBRARY_PATH [dict merge $LD_LIBRARY_PATH [dict get [ip_arria10_e1sg_ddr4_8g_2400::get_env_variables $SIMULATOR_TOOL_BITNESS] "LD_LIBRARY_PATH"]]
+if {[dict size $LD_LIBRARY_PATH] !=0 } {
+ set LD_LIBRARY_PATH [subst [join [dict keys $LD_LIBRARY_PATH] ":"]]
+ setenv LD_LIBRARY_PATH "$LD_LIBRARY_PATH"
+}
+append ELAB_OPTIONS [subst [ip_arria10_e1sg_ddr4_8g_2400::get_elab_options $SIMULATOR_TOOL_BITNESS]]
+append SIM_OPTIONS [subst [ip_arria10_e1sg_ddr4_8g_2400::get_sim_options $SIMULATOR_TOOL_BITNESS]]
set Aldec "Riviera"
if { [ string match "*Active-HDL*" [ vsim -version ] ] } {
@@ -151,17 +174,21 @@ if { [ string match "Active" $Aldec ] } {
# ----------------------------------------
# Copy ROM/RAM files to simulation directory
alias file_copy {
- echo "\[exec\] file_copy"
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex ./
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex ./
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex ./
- file copy -force $QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex ./
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] file_copy"
+ }
+ set memory_files [list]
+ set memory_files [concat $memory_files [ip_arria10_e1sg_ddr4_8g_2400::get_memory_files "$QSYS_SIMDIR"]]
+ foreach file $memory_files { file copy -force $file ./ }
}
# ----------------------------------------
# Create compilation libraries
+
+set logical_libraries [list "work" "work_lib" "altera_ver" "lpm_ver" "sgate_ver" "altera_mf_ver" "altera_lnsim_ver" "twentynm_ver" "twentynm_hssi_ver" "twentynm_hip_ver" "altera" "lpm" "sgate" "altera_mf" "altera_lnsim" "twentynm" "twentynm_hssi" "twentynm_hip"]
+
proc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }
-ensure_lib ./libraries
+ensure_lib ./libraries/
ensure_lib ./libraries/work
vmap work ./libraries/work
ensure_lib ./libraries/altera_ver
@@ -196,131 +223,98 @@ ensure_lib ./libraries/twentynm_hssi
vmap twentynm_hssi ./libraries/twentynm_hssi
ensure_lib ./libraries/twentynm_hip
vmap twentynm_hip ./libraries/twentynm_hip
-ensure_lib ./libraries/altera_emif_arch_nf_170
-vmap altera_emif_arch_nf_170 ./libraries/altera_emif_arch_nf_170
-ensure_lib ./libraries/altera_avalon_mm_bridge_170
-vmap altera_avalon_mm_bridge_170 ./libraries/altera_avalon_mm_bridge_170
-ensure_lib ./libraries/altera_avalon_onchip_memory2_170
-vmap altera_avalon_onchip_memory2_170 ./libraries/altera_avalon_onchip_memory2_170
-ensure_lib ./libraries/altera_merlin_master_translator_170
-vmap altera_merlin_master_translator_170 ./libraries/altera_merlin_master_translator_170
-ensure_lib ./libraries/altera_merlin_slave_translator_170
-vmap altera_merlin_slave_translator_170 ./libraries/altera_merlin_slave_translator_170
-ensure_lib ./libraries/altera_mm_interconnect_170
-vmap altera_mm_interconnect_170 ./libraries/altera_mm_interconnect_170
-ensure_lib ./libraries/altera_reset_controller_170
-vmap altera_reset_controller_170 ./libraries/altera_reset_controller_170
-ensure_lib ./libraries/altera_emif_cal_slave_nf_170
-vmap altera_emif_cal_slave_nf_170 ./libraries/altera_emif_cal_slave_nf_170
-ensure_lib ./libraries/altera_emif_170
-vmap altera_emif_170 ./libraries/altera_emif_170
-ensure_lib ./libraries/ip_arria10_e1sg_ddr4_8g_2400
-vmap ip_arria10_e1sg_ddr4_8g_2400 ./libraries/ip_arria10_e1sg_ddr4_8g_2400
+set design_libraries [dict create]
+set design_libraries [dict merge $design_libraries [ip_arria10_e1sg_ddr4_8g_2400::get_design_libraries]]
+set libraries [dict keys $design_libraries]
+foreach library $libraries {
+ ensure_lib ./libraries/$library/
+ vmap $library ./libraries/$library/
+ lappend logical_libraries $library
+}
# ----------------------------------------
# Compile device library files
alias dev_com {
- echo "\[exec\] dev_com"
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v" -work altera_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v" -work lpm_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v" -work sgate_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v" -work altera_mf_ver
- vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.v" -work twentynm_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_atoms_ncrypt.v" -work twentynm_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.v" -work twentynm_hssi_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip_ver
- vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.v" -work twentynm_hip_ver
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/alt_dspbuilder_package.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_europa_support_lib.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives_components.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.vhd" -work altera
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220pack.vhd" -work lpm
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.vhd" -work lpm
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate_pack.vhd" -work sgate
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.vhd" -work twentynm
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_components.vhd" -work twentynm
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_components.vhd" -work twentynm_hssi
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.vhd" -work twentynm_hssi
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_components.vhd" -work twentynm_hip
- vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.vhd" -work twentynm_hip
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] dev_com"
+ }
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v" -work altera_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v" -work lpm_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v" -work sgate_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v" -work altera_mf_ver
+ eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.v" -work twentynm_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_atoms_ncrypt.v" -work twentynm_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.v" -work twentynm_hssi_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip_ver
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.v" -work twentynm_hip_ver
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/alt_dspbuilder_package.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_europa_support_lib.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives_components.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.vhd" -work altera
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220pack.vhd" -work lpm
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.vhd" -work lpm
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate_pack.vhd" -work sgate
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
+ eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_atoms_ncrypt.v" -work twentynm
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.vhd" -work twentynm
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_components.vhd" -work twentynm
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_components.vhd" -work twentynm_hssi
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.vhd" -work twentynm_hssi
+ eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_components.vhd" -work twentynm_hip
+ eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.vhd" -work twentynm_hip
}
# ----------------------------------------
# Compile the design files in correct order
alias com {
- echo "\[exec\] com"
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/aldec/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/aldec/altera_reset_controller.v" -work altera_reset_controller_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/aldec/altera_reset_synchronizer.v" -work altera_reset_controller_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
- eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v" -work altera_emif_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd" -work ip_arria10_e1sg_ddr4_8g_2400
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] com"
+ }
+ set design_files [dict create]
+ set design_files [dict merge [ip_arria10_e1sg_ddr4_8g_2400::get_common_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+ set common_design_files [dict values $design_files]
+ foreach file $common_design_files {
+ eval $file
+ }
+ set design_files [list]
+ set design_files [concat $design_files [ip_arria10_e1sg_ddr4_8g_2400::get_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+ foreach file $design_files {
+ eval $file
+ }
}
# ----------------------------------------
# Elaborate top level design
alias elab {
- echo "\[exec\] elab"
- eval vsim +access +r -t ps $ELAB_OPTIONS -L work -L altera_emif_arch_nf_170 -L altera_avalon_mm_bridge_170 -L altera_avalon_onchip_memory2_170 -L altera_merlin_master_translator_170 -L altera_merlin_slave_translator_170 -L altera_mm_interconnect_170 -L altera_reset_controller_170 -L altera_emif_cal_slave_nf_170 -L altera_emif_170 -L ip_arria10_e1sg_ddr4_8g_2400 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L twentynm_ver -L twentynm_hssi_ver -L twentynm_hip_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L twentynm -L twentynm_hssi -L twentynm_hip $TOP_LEVEL_NAME
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] elab"
+ }
+ set elabcommand " -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS"
+ foreach library $logical_libraries { append elabcommand " -L $library" }
+ append elabcommand " $TOP_LEVEL_NAME"
+ eval vsim +access +r $elabcommand
}
# ----------------------------------------
# Elaborate the top level design with -dbg -O2 option
alias elab_debug {
- echo "\[exec\] elab_debug"
- eval vsim -dbg -O2 +access +r -t ps $ELAB_OPTIONS -L work -L altera_emif_arch_nf_170 -L altera_avalon_mm_bridge_170 -L altera_avalon_onchip_memory2_170 -L altera_merlin_master_translator_170 -L altera_merlin_slave_translator_170 -L altera_mm_interconnect_170 -L altera_reset_controller_170 -L altera_emif_cal_slave_nf_170 -L altera_emif_170 -L ip_arria10_e1sg_ddr4_8g_2400 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L twentynm_ver -L twentynm_hssi_ver -L twentynm_hip_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L twentynm -L twentynm_hssi -L twentynm_hip $TOP_LEVEL_NAME
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] elab_debug"
+ }
+ set elabcommand " -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS"
+ foreach library $logical_libraries { append elabcommand " -L $library" }
+ append elabcommand " $TOP_LEVEL_NAME"
+ eval vsim -dbg -O2 +access +r $elabcommand
}
# ----------------------------------------
@@ -379,6 +373,8 @@ alias h {
echo "USER_DEFINED_VERILOG_COMPILE_OPTIONS -- User-defined verilog compile options, added to com/dev_com aliases."
echo
echo "USER_DEFINED_ELAB_OPTIONS -- User-defined elaboration options, added to elab/elab_debug aliases."
+ echo
+ echo "SILENCE -- Set to true to suppress all informational and/or warning messages in the generated simulation script. "
}
file_copy
h
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds.lib b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds.lib
index 1d2632456f287e89c528ff56dbf2b1fecfd71f6b..941f28f2ac426f68b464939b78110552e41ce2c7 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds.lib
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds.lib
@@ -9,21 +9,20 @@ DEFINE ncinternal $CDS_ROOT/tools/inca/files/NCINTERNAL
DEFINE ncmodels $CDS_ROOT/tools/inca/files/NCMODELS/
DEFINE cds_assertions $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/
DEFINE work ./libraries/work/
-DEFINE altera_emif_arch_nf_170 ./libraries/altera_emif_arch_nf_170/
-DEFINE altera_avalon_mm_bridge_170 ./libraries/altera_avalon_mm_bridge_170/
-DEFINE altera_avalon_onchip_memory2_170 ./libraries/altera_avalon_onchip_memory2_170/
-DEFINE altera_merlin_master_translator_170 ./libraries/altera_merlin_master_translator_170/
-DEFINE altera_merlin_slave_translator_170 ./libraries/altera_merlin_slave_translator_170/
-DEFINE altera_mm_interconnect_170 ./libraries/altera_mm_interconnect_170/
-DEFINE altera_reset_controller_170 ./libraries/altera_reset_controller_170/
-DEFINE altera_emif_cal_slave_nf_170 ./libraries/altera_emif_cal_slave_nf_170/
-DEFINE altera_emif_170 ./libraries/altera_emif_170/
+DEFINE altera_emif_arch_nf_180 ./libraries/altera_emif_arch_nf_180/
+DEFINE altera_avalon_mm_bridge_180 ./libraries/altera_avalon_mm_bridge_180/
+DEFINE altera_avalon_onchip_memory2_180 ./libraries/altera_avalon_onchip_memory2_180/
+DEFINE altera_merlin_master_translator_180 ./libraries/altera_merlin_master_translator_180/
+DEFINE altera_merlin_slave_translator_180 ./libraries/altera_merlin_slave_translator_180/
+DEFINE altera_mm_interconnect_180 ./libraries/altera_mm_interconnect_180/
+DEFINE altera_reset_controller_180 ./libraries/altera_reset_controller_180/
+DEFINE altera_emif_cal_slave_nf_180 ./libraries/altera_emif_cal_slave_nf_180/
+DEFINE altera_emif_180 ./libraries/altera_emif_180/
DEFINE ip_arria10_e1sg_ddr4_8g_2400 ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
DEFINE altera_ver ./libraries/altera_ver/
DEFINE lpm_ver ./libraries/lpm_ver/
DEFINE sgate_ver ./libraries/sgate_ver/
DEFINE altera_mf_ver ./libraries/altera_mf_ver/
-DEFINE altera_lnsim_ver ./libraries/altera_lnsim_ver/
DEFINE twentynm_ver ./libraries/twentynm_ver/
DEFINE twentynm_hssi_ver ./libraries/twentynm_hssi_ver/
DEFINE twentynm_hip_ver ./libraries/twentynm_hip_ver/
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds_libs/ip_arria10_e1sg_ddr4_8g_2400.cds.lib b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds_libs/ip_arria10_e1sg_ddr4_8g_2400.cds.lib
index 319f08154257f638a2e92ce1d8d99a78d2343898..d2d93036f038bb10d461fe4284cdc3315ae99b31 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds_libs/ip_arria10_e1sg_ddr4_8g_2400.cds.lib
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/cds_libs/ip_arria10_e1sg_ddr4_8g_2400.cds.lib
@@ -13,7 +13,6 @@ DEFINE altera_ver ./../libraries/altera_ver/
DEFINE lpm_ver ./../libraries/lpm_ver/
DEFINE sgate_ver ./../libraries/sgate_ver/
DEFINE altera_mf_ver ./../libraries/altera_mf_ver/
-DEFINE altera_lnsim_ver ./../libraries/altera_lnsim_ver/
DEFINE twentynm_ver ./../libraries/twentynm_ver/
DEFINE twentynm_hssi_ver ./../libraries/twentynm_hssi_ver/
DEFINE twentynm_hip_ver ./../libraries/twentynm_hip_ver/
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/ncsim_setup.sh b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/ncsim_setup.sh
index 816eb84d03a543c841b33a5de41922cf8baef711..525aef9ff70277e5dcd36595bfd68ffbab20b4fe 100755
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/ncsim_setup.sh
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/cadence/ncsim_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# ncsim - auto-generated simulation script
@@ -20,7 +20,7 @@
# ----------------------------------------
# This script provides commands to simulate the following IP detected in
# your Quartus project:
-# ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400
+# ip_arria10_e1sg_ddr4_8g_2400
#
# Intel recommends that you source this Quartus-generated IP simulation
# script from your own customized top-level script, and avoid editing this
@@ -95,7 +95,7 @@
#
# IP SIMULATION SCRIPT
# ----------------------------------------
-# If ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
+# If ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
# Quartus project, you can generate a simulation script
# suitable for inclusion in your top-level simulation
# script by running the following command line:
@@ -106,12 +106,12 @@
# within the Quartus project, and generate a unified
# script which supports all the Intel IP within the design.
# ----------------------------------------
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400"
QSYS_SIMDIR="./../"
-QUARTUS_INSTALL_DIR="/home/software/Altera/17.0/quartus/"
+QUARTUS_INSTALL_DIR="/home/software/Altera/18.0/quartus/"
SKIP_FILE_COPY=0
SKIP_DEV_COM=0
SKIP_COM=0
@@ -133,34 +133,74 @@ for expression in "$@"; do
fi
done
+#-------------------------------------------
+# check tclsh version no earlier than 8.5
+version=$(echo "puts [package vcompare [info tclversion] 8.5]; exit" | tclsh)
+if [ $version -eq -1 ]; then
+ echo "Error: Minimum required tcl package version is 8.5." >&2
+ exit 1
+fi
+
# ----------------------------------------
# initialize simulation properties - DO NOT MODIFY!
ELAB_OPTIONS=""
SIM_OPTIONS=""
if [[ `ncsim -version` != *"ncsim(64)"* ]]; then
- :
+ SIMULATOR_TOOL_BITNESS="bit_32"
else
- :
+ SIMULATOR_TOOL_BITNESS="bit_64"
fi
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set SIMULATOR_TOOL_BITNESS [lindex $argv 2]
+source $QSYS_SIMDIR/common/ncsim_files.tcl
+set LD_LIBRARY_PATH [dict create]
+set LD_LIBRARY_PATH [dict merge $LD_LIBRARY_PATH [dict get [ip_arria10_e1sg_ddr4_8g_2400::get_env_variables $SIMULATOR_TOOL_BITNESS] "LD_LIBRARY_PATH"]]
+if {[dict size $LD_LIBRARY_PATH] !=0 } {
+ set LD_LIBRARY_PATH [join [dict keys $LD_LIBRARY_PATH] ":"]
+ puts "LD_LIBRARY_PATH=\"$LD_LIBRARY_PATH\""
+}
+
+set ELAB_OPTIONS ""
+append ELAB_OPTIONS [ip_arria10_e1sg_ddr4_8g_2400::get_elab_options $SIMULATOR_TOOL_BITNESS]
+puts "ELAB_OPTIONS+=\"$ELAB_OPTIONS\""
+set SIM_OPTIONS ""
+append SIM_OPTIONS [ip_arria10_e1sg_ddr4_8g_2400::get_sim_options $SIMULATOR_TOOL_BITNESS]
+puts "SIM_OPTIONS+=\"$SIM_OPTIONS\""
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" "$SIMULATOR_TOOL_BITNESS" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+eval $cmd_output
+
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set libraries [dict create]
+source $QSYS_SIMDIR/common/ncsim_files.tcl
+set libraries [dict merge $libraries [ip_arria10_e1sg_ddr4_8g_2400::get_design_libraries]]
+set design_libraries [dict keys $libraries]
+foreach file $design_libraries { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+design_libraries=$cmd_output
# ----------------------------------------
# create compilation libraries
mkdir -p ./libraries/work/
-mkdir -p ./libraries/altera_emif_arch_nf_170/
-mkdir -p ./libraries/altera_avalon_mm_bridge_170/
-mkdir -p ./libraries/altera_avalon_onchip_memory2_170/
-mkdir -p ./libraries/altera_merlin_master_translator_170/
-mkdir -p ./libraries/altera_merlin_slave_translator_170/
-mkdir -p ./libraries/altera_mm_interconnect_170/
-mkdir -p ./libraries/altera_reset_controller_170/
-mkdir -p ./libraries/altera_emif_cal_slave_nf_170/
-mkdir -p ./libraries/altera_emif_170/
-mkdir -p ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
mkdir -p ./libraries/altera_ver/
mkdir -p ./libraries/lpm_ver/
mkdir -p ./libraries/sgate_ver/
mkdir -p ./libraries/altera_mf_ver/
-mkdir -p ./libraries/altera_lnsim_ver/
mkdir -p ./libraries/twentynm_ver/
mkdir -p ./libraries/twentynm_hssi_ver/
mkdir -p ./libraries/twentynm_hip_ver/
@@ -172,14 +212,33 @@ mkdir -p ./libraries/altera_lnsim/
mkdir -p ./libraries/twentynm/
mkdir -p ./libraries/twentynm_hssi/
mkdir -p ./libraries/twentynm_hip/
+for library in $design_libraries
+do
+ mkdir -p ./libraries/$library
+done
# ----------------------------------------
# copy RAM/ROM files to simulation directory
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set memory_files [list]
+source $QSYS_SIMDIR/common/ncsim_files.tcl
+set memory_files [concat $memory_files [ip_arria10_e1sg_ddr4_8g_2400::get_memory_files "$QSYS_SIMDIR"]]
+foreach file $memory_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+memory_files=$cmd_output
if [ $SKIP_FILE_COPY -eq 0 ]; then
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex ./
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex ./
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex ./
- cp -f $QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex ./
+ for file in $memory_files
+ do
+ cp -f $file ./
+ done
fi
# ----------------------------------------
@@ -189,12 +248,8 @@ if [ $SKIP_DEV_COM -eq 0 ]; then
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v" -work lpm_ver
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v" -work sgate_ver
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v" -work altera_mf_ver
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim_ver
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.v" -work twentynm_ver
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_atoms_ncrypt.v" -work twentynm_ver
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi_ver
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.v" -work twentynm_hssi_ver
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip_ver
ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.v" -work twentynm_hip_ver
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd" -work altera
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_standard_functions.vhd" -work altera
@@ -208,68 +263,68 @@ if [ $SKIP_DEV_COM -eq 0 ]; then
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
+ ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
+ ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_atoms_ncrypt.v" -work twentynm
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.vhd" -work twentynm
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_components.vhd" -work twentynm
+ ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_components.vhd" -work twentynm_hssi
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.vhd" -work twentynm_hssi
+ ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_components.vhd" -work twentynm_hip
ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.vhd" -work twentynm_hip
fi
+# ----------------------------------------
+# get common system verilog package design files
+TCLSCRIPT='
+set USER_DEFINED_COMPILE_OPTIONS [lindex $argv 1]
+set USER_DEFINED_VERILOG_COMPILE_OPTIONS [lindex $argv 2]
+set USER_DEFINED_VHDL_COMPILE_OPTIONS [lindex $argv 3]
+set QSYS_SIMDIR [lindex $argv 4]
+set design_files [dict create]
+source $QSYS_SIMDIR/common/ncsim_files.tcl
+set design_files [dict merge $design_files [ip_arria10_e1sg_ddr4_8g_2400::get_common_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+set common_design_files [dict values $design_files]
+foreach file $common_design_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$USER_DEFINED_COMPILE_OPTIONS" "$USER_DEFINED_VERILOG_COMPILE_OPTIONS" "$USER_DEFINED_VHDL_COMPILE_OPTIONS" "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+common_design_files=$cmd_output
+
+# ----------------------------------------
+# get design files
+TCLSCRIPT='
+set USER_DEFINED_COMPILE_OPTIONS [lindex $argv 1]
+set USER_DEFINED_VERILOG_COMPILE_OPTIONS [lindex $argv 2]
+set USER_DEFINED_VHDL_COMPILE_OPTIONS [lindex $argv 3]
+set QSYS_SIMDIR [lindex $argv 4]
+set files [list]
+source $QSYS_SIMDIR/common/ncsim_files.tcl
+set files [concat $files [ip_arria10_e1sg_ddr4_8g_2400::get_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+set design_files $files
+foreach file $design_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$USER_DEFINED_COMPILE_OPTIONS" "$USER_DEFINED_VERILOG_COMPILE_OPTIONS" "$USER_DEFINED_VHDL_COMPILE_OPTIONS" "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+design_files=$cmd_output
+
# ----------------------------------------
# compile design files in correct order
if [ $SKIP_COM -eq 0 ]; then
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170 -cdslib ./cds_libs/altera_avalon_mm_bridge_170.cds.lib
- ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170 -cdslib ./cds_libs/altera_avalon_onchip_memory2_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_170 -cdslib ./cds_libs/altera_merlin_master_translator_170.cds.lib
- ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/cadence/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_170 -cdslib ./cds_libs/altera_merlin_slave_translator_170.cds.lib
- ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_controller.v" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib
- ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_synchronizer.v" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib
- ncvlog -compcnfg $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
- ncvlog -compcnfg $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v" -work altera_emif_170
- ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd" -work ip_arria10_e1sg_ddr4_8g_2400
+ eval "$common_design_files"
+ eval "$design_files"
fi
# ----------------------------------------
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/modelsim_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/modelsim_files.tcl
index 3fdd18dba7612ee6dd4f4e4c81b453a6c43eac4e..440e33bd80ba61fd9e40d8d500cd0b01783cc7c8 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/modelsim_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/modelsim_files.tcl
@@ -2,25 +2,25 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_libraries {} {
set libraries [dict create]
- dict set libraries altera_emif_arch_nf_170 1
- dict set libraries altera_avalon_mm_bridge_170 1
- dict set libraries altera_avalon_onchip_memory2_170 1
- dict set libraries altera_merlin_master_translator_170 1
- dict set libraries altera_merlin_slave_translator_170 1
- dict set libraries altera_mm_interconnect_170 1
- dict set libraries altera_reset_controller_170 1
- dict set libraries altera_emif_cal_slave_nf_170 1
- dict set libraries altera_emif_170 1
+ dict set libraries altera_emif_arch_nf_180 1
+ dict set libraries altera_avalon_mm_bridge_180 1
+ dict set libraries altera_avalon_onchip_memory2_180 1
+ dict set libraries altera_merlin_master_translator_180 1
+ dict set libraries altera_merlin_slave_translator_180 1
+ dict set libraries altera_mm_interconnect_180 1
+ dict set libraries altera_reset_controller_180 1
+ dict set libraries altera_emif_cal_slave_nf_180 1
+ dict set libraries altera_emif_180 1
dict set libraries ip_arria10_e1sg_ddr4_8g_2400 1
return $libraries
}
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"]"
return $memory_files
}
@@ -31,55 +31,55 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
set design_files [list]
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v"]\" -work altera_avalon_mm_bridge_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za.vhd"]\" -work altera_avalon_onchip_memory2_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv"]\" -work altera_merlin_master_translator_170"
- lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/mentor/altera_merlin_slave_translator.sv"]\" -work altera_merlin_slave_translator_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd"]\" -work altera_mm_interconnect_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_170/sim/mentor/altera_reset_controller.v"]\" -work altera_reset_controller_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v"]\" -work altera_reset_controller_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd"]\" -work altera_emif_cal_slave_nf_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd"]\" -work altera_emif_170"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v"]\" -work altera_avalon_mm_bridge_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd"]\" -work altera_avalon_onchip_memory2_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv"]\" -work altera_merlin_master_translator_180"
+ lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_slave_translator_180/sim/mentor/altera_merlin_slave_translator.sv"]\" -work altera_merlin_slave_translator_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd"]\" -work altera_mm_interconnect_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_180/sim/mentor/altera_reset_controller.v"]\" -work altera_reset_controller_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_180/sim/mentor/altera_reset_synchronizer.v"]\" -work altera_reset_controller_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd"]\" -work altera_emif_cal_slave_nf_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd"]\" -work altera_emif_180"
lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd"]\" -work ip_arria10_e1sg_ddr4_8g_2400"
return $design_files
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/ncsim_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/ncsim_files.tcl
index 2047b7aeb4ccc81c9f5356b47d2413b00441fa95..878a7576d30a62828627eea9305005d3532d270b 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/ncsim_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/ncsim_files.tcl
@@ -2,25 +2,25 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_libraries {} {
set libraries [dict create]
- dict set libraries altera_emif_arch_nf_170 1
- dict set libraries altera_avalon_mm_bridge_170 1
- dict set libraries altera_avalon_onchip_memory2_170 1
- dict set libraries altera_merlin_master_translator_170 1
- dict set libraries altera_merlin_slave_translator_170 1
- dict set libraries altera_mm_interconnect_170 1
- dict set libraries altera_reset_controller_170 1
- dict set libraries altera_emif_cal_slave_nf_170 1
- dict set libraries altera_emif_170 1
+ dict set libraries altera_emif_arch_nf_180 1
+ dict set libraries altera_avalon_mm_bridge_180 1
+ dict set libraries altera_avalon_onchip_memory2_180 1
+ dict set libraries altera_merlin_master_translator_180 1
+ dict set libraries altera_merlin_slave_translator_180 1
+ dict set libraries altera_mm_interconnect_180 1
+ dict set libraries altera_reset_controller_180 1
+ dict set libraries altera_emif_cal_slave_nf_180 1
+ dict set libraries altera_emif_180 1
dict set libraries ip_arria10_e1sg_ddr4_8g_2400 1
return $libraries
}
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"
return $memory_files
}
@@ -31,55 +31,55 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
set design_files [list]
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_170 -cdslib ./cds_libs/altera_avalon_mm_bridge_170.cds.lib"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za.vhd\" -work altera_avalon_onchip_memory2_170 -cdslib ./cds_libs/altera_avalon_onchip_memory2_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_170 -cdslib ./cds_libs/altera_merlin_master_translator_170.cds.lib"
- lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/cadence/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_170 -cdslib ./cds_libs/altera_merlin_slave_translator_170.cds.lib"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd\" -work altera_mm_interconnect_170"
- lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_controller.v\" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib"
- lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_synchronizer.v\" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd\" -work altera_emif_cal_slave_nf_170"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd\" -work altera_emif_170"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_180 -cdslib ./cds_libs/altera_avalon_mm_bridge_180.cds.lib"
+ lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd\" -work altera_avalon_onchip_memory2_180 -cdslib ./cds_libs/altera_avalon_onchip_memory2_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_180 -cdslib ./cds_libs/altera_merlin_master_translator_180.cds.lib"
+ lappend design_files "ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_180/sim/cadence/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_180 -cdslib ./cds_libs/altera_merlin_slave_translator_180.cds.lib"
+ lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd\" -work altera_mm_interconnect_180"
+ lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/cadence/altera_reset_controller.v\" -work altera_reset_controller_180 -cdslib ./cds_libs/altera_reset_controller_180.cds.lib"
+ lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/cadence/altera_reset_synchronizer.v\" -work altera_reset_controller_180 -cdslib ./cds_libs/altera_reset_controller_180.cds.lib"
+ lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd\" -work altera_emif_cal_slave_nf_180"
+ lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd\" -work altera_emif_180"
lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd\" -work ip_arria10_e1sg_ddr4_8g_2400"
return $design_files
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/riviera_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/riviera_files.tcl
index 54774c6ca547c29cf4347cab1cda3f255e5655f3..89d81d7c3174aafde8cf0f18194f675cf46bb5c7 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/riviera_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/riviera_files.tcl
@@ -2,25 +2,25 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_libraries {} {
set libraries [dict create]
- dict set libraries altera_emif_arch_nf_170 1
- dict set libraries altera_avalon_mm_bridge_170 1
- dict set libraries altera_avalon_onchip_memory2_170 1
- dict set libraries altera_merlin_master_translator_170 1
- dict set libraries altera_merlin_slave_translator_170 1
- dict set libraries altera_mm_interconnect_170 1
- dict set libraries altera_reset_controller_170 1
- dict set libraries altera_emif_cal_slave_nf_170 1
- dict set libraries altera_emif_170 1
+ dict set libraries altera_emif_arch_nf_180 1
+ dict set libraries altera_avalon_mm_bridge_180 1
+ dict set libraries altera_avalon_onchip_memory2_180 1
+ dict set libraries altera_merlin_master_translator_180 1
+ dict set libraries altera_merlin_slave_translator_180 1
+ dict set libraries altera_mm_interconnect_180 1
+ dict set libraries altera_reset_controller_180 1
+ dict set libraries altera_emif_cal_slave_nf_180 1
+ dict set libraries altera_emif_180 1
dict set libraries ip_arria10_e1sg_ddr4_8g_2400 1
return $libraries
}
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"]"
- lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"]"
+ lappend memory_files "[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"]"
return $memory_files
}
@@ -31,55 +31,55 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
set design_files [list]
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd"]\" -work altera_emif_arch_nf_170"
- lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v"]\" -work altera_avalon_mm_bridge_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za.vhd"]\" -work altera_avalon_onchip_memory2_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv"]\" -work altera_merlin_master_translator_170"
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/aldec/altera_merlin_slave_translator.sv"]\" -work altera_merlin_slave_translator_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd"]\" -work altera_mm_interconnect_170"
- lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_170/sim/aldec/altera_reset_controller.v"]\" -work altera_reset_controller_170"
- lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_170/sim/aldec/altera_reset_synchronizer.v"]\" -work altera_reset_controller_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd"]\" -work altera_emif_cal_slave_nf_170"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd"]\" -work altera_emif_170"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd"]\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v"]\" -work altera_avalon_mm_bridge_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd"]\" -work altera_avalon_onchip_memory2_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv"]\" -work altera_merlin_master_translator_180"
+ lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_merlin_slave_translator_180/sim/aldec/altera_merlin_slave_translator.sv"]\" -work altera_merlin_slave_translator_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd"]\" -work altera_mm_interconnect_180"
+ lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_180/sim/aldec/altera_reset_controller.v"]\" -work altera_reset_controller_180"
+ lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_reset_controller_180/sim/aldec/altera_reset_synchronizer.v"]\" -work altera_reset_controller_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd"]\" -work altera_emif_cal_slave_nf_180"
+ lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd"]\" -work altera_emif_180"
lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd"]\" -work ip_arria10_e1sg_ddr4_8g_2400"
return $design_files
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcs_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcs_files.tcl
index f63e1d27fc34d4e3b1c8a79986edd52f9f8369a4..1fa998a3f89a4385f94ffb3c12753e1fa440489e 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcs_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcs_files.tcl
@@ -2,10 +2,10 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"
return $memory_files
}
@@ -16,7 +16,7 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {QSYS_SIMDIR} {
set design_files [dict create]
- error "Skipping VCS script generation since VHDL file $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd is required for simulation"
+ error "Skipping VCS script generation since VHDL file $QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd is required for simulation"
}
proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcsmx_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcsmx_files.tcl
index 5d9bac9d9c89f07f65603e89caf3682674b3a888..8611b4544556eee26d36d9430784355834e6d189 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcsmx_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/vcsmx_files.tcl
@@ -2,25 +2,25 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_libraries {} {
set libraries [dict create]
- dict set libraries altera_emif_arch_nf_170 1
- dict set libraries altera_avalon_mm_bridge_170 1
- dict set libraries altera_avalon_onchip_memory2_170 1
- dict set libraries altera_merlin_master_translator_170 1
- dict set libraries altera_merlin_slave_translator_170 1
- dict set libraries altera_mm_interconnect_170 1
- dict set libraries altera_reset_controller_170 1
- dict set libraries altera_emif_cal_slave_nf_170 1
- dict set libraries altera_emif_170 1
+ dict set libraries altera_emif_arch_nf_180 1
+ dict set libraries altera_avalon_mm_bridge_180 1
+ dict set libraries altera_avalon_onchip_memory2_180 1
+ dict set libraries altera_merlin_master_translator_180 1
+ dict set libraries altera_merlin_slave_translator_180 1
+ dict set libraries altera_mm_interconnect_180 1
+ dict set libraries altera_reset_controller_180 1
+ dict set libraries altera_emif_cal_slave_nf_180 1
+ dict set libraries altera_emif_180 1
dict set libraries ip_arria10_e1sg_ddr4_8g_2400 1
return $libraries
}
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"
return $memory_files
}
@@ -31,55 +31,55 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
set design_files [list]
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_170"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd\" -work altera_emif_arch_nf_170"
- lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_170"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za.vhd\" -work altera_avalon_onchip_memory2_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_170"
- lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/synopsys/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_170"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd\" -work altera_mm_interconnect_170"
- lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/synopsys/altera_reset_controller.v\" -work altera_reset_controller_170"
- lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/synopsys/altera_reset_synchronizer.v\" -work altera_reset_controller_170"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd\" -work altera_emif_cal_slave_nf_170"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd\" -work altera_emif_170"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_180"
+ lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd\" -work altera_emif_arch_nf_180"
+ lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_180"
+ lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd\" -work altera_avalon_onchip_memory2_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_180"
+ lappend design_files "vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_180/sim/synopsys/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_180"
+ lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd\" -work altera_mm_interconnect_180"
+ lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/synopsys/altera_reset_controller.v\" -work altera_reset_controller_180"
+ lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/synopsys/altera_reset_synchronizer.v\" -work altera_reset_controller_180"
+ lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd\" -work altera_emif_cal_slave_nf_180"
+ lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd\" -work altera_emif_180"
lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd\" -work ip_arria10_e1sg_ddr4_8g_2400"
return $design_files
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/xcelium_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/xcelium_files.tcl
index 6e52ae13545e9c8756a1df9035379cd8d1424a14..c81d4050ff13dd74cbb41bcbb72f947e71a55f7d 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/xcelium_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/common/xcelium_files.tcl
@@ -2,25 +2,25 @@
namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_libraries {} {
set libraries [dict create]
- dict set libraries altera_emif_arch_nf_170 1
- dict set libraries altera_avalon_mm_bridge_170 1
- dict set libraries altera_avalon_onchip_memory2_170 1
- dict set libraries altera_merlin_master_translator_170 1
- dict set libraries altera_merlin_slave_translator_170 1
- dict set libraries altera_mm_interconnect_170 1
- dict set libraries altera_reset_controller_170 1
- dict set libraries altera_emif_cal_slave_nf_170 1
- dict set libraries altera_emif_170 1
+ dict set libraries altera_emif_arch_nf_180 1
+ dict set libraries altera_avalon_mm_bridge_180 1
+ dict set libraries altera_avalon_onchip_memory2_180 1
+ dict set libraries altera_merlin_master_translator_180 1
+ dict set libraries altera_merlin_slave_translator_180 1
+ dict set libraries altera_mm_interconnect_180 1
+ dict set libraries altera_reset_controller_180 1
+ dict set libraries altera_emif_cal_slave_nf_180 1
+ dict set libraries altera_emif_180 1
dict set libraries ip_arria10_e1sg_ddr4_8g_2400 1
return $libraries
}
proc get_memory_files {QSYS_SIMDIR} {
set memory_files [list]
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_sim.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_params_synth.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_seq_cal.hex"
- lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal.hex"
+ lappend memory_files "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex"
return $memory_files
}
@@ -31,55 +31,55 @@ namespace eval ip_arria10_e1sg_ddr4_8g_2400 {
proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
set design_files [list]
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_top.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_e37lt4i.vhd\" -work altera_emif_arch_nf_170 -cdslib ./cds_libs/altera_emif_arch_nf_170.cds.lib"
- lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_170 -cdslib ./cds_libs/altera_avalon_mm_bridge_170.cds.lib"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_xymx6za.vhd\" -work altera_avalon_onchip_memory2_170 -cdslib ./cds_libs/altera_avalon_onchip_memory2_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_170 -cdslib ./cds_libs/altera_merlin_master_translator_170.cds.lib"
- lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/cadence/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_170 -cdslib ./cds_libs/altera_merlin_slave_translator_170.cds.lib"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_7km4trq.vhd\" -work altera_mm_interconnect_170"
- lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_controller.v\" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib"
- lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_170/sim/cadence/altera_reset_synchronizer.v\" -work altera_reset_controller_170 -cdslib ./cds_libs/altera_reset_controller_170.cds.lib"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_efslyyq.vhd\" -work altera_emif_cal_slave_nf_170"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_nz3mdxa.vhd\" -work altera_emif_170"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_oct.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_o.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_df.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_bdir_se.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_cp_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_df_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_i.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_udir_se_o.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_core_clks_rsts.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_encrypted_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_buf_unused.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_cal_counter.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_fast_sim.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_pll_extra_clks.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hps_clks_rsts.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_io_tiles_wrap.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_abphy_mux.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_avl_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_sideband_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_mmr_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_amm_data_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_hmc_ast_data_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_afi_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_seq_if.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_regs.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_oct_um_fsm.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/altera_std_synchronizer_nocut.v\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/mem_array_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd\" -work altera_emif_arch_nf_180 -cdslib ./cds_libs/altera_emif_arch_nf_180.cds.lib"
+ lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v\" -work altera_avalon_mm_bridge_180 -cdslib ./cds_libs/altera_avalon_mm_bridge_180.cds.lib"
+ lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd\" -work altera_avalon_onchip_memory2_180 -cdslib ./cds_libs/altera_avalon_onchip_memory2_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_master_translator_180/sim/altera_merlin_master_translator.sv\" -work altera_merlin_master_translator_180 -cdslib ./cds_libs/altera_merlin_master_translator_180.cds.lib"
+ lappend design_files "xmvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_merlin_slave_translator_180/sim/cadence/altera_merlin_slave_translator.sv\" -work altera_merlin_slave_translator_180 -cdslib ./cds_libs/altera_merlin_slave_translator_180.cds.lib"
+ lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_mm_interconnect_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_180_7km4trq.vhd\" -work altera_mm_interconnect_180"
+ lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/cadence/altera_reset_controller.v\" -work altera_reset_controller_180 -cdslib ./cds_libs/altera_reset_controller_180.cds.lib"
+ lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_reset_controller_180/sim/cadence/altera_reset_synchronizer.v\" -work altera_reset_controller_180 -cdslib ./cds_libs/altera_reset_controller_180.cds.lib"
+ lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd\" -work altera_emif_cal_slave_nf_180"
+ lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd\" -work altera_emif_180"
lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd\" -work ip_arria10_e1sg_ddr4_8g_2400"
return $design_files
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ip_arria10_e1sg_ddr4_8g_2400.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ip_arria10_e1sg_ddr4_8g_2400.vhd
index 890051ddc4bce3ad5e790e9525ba9737c1507b70..348ad2904e76c4c8472dab26eb383cc0796bdacf 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ip_arria10_e1sg_ddr4_8g_2400.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/ip_arria10_e1sg_ddr4_8g_2400.vhd
@@ -1,9 +1,9 @@
-- ip_arria10_e1sg_ddr4_8g_2400.vhd
--- Generated using ACDS version 17.0.2 297
+-- Generated using ACDS version 18.0 219
library IEEE;
-library altera_emif_170;
+library altera_emif_180;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
@@ -45,7 +45,7 @@ entity ip_arria10_e1sg_ddr4_8g_2400 is
end entity ip_arria10_e1sg_ddr4_8g_2400;
architecture rtl of ip_arria10_e1sg_ddr4_8g_2400 is
- component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp is
port (
amm_ready_0 : out std_logic; -- waitrequest_n
amm_read_0 : in std_logic := 'X'; -- read
@@ -80,13 +80,13 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400 is
local_cal_success : out std_logic; -- local_cal_success
local_cal_fail : out std_logic -- local_cal_fail
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp;
- for ddr4_inst : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp
- use entity altera_emif_170.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi;
+ for ddr4_inst : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp
+ use entity altera_emif_180.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa;
begin
- ddr4_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp
+ ddr4_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp
port map (
amm_ready_0 => amm_ready_0, -- ctrl_amm_avalon_slave_0.waitrequest_n
amm_read_0 => amm_read_0, -- .read
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/mentor/msim_setup.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/mentor/msim_setup.tcl
index f3cab8582693c295f841f8dcf5ac8584f944e4ac..5e4ece46f8f2eade6a519eccb84c035ae41e8437 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/mentor/msim_setup.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/mentor/msim_setup.tcl
@@ -17,7 +17,7 @@
# ----------------------------------------
# This script provides commands to simulate the following IP detected in
# your Quartus project:
-# ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400
+# ip_arria10_e1sg_ddr4_8g_2400
#
# Intel recommends that you source this Quartus-generated IP simulation
# script from your own customized top-level script, and avoid editing this
@@ -83,7 +83,7 @@
#
# IP SIMULATION SCRIPT
# ----------------------------------------
-# If ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
+# If ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
# Quartus project, you can generate a simulation script
# suitable for inclusion in your top-level simulation
# script by running the following command line:
@@ -94,7 +94,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Intel IP within the design.
# ----------------------------------------
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# Initialize variables
@@ -113,48 +113,87 @@ if ![info exists QSYS_SIMDIR] {
}
if ![info exists QUARTUS_INSTALL_DIR] {
- set QUARTUS_INSTALL_DIR "/home/software/Altera/17.0/quartus/"
+ set QUARTUS_INSTALL_DIR "/home/software/Altera/18.0/quartus/"
}
if ![info exists USER_DEFINED_COMPILE_OPTIONS] {
set USER_DEFINED_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] {
set USER_DEFINED_VHDL_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] {
set USER_DEFINED_VERILOG_COMPILE_OPTIONS ""
}
+
if ![info exists USER_DEFINED_ELAB_OPTIONS] {
set USER_DEFINED_ELAB_OPTIONS ""
}
+if ![info exists SILENCE] {
+ set SILENCE "false"
+}
+
+if ![info exists FORCE_MODELSIM_AE_SELECTION] {
+ set FORCE_MODELSIM_AE_SELECTION "false"
+}
+
+# ----------------------------------------
+# Source Common Tcl File
+source $QSYS_SIMDIR/common/modelsim_files.tcl
+
+
# ----------------------------------------
# Initialize simulation properties - DO NOT MODIFY!
set ELAB_OPTIONS ""
set SIM_OPTIONS ""
-if ![ string match "*-64 vsim*" [ vsim -version ] ] {
+set LD_LIBRARY_PATH [dict create]
+if ![ string match "*-64 vsim*" [ vsimVersionString ] ] {
+ set SIMULATOR_TOOL_BITNESS "bit_32"
} else {
+ set SIMULATOR_TOOL_BITNESS "bit_64"
+}
+set LD_LIBRARY_PATH [dict merge $LD_LIBRARY_PATH [dict get [ip_arria10_e1sg_ddr4_8g_2400::get_env_variables $SIMULATOR_TOOL_BITNESS] "LD_LIBRARY_PATH"]]
+if {[dict size $LD_LIBRARY_PATH] !=0 } {
+ set LD_LIBRARY_PATH [subst [join [dict keys $LD_LIBRARY_PATH] ":"]]
+ setenv LD_LIBRARY_PATH "$LD_LIBRARY_PATH"
+}
+append ELAB_OPTIONS [subst [ip_arria10_e1sg_ddr4_8g_2400::get_elab_options $SIMULATOR_TOOL_BITNESS]]
+append SIM_OPTIONS [subst [ip_arria10_e1sg_ddr4_8g_2400::get_sim_options $SIMULATOR_TOOL_BITNESS]]
+
+proc modelsim_ae_select {force_select_modelsim_ae} {
+ if [string is true -strict $force_select_modelsim_ae] {
+ return 1
+ }
+ return [string match "*ModelSim*Intel FPGA Edition*" [ vsimVersionString ]]
+
}
+
# ----------------------------------------
# Copy ROM/RAM files to simulation directory
alias file_copy {
- echo "\[exec\] file_copy"
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex ./
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex ./
- file copy -force $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex ./
- file copy -force $QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex ./
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] file_copy"
+ }
+ set memory_files [list]
+ set memory_files [concat $memory_files [ip_arria10_e1sg_ddr4_8g_2400::get_memory_files "$QSYS_SIMDIR"]]
+ foreach file $memory_files { file copy -force $file ./ }
}
# ----------------------------------------
# Create compilation libraries
+
+set logical_libraries [list "work" "work_lib" "altera_ver" "lpm_ver" "sgate_ver" "altera_mf_ver" "altera_lnsim_ver" "twentynm_ver" "twentynm_hssi_ver" "twentynm_hip_ver" "altera" "lpm" "sgate" "altera_mf" "altera_lnsim" "twentynm" "twentynm_hssi" "twentynm_hip"]
+
proc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }
ensure_lib ./libraries/
ensure_lib ./libraries/work/
vmap work ./libraries/work/
vmap work_lib ./libraries/work/
-if ![ string match "*ModelSim ALTERA*" [ vsim -version ] ] {
+if [string is false -strict [modelsim_ae_select $FORCE_MODELSIM_AE_SELECTION]] {
ensure_lib ./libraries/altera_ver/
vmap altera_ver ./libraries/altera_ver/
ensure_lib ./libraries/lpm_ver/
@@ -188,32 +227,22 @@ if ![ string match "*ModelSim ALTERA*" [ vsim -version ] ] {
ensure_lib ./libraries/twentynm_hip/
vmap twentynm_hip ./libraries/twentynm_hip/
}
-ensure_lib ./libraries/altera_emif_arch_nf_170/
-vmap altera_emif_arch_nf_170 ./libraries/altera_emif_arch_nf_170/
-ensure_lib ./libraries/altera_avalon_mm_bridge_170/
-vmap altera_avalon_mm_bridge_170 ./libraries/altera_avalon_mm_bridge_170/
-ensure_lib ./libraries/altera_avalon_onchip_memory2_170/
-vmap altera_avalon_onchip_memory2_170 ./libraries/altera_avalon_onchip_memory2_170/
-ensure_lib ./libraries/altera_merlin_master_translator_170/
-vmap altera_merlin_master_translator_170 ./libraries/altera_merlin_master_translator_170/
-ensure_lib ./libraries/altera_merlin_slave_translator_170/
-vmap altera_merlin_slave_translator_170 ./libraries/altera_merlin_slave_translator_170/
-ensure_lib ./libraries/altera_mm_interconnect_170/
-vmap altera_mm_interconnect_170 ./libraries/altera_mm_interconnect_170/
-ensure_lib ./libraries/altera_reset_controller_170/
-vmap altera_reset_controller_170 ./libraries/altera_reset_controller_170/
-ensure_lib ./libraries/altera_emif_cal_slave_nf_170/
-vmap altera_emif_cal_slave_nf_170 ./libraries/altera_emif_cal_slave_nf_170/
-ensure_lib ./libraries/altera_emif_170/
-vmap altera_emif_170 ./libraries/altera_emif_170/
-ensure_lib ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
-vmap ip_arria10_e1sg_ddr4_8g_2400 ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
+set design_libraries [dict create]
+set design_libraries [dict merge $design_libraries [ip_arria10_e1sg_ddr4_8g_2400::get_design_libraries]]
+set libraries [dict keys $design_libraries]
+foreach library $libraries {
+ ensure_lib ./libraries/$library/
+ vmap $library ./libraries/$library/
+ lappend logical_libraries $library
+}
# ----------------------------------------
# Compile device library files
alias dev_com {
- echo "\[exec\] dev_com"
- if ![ string match "*ModelSim ALTERA*" [ vsim -version ] ] {
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] dev_com"
+ }
+ if [string is false -strict [modelsim_ae_select $FORCE_MODELSIM_AE_SELECTION]] {
eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v" -work altera_ver
eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v" -work lpm_ver
eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v" -work sgate_ver
@@ -239,10 +268,13 @@ alias dev_com {
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/altera_lnsim_for_vhdl.sv" -work altera_lnsim
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
+ eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/twentynm_atoms_ncrypt.v" -work twentynm
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.vhd" -work twentynm
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_components.vhd" -work twentynm
+ eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_components.vhd" -work twentynm_hssi
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.vhd" -work twentynm_hssi
+ eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_components.vhd" -work twentynm_hip
eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.vhd" -work twentynm_hip
}
@@ -251,71 +283,44 @@ alias dev_com {
# ----------------------------------------
# Compile the design files in correct order
alias com {
- echo "\[exec\] com"
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_170
- eval vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/mentor/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/mentor/altera_reset_synchronizer.v" -work altera_reset_controller_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
- eval vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v" -work altera_emif_170
- eval vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd" -work ip_arria10_e1sg_ddr4_8g_2400
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] com"
+ }
+ set design_files [dict create]
+ set design_files [dict merge [ip_arria10_e1sg_ddr4_8g_2400::get_common_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+ set common_design_files [dict values $design_files]
+ foreach file $common_design_files {
+ eval $file
+ }
+ set design_files [list]
+ set design_files [concat $design_files [ip_arria10_e1sg_ddr4_8g_2400::get_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+ foreach file $design_files {
+ eval $file
+ }
}
# ----------------------------------------
# Elaborate top level design
alias elab {
- echo "\[exec\] elab"
- eval vsim -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L altera_emif_arch_nf_170 -L altera_avalon_mm_bridge_170 -L altera_avalon_onchip_memory2_170 -L altera_merlin_master_translator_170 -L altera_merlin_slave_translator_170 -L altera_mm_interconnect_170 -L altera_reset_controller_170 -L altera_emif_cal_slave_nf_170 -L altera_emif_170 -L ip_arria10_e1sg_ddr4_8g_2400 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L twentynm_ver -L twentynm_hssi_ver -L twentynm_hip_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L twentynm -L twentynm_hssi -L twentynm_hip $TOP_LEVEL_NAME
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] elab"
+ }
+ set elabcommand " -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS"
+ foreach library $logical_libraries { append elabcommand " -L $library" }
+ append elabcommand " $TOP_LEVEL_NAME"
+ eval vsim $elabcommand
}
# ----------------------------------------
# Elaborate the top level design with novopt option
alias elab_debug {
- echo "\[exec\] elab_debug"
- eval vsim -novopt -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L altera_emif_arch_nf_170 -L altera_avalon_mm_bridge_170 -L altera_avalon_onchip_memory2_170 -L altera_merlin_master_translator_170 -L altera_merlin_slave_translator_170 -L altera_mm_interconnect_170 -L altera_reset_controller_170 -L altera_emif_cal_slave_nf_170 -L altera_emif_170 -L ip_arria10_e1sg_ddr4_8g_2400 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L twentynm_ver -L twentynm_hssi_ver -L twentynm_hip_ver -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L twentynm -L twentynm_hssi -L twentynm_hip $TOP_LEVEL_NAME
+ if [string is false -strict $SILENCE] {
+ echo "\[exec\] elab_debug"
+ }
+ set elabcommand " -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS"
+ foreach library $logical_libraries { append elabcommand " -L $library" }
+ append elabcommand " $TOP_LEVEL_NAME"
+ eval vsim -novopt $elabcommand
}
# ----------------------------------------
@@ -374,6 +379,10 @@ alias h {
echo "USER_DEFINED_VERILOG_COMPILE_OPTIONS -- User-defined verilog compile options, added to com/dev_com aliases."
echo
echo "USER_DEFINED_ELAB_OPTIONS -- User-defined elaboration options, added to elab/elab_debug aliases."
+ echo
+ echo "SILENCE -- Set to true to suppress all informational and/or warning messages in the generated simulation script. "
+ echo
+ echo "FORCE_MODELSIM_AE_SELECTION -- Set to true to force to select Modelsim AE always."
}
file_copy
h
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/synopsys_sim.setup b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/synopsys_sim.setup
index bc11b965cb5683bb3988dfd28254ea5e31e10dac..2321a0fcc1c4315e32ba98eee78d1cfa7103471f 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/synopsys_sim.setup
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/synopsys_sim.setup
@@ -2,15 +2,15 @@
WORK > DEFAULT
DEFAULT: ./libraries/work/
work: ./libraries/work/
-altera_emif_arch_nf_170: ./libraries/altera_emif_arch_nf_170/
-altera_avalon_mm_bridge_170: ./libraries/altera_avalon_mm_bridge_170/
-altera_avalon_onchip_memory2_170: ./libraries/altera_avalon_onchip_memory2_170/
-altera_merlin_master_translator_170: ./libraries/altera_merlin_master_translator_170/
-altera_merlin_slave_translator_170: ./libraries/altera_merlin_slave_translator_170/
-altera_mm_interconnect_170: ./libraries/altera_mm_interconnect_170/
-altera_reset_controller_170: ./libraries/altera_reset_controller_170/
-altera_emif_cal_slave_nf_170: ./libraries/altera_emif_cal_slave_nf_170/
-altera_emif_170: ./libraries/altera_emif_170/
+altera_emif_arch_nf_180: ./libraries/altera_emif_arch_nf_180/
+altera_avalon_mm_bridge_180: ./libraries/altera_avalon_mm_bridge_180/
+altera_avalon_onchip_memory2_180: ./libraries/altera_avalon_onchip_memory2_180/
+altera_merlin_master_translator_180: ./libraries/altera_merlin_master_translator_180/
+altera_merlin_slave_translator_180: ./libraries/altera_merlin_slave_translator_180/
+altera_mm_interconnect_180: ./libraries/altera_mm_interconnect_180/
+altera_reset_controller_180: ./libraries/altera_reset_controller_180/
+altera_emif_cal_slave_nf_180: ./libraries/altera_emif_cal_slave_nf_180/
+altera_emif_180: ./libraries/altera_emif_180/
ip_arria10_e1sg_ddr4_8g_2400: ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
altera_ver: ./libraries/altera_ver/
lpm_ver: ./libraries/lpm_ver/
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/vcsmx_setup.sh b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/vcsmx_setup.sh
index 22e9a1018e587c698cedfbdddd71aab8557df440..ca33f19f625dd6936235b14d3490e902fe60003f 100755
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/vcsmx_setup.sh
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/synopsys/vcsmx/vcsmx_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# vcsmx - auto-generated simulation script
@@ -20,7 +20,7 @@
# ----------------------------------------
# This script provides commands to simulate the following IP detected in
# your Quartus project:
-# ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400
+# ip_arria10_e1sg_ddr4_8g_2400
#
# Intel recommends that you source this Quartus-generated IP simulation
# script from your own customized top-level script, and avoid editing this
@@ -96,7 +96,7 @@
#
# IP SIMULATION SCRIPT
# ----------------------------------------
-# If ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
+# If ip_arria10_e1sg_ddr4_8g_2400 is one of several IP cores in your
# Quartus project, you can generate a simulation script
# suitable for inclusion in your top-level simulation
# script by running the following command line:
@@ -107,12 +107,12 @@
# within the Quartus project, and generate a unified
# script which supports all the Intel IP within the design.
# ----------------------------------------
-# ACDS 17.0.2 297 linux 2019.10.09.19:37:28
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400"
QSYS_SIMDIR="./../../"
-QUARTUS_INSTALL_DIR="/home/software/Altera/17.0/quartus/"
+QUARTUS_INSTALL_DIR="/home/software/Altera/18.0/quartus/"
SKIP_FILE_COPY=0
SKIP_DEV_COM=0
SKIP_COM=0
@@ -134,29 +134,70 @@ for expression in "$@"; do
fi
done
+#-------------------------------------------
+# check tclsh version no earlier than 8.5
+version=$(echo "puts [package vcompare [info tclversion] 8.5]; exit" | tclsh)
+if [ $version -eq -1 ]; then
+ echo "Error: Minimum required tcl package version is 8.5." >&2
+ exit 1
+fi
+
# ----------------------------------------
# initialize simulation properties - DO NOT MODIFY!
ELAB_OPTIONS=""
SIM_OPTIONS=""
if [[ `vcs -platform` != *"amd64"* ]]; then
- :
+ SIMULATOR_TOOL_BITNESS="bit_32"
else
- :
+ SIMULATOR_TOOL_BITNESS="bit_64"
fi
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set SIMULATOR_TOOL_BITNESS [lindex $argv 2]
+source $QSYS_SIMDIR/common/vcsmx_files.tcl
+set LD_LIBRARY_PATH [dict create]
+set LD_LIBRARY_PATH [dict merge $LD_LIBRARY_PATH [dict get [ip_arria10_e1sg_ddr4_8g_2400::get_env_variables $SIMULATOR_TOOL_BITNESS] "LD_LIBRARY_PATH"]]
+if {[dict size $LD_LIBRARY_PATH] !=0 } {
+ set LD_LIBRARY_PATH [join [dict keys $LD_LIBRARY_PATH] ":"]
+ puts "LD_LIBRARY_PATH=\"$LD_LIBRARY_PATH\""
+}
+
+set ELAB_OPTIONS ""
+append ELAB_OPTIONS [ip_arria10_e1sg_ddr4_8g_2400::get_elab_options $SIMULATOR_TOOL_BITNESS]
+puts "ELAB_OPTIONS+=\"$ELAB_OPTIONS\""
+set SIM_OPTIONS ""
+append SIM_OPTIONS [ip_arria10_e1sg_ddr4_8g_2400::get_sim_options $SIMULATOR_TOOL_BITNESS]
+puts "SIM_OPTIONS+=\"$SIM_OPTIONS\""
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" "$SIMULATOR_TOOL_BITNESS" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+eval $cmd_output
+
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set libraries [dict create]
+source $QSYS_SIMDIR/common/vcsmx_files.tcl
+set libraries [dict merge $libraries [ip_arria10_e1sg_ddr4_8g_2400::get_design_libraries]]
+set design_libraries [dict keys $libraries]
+foreach file $design_libraries { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+design_libraries=$cmd_output
# ----------------------------------------
# create compilation libraries
mkdir -p ./libraries/work/
-mkdir -p ./libraries/altera_emif_arch_nf_170/
-mkdir -p ./libraries/altera_avalon_mm_bridge_170/
-mkdir -p ./libraries/altera_avalon_onchip_memory2_170/
-mkdir -p ./libraries/altera_merlin_master_translator_170/
-mkdir -p ./libraries/altera_merlin_slave_translator_170/
-mkdir -p ./libraries/altera_mm_interconnect_170/
-mkdir -p ./libraries/altera_reset_controller_170/
-mkdir -p ./libraries/altera_emif_cal_slave_nf_170/
-mkdir -p ./libraries/altera_emif_170/
-mkdir -p ./libraries/ip_arria10_e1sg_ddr4_8g_2400/
mkdir -p ./libraries/altera_ver/
mkdir -p ./libraries/lpm_ver/
mkdir -p ./libraries/sgate_ver/
@@ -173,14 +214,33 @@ mkdir -p ./libraries/altera_lnsim/
mkdir -p ./libraries/twentynm/
mkdir -p ./libraries/twentynm_hssi/
mkdir -p ./libraries/twentynm_hip/
+for library in $design_libraries
+do
+ mkdir -p ./libraries/$library
+done
# ----------------------------------------
# copy RAM/ROM files to simulation directory
+TCLSCRIPT='
+set QSYS_SIMDIR [lindex $argv 1]
+set memory_files [list]
+source $QSYS_SIMDIR/common/vcsmx_files.tcl
+set memory_files [concat $memory_files [ip_arria10_e1sg_ddr4_8g_2400::get_memory_files "$QSYS_SIMDIR"]]
+foreach file $memory_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+memory_files=$cmd_output
if [ $SKIP_FILE_COPY -eq 0 ]; then
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_sim.hex ./
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_params_synth.hex ./
- cp -f $QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_seq_cal.hex ./
- cp -f $QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/seq_cal_soft_m20k.hex ./
+ for file in $memory_files
+ do
+ cp -f $file ./
+ done
fi
# ----------------------------------------
@@ -209,74 +269,74 @@ if [ $SKIP_DEV_COM -eq 0 ]; then
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.vhd" -work sgate
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf_components.vhd" -work altera_mf
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.vhd" -work altera_mf
+ vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv" -work altera_lnsim
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim_components.vhd" -work altera_lnsim
+ vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_atoms_ncrypt.v" -work twentynm
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_atoms.vhd" -work twentynm
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_components.vhd" -work twentynm
+ vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_components.vhd" -work twentynm_hssi
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hssi_atoms.vhd" -work twentynm_hssi
+ vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_hip_atoms_ncrypt.v" -work twentynm_hip
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_components.vhd" -work twentynm_hip
vhdlan $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QUARTUS_INSTALL_DIR/eda/sim_lib/twentynm_hip_atoms.vhd" -work twentynm_hip
fi
+# ----------------------------------------
+# get common system verilog package design files
+TCLSCRIPT='
+set USER_DEFINED_COMPILE_OPTIONS [lindex $argv 1]
+set USER_DEFINED_VERILOG_COMPILE_OPTIONS [lindex $argv 2]
+set USER_DEFINED_VHDL_COMPILE_OPTIONS [lindex $argv 3]
+set QSYS_SIMDIR [lindex $argv 4]
+set design_files [dict create]
+source $QSYS_SIMDIR/common/vcsmx_files.tcl
+set design_files [dict merge $design_files [ip_arria10_e1sg_ddr4_8g_2400::get_common_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+set common_design_files [dict values $design_files]
+foreach file $common_design_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$USER_DEFINED_COMPILE_OPTIONS" "$USER_DEFINED_VERILOG_COMPILE_OPTIONS" "$USER_DEFINED_VHDL_COMPILE_OPTIONS" "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+common_design_files=$cmd_output
+
+# ----------------------------------------
+# get design files
+TCLSCRIPT='
+set USER_DEFINED_COMPILE_OPTIONS [lindex $argv 1]
+set USER_DEFINED_VERILOG_COMPILE_OPTIONS [lindex $argv 2]
+set USER_DEFINED_VHDL_COMPILE_OPTIONS [lindex $argv 3]
+set QSYS_SIMDIR [lindex $argv 4]
+set files [list]
+source $QSYS_SIMDIR/common/vcsmx_files.tcl
+set files [concat $files [ip_arria10_e1sg_ddr4_8g_2400::get_design_files $USER_DEFINED_COMPILE_OPTIONS $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_VHDL_COMPILE_OPTIONS "$QSYS_SIMDIR"]]
+set design_files $files
+foreach file $design_files { puts "$file" }
+exit 0
+'
+cmd_output=$(
+tclsh -args "$USER_DEFINED_COMPILE_OPTIONS" "$USER_DEFINED_VERILOG_COMPILE_OPTIONS" "$USER_DEFINED_VHDL_COMPILE_OPTIONS" "$QSYS_SIMDIR" << SCRIPT
+ $TCLSCRIPT
+SCRIPT
+)
+
+design_files=$cmd_output
+
# ----------------------------------------
# compile design files in correct order
if [ $SKIP_COM -eq 0 ]; then
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_top.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i_io_aux.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_170_as3yf3i.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_buf_unused.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_cal_counter.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_pll_extra_clks.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_oct.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_wrap.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_io_tiles_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_abphy_mux.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_afi_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_seq_if.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_emif_arch_nf_regs.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_oct_um_fsm.sv" -work altera_emif_arch_nf_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/altera_std_synchronizer_nocut.v" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/mem_array_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_arch_nf_170/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_mm_bridge_170/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_170
- vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_avalon_onchip_memory2_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_170_yroldmy.vhd" -work altera_avalon_onchip_memory2_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_master_translator_170/sim/altera_merlin_master_translator.sv" -work altera_merlin_master_translator_170
- vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_merlin_slave_translator_170/sim/synopsys/altera_merlin_slave_translator.sv" -work altera_merlin_slave_translator_170
- vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_mm_interconnect_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_mm_interconnect_170_o2ys4ki.vhd" -work altera_mm_interconnect_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/synopsys/altera_reset_controller.v" -work altera_reset_controller_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_reset_controller_170/sim/synopsys/altera_reset_synchronizer.v" -work altera_reset_controller_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_cal_slave_nf_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_170_6qfmevy.v" -work altera_emif_cal_slave_nf_170
- vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/../altera_emif_170/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi.v" -work altera_emif_170
- vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS "$QSYS_SIMDIR/ip_arria10_e1sg_ddr4_8g_2400.vhd" -work ip_arria10_e1sg_ddr4_8g_2400
+ eval "$common_design_files"
+ eval "$design_files"
fi
# ----------------------------------------
# elaborate top level design
if [ $SKIP_ELAB -eq 0 ]; then
- vcs -lca -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME
+ vcs -lca -t ps -liblist_work $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME
fi
# ----------------------------------------
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/xcelium/xcelium_setup.sh b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/xcelium/xcelium_setup.sh
index c0ce069aa5d7ea59d5ede9895eb72b417059c74e..6ff6e1a2b2131769f9c62588d3e330632c038c15 100755
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/xcelium/xcelium_setup.sh
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/sim/xcelium/xcelium_setup.sh
@@ -12,7 +12,7 @@
# or its authorized distributors. Please refer to the applicable
# agreement for further details.
-# ACDS 18.0 219 linux 2019.10.08.11:21:18
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# xcelium - auto-generated simulation script
@@ -107,7 +107,7 @@
# within the Quartus project, and generate a unified
# script which supports all the Intel IP within the design.
# ----------------------------------------
-# ACDS 18.0 219 linux 2019.10.08.11:21:18
+# ACDS 18.0 219 linux 2019.10.10.13:20:48
# ----------------------------------------
# initialize variables
TOP_LEVEL_NAME="ip_arria10_e1sg_ddr4_8g_2400.ip_arria10_e1sg_ddr4_8g_2400"
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/synth/ip_arria10_e1sg_ddr4_8g_2400.vhd b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/synth/ip_arria10_e1sg_ddr4_8g_2400.vhd
index 890051ddc4bce3ad5e790e9525ba9737c1507b70..348ad2904e76c4c8472dab26eb383cc0796bdacf 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/synth/ip_arria10_e1sg_ddr4_8g_2400.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/ip_arria10_e1sg_ddr4_8g_2400/synth/ip_arria10_e1sg_ddr4_8g_2400.vhd
@@ -1,9 +1,9 @@
-- ip_arria10_e1sg_ddr4_8g_2400.vhd
--- Generated using ACDS version 17.0.2 297
+-- Generated using ACDS version 18.0 219
library IEEE;
-library altera_emif_170;
+library altera_emif_180;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
@@ -45,7 +45,7 @@ entity ip_arria10_e1sg_ddr4_8g_2400 is
end entity ip_arria10_e1sg_ddr4_8g_2400;
architecture rtl of ip_arria10_e1sg_ddr4_8g_2400 is
- component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp is
+ component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp is
port (
amm_ready_0 : out std_logic; -- waitrequest_n
amm_read_0 : in std_logic := 'X'; -- read
@@ -80,13 +80,13 @@ architecture rtl of ip_arria10_e1sg_ddr4_8g_2400 is
local_cal_success : out std_logic; -- local_cal_success
local_cal_fail : out std_logic -- local_cal_fail
);
- end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp;
+ end component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp;
- for ddr4_inst : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp
- use entity altera_emif_170.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi;
+ for ddr4_inst : ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp
+ use entity altera_emif_180.ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa;
begin
- ddr4_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_170_xxodvzi_cmp
+ ddr4_inst : component ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa_cmp
port map (
amm_ready_0 => amm_ready_0, -- ctrl_amm_avalon_slave_0.waitrequest_n
amm_read_0 => amm_read_0, -- .read
diff --git a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/compile_ip.tcl
index 542532efc514ad9f7d2b0f2a68598d2a290c5099..2e7823626a535a6f2706e337d5d3c32e2fd9ae8d 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/compile_ip.tcl
@@ -29,7 +29,7 @@
vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_asmi_parallel/sim"
vcom "$IP_DIR/ip_arria10_e1sg_asmi_parallel.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
index e2f256dcdbc0c8ff9327edb70689176562122f04..c24a4453fb09031527b604d89d7475d075b3e972 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/flash/asmi_parallel/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_asmi_parallel
-hdl_library_clause_name = ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_170
+hdl_library_clause_name = ip_arria10_e1sg_asmi_parallel_altera_asmi_parallel_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_asmi_parallel_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_asmi_parallel_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_asmi_parallel.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_asmi_parallel/ip_arria10_e1sg_asmi_parallel.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/flash/remote_update/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/flash/remote_update/compile_ip.tcl
index 758af045ba9ba6c8dca1890edddaf80a2561f48d..3e676ef14e722598489a37a607136cdc4dcdaa49 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/remote_update/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/flash/remote_update/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_remote_update/sim"
vcom "$IP_DIR/ip_arria10_e1sg_remote_update.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
index b134d0ea3e3137d58b31c1470aac83275d64b143..d2d006e2d481e00f05910e4dfc475332b3b93f42 100644
--- a/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/flash/remote_update/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_remote_update
-hdl_library_clause_name = ip_arria10_e1sg_remote_update_altera_remote_update_170
+hdl_library_clause_name = ip_arria10_e1sg_remote_update_altera_remote_update_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_remote_update_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_remote_update_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_remote_update.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_remote_update/ip_arria10_e1sg_remote_update.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/compile_ip.tcl
index dbdd811b48868305daff48eb4344d09486017c65..0e5423362c380d4ccbb445b10987a6d13f6ae7c2 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk125/sim"
vcom "$IP_DIR/ip_arria10_e1sg_fractional_pll_clk125.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
index 52f1d945565d8257eda693337921dd02cd549c23..34c167c2497a22c7007173ad80330ed6b4206e69 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk125/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_fractional_pll_clk125
-hdl_library_clause_name = ip_arria10_e1sg_fractional_pll_clk125_altera_xcvr_fpll_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_fractional_pll_clk125_altera_xcvr_fpll_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk125.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk125/ip_arria10_e1sg_fractional_pll_clk125.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/compile_ip.tcl
index 46788a5560a9cfd179d8597bd11e2851093f59ee..905108fd60f8a981c997c71d2c59e22041661706 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk200/sim"
vcom "$IP_DIR/ip_arria10_e1sg_fractional_pll_clk200.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
index df35422b3d3b67a31e000141f750661c9f4c3010..c56852378e4dcf2d109222a790d47ed0c9e1d2a8 100644
--- a/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/fractional_pll_clk200/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_fractional_pll_clk200
-hdl_library_clause_name = ip_arria10_e1sg_fractional_pll_clk200_altera_xcvr_fpll_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_fractional_pll_clk200_altera_xcvr_fpll_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk200.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_fractional_pll_clk200/ip_arria10_e1sg_fractional_pll_clk200.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/mac_10g/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/mac_10g/compile_ip.tcl
index 311722c106b8d981b268dd4df96fd89f5e3df21e..f7ef50002f70065e1d834ead6bea36d2dcc8c917 100644
--- a/libraries/technology/ip_arria10_e1sg/mac_10g/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/mac_10g/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_mac_10g/sim"
vcom "$IP_DIR/ip_arria10_e1sg_mac_10g.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
index 1b97f1135ef1264807c7ffa4c7a7003c534b4158..08af64258001803ea9686b948edbfdc10803a66c 100644
--- a/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/mac_10g/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_mac_10g
-hdl_library_clause_name = ip_arria10_e1sg_mac_10g_alt_em10g32_170
+hdl_library_clause_name = ip_arria10_e1sg_mac_10g_alt_em10g32_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_alt_em10g32_170
+hdl_lib_uses_sim = ip_arria10_e1sg_alt_em10g32_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -19,7 +19,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_mac_10g.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_mac_10g/ip_arria10_e1sg_mac_10g.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/mult_add4/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/mult_add4/compile_ip.tcl
index bd817b8d2cd20551226ebd95aba027838cb867cd..cc872305e161b0cf98793f58b1e12a667709a0f1 100644
--- a/libraries/technology/ip_arria10_e1sg/mult_add4/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/mult_add4/compile_ip.tcl
@@ -29,11 +29,11 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_mult_add4/sim"
vmap ip_arria10_e1sg_mult_add4 ./work/
-vmap altera_mult_add_170 ./work/
+vmap altera_mult_add_180 ./work/
- vcom "$IP_DIR/../altera_mult_add_170/sim/ip_arria10_e1sg_mult_add4_altera_mult_add_170_dl6xbqi.vhd" -work altera_mult_add_170
+ vcom "$IP_DIR/../altera_mult_add_180/sim/ip_arria10_e1sg_mult_add4_altera_mult_add_180_o5e3uui.vhd" -work altera_mult_add_180
vcom "$IP_DIR/ip_arria10_e1sg_mult_add4.vhd" -work ip_arria10_e1sg_mult_add4
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/compile_ip.tcl
index 4af0090eb67e15cf0b92f928b9b96cb073b02fd2..fbbe1b65ff3129a58295dd3a7f56cbda22d61e09 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
index 275ad15cc852fc621db080b01097eccbd9e7001c..dc2b3c96ca25f18a7841942c2dad42e4f328bfd1 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r/ip_arria10_e1sg_phy_10gbase_r.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/compile_ip.tcl
index fa707de56d193d75b1d11a379d6acadaf043268f..f607c01d581180894d6286da324a0147a7eb2001 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_12/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r_12.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
index 35002dd42de444cd3914a794dc449056731a52cc..132cf13a39329e6285987fed19743f4ffabcf3b7 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_12/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r_12
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_12_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_12.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_12/ip_arria10_e1sg_phy_10gbase_r_12.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/compile_ip.tcl
index 6c29765871e3cf5a018e61d14f84dcaa9b818458..0cce3fc118b064405f3fc2f237c2b4a02a45b4b3 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_24/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r_24.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
index b6946fadb14615e1335d5d1662fa5ded1023b256..932f302d9d96624112fafbc1e7dc83ce92c495a2 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_24/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r_24
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_24_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_24.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_24/ip_arria10_e1sg_phy_10gbase_r_24.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl
index c14dae50ea529093b6a02d8f1fada3df281e31b7..3ec7a3f76d6c860faae85bf5ac5a382fcb0a91dc 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_3/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r_3.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg
index baa59d44bf4e48daeb9b89c1018d275ce7c5b537..8b564fb73544411f119b7e2e0e34cf1b81844e11 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_3/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r_3
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_3_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_3.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_3/ip_arria10_e1sg_phy_10gbase_r_3.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/compile_ip.tcl
index 0d32e10667d0112a80bf821034e4b7b25a45f2f8..16c61f7f28d85da50a849bec60e5bf8d761d2b25 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_4/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r_4.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
index 3bab51b92040cbdabb3695e07f23554aaf32289d..e26265c54cd9a986be536c0949dcd2143349d98c 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_4/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r_4
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_4_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_4.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_4/ip_arria10_e1sg_phy_10gbase_r_4.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/compile_ip.tcl
index 0e3facb2982fbc63dcc7a796dcc53d8ca50fce2f..08c36c7e6bcc2a280e0dcba3453d8ba55f3654a9 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_48/sim"
vcom "$IP_DIR/ip_arria10_e1sg_phy_10gbase_r_48.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
index 3d5f7563e9c124c052d8a314c44c89c650e8abc0..5c0565879faeac0947fed6c7571e4103242fca50 100644
--- a/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/phy_10gbase_r_48/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_phy_10gbase_r_48
-hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_phy_10gbase_r_48_altera_xcvr_native_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_native_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_48.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_phy_10gbase_r_48/ip_arria10_e1sg_phy_10gbase_r_48.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk125/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/pll_clk125/compile_ip.tcl
index 5f91ef1076a26c387eb4405eb60452bf9cb8284b..abcdbf22cc16c47fcadfc702ea2e9482c9095a73 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk125/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk125/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk125/sim"
vcom "$IP_DIR/ip_arria10_e1sg_pll_clk125.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
index 361af8b8f8d947259673d10fbea0c7082d18774c..b9156b864897ed9d78b03580ed0fd2b0fe7463e5 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk125/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_pll_clk125
-hdl_library_clause_name = ip_arria10_e1sg_pll_clk125_altera_iopll_170
+hdl_library_clause_name = ip_arria10_e1sg_pll_clk125_altera_iopll_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk125.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk125/ip_arria10_e1sg_pll_clk125.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk200/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/pll_clk200/compile_ip.tcl
index 70a4ab66a1736b50d1b62dee04122bb0f90bc0a5..629cba7f7a4e8cec7f9c2a37dc9ae7898bcb7c1d 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk200/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk200/compile_ip.tcl
@@ -29,5 +29,5 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk200/sim"
vcom "$IP_DIR/ip_arria10_e1sg_pll_clk200.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
index cf73f3b1e1fa66cd102e5623def8aff06518c443..68c9111689a661c1e9b5a928a5f32bd955efc0eb 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk200/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_pll_clk200
-hdl_library_clause_name = ip_arria10_e1sg_pll_clk200_altera_iopll_170
+hdl_library_clause_name = ip_arria10_e1sg_pll_clk200_altera_iopll_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk200.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk200/ip_arria10_e1sg_pll_clk200.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk25/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/pll_clk25/compile_ip.tcl
index 6072afd658dbdf8a395def0cb7fe1156729d30a7..7368bf10991125a08073858188d8e74eb31bfa22 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk25/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk25/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk25/sim"
vcom "$IP_DIR/ip_arria10_e1sg_pll_clk25.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
index 77d9567516a85ba825b333425230fbad366ea35e..a91bebfc952e54d693b1279867e91e545a756d12 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_clk25/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_pll_clk25
-hdl_library_clause_name = ip_arria10_e1sg_pll_clk25_altera_iopll_170
+hdl_library_clause_name = ip_arria10_e1sg_pll_clk25_altera_iopll_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_iopll_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk25.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_clk25/ip_arria10_e1sg_pll_clk25.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl
index 14b82a90c79bd1f39eea676476d2dcfb58438b8c..b5719ceac4d032ff9c92abcb5cb3216bd8c19634 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_pll_xgmii_mac_clocks/sim"
vcom "$IP_DIR/ip_arria10_e1sg_pll_xgmii_mac_clocks.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
index 92b2f2712c021ae287c8cf567c1cc421f7f145ad..ea142b01622532d6cb79ed852ebedf97fb158b56 100644
--- a/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/pll_xgmii_mac_clocks/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_pll_xgmii_mac_clocks
-hdl_library_clause_name = ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_fpll_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_xgmii_mac_clocks.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_pll_xgmii_mac_clocks/ip_arria10_e1sg_pll_xgmii_mac_clocks.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl
index 9718b9d6eb70f446e6ae622866ff750edaee38a5..3511f9a0ed21b8660e4f4b2da5c4adfbaa66273d 100644
--- a/libraries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/temp_sense/compile_ip.tcl
@@ -29,11 +29,9 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/temp_sense/generated/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_temp_sense/sim"
-vmap altera_temp_sense_170 ./work/
+vmap altera_temp_sense_180 ./work/
-
-
- vlog "$IP_DIR/../altera_temp_sense_170/sim/altera_temp_sense.v" -work altera_temp_sense_170
- vcom "$IP_DIR/ip_arria10_e1sg_temp_sense.vhd"
+ vlog "$IP_DIR/../altera_temp_sense_180/sim/altera_temp_sense.v" -work altera_temp_sense_180
+ vcom "$IP_DIR/ip_arria10_e1sg_temp_sense.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
index 4ad2baec31e3dbd2362aa98575ce495074422247..3a8ba97963858f302a0dc8f46c81cdbf77771892 100644
--- a/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/temp_sense/hdllib.cfg
@@ -1,5 +1,5 @@
hdl_lib_name = ip_arria10_e1sg_temp_sense
-hdl_library_clause_name = ip_arria10_e1sg_temp_sense_altera_temp_sense_170
+hdl_library_clause_name = ip_arria10_e1sg_temp_sense_altera_temp_sense_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -16,7 +16,7 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_temp_sense.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_temp_sense/ip_arria10_e1sg_temp_sense.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl
index e98b88b1eb1e257119ab091ea1c60683e39cbf69..f617a12f5d9d209864d412bd664683c5c9a82b4d 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/generated/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_pll_10g/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_pll_10g.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
index b41e0f876fa6b242f97e959344b30a6e651ab1b2..6329d7b22f54e43a657e947c681bdddac1fbebcf 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_pll_10g/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_pll_10g
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_pll_10g_altera_xcvr_atx_pll_a10_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_atx_pll_a10_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_atx_pll_a10_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,4 +16,9 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_pll_10g.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_pll_10g/ip_arria10_e1sg_transceiver_pll_10g.qip
+
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_pll_10g.qsys
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl
index 678140bfc245d49047c3edcbdb4a7a71199cfa32..ba94e344a2ca081d030668981ecf969b07b1727c 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_1/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_1.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
index 0034bdc551eb62dd5379564612191fda9e763196..60010795b023c1a122b3d5e90ec47dd1b340e4c1 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_1/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_1
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_1_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_1.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_1/ip_arria10_e1sg_transceiver_reset_controller_1.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl
index 8fb9880e95d441d8d63a9918a8c5614d8574a989..fd5a7bc7719f94555af255293aff785d34418539 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_12/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_12.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
index 509fc8b1dc6e32adae60980a6827768bd013a246..aa73121a3ee10b311f75cabfba33af3301b33850 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_12/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_12
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_12_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_12.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_12/ip_arria10_e1sg_transceiver_reset_controller_12.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl
index 97fd1d1678d0a3d3541741997b6a3510d21ba8d2..0ad509c4025e59ea36f83da13c80677d38d06345 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_24/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_24.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
index be2f19a032521abb6da9c4792d17097b7a3a454e..d3794145930c67bd250f2f82c12375a1f68ca3c8 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_24/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_24
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_24_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_24.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_24/ip_arria10_e1sg_transceiver_reset_controller_24.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl
index 22bbf7ef66677c2855dfb66b67bb444dc710b195..0833cb18e8f07bb5152068ce939d05aba2378e06 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_3/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_3.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg
index e542216d13d9e5319326fa4cd57e8b5222911130..8fa8802924a08a317941e21f0f36d3932a5e2b7e 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_3/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_3
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_3_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_3_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,4 +16,8 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_3.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_3/ip_arria10_e1sg_transceiver_reset_controller_3.qip
+
+[generate_ip_libs]
+qsys-generate_ip_files =
+ ip_arria10_e1sg_transceiver_reset_controller_3.qsys
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl
index bc16814fafb26b87f94dd01f96af62c511511bd0..836cee4bf3453795b5a61e6bce19b02c9a815dc4 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_4/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_4.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
index 1112b245c30f4cdf29057a512d8e7435d42f624b..bdd12be22408232f0669599bac4485ea440656f2 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_4/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_4
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_4_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_4.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_4/ip_arria10_e1sg_transceiver_reset_controller_4.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl
index 5017d0f346ce8b63f2e186bc175664be6a001ae1..383a8782680eab7d6254a00963132ca681559e02 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/compile_ip.tcl
@@ -29,7 +29,7 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_48/sim"
vcom "$IP_DIR/ip_arria10_e1sg_transceiver_reset_controller_48.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
index 81154621919aa61e9d011a43c0542cd8f9895a2f..d49c7f2bd1e2ad1d0aac544eb528015ded4a0e35 100644
--- a/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/transceiver_reset_controller_48/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_transceiver_reset_controller_48
-hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_48_altera_xcvr_reset_control_170
+hdl_library_clause_name = ip_arria10_e1sg_transceiver_reset_controller_48_altera_xcvr_reset_control_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_xcvr_reset_control_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -16,7 +16,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_48.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_transceiver_reset_controller_48/ip_arria10_e1sg_transceiver_reset_controller_48.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/compile_ip.tcl
index 835fedcf83125f212e39bb434eb79833811655ac..94f8d367a2eb08ffba6af223ef99ba13f607cbba 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/sim"
vcom "$IP_DIR/ip_arria10_e1sg_tse_sgmii_gx.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
index e45525fc7c7165c760a8fe57650f1494c5259275..3e605c0391cb56c3aa26e987ec4db1d5371d2452 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_gx/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_tse_sgmii_gx
-hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_170
+hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_180
hdl_lib_uses_synth = common
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_eth_tse_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_eth_tse_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
@@ -17,7 +17,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_gx/ip_arria10_e1sg_tse_sgmii_gx.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/compile_ip.tcl
index d57ca28bd96dae9bc9b2ec49e9737dad89381d9f..1fc77affb68809f428646014ab2513854bcc38cb 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/compile_ip.tcl
@@ -29,6 +29,6 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/sim"
vcom "$IP_DIR/ip_arria10_e1sg_tse_sgmii_lvds.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
index 97f18f8a16e68f5171f2058359db32f085b7e548..faaf0e7c04dac38ce875cf364921dd7e105bde6f 100644
--- a/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/tse_sgmii_lvds/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_tse_sgmii_lvds
-hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_170
+hdl_library_clause_name = ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_180
hdl_lib_uses_synth = common
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_eth_tse_170
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_eth_tse_180
hdl_lib_technology = ip_arria10_e1sg
@@ -18,7 +18,7 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_tse_sgmii_lvds/ip_arria10_e1sg_tse_sgmii_lvds.qip
[generate_ip_libs]
diff --git a/libraries/technology/ip_arria10_e1sg/voltage_sense/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/voltage_sense/compile_ip.tcl
index 59e6164425ff4c6a238c56fe59f5d253936c6af8..c8e891987bb324caeb48769adbd1055678e9d4ad 100644
--- a/libraries/technology/ip_arria10_e1sg/voltage_sense/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/voltage_sense/compile_ip.tcl
@@ -29,19 +29,19 @@
#vlib ./work/ ;# Assume library work already exist
-set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/sim"
+set IP_DIR "$env(HDL_BUILD_DIR)/unb2b/qsys-generate/ip_arria10_e1sg_voltage_sense/sim"
vmap ip_arria10_e1sg_voltage_sense ./work/
-vmap altera_voltage_sensor_170 ./work/
-vmap altera_voltage_sensor_control_170 ./work/
-vmap altera_voltage_sensor_sample_store_170 ./work/
+vmap altera_voltage_sensor_180 ./work/
+vmap altera_voltage_sensor_control_180 ./work/
+vmap altera_voltage_sensor_sample_store_180 ./work/
- vlog -sv "$IP_DIR/../altera_voltage_sensor_control_170/sim/mentor/altera_voltage_sensor_control.sv" -work altera_voltage_sensor_control_170
- vlog -sv "$IP_DIR/../altera_voltage_sensor_control_170/sim/mentor/voltage_sensor_avalon_controlr.sv" -work altera_voltage_sensor_control_170
- vlog -sv "$IP_DIR/../altera_voltage_sensor_control_170/sim/mentor/voltage_sensor_wrapper.sv" -work altera_voltage_sensor_control_170
- vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_170/sim/mentor/altera_voltage_sensor_sample_store.sv" -work altera_voltage_sensor_sample_store_170
- vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_170/sim/mentor/altera_voltage_sensor_sample_store_ram.sv" -work altera_voltage_sensor_sample_store_170
- vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_170/sim/mentor/altera_voltage_sensor_sample_store_register.sv" -work altera_voltage_sensor_sample_store_170
- vcom "$IP_DIR/../altera_voltage_sensor_170/sim/ip_arria10_e1sg_voltage_sense_altera_voltage_sensor_170_hjr63vq.vhd" -work altera_voltage_sensor_170
- vcom "$IP_DIR/ip_arria10_e1sg_voltage_sense.vhd" -work ip_arria10_e1sg_voltage_sense
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_control_180/sim/mentor/altera_voltage_sensor_control.sv" -work altera_voltage_sensor_control_180
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_control_180/sim/mentor/voltage_sensor_avalon_controlr.sv" -work altera_voltage_sensor_control_180
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_control_180/sim/mentor/voltage_sensor_wrapper.sv" -work altera_voltage_sensor_control_180
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_180/sim/mentor/altera_voltage_sensor_sample_store.sv" -work altera_voltage_sensor_sample_store_180
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_180/sim/mentor/altera_voltage_sensor_sample_store_ram.sv" -work altera_voltage_sensor_sample_store_180
+ vlog -sv "$IP_DIR/../altera_voltage_sensor_sample_store_180/sim/mentor/altera_voltage_sensor_sample_store_register.sv" -work altera_voltage_sensor_sample_store_180
+ vcom "$IP_DIR/../altera_voltage_sensor_180/sim/ip_arria10_e1sg_voltage_sense_altera_voltage_sensor_180_bqre2vy.vhd" -work altera_voltage_sensor_180
+ vcom "$IP_DIR/ip_arria10_e1sg_voltage_sense.vhd" -work ip_arria10_e1sg_voltage_sense
diff --git a/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
index 1edb0c7a5958791b6bfd98a49b395cd2b6b835a3..1c29d76bf22a8c1da8d0c2cc9e91999fa9244a87 100644
--- a/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/voltage_sense/hdllib.cfg
@@ -1,5 +1,5 @@
hdl_lib_name = ip_arria10_e1sg_voltage_sense
-hdl_library_clause_name = ip_arria10_e1sg_voltage_sense_altera_voltage_sense_170
+hdl_library_clause_name = ip_arria10_e1sg_voltage_sense_altera_voltage_sense_180
hdl_lib_uses_synth =
hdl_lib_uses_sim =
hdl_lib_technology = ip_arria10_e1sg
@@ -17,7 +17,7 @@ test_bench_files =
[quartus_project_file]
quartus_qip_files =
- $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_voltage_sense.qip
+ $HDL_BUILD_DIR/unb2b/qsys-generate/ip_arria10_e1sg_voltage_sense/ip_arria10_e1sg_voltage_sense.qip
[generate_ip_libs]
qsys-generate_ip_files =
diff --git a/libraries/technology/mac_10g/hdllib.cfg b/libraries/technology/mac_10g/hdllib.cfg
index c73c25d07ace159e1cdc134df74059710a78010e..157235e48c95a9d9f3ca3f66aad5605dfaf2c733 100644
--- a/libraries/technology/mac_10g/hdllib.cfg
+++ b/libraries/technology/mac_10g/hdllib.cfg
@@ -8,7 +8,7 @@ hdl_lib_disclose_library_clause_names =
ip_stratixiv_mac_10g ip_stratixiv_mac_10g_lib
ip_arria10_mac_10g ip_arria10_mac_10g_alt_em10g32_150
ip_arria10_e3sge3_mac_10g ip_arria10_e3sge3_mac_10g_alt_em10g32_151
- ip_arria10_e1sg_mac_10g ip_arria10_e1sg_mac_10g_alt_em10g32_170
+ ip_arria10_e1sg_mac_10g ip_arria10_e1sg_mac_10g_alt_em10g32_180
synth_files =
tech_mac_10g_component_pkg.vhd
diff --git a/libraries/technology/mult/hdllib.cfg b/libraries/technology/mult/hdllib.cfg
index f9ac504fb4a63e767881edd359dfd70c84209de7..2b3f3f655d112e0fb00346756e14661765c577b1 100644
--- a/libraries/technology/mult/hdllib.cfg
+++ b/libraries/technology/mult/hdllib.cfg
@@ -17,7 +17,7 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_mult ip_arria10_mult_lib
ip_arria10_complex_mult ip_arria10_complex_mult_altmult_complex_150
ip_arria10_complex_mult_rtl ip_arria10_complex_mult_rtl_lib
- ip_arria10_e1sg_complex_mult ip_arria10_e1sg_complex_mult_altmult_complex_170
+ ip_arria10_e1sg_complex_mult ip_arria10_e1sg_complex_mult_altmult_complex_180
ip_arria10_e3sge3_mult_add4 ip_arria10_e3sge3_mult_add4_lib
ip_arria10_e1sg_mult_add4 ip_arria10_e1sg_mult_add4_lib
ip_arria10_e1sg_mult_add2 ip_arria10_e1sg_mult_add2_lib
diff --git a/libraries/technology/pll/hdllib.cfg b/libraries/technology/pll/hdllib.cfg
index 4b047fa7c0eb0237004172d7426940ffe6f5ba8d..c7b3d55035279053a4c7be362f7ce4798e9d66c2 100644
--- a/libraries/technology/pll/hdllib.cfg
+++ b/libraries/technology/pll/hdllib.cfg
@@ -18,10 +18,10 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_e3sge3_pll_clk25 ip_arria10_e3sge3_pll_clk25_altera_iopll_151
ip_arria10_e3sge3_pll_clk125 ip_arria10_e3sge3_pll_clk125_altera_iopll_151
ip_arria10_e3sge3_pll_xgmii_mac_clocks ip_arria10_e3sge3_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_151
- ip_arria10_e1sg_pll_clk200 ip_arria10_e1sg_pll_clk200_altera_iopll_170
- ip_arria10_e1sg_pll_clk25 ip_arria10_e1sg_pll_clk25_altera_iopll_170
- ip_arria10_e1sg_pll_clk125 ip_arria10_e1sg_pll_clk125_altera_iopll_170
- ip_arria10_e1sg_pll_xgmii_mac_clocks ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_170
+ ip_arria10_e1sg_pll_clk200 ip_arria10_e1sg_pll_clk200_altera_iopll_180
+ ip_arria10_e1sg_pll_clk25 ip_arria10_e1sg_pll_clk25_altera_iopll_180
+ ip_arria10_e1sg_pll_clk125 ip_arria10_e1sg_pll_clk125_altera_iopll_180
+ ip_arria10_e1sg_pll_xgmii_mac_clocks ip_arria10_e1sg_pll_xgmii_mac_clocks_altera_xcvr_fpll_a10_180
synth_files =
tech_pll_component_pkg.vhd
diff --git a/libraries/technology/tse/hdllib.cfg b/libraries/technology/tse/hdllib.cfg
index 0a5b17d1d19b99f85c4b0eaf890090056363083c..56d098e9b3533ac82bf3ca1f5a8e95647d16d07a 100644
--- a/libraries/technology/tse/hdllib.cfg
+++ b/libraries/technology/tse/hdllib.cfg
@@ -14,8 +14,8 @@ hdl_lib_disclose_library_clause_names =
ip_arria10_tse_sgmii_gx ip_arria10_tse_sgmii_gx_altera_eth_tse_150
ip_arria10_e3sge3_tse_sgmii_lvds ip_arria10_e3sge3_tse_sgmii_lvds_altera_eth_tse_151
ip_arria10_e3sge3_tse_sgmii_gx ip_arria10_e3sge3_tse_sgmii_gx_altera_eth_tse_151
- ip_arria10_e1sg_tse_sgmii_lvds ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_170
- ip_arria10_e1sg_tse_sgmii_gx ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_170
+ ip_arria10_e1sg_tse_sgmii_lvds ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_180
+ ip_arria10_e1sg_tse_sgmii_gx ip_arria10_e1sg_tse_sgmii_gx_altera_eth_tse_180
synth_files =
tech_tse_component_pkg.vhd
diff --git a/minimal_user_components.ipx b/minimal_user_components.ipx
index 4823cbc15af5e791566def51860e88e74611825d..e40f426f6a5f69288a1bd3154f3e3ff7f371af1a 100644
--- a/minimal_user_components.ipx
+++ b/minimal_user_components.ipx
@@ -7,4 +7,5 @@
<!-- -->
<!-- D:/svnroot/Uniboard/9.0 -->
<path path="$RADIOHDL_WORK/libraries/**/*" />
+ <path path="$HDL_BUILD_DIR/**/*" />
</library>