From 999e38fdcd2bf22ca425409db8e203e3e7ff8f40 Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Wed, 5 Oct 2022 12:36:37 +0200
Subject: [PATCH] Init hold_cnt_* = 0.
---
libraries/base/dp/src/vhdl/dp_block_validate_err.vhd | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/libraries/base/dp/src/vhdl/dp_block_validate_err.vhd b/libraries/base/dp/src/vhdl/dp_block_validate_err.vhd
index 91d0c9b6ee..fc6371e48c 100644
--- a/libraries/base/dp/src/vhdl/dp_block_validate_err.vhd
+++ b/libraries/base/dp/src/vhdl/dp_block_validate_err.vhd
@@ -150,9 +150,9 @@ ARCHITECTURE rtl OF dp_block_validate_err IS
SIGNAL cnt_err_arr : t_cnt_err_arr(g_nof_err_counts-1 DOWNTO 0);
SIGNAL cnt_err_en_arr : STD_LOGIC_VECTOR(g_nof_err_counts-1 DOWNTO 0);
- SIGNAL hold_cnt_blk : STD_LOGIC_VECTOR(g_blk_cnt_w-1 DOWNTO 0);
- SIGNAL hold_cnt_discarded : STD_LOGIC_VECTOR(g_cnt_w-1 DOWNTO 0);
- SIGNAL hold_cnt_err_arr : t_cnt_err_arr(g_nof_err_counts-1 DOWNTO 0);
+ SIGNAL hold_cnt_blk : STD_LOGIC_VECTOR(g_blk_cnt_w-1 DOWNTO 0) := (OTHERS=>'0');
+ SIGNAL hold_cnt_discarded : STD_LOGIC_VECTOR(g_cnt_w-1 DOWNTO 0) := (OTHERS=>'0');
+ SIGNAL hold_cnt_err_arr : t_cnt_err_arr(g_nof_err_counts-1 DOWNTO 0) := (OTHERS=>(OTHERS=>'0'));
SIGNAL err_ok : STD_LOGIC;
SIGNAL err_ok_reg : STD_LOGIC;
@@ -258,11 +258,14 @@ BEGIN
gen_reg : FOR I IN 0 TO g_nof_err_counts-1 GENERATE
count_reg((I + 1) * c_word_w - 1 DOWNTO I * c_word_w) <= RESIZE_UVEC(hold_cnt_err_arr(I), c_word_w);
END GENERATE;
- count_reg((g_nof_err_counts+1) * c_word_w - 1 DOWNTO g_nof_err_counts * c_word_w ) <= RESIZE_UVEC(hold_cnt_discarded, c_word_w);
+
+ count_reg((g_nof_err_counts+1) * c_word_w - 1 DOWNTO g_nof_err_counts * c_word_w ) <= RESIZE_UVEC(hold_cnt_discarded, c_word_w);
+
gen_blk_cnt_32b : IF g_blk_cnt_w < c_word_w GENERATE
count_reg((g_nof_err_counts+2) * c_word_w - 1 DOWNTO (g_nof_err_counts+1) * c_word_w ) <= RESIZE_UVEC(hold_cnt_blk, c_word_w); -- low part
count_reg((g_nof_err_counts+3) * c_word_w - 1 DOWNTO (g_nof_err_counts+2) * c_word_w ) <= (OTHERS=>'0'); -- high part (not used)
END GENERATE;
+
gen_blk_cnt_64b : IF g_blk_cnt_w > c_word_w GENERATE
count_reg((g_nof_err_counts+2) * c_word_w - 1 DOWNTO (g_nof_err_counts+1) * c_word_w ) <= hold_cnt_blk(c_word_w-1 DOWNTO 0); -- low part
count_reg((g_nof_err_counts+3) * c_word_w - 1 DOWNTO (g_nof_err_counts+2) * c_word_w ) <= RESIZE_UVEC(hold_cnt_blk(g_blk_cnt_w-1 DOWNTO c_word_w), c_word_w); -- high part
--
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