diff --git a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/tb_unb2c_test_ddr_16G_I.vhd b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/tb_unb2c_test_ddr_16G_I.vhd index 46594f3776b26472ae7d6b19ddf4e6b0f61d5fc9..f8305c5b13e84b97011d84ab1a4a569e7bc0b6e3 100644 --- a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/tb_unb2c_test_ddr_16G_I.vhd +++ b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/tb_unb2c_test_ddr_16G_I.vhd @@ -30,6 +30,7 @@ architecture tb of tb_unb2c_test_ddr_16G_I is begin u_tb_unb2c_test : entity unb2c_test_lib.tb_unb2c_test generic map ( - g_design_name => "unb2c_test_ddr_16G_I" + g_design_name => "unb2c_test_ddr_16G_I", + g_factory_image => true ); end tb; diff --git a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/unb2c_test_ddr_16G_I.vhd b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/unb2c_test_ddr_16G_I.vhd index 4f60e185079a3fbd7ef980bb00255fbbef2d57ca..09294f0b34d94e3a770fd43d27c3315171e72df5 100644 --- a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/unb2c_test_ddr_16G_I.vhd +++ b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_ddr_16G_I/unb2c_test_ddr_16G_I.vhd @@ -37,7 +37,8 @@ entity unb2c_test_ddr_16G_I is g_sim_node_nr : natural := 0; g_stamp_date : natural := 0; -- Date (YYYYMMDD) -- set by QSF g_stamp_time : natural := 0; -- Time (HHMMSS) -- set by QSF - g_revision_id : string := "" -- revision ID -- set by QSF + g_revision_id : string := ""; -- revision ID -- set by QSF + g_factory_image : boolean := true ); port ( -- GENERAL @@ -79,14 +80,15 @@ architecture str of unb2c_test_ddr_16G_I is begin u_revision : entity unb2c_test_lib.unb2c_test generic map ( - g_design_name => g_design_name, - g_design_note => g_design_note, - g_sim => g_sim, - g_sim_unb_nr => g_sim_unb_nr, - g_sim_node_nr => g_sim_node_nr, - g_stamp_date => g_stamp_date, - g_stamp_time => g_stamp_time, - g_revision_id => g_revision_id + g_design_name => g_design_name, + g_design_note => g_design_note, + g_sim => g_sim, + g_sim_unb_nr => g_sim_unb_nr, + g_sim_node_nr => g_sim_node_nr, + g_stamp_date => g_stamp_date, + g_stamp_time => g_stamp_time, + g_revision_id => g_revision_id, + g_factory_image => g_factory_image ) port map ( -- GENERAL diff --git a/boards/uniboard2c/designs/unb2c_test/tb/vhdl/tb_unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/tb/vhdl/tb_unb2c_test.vhd index a34e6633db99ec9a06cab4d836db5f2030d95324..4219940c46e81795d0f6a68e97724993715c0b4e 100644 --- a/boards/uniboard2c/designs/unb2c_test/tb/vhdl/tb_unb2c_test.vhd +++ b/boards/uniboard2c/designs/unb2c_test/tb/vhdl/tb_unb2c_test.vhd @@ -54,7 +54,8 @@ use tech_ddr_lib.tech_ddr_pkg.all; entity tb_unb2c_test is generic ( g_design_name : string := "unb2c_test"; - g_sim_model_ddr : boolean := false + g_sim_model_ddr : boolean := false; + g_factory_image : boolean := false ); end tb_unb2c_test; @@ -166,7 +167,8 @@ begin g_sim => c_sim, g_sim_unb_nr => c_unb_nr, g_sim_node_nr => c_node_nr, - g_sim_model_ddr => g_sim_model_ddr + g_sim_model_ddr => g_sim_model_ddr, + g_factory_image => g_factory_image ) port map ( -- GENERAL