From 980827c5fbf9a50a95c9d7e6e9c03fcfb388ea3e Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Thu, 3 Feb 2022 14:43:00 +0100 Subject: [PATCH] Added c_diag_wg_latency to determine inital WG phase. --- libraries/base/diag/src/vhdl/diag_pkg.vhd | 1 + 1 file changed, 1 insertion(+) diff --git a/libraries/base/diag/src/vhdl/diag_pkg.vhd b/libraries/base/diag/src/vhdl/diag_pkg.vhd index 7e86c09706..1d1fd44248 100644 --- a/libraries/base/diag/src/vhdl/diag_pkg.vhd +++ b/libraries/base/diag/src/vhdl/diag_pkg.vhd @@ -88,6 +88,7 @@ PACKAGE diag_pkg IS CONSTANT c_diag_wg_freq_unit : REAL := 2**REAL(c_diag_wg_freq_w); -- ^= c_clk_freq = Fs (sample frequency), assuming one sinus waveform in the buffer CONSTANT c_diag_wg_phase_unit : REAL := 2**REAL(c_diag_wg_phase_w)/ 360.0; -- ^= 1 degree + CONSTANT c_diag_wg_latency : NATURAL := 10; -- WG starts 10 cycles after trigger CONSTANT c_diag_wg_rst : t_diag_wg := (TO_UVEC(c_diag_wg_mode_off, c_diag_wg_mode_w), TO_UVEC( 1024, c_diag_wg_nofsamples_w), TO_UVEC( 0, c_diag_wg_phase_w), -- GitLab