diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
index 2daf3a8a83e6cc5cb35229440e5ea097be3d4e83..cf2c4e8d165ab44e3394d4be6cbe656140c72f04 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
@@ -41,11 +41,11 @@ ENTITY tech_fpga_voltage_sens IS
     controller_csr_write         : in  STD_LOGIC := '0';
     controller_csr_writedata     : in  STD_LOGIC_VECTOR(31 downto 0) := (others => '0');
     controller_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');
-    sample_store_csr_address     : in  STD_LOGIC := '0';
+    sample_store_csr_address     : in  STD_LOGIC_VECTOR(3 downto 0) := "0000";
     sample_store_csr_read        : in  STD_LOGIC := '0';
     sample_store_csr_write       : in  STD_LOGIC := '0';
     sample_store_csr_writedata   : in  STD_LOGIC_VECTOR(31 downto 0) := (others => '0');
-    controller_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');
+    sample_store_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');
     sample_store_irq_irq         : out STD_LOGIC
   );
 END tech_fpga_voltage_sens;
diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
index 8e7206212cf4dc43d9ac0e05b97ba83250e14d56..87a657044a815c3d096b39618c9aa0c2121c06af 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
@@ -35,11 +35,11 @@ PACKAGE tech_fpga_voltage_sens_component_pkg IS
   		controller_csr_write         : in  STD_LOGIC := '0';           
   		controller_csr_writedata     : in  STD_LOGIC_VECTOR(31 downto 0) := (others => '0');     
   		controller_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');     
-  		sample_store_csr_address     : in  STD_LOGIC := '0';           
+  		sample_store_csr_address     : in  STD_LOGIC_VECTOR(3 downto 0) := "0000";           
   		sample_store_csr_read        : in  STD_LOGIC := '0';           
   		sample_store_csr_write       : in  STD_LOGIC := '0';           
   		sample_store_csr_writedata   : in  STD_LOGIC_VECTOR(31 downto 0) := (others => '0');     
-  		controller_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');     
+  		sample_store_csr_readdata      : out STD_LOGIC_VECTOR(31 downto 0) := (others => '0');     
   		sample_store_irq_irq         : out STD_LOGIC
   	);
   END COMPONENT;
diff --git a/libraries/technology/technology_select_pkg.vhd b/libraries/technology/technology_select_pkg.vhd
index d523ac4fb94ae39ca17738f2a87ccf8f3910c87f..9b94b6981ac358a804a91c24cbb0e2d643e306bb 100644
--- a/libraries/technology/technology_select_pkg.vhd
+++ b/libraries/technology/technology_select_pkg.vhd
@@ -30,7 +30,7 @@ USE work.technology_pkg.ALL;
 
 PACKAGE technology_select_pkg IS
 
-  CONSTANT c_tech_select_default : INTEGER := c_tech_stratixiv;
-  --CONSTANT c_tech_select_default : INTEGER := c_tech_arria10;
+  --CONSTANT c_tech_select_default : INTEGER := c_tech_stratixiv;
+  CONSTANT c_tech_select_default : INTEGER := c_tech_arria10;
   
 END technology_select_pkg;