From 9548a2f2e9b1e8d2b6ae66fa13f4eba3f672dbe4 Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Fri, 1 May 2015 12:48:58 +0000
Subject: [PATCH] corrected 'excludes' and made sure Quartus-Fitter did not
depend on ddr sdc files anymore
---
.../revisions/unb1_test_10GbE/hdllib.cfg | 17 ++--
.../quartus/unb1_test_10GbE_pins.tcl | 85 ++++++++++++++++++
.../revisions/unb1_test_1GbE/hdllib.cfg | 17 ++--
.../quartus/unb1_test_1GbE_pins.tcl | 90 +++++++++++++++++++
.../revisions/unb1_test_all/hdllib.cfg | 7 +-
.../revisions/unb1_test_ddr/hdllib.cfg | 9 +-
.../quartus/unb1_test_ddr_pins.tcl | 30 +++++++
7 files changed, 226 insertions(+), 29 deletions(-)
create mode 100644 boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/quartus/unb1_test_10GbE_pins.tcl
create mode 100644 boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/quartus/unb1_test_1GbE_pins.tcl
create mode 100644 boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/quartus/unb1_test_ddr_pins.tcl
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
index 1e30e02940..44b531e32b 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg
@@ -2,7 +2,7 @@ hdl_lib_name = unb1_test_10GbE
hdl_library_clause_name = unb1_test_10GbE_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_master ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_master ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
hdl_lib_technology = ip_stratixiv
@@ -12,28 +12,23 @@ synth_files =
test_bench_files =
tb_unb1_test_10GbE.vhd
+modelsim_copy_files =
+ ../../src/hex hex
+
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_unb1_test.qsys .
- ../../src/hex/counter_data_128_0.hex ../..
- ../../src/hex/counter_data_32_0.hex ../..
- ../../src/hex/counter_data_64_0.hex ../..
+ ../../src/hex hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
quartus_tcl_files =
- ../../quartus/unb1_test_pins.tcl
- ../../quartus/unb1_test_pins_constraints.tcl
+ quartus/unb1_test_10GbE_pins.tcl
quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_10GbE/qsys_unb1_test/synthesis/qsys_unb1_test.qip
- $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
- #$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
-
-modelsim_compile_ip_files =
- $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/quartus/unb1_test_10GbE_pins.tcl b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/quartus/unb1_test_10GbE_pins.tcl
new file mode 100644
index 0000000000..9537922189
--- /dev/null
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/quartus/unb1_test_10GbE_pins.tcl
@@ -0,0 +1,85 @@
+###############################################################################
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_general_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_other_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_1Gbe_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_sensor_pins.tcl
+# -- Front Interface (10GbE)
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/FRONT_NODE_tr_cntrl_pins.tcl
+
+set_location_assignment PIN_AA2 -to SA_CLK
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SA_CLK
+
+set_location_assignment PIN_M4 -to SI_FN_0_TX[0]
+set_location_assignment PIN_K4 -to SI_FN_0_TX[1]
+set_location_assignment PIN_D4 -to SI_FN_0_TX[2]
+set_location_assignment PIN_B4 -to SI_FN_0_TX[3]
+set_location_assignment PIN_N2 -to SI_FN_0_RX[0]
+set_location_assignment PIN_L2 -to SI_FN_0_RX[1]
+set_location_assignment PIN_E2 -to SI_FN_0_RX[2]
+set_location_assignment PIN_C2 -to SI_FN_0_RX[3]
+
+set_location_assignment PIN_AD4 -to SI_FN_1_TX[0]
+set_location_assignment PIN_AB4 -to SI_FN_1_TX[1]
+set_location_assignment PIN_T4 -to SI_FN_1_TX[2]
+set_location_assignment PIN_P4 -to SI_FN_1_TX[3]
+set_location_assignment PIN_AE2 -to SI_FN_1_RX[0]
+set_location_assignment PIN_AC2 -to SI_FN_1_RX[1]
+set_location_assignment PIN_U2 -to SI_FN_1_RX[2]
+set_location_assignment PIN_R2 -to SI_FN_1_RX[3]
+
+set_location_assignment PIN_AT4 -to SI_FN_2_TX[0]
+set_location_assignment PIN_AP4 -to SI_FN_2_TX[1]
+set_location_assignment PIN_AH4 -to SI_FN_2_TX[2]
+set_location_assignment PIN_AF4 -to SI_FN_2_TX[3]
+set_location_assignment PIN_AU2 -to SI_FN_2_RX[0]
+set_location_assignment PIN_AR2 -to SI_FN_2_RX[1]
+set_location_assignment PIN_AJ2 -to SI_FN_2_RX[2]
+set_location_assignment PIN_AG2 -to SI_FN_2_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[3]
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
index 1c170f9929..a7db18ad13 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/hdllib.cfg
@@ -2,7 +2,7 @@ hdl_lib_name = unb1_test_1GbE
hdl_library_clause_name = unb1_test_1GbE_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_master ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master ip_stratixiv_ddr3_uphy_4g_800_slave ip_stratixiv_ddr3_uphy_4g_single_rank_800_master ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
hdl_lib_technology = ip_stratixiv
@@ -12,28 +12,23 @@ synth_files =
test_bench_files =
tb_unb1_test_1GbE.vhd
+modelsim_copy_files =
+ ../../src/hex hex
+
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_unb1_test.qsys .
- ../../src/hex/counter_data_128_0.hex ../..
- ../../src/hex/counter_data_32_0.hex ../..
- ../../src/hex/counter_data_64_0.hex ../..
+ ../../src/hex hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
quartus_tcl_files =
- ../../quartus/unb1_test_pins.tcl
- ../../quartus/unb1_test_pins_constraints.tcl
+ quartus/unb1_test_1GbE_pins.tcl
quartus_vhdl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/unb1_test_1GbE/qsys_unb1_test/synthesis/qsys_unb1_test.qip
- $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
- #$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_slave/generated/ip_stratixiv_ddr3_uphy_4g_800_slave.qip
-
-modelsim_compile_ip_files =
- $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/quartus/unb1_test_1GbE_pins.tcl b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/quartus/unb1_test_1GbE_pins.tcl
new file mode 100644
index 0000000000..06974891a2
--- /dev/null
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_1GbE/quartus/unb1_test_1GbE_pins.tcl
@@ -0,0 +1,90 @@
+###############################################################################
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_general_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_other_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_1Gbe_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_sensor_pins.tcl
+# -- Front Interface (10GbE)
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/FRONT_NODE_tr_cntrl_pins.tcl
+
+set_location_assignment PIN_AA2 -to SA_CLK
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SA_CLK
+
+set_location_assignment PIN_M4 -to SI_FN_0_TX[0]
+set_location_assignment PIN_K4 -to SI_FN_0_TX[1]
+set_location_assignment PIN_D4 -to SI_FN_0_TX[2]
+set_location_assignment PIN_B4 -to SI_FN_0_TX[3]
+set_location_assignment PIN_N2 -to SI_FN_0_RX[0]
+set_location_assignment PIN_L2 -to SI_FN_0_RX[1]
+set_location_assignment PIN_E2 -to SI_FN_0_RX[2]
+set_location_assignment PIN_C2 -to SI_FN_0_RX[3]
+
+set_location_assignment PIN_AD4 -to SI_FN_1_TX[0]
+set_location_assignment PIN_AB4 -to SI_FN_1_TX[1]
+set_location_assignment PIN_T4 -to SI_FN_1_TX[2]
+set_location_assignment PIN_P4 -to SI_FN_1_TX[3]
+set_location_assignment PIN_AE2 -to SI_FN_1_RX[0]
+set_location_assignment PIN_AC2 -to SI_FN_1_RX[1]
+set_location_assignment PIN_U2 -to SI_FN_1_RX[2]
+set_location_assignment PIN_R2 -to SI_FN_1_RX[3]
+
+set_location_assignment PIN_AT4 -to SI_FN_2_TX[0]
+set_location_assignment PIN_AP4 -to SI_FN_2_TX[1]
+set_location_assignment PIN_AH4 -to SI_FN_2_TX[2]
+set_location_assignment PIN_AF4 -to SI_FN_2_TX[3]
+set_location_assignment PIN_AU2 -to SI_FN_2_RX[0]
+set_location_assignment PIN_AR2 -to SI_FN_2_RX[1]
+set_location_assignment PIN_AJ2 -to SI_FN_2_RX[2]
+set_location_assignment PIN_AG2 -to SI_FN_2_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_0_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_1_RX[3]
+
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_TX[3]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[0]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[1]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[2]
+set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to SI_FN_2_RX[3]
+
+
+# -- include ddr3 pins
+source $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/src/tcl/COMMON_NODE_ddr_I_rec_pins.tcl
+source $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/src/tcl/COMMON_NODE_ddr_II_rec_pins.tcl
+
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
index 1adf4b585e..b3916894cf 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
@@ -12,13 +12,14 @@ synth_files =
test_bench_files =
tb_unb1_test_all.vhd
+modelsim_copy_files =
+ ../../src/hex hex
+
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_unb1_test.qsys .
- ../../src/hex/counter_data_128_0.hex ../..
- ../../src/hex/counter_data_32_0.hex ../..
- ../../src/hex/counter_data_64_0.hex ../..
+ ../../src/hex hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
index 14419b4fa7..a6f2ff8078 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
@@ -12,19 +12,20 @@ synth_files =
test_bench_files =
tb_unb1_test_ddr.vhd
+modelsim_copy_files =
+ ../../src/hex hex
+
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_unb1_test.qsys .
- ../../src/hex/counter_data_128_0.hex ../..
- ../../src/hex/counter_data_32_0.hex ../..
- ../../src/hex/counter_data_64_0.hex ../..
+ ../../src/hex hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
quartus_tcl_files =
- ../../quartus/unb1_test_pins.tcl
+ quartus/unb1_test_ddr_pins.tcl
../../quartus/unb1_test_pins_constraints.tcl
quartus_vhdl_files =
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/quartus/unb1_test_ddr_pins.tcl b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/quartus/unb1_test_ddr_pins.tcl
new file mode 100644
index 0000000000..65282d0ba6
--- /dev/null
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/quartus/unb1_test_ddr_pins.tcl
@@ -0,0 +1,30 @@
+###############################################################################
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+###############################################################################
+
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_general_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_other_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_1Gbe_pins.tcl
+source $::env(UNB)/Firmware/designs/unb_common/src/tcl/COMMON_NODE_sensor_pins.tcl
+
+# -- include ddr3 pins
+source $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/src/tcl/COMMON_NODE_ddr_I_rec_pins.tcl
+source $::env(RADIOHDL)/boards/uniboard1/libraries/unb1_board/src/tcl/COMMON_NODE_ddr_II_rec_pins.tcl
+
--
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