From 9516edc2b80f73d97c3284ac497f72675d170ef6 Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Mon, 9 Mar 2020 16:52:12 +0100
Subject: [PATCH] Added u_waitrequest_pipe_miso_wait. Still to to is fix
supporting waitrequest with pipelined mosi.
---
libraries/base/mm/tb/vhdl/tb_tb_mm_bus.vhd | 32 +++++++++++++---------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/libraries/base/mm/tb/vhdl/tb_tb_mm_bus.vhd b/libraries/base/mm/tb/vhdl/tb_tb_mm_bus.vhd
index eba8e83c10..9e40c5da11 100644
--- a/libraries/base/mm/tb/vhdl/tb_tb_mm_bus.vhd
+++ b/libraries/base/mm/tb/vhdl/tb_tb_mm_bus.vhd
@@ -39,23 +39,29 @@ BEGIN
-- > as 4
-- > run -all
- -- g_nof_slaves : POSITIVE := 2; -- Number of slave memory interfaces on the MM bus array.
- -- g_base_offset : NATURAL := 0; -- Address of first slave on the MM bus
- -- g_width_w : POSITIVE := 4; -- Address width of each slave memory in the MM bus array.
- -- g_rd_latency : NATURAL := 1; -- Read latency of the slaves slave
- -- g_waitrequest : BOOLEAN := FALSE; -- When TRUE model waitrequest by MM slaves, else fixed '0'
- -- g_pipeline_mosi : BOOLEAN := FALSE;
- -- g_pipeline_miso_rd : BOOLEAN := TRUE;
- -- g_pipeline_miso_wait : BOOLEAN := FALSE
+ -- g_nof_slaves : POSITIVE := 2; -- Number of slave memory interfaces on the MM bus array.
+ -- g_base_offset : NATURAL := 0; -- Address of first slave on the MM bus
+ -- g_width_w : POSITIVE := 4; -- Address width of each slave memory in the MM bus array.
+ -- g_rd_latency : NATURAL := 1; -- Read latency of the slaves slave
+ -- g_waitrequest : BOOLEAN := FALSE; -- When TRUE model waitrequest by MM slaves, else fixed '0'
+ -- g_pipeline_mosi : BOOLEAN := FALSE;
+ -- g_pipeline_miso_rdval : BOOLEAN := TRUE;
+ -- g_pipeline_miso_wait : BOOLEAN := FALSE
u_no_pipe : ENTITY work.tb_mm_bus GENERIC MAP (16, 0, 3, 1, FALSE, FALSE, FALSE, FALSE);
u_no_pipe_base_offset : ENTITY work.tb_mm_bus GENERIC MAP (16, 3*2**4, 4, 1, FALSE, FALSE, FALSE, FALSE);
u_pipe_mosi : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, FALSE, TRUE, FALSE, FALSE);
- u_pipe_mosi_miso_rd : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, FALSE, TRUE, TRUE, FALSE);
+ u_pipe_mosi_miso_rdval : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, FALSE, TRUE, TRUE, FALSE);
u_waitrequest_no_pipe : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, TRUE, FALSE, FALSE, FALSE);
- u_waitrequest_pipe_miso_rd : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, TRUE, FALSE, TRUE, FALSE);
- u_waitrequest_pipe_miso_rd_rlat2 : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 2, TRUE, FALSE, TRUE, FALSE);
- --u_waitrequest_pipe_mosi : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, TRUE, TRUE, FALSE, FALSE);
- --u_waitrequest_pipe_mosi_miso_rd : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, TRUE, TRUE, TRUE, FALSE);
+ u_waitrequest_pipe_miso_rdval : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 1, TRUE, FALSE, TRUE, FALSE);
+ u_waitrequest_pipe_miso_rdval2 : ENTITY work.tb_mm_bus GENERIC MAP ( 3, 0, 4, 2, TRUE, FALSE, TRUE, FALSE);
+ u_waitrequest_pipe_miso_wait : ENTITY work.tb_mm_bus GENERIC MAP ( 2, 0, 4, 1, TRUE, FALSE, FALSE, TRUE);
+
+ -- To do:
+ -- . supporting waitrequest with pipelined mosi may require a component similar to dp_pipeline
+ --u_waitrequest_pipe_mosi : ENTITY work.tb_mm_bus GENERIC MAP ( 2, 0, 4, 1, TRUE, TRUE, FALSE, FALSE);
+ --u_waitrequest_pipe_mosi_miso_rdval : ENTITY work.tb_mm_bus GENERIC MAP ( 2, 0, 4, 1, TRUE, TRUE, TRUE, FALSE);
+ --u_waitrequest_pipe_mosi_miso_wait : ENTITY work.tb_mm_bus GENERIC MAP ( 2, 0, 4, 1, TRUE, TRUE, FALSE, TRUE);
+ --u_waitrequest_pipe_mosi_miso : ENTITY work.tb_mm_bus GENERIC MAP ( 2, 0, 4, 1, TRUE, TRUE, TRUE, TRUE);
END tb;
--
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