From 94a454cf4eeb84fe55504bb68bb0efed115c5584 Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Fri, 3 Sep 2021 12:29:30 +0200
Subject: [PATCH] -Fixed typo in c_ram_dat_w. -All TB still pass OK
(tb_tb_st_histogram).
---
libraries/dsp/st/src/vhdl/mmp_st_histogram.vhd | 2 +-
libraries/dsp/st/src/vhdl/st_histogram.vhd | 2 +-
libraries/dsp/st/tb/vhdl/tb_mmp_st_histogram.vhd | 2 +-
libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/libraries/dsp/st/src/vhdl/mmp_st_histogram.vhd b/libraries/dsp/st/src/vhdl/mmp_st_histogram.vhd
index 68f9df5f48..f3b8d63dd9 100644
--- a/libraries/dsp/st/src/vhdl/mmp_st_histogram.vhd
+++ b/libraries/dsp/st/src/vhdl/mmp_st_histogram.vhd
@@ -67,7 +67,7 @@ ARCHITECTURE str OF mmp_st_histogram IS
-------------------------------------------------------------------------------
CONSTANT c_reg_adr_w : NATURAL := 1;
CONSTANT c_ram_adr_w : NATURAL := ceil_log2(g_nof_bins);
- CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync)+1;
+ CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync+1);
CONSTANT c_ram : t_c_mem := (latency => 1,
adr_w => c_ram_adr_w,
diff --git a/libraries/dsp/st/src/vhdl/st_histogram.vhd b/libraries/dsp/st/src/vhdl/st_histogram.vhd
index 297aa95cca..5bc18db0f5 100644
--- a/libraries/dsp/st/src/vhdl/st_histogram.vhd
+++ b/libraries/dsp/st/src/vhdl/st_histogram.vhd
@@ -126,7 +126,7 @@ ARCHITECTURE rtl OF st_histogram IS
-------------------------------------------------------------------------------
CONSTANT c_ram_adr_w : NATURAL := ceil_log2(g_nof_bins);
CONSTANT c_adr_low : NATURAL := g_data_w-c_ram_adr_w;
- CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync)+1;
+ CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync+1);
-------------------------------------------------------------------------------
-- snk_in.data help signal
diff --git a/libraries/dsp/st/tb/vhdl/tb_mmp_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_mmp_st_histogram.vhd
index 0880f312c4..e2e34b149b 100644
--- a/libraries/dsp/st/tb/vhdl/tb_mmp_st_histogram.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_mmp_st_histogram.vhd
@@ -90,7 +90,7 @@ ARCHITECTURE tb OF tb_mmp_st_histogram IS
----------------------------------------------------------------------------
-- Readout & verification
----------------------------------------------------------------------------
- CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync)+1;
+ CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync+1);
CONSTANT c_expected_ram_content : NATURAL := g_nof_data_per_sync/g_nof_bins;
diff --git a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
index e5701611d8..b4410b98bb 100644
--- a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
@@ -84,7 +84,7 @@ ARCHITECTURE tb OF tb_st_histogram IS
---------------------------------------------------------------------------
CONSTANT c_expected_ram_content_counter : NATURAL := g_nof_data_per_sync/g_nof_bins;
CONSTANT c_nof_levels_per_bin : NATURAL := (2**g_data_w)/g_nof_bins; --e.g. 2 values per bin if g_data_w=9 (512 levels) and g_nof_bins=256
- CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync)+1;
+ CONSTANT c_ram_dat_w : NATURAL := ceil_log2(g_nof_data_per_sync+1);
CONSTANT c_ram_adr_w : NATURAL := ceil_log2(g_nof_bins);
---------------------------------------------------------------------------
--
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