diff --git a/libraries/technology/ip_agi027_xxxx/reset_release/README.txt b/libraries/technology/ip_agi027_xxxx/reset_release/README.txt
index 36c8932bd2f5b8c22c1bef57b0827c08e1dee9ad..b5d1b2d9228ab1991d43e850926cbe362bd515d0 100644
--- a/libraries/technology/ip_agi027_xxxx/reset_release/README.txt
+++ b/libraries/technology/ip_agi027_xxxx/reset_release/README.txt
@@ -100,7 +100,7 @@ b) Reset output port can be a Reset Interface (ri) or Conduit Interface (ci):
   . ri =  reset interface,     is the selected type of reset output port
     Desc. :   allow reset connection in Platform Designer
 
-  . Recommended to use ci IP. 
+  . The ci IP is ued in the vendor FPGA Design Example. 
 
 c) Choose between using or not using a separate library in altera_libraries: