From 927b091e70e680563b93eda637af6170d2c9b244 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Thu, 13 Nov 2014 14:14:29 +0000
Subject: [PATCH] Enabled tx_pma_clkout to have 312.5 MHz and 156.25 MHz output
clocks that are needed for the mac_10g IP when using 64b data.
---
.../phy_10gbase_r/ip_arria10_phy_10gbase_r.qsys | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r.qsys b/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r.qsys
index 7c9ac44be6..2e3f76de67 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r.qsys
+++ b/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r.qsys
@@ -6,7 +6,7 @@
version="1.0"
description=""
tags="INTERNAL_COMPONENT=true"
- categories="" />
+ categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element $${FILENAME}
@@ -306,6 +306,13 @@
dir="end">
<port name="rx_enh_blk_lock" internal="rx_enh_blk_lock" />
</interface>
+ <interface
+ name="tx_pma_clkout"
+ internal="xcvr_native_a10_0.tx_pma_clkout"
+ type="conduit"
+ dir="end">
+ <port name="tx_pma_clkout" internal="tx_pma_clkout" />
+ </interface>
<module
kind="altera_xcvr_native_a10"
version="14.0"
@@ -333,9 +340,9 @@
<parameter name="tx_pma_clk_div" value="1" />
<parameter name="plls" value="1" />
<parameter name="pll_select" value="0" />
- <parameter name="enable_port_tx_pma_clkout" value="0" />
+ <parameter name="enable_port_tx_pma_clkout" value="1" />
<parameter name="enable_port_tx_pma_div_clkout" value="1" />
- <parameter name="tx_pma_div_clkout_divider" value="33" />
+ <parameter name="tx_pma_div_clkout_divider" value="66" />
<parameter name="enable_port_tx_pma_iqtxrx_clkout" value="0" />
<parameter name="enable_port_tx_pma_elecidle" value="0" />
<parameter name="enable_port_tx_pma_qpipullup" value="0" />
--
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