diff --git a/boards/uniboard1/designs/unb1_minimal/doc/README b/boards/uniboard1/designs/unb1_minimal/doc/README
index 4d71612ef7a733b5ef4703de807c127a87f6336d..b104dd42bee9ea2d31e86c77bae7143bde5cc744 100644
--- a/boards/uniboard1/designs/unb1_minimal/doc/README
+++ b/boards/uniboard1/designs/unb1_minimal/doc/README
@@ -1,16 +1,11 @@
-Quick steps to compile and use design [unb1_test] in RadionHDL
---------------------------------------------------------------
+Quick steps to compile and use design [unb1_minimal] in RadionHDL
+-----------------------------------------------------------------
 
-Assuming:
--> ~/RadioHDL --symlink--> ~/svn/UniBoard_FP7/RadioHDL/
--> an empty [build] directory (~/RadioHDL/trunk/build)
--> SOPC mmm
--> Quartus v11.1
 
 
 Oneclick Commands:
-    python ~/RadioHDL/trunk/tools/oneclick/base/modelsim_config.py
-    python ~/RadioHDL/trunk/tools/oneclick/base/quartus_config.py
+    python $RADIOHDL/tools/oneclick/base/modelsim_config.py
+    python $RADIOHDL/tools/oneclick/base/quartus_config.py
 
 
 -> From here either continue to Modelsim (simulation) or Quartus (synthesis)
@@ -19,9 +14,10 @@ Modelsim instructions:
     run_modelsim
 
     # in Modelsim do:
-    lp unb1_test
+    rm $UNB/Software/python/sim/*
+    lp unb1_minimal
     mk compile all
-    # now double click on testbence file
+    # now double click on testbench file
     as 10
     run 10us
     # to end simulation:
@@ -29,25 +25,25 @@ Modelsim instructions:
 
 
 Quartus instructions (for SOPC):
-    unb2_sopc unb1_test_sopc && unb2_app unb1_test_sopc && unb2_qcomp unb1_test_sopc
+    unb2_sopc unb1_minimal_sopc && unb2_app unb1_minimal_sopc && unb2_qcomp unb1_minimal_sopc
 Quartus instructions (for QSYS):
-    unb2_qsys unb1_test_qsys && unb2_app unb1_test_qsys use=qsys && unb2_qcomp unb1_test_qsys
+    unb2_qsys unb1_minimal_qsys && unb2_app unb1_minimal_qsys use=qsys && unb2_qcomp unb1_minimal_qsys
 
 
 
 Convert .sof to .rbf:
-    cd ~/RadioHDL/trunk/build/quartus/unb1_test_sopc/
-    quartus_cpf -c --option=/tmp/temp_options_file unb1_test_sopc.sof unb1_test_sopc.rbf
+    cd $RADIOHDL/build/quartus/unb1_minimal_sopc/
+    quartus_cpf -c --option=/tmp/temp_options_file unb1_minimal_sopc.sof unb1_minimal_sopc.rbf
     # assuming in /tmp/temp_options_file: Bitstream_compression=on
 
 Send to LCU capture5:
-    scp unb1_test_sopc.rbf capture5:~/rbf/
+    scp unb1_minimal_sopc.rbf capture5:~/rbf/
     # Now login on capture5 and use pythonscripts to program flash:
     cd python/peripherals/
     python util_system_info.py --gn 0:7 -n4  # updating REGMAPs
     python util_system_info.py --gn 0:7 -n2  # Read design names to check if WDI reset to factory is necessary
     python util_epcs.py --gn 0 -n9           # reset FPGA to factory default (FN0)
-    python util_epcs.py --gn 0 -n4 -s ~/rbf/unb1_test.rbf  # program rbf file to user flash (FN0)
+    python util_epcs.py --gn 0 -n4 -s ~/rbf/unb1_minimal.rbf  # program rbf file to user flash (FN0)
     python util_epcs.py --gn 0 -n8           # load user image from flash (FN0)
     python util_system_info.py --gn 0:7 -n4  # obviously updating REGMAPs
     python util_system_info.py --gn 0:7 -n2  # Read design names
diff --git a/boards/uniboard1/designs/unb1_test/doc/README b/boards/uniboard1/designs/unb1_test/doc/README
index 9a6ba68a787dd4e6217dea1e63ebd856bd2daa95..59775a3c0cdf90035060fdf63eecb89889998ef0 100644
--- a/boards/uniboard1/designs/unb1_test/doc/README
+++ b/boards/uniboard1/designs/unb1_test/doc/README
@@ -1,16 +1,11 @@
 Quick steps to compile and use design [unb1_test] in RadionHDL
 --------------------------------------------------------------
 
-Assuming:
--> ~/RadioHDL --symlink--> ~/svn/UniBoard_FP7/RadioHDL/
--> an empty [build] directory (~/RadioHDL/trunk/build)
--> SOPC mmm
--> Quartus v11.1
 
 
 Oneclick Commands:
-    python ~/RadioHDL/trunk/tools/oneclick/base/modelsim_config.py
-    python ~/RadioHDL/trunk/tools/oneclick/base/quartus_config.py
+    python $RADIOHDL/tools/oneclick/base/modelsim_config.py
+    python $RADIOHDL/tools/oneclick/base/quartus_config.py
 
 
 -> From here either continue to Modelsim (simulation) or Quartus (synthesis)
@@ -19,6 +14,7 @@ Modelsim instructions:
     run_modelsim
 
     # in Modelsim do:
+    rm $UNB/Software/python/sim/*
     lp unb1_test
     mk compile all
     # now double click on testbence file
@@ -34,7 +30,7 @@ Quartus instructions (for QSYS):
 
 
 Convert .sof to .rbf:
-    cd ~/RadioHDL/trunk/build/quartus/unb1_test_qsys/
+    cd $RADIOHDL/build/quartus/unb1_test_qsys/
     quartus_cpf -c --option=/tmp/temp_options_file unb1_test_qsys.sof unb1_test_qsys.rbf
     # assuming in /tmp/temp_options_file: Bitstream_compression=on