diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
index 2894ca55e4d73e521d026f154b371d1808c9d0d5..e986400dac9a9f42979cc37bbadc3aad5d067ea3 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
@@ -208,7 +208,7 @@ BEGIN
-----------------------------------------------------------------------------
- -- Diagnostic Data Buffer (Records 8192 raw ADC samples after the PPS)
+ -- Diagnostic Data Buffer (Records 1024 raw ADC samples after the PPS)
-- ToDo: Remove this JESD DB when the second (BSN) data buffer is working correctly
-----------------------------------------------------------------------------
@@ -217,7 +217,7 @@ BEGIN
g_technology => g_technology,
g_nof_streams => c_nof_streams_db,
g_data_w => c_data_w,
- g_buf_nof_data => 8192,
+ g_buf_nof_data => 1024,
g_buf_use_sync => TRUE -- when TRUE start filling the buffer at the in_sync, else after the last word was read
)
PORT MAP (
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_cpu_0.ip b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_cpu_0.ip
index 02f192903f867310ca76b2381135f6a5908b15b3..adf4c447bd056ed52e13154a1f131b2fb9ffda57 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_cpu_0.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_cpu_0.ip
@@ -1018,7 +1018,7 @@
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>19</spirit:right>
+ <spirit:right>18</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -2153,7 +2153,7 @@
<spirit:parameter>
<spirit:name>dataAddrWidth</spirit:name>
<spirit:displayName>dataAddrWidth</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="dataAddrWidth">20</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="dataAddrWidth">19</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0AddrWidth</spirit:name>
@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x78000' end='0x79000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x80000' end='0x100000' datawidth='32' /></address-map>]]></spirit:value>
+ <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
@@ -2368,7 +2368,7 @@
</spirit:parameter>
<spirit:parameter>
<spirit:name>embeddedsw.CMacro.DATA_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_ADDR_WIDTH">20</spirit:value>
+ <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_ADDR_WIDTH">19</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>embeddedsw.CMacro.DCACHE_LINE_SIZE</spirit:name>
@@ -2668,7 +2668,7 @@
<name>d_address</name>
<role>address</role>
<direction>Output</direction>
- <width>20</width>
+ <width>19</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -3489,11 +3489,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x78000' end='0x79000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x80000' end='0x100000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>20</value>
+ <value>19</value>
</entry>
</suppliedSystemInfos>
<consumedSystemInfos/>
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_bsn.ip b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_bsn.ip
index 7863bc488d7967eea126cbbcf61c321454505d68..64bba120aebc09983f53f56974169e55b042879f 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_bsn.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_bsn.ip
@@ -129,7 +129,7 @@
<spirit:parameter>
<spirit:name>addressSpan</spirit:name>
<spirit:displayName>Address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressSpan">524288</spirit:value>
+ <spirit:value spirit:format="string" spirit:id="addressSpan">65536</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>addressUnits</spirit:name>
@@ -607,7 +607,7 @@
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>16</spirit:right>
+ <spirit:right>13</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -703,7 +703,7 @@
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>16</spirit:right>
+ <spirit:right>13</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -783,7 +783,7 @@
<spirit:parameter>
<spirit:name>g_adr_w</spirit:name>
<spirit:displayName>g_adr_w</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="g_adr_w">17</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="g_adr_w">14</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>g_dat_w</spirit:name>
@@ -846,7 +846,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>17</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -910,7 +910,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>17</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -979,7 +979,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>524288</value>
+ <value>65536</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -1374,11 +1374,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x80000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>19</value>
+ <value>16</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_jesd.ip b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_jesd.ip
index 306aedef9ecf52d7e65869c1ab59d01b46585498..7c0d9dab9e2f933d7fbfe87dc79f8679e946c536 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_jesd.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buf_jesd.ip
@@ -129,7 +129,7 @@
<spirit:parameter>
<spirit:name>addressSpan</spirit:name>
<spirit:displayName>Address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressSpan">65536</spirit:value>
+ <spirit:value spirit:format="string" spirit:id="addressSpan">8192</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>addressUnits</spirit:name>
@@ -607,7 +607,7 @@
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>13</spirit:right>
+ <spirit:right>10</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -703,7 +703,7 @@
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>13</spirit:right>
+ <spirit:right>10</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -783,7 +783,7 @@
<spirit:parameter>
<spirit:name>g_adr_w</spirit:name>
<spirit:displayName>g_adr_w</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="g_adr_w">14</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="g_adr_w">11</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>g_dat_w</spirit:name>
@@ -846,7 +846,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>14</width>
+ <width>11</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -910,7 +910,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>14</width>
+ <width>11</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -979,7 +979,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>65536</value>
+ <value>8192</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -1374,11 +1374,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x2000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>16</value>
+ <value>13</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/lofar2_unb2b_filterbank.sdc b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/lofar2_unb2b_filterbank.sdc
index 2be8cc5d5b093b320fe91e1b176d44ea9a28792f..a041aae6d83c1972821b3e27f333568006a8c93e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/lofar2_unb2b_filterbank.sdc
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/lofar2_unb2b_filterbank.sdc
@@ -51,6 +51,9 @@ create_clock -period 644.53125Mhz [get_ports {SA_CLK}]
create_clock -period 644.53125Mhz [get_ports {SB_CLK}]
create_clock -period 200MHz -name {BCK_REF_CLK} { BCK_REF_CLK }
+# Create altera reserved tck to solve unconstrained clock warning.
+create_clock -period "100.000 ns" -name {altera_reserved_tck} {altera_reserved_tck}
+
derive_pll_clocks
derive_clock_uncertainty
@@ -62,8 +65,10 @@ set_clock_groups -asynchronous -group {SA_CLK}
set_clock_groups -asynchronous -group {SB_CLK}
# Do not put ETH_CLK in this list, otherwise the Triple Speed Ethernet does not work
+# Altera temp sense clock
set_clock_groups -asynchronous -group [get_clocks altera_ts_clk]
+# ALtera JTAG clock
set_clock_groups -asynchronous -group [get_clocks altera_reserved_tck]
# IOPLL outputs (which have global names defined in the IP qsys settings)
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys
index 722a6dc44df6138423d786f2ae77afb0b016ba4d..ac72e12048038507d43471a2df6516f12d3f4e8a 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys
@@ -22,7 +22,7 @@
{
datum baseAddress
{
- value = "491520";
+ value = "499712";
type = "String";
}
}
@@ -218,7 +218,7 @@
{
datum baseAddress
{
- value = "524288";
+ value = "262144";
type = "String";
}
}
@@ -234,7 +234,7 @@
{
datum baseAddress
{
- value = "262144";
+ value = "491520";
type = "String";
}
}
@@ -3846,28 +3846,28 @@
<isStart>true</isStart>
<ports>
<port>
- <name>d_address</name>
- <role>address</role>
+ <name>d_write</name>
+ <role>write</role>
<direction>Output</direction>
- <width>20</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_byteenable</name>
- <role>byteenable</role>
+ <name>debug_mem_slave_debugaccess_to_roms</name>
+ <role>debugaccess</role>
<direction>Output</direction>
- <width>4</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_read</name>
- <role>read</role>
+ <name>d_byteenable</name>
+ <role>byteenable</role>
<direction>Output</direction>
- <width>1</width>
+ <width>4</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
<name>d_readdata</name>
@@ -3877,6 +3877,14 @@
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
+ <port>
+ <name>d_writedata</name>
+ <role>writedata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
<port>
<name>d_waitrequest</name>
<role>waitrequest</role>
@@ -3886,29 +3894,21 @@
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_write</name>
- <role>write</role>
+ <name>d_read</name>
+ <role>read</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_writedata</name>
- <role>writedata</role>
+ <name>d_address</name>
+ <role>address</role>
<direction>Output</direction>
- <width>32</width>
+ <width>19</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
- <port>
- <name>debug_mem_slave_debugaccess_to_roms</name>
- <role>debugaccess</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
</ports>
<assignments>
<assignmentValueMap>
@@ -4064,20 +4064,20 @@
<isStart>false</isStart>
<ports>
<port>
- <name>debug_mem_slave_address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>9</width>
+ <name>debug_mem_slave_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>debug_mem_slave_byteenable</name>
- <role>byteenable</role>
+ <name>debug_mem_slave_write</name>
+ <role>write</role>
<direction>Input</direction>
- <width>4</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
<name>debug_mem_slave_debugaccess</name>
@@ -4088,12 +4088,12 @@
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>debug_mem_slave_read</name>
- <role>read</role>
+ <name>debug_mem_slave_address</name>
+ <role>address</role>
<direction>Input</direction>
- <width>1</width>
+ <width>9</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
<name>debug_mem_slave_readdata</name>
@@ -4104,16 +4104,8 @@
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>debug_mem_slave_waitrequest</name>
- <role>waitrequest</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>debug_mem_slave_write</name>
- <role>write</role>
+ <name>debug_mem_slave_read</name>
+ <role>read</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
@@ -4127,6 +4119,14 @@
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
+ <port>
+ <name>debug_mem_slave_byteenable</name>
+ <role>byteenable</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
</ports>
<assignments>
<assignmentValueMap>
@@ -4367,12 +4367,12 @@
<isStart>true</isStart>
<ports>
<port>
- <name>i_address</name>
- <role>address</role>
- <direction>Output</direction>
- <width>18</width>
+ <name>i_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
<name>i_read</name>
@@ -4391,12 +4391,12 @@
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>i_waitrequest</name>
- <role>waitrequest</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>i_address</name>
+ <role>address</role>
+ <direction>Output</direction>
+ <width>18</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -4589,16 +4589,16 @@
<isStart>false</isStart>
<ports>
<port>
- <name>reset_n</name>
- <role>reset_n</role>
+ <name>reset_req</name>
+ <role>reset_req</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>reset_req</name>
- <role>reset_req</role>
+ <name>reset_n</name>
+ <role>reset_n</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
@@ -4938,11 +4938,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x78000' end='0x79000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x80000' end='0x100000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3200' end='0x3240' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3240' end='0x3260' datawidth='32' /><slave name='reg_epcs.mem' start='0x3260' end='0x3280' datawidth='32' /><slave name='reg_remu.mem' start='0x3280' end='0x32A0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x32A0' end='0x32B0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x32B0' end='0x32C0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x32C0' end='0x32C8' datawidth='32' /><slave name='reg_si.mem' start='0x32C8' end='0x32D0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x32D0' end='0x32D8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x32D8' end='0x32E0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x32E0' end='0x32E8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x32E8' end='0x32F0' datawidth='32' /><slave name='pio_pps.mem' start='0x32F0' end='0x32F8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x32F8' end='0x3300' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='jesd204b.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x40000' end='0x50000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x50000' end='0x60000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x70000' end='0x78000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0x78000' end='0x7A000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x7A000' end='0x7B000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>20</value>
+ <value>19</value>
</entry>
</consumedSystemInfos>
</value>
@@ -5062,7 +5062,7 @@
</entry>
<entry>
<key>embeddedsw.CMacro.DATA_ADDR_WIDTH</key>
- <value>20</value>
+ <value>19</value>
</entry>
<entry>
<key>embeddedsw.CMacro.DCACHE_LINE_SIZE</key>
@@ -9441,7 +9441,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>17</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -9505,7 +9505,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>17</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -9574,7 +9574,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>524288</value>
+ <value>65536</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -9980,11 +9980,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x80000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>19</value>
+ <value>16</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -10057,7 +10057,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>14</width>
+ <width>11</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -10121,7 +10121,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>14</width>
+ <width>11</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -10190,7 +10190,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>65536</value>
+ <value>8192</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -10596,11 +10596,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x2000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>16</value>
+ <value>13</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -28157,7 +28157,7 @@
version="18.0"
start="cpu_0.data_master"
end="ram_diag_data_buf_jesd.mem">
- <parameter name="baseAddress" value="0x00040000" />
+ <parameter name="baseAddress" value="0x00078000" />
</connection>
<connection
kind="avalon"
@@ -28185,7 +28185,7 @@
version="18.0"
start="cpu_0.data_master"
end="ram_diag_data_buf_bsn.mem">
- <parameter name="baseAddress" value="0x00080000" />
+ <parameter name="baseAddress" value="0x00040000" />
</connection>
<connection
kind="avalon"
@@ -28262,7 +28262,7 @@
version="18.0"
start="cpu_0.data_master"
end="avs_eth_0.mms_ram">
- <parameter name="baseAddress" value="0x00078000" />
+ <parameter name="baseAddress" value="0x0007a000" />
</connection>
<connection
kind="avalon"
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
index 1edcb1e64dbb4f1f529eaf31824bc72270fcb7f9..df1e10148970eba847190c58d2428dccdf0a1968 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
@@ -492,7 +492,7 @@ BEGIN
GENERIC MAP(
g_technology => g_technology,
g_nof_streams => c_sdp_S_pn,
- g_buf_nof_data => c_sdp_ait_buf_nof_data,
+ g_buf_nof_data => c_sdp_ait_buf_nof_data_bsn,
g_aduh_buffer_nof_symbols => c_sdp_ait_aduh_nof_data,
g_sim => g_sim
)
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd
index e3a16b1aee31fcf11c17cafbae5cdcb227a84067..c5d41e715e106ea1755254a189fd801d0dae509e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd
@@ -448,7 +448,7 @@ BEGIN
reg_dpmm_ctrl_reset_export => OPEN,
reg_dpmm_ctrl_clk_export => OPEN,
- reg_dpmm_ctrl_address_export => reg_dpmm_ctrl_mosi.address(c_sdp_reg_dpmm_ctrl_addr_w-1 DOWNTO 0),
+ reg_dpmm_ctrl_address_export => reg_dpmm_ctrl_mosi.address(0 DOWNTO 0),
reg_dpmm_ctrl_write_export => reg_dpmm_ctrl_mosi.wr,
reg_dpmm_ctrl_writedata_export => reg_dpmm_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_dpmm_ctrl_read_export => reg_dpmm_ctrl_mosi.rd,
@@ -456,7 +456,7 @@ BEGIN
reg_mmdp_data_reset_export => OPEN,
reg_mmdp_data_clk_export => OPEN,
- reg_mmdp_data_address_export => reg_mmdp_data_mosi.address(c_sdp_reg_mmdp_data_addr_w-1 DOWNTO 0),
+ reg_mmdp_data_address_export => reg_mmdp_data_mosi.address(0 DOWNTO 0),
reg_mmdp_data_write_export => reg_mmdp_data_mosi.wr,
reg_mmdp_data_writedata_export => reg_mmdp_data_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_mmdp_data_read_export => reg_mmdp_data_mosi.rd,
@@ -464,7 +464,7 @@ BEGIN
reg_dpmm_data_reset_export => OPEN,
reg_dpmm_data_clk_export => OPEN,
- reg_dpmm_data_address_export => reg_dpmm_data_mosi.address(c_sdp_reg_dpmm_data_addr_w-1 DOWNTO 0),
+ reg_dpmm_data_address_export => reg_dpmm_data_mosi.address(0 DOWNTO 0),
reg_dpmm_data_read_export => reg_dpmm_data_mosi.rd,
reg_dpmm_data_readdata_export => reg_dpmm_data_miso.rddata(c_word_w-1 DOWNTO 0),
reg_dpmm_data_write_export => reg_dpmm_data_mosi.wr,
@@ -472,7 +472,7 @@ BEGIN
reg_mmdp_ctrl_reset_export => OPEN,
reg_mmdp_ctrl_clk_export => OPEN,
- reg_mmdp_ctrl_address_export => reg_mmdp_ctrl_mosi.address(c_sdp_reg_mmdp_ctrl_addr_w-1 DOWNTO 0),
+ reg_mmdp_ctrl_address_export => reg_mmdp_ctrl_mosi.address(0 DOWNTO 0),
reg_mmdp_ctrl_read_export => reg_mmdp_ctrl_mosi.rd,
reg_mmdp_ctrl_readdata_export => reg_mmdp_ctrl_miso.rddata(c_word_w-1 DOWNTO 0),
reg_mmdp_ctrl_write_export => reg_mmdp_ctrl_mosi.wr,
@@ -511,14 +511,6 @@ BEGIN
reg_diag_data_buf_jesd_read_export => reg_diag_data_buf_jesd_mosi.rd,
reg_diag_data_buf_jesd_readdata_export => reg_diag_data_buf_jesd_miso.rddata(c_word_w-1 DOWNTO 0),
- ram_aduh_monitor_clk_export => OPEN,
- ram_aduh_monitor_reset_export => OPEN,
- ram_aduh_monitor_address_export => ram_aduh_monitor_mosi.address(c_sdp_ram_aduh_monitor_addr_w-1 DOWNTO 0),
- ram_aduh_monitor_write_export => ram_aduh_monitor_mosi.wr,
- ram_aduh_monitor_writedata_export => ram_aduh_monitor_mosi.wrdata(c_word_w-1 DOWNTO 0),
- ram_aduh_monitor_read_export => ram_aduh_monitor_mosi.rd,
- ram_aduh_monitor_readdata_export => ram_aduh_monitor_miso.rddata(c_word_w-1 DOWNTO 0),
-
reg_aduh_monitor_reset_export => OPEN,
reg_aduh_monitor_clk_export => OPEN,
reg_aduh_monitor_address_export => reg_aduh_monitor_mosi.address(c_sdp_reg_aduh_monitor_addr_w-1 DOWNTO 0),
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index ffba024093705f1025152309d113229dd0d78c0d..4e0cc116a87811c17157cfcd3ae35b18ad677223 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -56,8 +56,8 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_W_sub_magnitude : NATURAL := 2;
CONSTANT c_sdp_W_sub_fraction : NATURAL := c_sdp_W_sub_weight - c_sdp_W_sub_magnitude -1;
- CONSTANT c_sdp_ait_buf_nof_data : NATURAL := 8192;
- CONSTANT c_sdp_ait_aduh_nof_data : NATURAL := 512;
+ CONSTANT c_sdp_ait_buf_nof_data_jesd : NATURAL := 1024; -- 1024 14 bit samples fit in one M20k BRAM
+ CONSTANT c_sdp_ait_buf_nof_data_bsn : NATURAL := 1024; -- 1024 14 bit samples fit in one M20k BRAM
-- In SDP c_nof_channels = 2**nof_chan = 1 and wb_factor = 1,
-- therefore these parameters are not explicitly used in calculation of derived constants
@@ -77,15 +77,10 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_reg_dp_shiftram_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
CONSTANT c_sdp_reg_bsn_source_addr_w : NATURAL := 2;
CONSTANT c_sdp_reg_bsn_scheduler_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_dpmm_data_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_dpmm_ctrl_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_mmdp_data_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_mmdp_ctrl_addr_w : NATURAL := 1;
- CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_ait_buf_nof_data);
- CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_ram_diag_data_buf_jesd_addr_w : NATURAL := ceil_log2(2*c_sdp_ait_buf_nof_data);
+ CONSTANT c_sdp_ram_diag_data_buf_jesd_addr_w : NATURAL := ceil_log2(2*c_sdp_ait_buf_nof_data_jesd);
CONSTANT c_sdp_reg_diag_data_buf_jesd_addr_w : NATURAL := 1 + ceil_log2(2);
- CONSTANT c_sdp_ram_aduh_monitor_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_ait_aduh_nof_data);
+ CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_ait_buf_nof_data_bsn);
+ CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
CONSTANT c_sdp_reg_aduh_monitor_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
-- FSUB MM address widths