diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
index fef218d6e984b94479031226f7bfefbd3fc0b6b0..8b5129a2b8e78b28ab7b7d3045ec87b3b390da04 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
@@ -18,534 +18,768 @@ number_of_columns = 13
# col 12: mm_peripheral_span (in MM words), if - then the span is not used or already defined on first line of MM port
# col 13: mm_port_span (in MM words), if - then the span is not used or already defined on first line of MM port
#
-# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
-# ---------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
- ROM_SYSTEM_INFO 1 1 RAM data 0x00000000 32768 RO char8 b[31:0] b[7:0] - -
- PIO_SYSTEM_INFO 1 1 REG info 0x00008000 1 RO uint32 b[31:0] - - -
- - - - - info_gn_index 0x00008000 1 RO uint32 b[7:0] - - -
- - - - - info_hw_version 0x00008000 1 RO uint32 b[9:8] - - -
- - - - - info_cs_sim 0x00008000 1 RO uint32 b[10:10] - - -
- - - - - info_fw_version_major 0x00008000 1 RO uint32 b[19:16] - - -
- - - - - info_fw_version_minor 0x00008000 1 RO uint32 b[23:20] - - -
- - - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] - - -
- - - - - info_technology 0x00008000 1 RO uint32 b[31:27] - - -
- - - - - use_phy 0x00008001 1 RO uint32 b[7:0] - - -
- - - - - design_name 0x00008002 52 RO char8 b[31:0] b[7:0] - -
- - - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] - - -
- - - - - stamp_time 0x00008010 1 RO uint32 b[31:0] - - -
- - - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] - - -
- - - - - design_note 0x00008014 52 RO char8 b[31:0] b[7:0] - -
- REG_WDI 1 1 REG wdi_override 0x0000a000 1 WO uint32 b[31:0] - - -
- REG_FPGA_TEMP_SENS 1 1 REG temp 0x0000c000 1 RO uint32 b[31:0] - - -
- REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0000c000 6 RO uint32 b[31:0] - - -
- RAM_SCRAP 1 1 RAM data 0x0000e000 512 RW uint32 b[31:0] - - -
- AVS_ETH_0_TSE 1 1 REG status 0x00010000 1024 RO uint32 b[31:0] - - -
- AVS_ETH_0_REG 1 1 REG status 0x00010000 12 RO uint32 b[31:0] - - -
- AVS_ETH_0_RAM 1 1 RAM data 0x00010400 1024 RW uint32 b[31:0] - - -
- PIO_PPS 1 1 REG capture_cnt 0x00012000 1 RO uint32 b[29:0] - - -
- - - - - stable 0x00012000 1 RO uint32 b[30:30] - - -
- - - - - toggle 0x00012000 1 RO uint32 b[31:31] - - -
- - - - - expected_cnt 0x00012001 1 RW uint32 b[27:0] - - -
- - - - - edge 0x00012001 1 RW uint32 b[31:31] - - -
- - - - - offset_cnt 0x00012002 1 RO uint32 b[27:0] - - -
- REG_EPCS 1 1 REG addr 0x00014000 1 WO uint32 b[23:0] - - -
- - - - - rden 0x00014001 1 WO uint32 b[0:0] - - -
- - - - - read_bit 0x00014002 1 WO uint32 b[0:0] - - -
- - - - - write_bit 0x00014003 1 WO uint32 b[0:0] - - -
- - - - - sector_erase 0x00014004 1 WO uint32 b[0:0] - - -
- - - - - busy 0x00014005 1 RO uint32 b[0:0] - - -
- - - - - unprotect 0x00014006 1 WO uint32 b[31:0] - - -
- REG_DPMM_CTRL 1 1 REG rd_usedw 0x00016000 1 RO uint32 b[31:0] - - -
- REG_DPMM_DATA 1 1 FIFO data 0x00016400 1 RO uint32 b[31:0] - - -
- REG_MMDP_CTRL 1 1 REG wr_usedw 0x00018000 1 RO uint32 b[31:0] - - -
- - - - - wr_availw 0x00018001 1 RO uint32 b[31:0] - - -
- REG_MMDP_DATA 1 1 FIFO data 0x00018400 1 WO uint32 b[31:0] - - -
- REG_REMU 1 1 REG reconfigure 0x0001a000 1 WO uint32 b[31:0] - - -
- - - - - param 0x0001a001 1 WO uint32 b[2:0] - - -
- - - - - read_param 0x0001a002 1 WO uint32 b[0:0] - - -
- - - - - write_param 0x0001a003 1 WO uint32 b[0:0] - - -
- - - - - data_out 0x0001a004 1 RO uint32 b[23:0] - - -
- - - - - data_in 0x0001a005 1 WO uint32 b[23:0] - - -
- - - - - busy 0x0001a006 1 RO uint32 b[0:0] - - -
- REG_SDP_INFO 1 1 REG block_period 0x0001c000 1 RO uint32 b[15:0] - - -
- - - - - n_rn 0x0001c001 1 RW uint32 b[7:0] - - -
- - - - - o_rn 0x0001c002 1 RW uint32 b[7:0] - - -
- - - - - n_si 0x0001c003 1 RW uint32 b[7:0] - - -
- - - - - o_si 0x0001c004 1 RW uint32 b[7:0] - - -
- - - - - beam_repositioning_flag 0x0001c005 1 RW uint32 b[0:0] - - -
- - - - - fsub_type 0x0001c006 1 RO uint32 b[0:0] - - -
- - - - - f_adc 0x0001c007 1 RO uint32 b[0:0] - - -
- - - - - nyquist_zone_index 0x0001c008 1 RW uint32 b[1:0] - - -
- - - - - observation_id 0x0001c009 1 RW uint32 b[31:0] - - -
- - - - - antenna_band_index 0x0001c00a 1 RO uint32 b[0:0] - - -
- - - - - station_id 0x0001c00b 1 RW uint32 b[15:0] - - -
- PIO_JESD_CTRL 1 1 REG enable 0x0001e000 1 RW uint32 b[30:0] - - -
- - - - - reset 0x0001e000 1 RW uint32 b[31:31] - - -
- JESD204B 1 12 REG rx_lane_ctrl_common 0x00020000 1 RW uint32 b[2:0] - - 256
- - - - - rx_lane_ctrl_0 0x00020001 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_1 0x00020002 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_2 0x00020003 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_3 0x00020004 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_4 0x00020005 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_5 0x00020006 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_6 0x00020007 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_7 0x00020008 1 RW uint32 b[2:0] - - -
- - - - - rx_dll_ctrl 0x00020014 1 RW uint32 b[16:0] - - -
- - - - - rx_syncn_sysref_ctrl 0x00020015 1 RW uint32 b[24:0] - - -
- - - - - rx_csr_sysref_always_on 0x00020015 1 RW uint32 b[1:1] - - -
- - - - - rx_csr_rbd_offset 0x00020015 1 RW uint32 b[10:3] - - -
- - - - - rx_csr_lmfc_offset 0x00020015 1 RW uint32 b[19:12] - - -
- - - - - rx_err0 0x00020018 1 RW uint32 b[8:0] - - -
- - - - - rx_err1 0x00020019 1 RW uint32 b[9:0] - - -
- - - - - csr_dev_syncn 0x00020020 1 RO uint32 b[0:0] - - -
- - - - - csr_rbd_count 0x00020020 1 RO uint32 b[10:3] - - -
- - - - - rx_status1 0x00020021 1 RW uint32 b[23:0] - - -
- - - - - rx_status2 0x00020022 1 RW uint32 b[23:0] - - -
- - - - - rx_status3 0x00020023 1 RW uint32 b[7:0] - - -
- - - - - rx_ilas_csr_l 0x00020025 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_f 0x00020025 1 RW uint32 b[15:8] - - -
- - - - - rx_ilas_csr_k 0x00020025 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_m 0x00020025 1 RW uint32 b[31:24] - - -
- - - - - rx_ilas_csr_n 0x00020026 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_cs 0x00020026 1 RW uint32 b[7:6] - - -
- - - - - rx_ilas_csr_np 0x00020026 1 RW uint32 b[12:8] - - -
- - - - - rx_ilas_csr_subclassv 0x00020026 1 RW uint32 b[15:13] - - -
- - - - - rx_ilas_csr_s 0x00020026 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_jesdv 0x00020026 1 RW uint32 b[23:21] - - -
- - - - - rx_ilas_csr_cf 0x00020026 1 RW uint32 b[28:24] - - -
- - - - - rx_ilas_csr_hd 0x00020026 1 RW uint32 b[31:31] - - -
- - - - - rx_status4 0x0002003c 1 RW uint32 b[15:0] - - -
- - - - - rx_status5 0x0002003d 1 RW uint32 b[15:0] - - -
- - - - - rx_status6 0x0002003e 1 RW uint32 b[23:0] - - -
- - - - - rx_status7 0x0002003f 1 RO uint32 b[31:0] - - -
- REG_DP_SHIFTRAM 1 12 REG shift 0x00022000 1 RW uint32 b[11:0] - - 2
- REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00024000 1 RW uint32 b[0:0] - - -
- - - - - dp_on_pps 0x00024000 1 RW uint32 b[1:1] - - -
- - - - - nof_clk_per_sync 0x00024001 1 RW uint32 b[31:0] - - -
- - - - - bsn_init 0x00024002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00024003 - - - b[31:0] b[63:32] - -
- - - - - bsn_time_offset 0x00024004 1 RW uint32 b[9:0] - - -
- REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00026000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00026001 - - - b[31:0] b[63:32] - -
- REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00028000 1 RO uint32 b[0:0] - - -
- - - - - ready_stable 0x00028000 1 RO uint32 b[1:1] - - -
- - - - - sync_timeout 0x00028000 1 RO uint32 b[2:2] - - -
- - - - - bsn_at_sync 0x00028001 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00028002 - - - b[31:0] b[63:32] - -
- - - - - nof_sop 0x00028003 1 RO uint32 b[31:0] - - -
- - - - - nof_valid 0x00028004 1 RO uint32 b[31:0] - - -
- - - - - nof_err 0x00028005 1 RO uint32 b[31:0] - - -
- - - - - bsn_first 0x00028006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00028007 - - - b[31:0] b[63:32] - -
- - - - - bsn_first_cycle_cnt 0x00028008 1 RO uint32 b[31:0] - - -
- REG_WG 1 12 REG mode 0x0002a000 1 RW uint32 b[7:0] - - 4
- - - - - nof_samples 0x0002a000 1 RW uint32 b[31:16] - - -
- - - - - phase 0x0002a001 1 RW uint32 b[15:0] - - -
- - - - - freq 0x0002a002 1 RW uint32 b[30:0] - - -
- - - - - ampl 0x0002a003 1 RW uint32 b[16:0] - - -
- RAM_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - - 1024
- RAM_ST_HISTOGRAM 1 12 RAM data 0x00030000 512 RW uint32 b[31:0] b[27:0] - 512
- REG_ADUH_MONITOR 1 12 REG mean_sum 0x00032000 1 RO int64 b[31:0] b[31:0] - 4
- - - - - - 0x00032001 - - - b[31:0] b[63:32] - -
- - - - - power_sum 0x00032002 1 RO int64 b[31:0] b[31:0] - -
- - - - - - 0x00032003 - - - b[31:0] b[63:32] - -
- REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00034000 1 RO uint32 b[31:0] - - 2
- - - - - word_cnt 0x00034001 1 RO uint32 b[31:0] - - -
- RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00038000 1024 RW uint32 b[31:0] b[15:0] - 1024
- REG_SI 1 1 REG enable 0x0003c000 1 RW uint32 b[0:0] - - -
- RAM_FIL_COEFS 1 16 RAM data 0x00040000 1024 RW uint32 b[15:0] - - 1024
- RAM_EQUALIZER_GAINS 1 6 RAM data 0x00044000 1024 RW cint16_ir b[31:0] - - 1024
- REG_DP_SELECTOR 1 1 REG input_select 0x00046000 1 RW uint32 b[0:0] - - -
- RAM_ST_SST 1 6 RAM data 0x00048000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - - 0x00048001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_SST 1 1 REG enable 0x0004c000 1 RW uint32 b[0:0] - - -
- REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x0004e000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0004e001 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x0004e002 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_statistics_per_packet 0x0004e003 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_bytes_per_statistic 0x0004e004 1 RW uint32 b[7:0] - - -
- - - - - sdp_nof_signal_inputs 0x0004e005 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x0004e006 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_sst_signal_input_index 0x0004e006 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id_sst_reserved 0x0004e006 1 RW uint32 b[31:8] - - -
- - - - - sdp_integration_interval 0x0004e007 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x0004e008 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x0004e009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0004e00a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0004e00b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0004e00c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0004e00d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0004e00e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0004e00f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0004e010 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x0004e011 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x0004e012 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x0004e013 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x0004e014 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x0004e015 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x0004e016 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x0004e017 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x0004e018 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x0004e019 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0004e01a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0004e01b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0004e01c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0004e01d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0004e01e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0004e01f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0004e020 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x0004e021 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x0004e022 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x0004e023 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x0004e024 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x0004e025 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x0004e026 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x0004e027 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0004e028 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x0004e029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0004e02a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x0004e02b 1 RW uint32 b[15:0] - - -
- REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x00050000 1 RW uint32 b[0:0] - - -
- - - - - ctrl_interval_size 0x00050001 1 RW uint32 b[30:0] - - -
- - - - - ctrl_start_bsn 0x00050002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00050003 - - - b[31:0] b[63:32] - -
- - - - - mon_current_input_bsn 0x00050004 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00050005 - - - b[31:0] b[63:32] - -
- - - - - mon_input_bsn_at_sync 0x00050006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00050007 - - - b[31:0] b[63:32] - -
- - - - - mon_output_enable 0x00050008 1 RO uint32 b[0:0] - - -
- - - - - mon_output_sync_bsn 0x00050009 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0005000a - - - b[31:0] b[63:32] - -
- - - - - block_size 0x0005000b 1 RO uint32 b[31:0] - - -
- RAM_ST_XSQ 1 9 RAM data 0x00060000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
- - - - - - 0x00060001 - - - b[31:0] b[63:32] - -
- - - - - - 0x00060002 - - - b[31:0] b[95:64] - -
- - - - - - 0x00060003 - - - b[31:0] b[127:96] - -
- REG_CROSSLETS_INFO 1 1 REG offset 0x00070000 15 RW uint32 b[31:0] - - -
- - - - - step 0x0007000f 1 RW uint32 b[31:0] - - -
- REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00072000 1 RW uint32 b[31:0] - - -
- - - - - unused 0x00072001 1 RW uint32 b[31:0] - - -
- REG_STAT_ENABLE_XST 1 1 REG enable 0x00074000 1 RW uint32 b[0:0] - - -
- REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00076000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00076001 - - - b[31:0] b[63:32] - -
- - - - - block_period 0x00076002 1 RW uint32 b[15:0] - - -
- - - - - nof_statistics_per_packet 0x00076003 1 RW uint32 b[15:0] - - -
- - - - - nof_bytes_per_statistic 0x00076004 1 RW uint32 b[7:0] - - -
- - - - - nof_signal_inputs 0x00076005 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x00076006 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_xst_signal_input_b_index 0x00076006 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id_xst_signal_input_a_index 0x00076006 1 RW uint32 b[15:8] - - -
- - - - - sdp_data_id_xst_subband_index 0x00076006 1 RW uint32 b[24:16] - - -
- - - - - sdp_data_id_xst_reserved 0x00076006 1 RW uint32 b[31:25] - - -
- - - - - sdp_integration_interval 0x00076007 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x00076008 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x00076009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0007600a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0007600b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0007600c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0007600d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0007600e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0007600f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x00076010 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00076011 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00076012 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00076013 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00076014 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00076015 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00076016 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00076017 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00076018 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00076019 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0007601a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0007601b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0007601c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0007601d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0007601e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0007601f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x00076020 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x00076021 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x00076022 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x00076023 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x00076024 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x00076025 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x00076026 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x00076027 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00076028 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x00076029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0007602a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x0007602b 1 RW uint32 b[15:0] - - -
- RAM_SS_SS_WIDE 2 6 RAM data 0x00078000 976 RW uint32 b[9:0] - 8192 1024
- RAM_BF_WEIGHTS 2 12 RAM data 0x0007c000 976 RW cint16_ir b[31:0] - 16384 1024
- REG_BF_SCALE 2 1 REG scale 0x00084000 1 RW uint32 b[15:0] - 2 2
- - - - - unused 0x00084001 1 RW uint32 b[31:0] - - -
- REG_HDR_DAT 2 1 REG bsn 0x00086000 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x00086001 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x00086002 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_beamlets_per_block 0x00086003 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_blocks_per_packet 0x00086004 1 RW uint32 b[7:0] - - -
- - - - - sdp_beamlet_index 0x00086005 1 RW uint32 b[15:0] - - -
- - - - - sdp_beamlet_scale 0x00086006 1 RW uint32 b[15:0] - - -
- - - - - sdp_reserved 0x00086007 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00086008 - - - b[7:0] b[39:32] - -
- - - - - sdp_source_info_gn_index 0x00086009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_beamlet_width 0x0008600a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_repositioning_flag 0x0008600b 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0008600c 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0008600d 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0008600e 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0008600f 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00086010 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00086011 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00086012 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00086013 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00086014 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00086015 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00086016 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00086017 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00086018 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x00086019 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0008601a 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0008601b 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0008601c 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0008601d 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0008601e 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0008601f 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x00086020 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x00086021 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x00086022 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x00086023 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x00086024 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x00086025 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x00086026 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00086027 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x00086028 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00086029 - - - b[15:0] b[47:32] - -
- REG_DP_XONOFF 2 1 REG enable_stream 0x00088000 1 RW uint32 b[0:0] - 2 2
- RAM_ST_BST 2 1 RAM data 0x0008a000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - - 0x0008a001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_BST 2 1 REG enable 0x0008c000 1 RW uint32 b[0:0] - 2 2
- REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x0008e000 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x0008e001 - - - b[31:0] b[63:32] - -
- - - - - block_period 0x0008e002 1 RW uint32 b[15:0] - - -
- - - - - nof_statistics_per_packet 0x0008e003 1 RW uint32 b[15:0] - - -
- - - - - nof_bytes_per_statistic 0x0008e004 1 RW uint32 b[7:0] - - -
- - - - - nof_signal_inputs 0x0008e005 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x0008e006 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_bst_beamlet_index 0x0008e006 1 RW uint32 b[15:0] - - -
- - - - - sdp_data_id_bst_reserved 0x0008e006 1 RW uint32 b[31:16] - - -
- - - - - sdp_integration_interval 0x0008e007 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x0008e008 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x0008e009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0008e00a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0008e00b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0008e00c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0008e00d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0008e00e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0008e00f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0008e010 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x0008e011 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x0008e012 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x0008e013 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x0008e014 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x0008e015 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x0008e016 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x0008e017 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x0008e018 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x0008e019 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0008e01a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0008e01b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0008e01c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0008e01d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0008e01e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0008e01f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0008e020 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x0008e021 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x0008e022 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x0008e023 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x0008e024 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x0008e025 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x0008e026 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x0008e027 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0008e028 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x0008e029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0008e02a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x0008e02b 1 RW uint32 b[15:0] - - -
- REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00090000 1 RW uint32 b[0:0] - - -
- - - - - rx_transfer_status 0x00090001 1 RO uint32 b[0:0] - - -
- - - - - tx_transfer_control 0x00090002 1 RW uint32 b[0:0] - - -
- - - - - rx_padcrc_control 0x00090040 1 RW uint32 b[1:0] - - -
- - - - - rx_crccheck_control 0x00090080 1 RW uint32 b[1:0] - - -
- - - - - rx_pktovrflow_error 0x000900c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000900c1 - - - b[31:0] b[31:0] - -
- - - - - rx_pktovrflow_etherstatsdropevents 0x000900c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000900c3 - - - b[31:0] b[31:0] - -
- - - - - rx_lane_decoder_preamble_control 0x00090100 1 RW uint32 b[0:0] - - -
- - - - - rx_preamble_inserter_control 0x00090140 1 RW uint32 b[0:0] - - -
- - - - - rx_frame_control 0x00090800 1 RW uint32 b[19:0] - - -
- - - - - rx_frame_maxlength 0x00090801 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr0 0x00090802 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr1 0x00090803 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_0 0x00090804 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_1 0x00090805 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_0 0x00090806 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_1 0x00090807 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_0 0x00090808 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_1 0x00090809 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_0 0x0009080a 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_1 0x0009080b 1 RW uint32 b[15:0] - - -
- - - - - rx_pfc_control 0x00090818 1 RW uint32 b[16:0] - - -
- - - - - rx_stats_clr 0x00090c00 1 RW uint32 b[0:0] - - -
- - - - - rx_stats_framesok 0x00090c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c03 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_frameserr 0x00090c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c05 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_framescrcerr 0x00090c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c07 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_octetsok 0x00090c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c09 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pausemacctrl_frames 0x00090c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c0b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_iferrors 0x00090c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c0d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_framesok 0x00090c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c0f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_frameserr 0x00090c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c11 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastframesok 0x00090c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c13 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicast_frameserr 0x00090c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c15 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastframesok 0x00090c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c17 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcast_frameserr 0x00090c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c19 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatsoctets 0x00090c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c1b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatspkts 0x00090c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c1d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_undersizepkts 0x00090c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c1f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_oversizepkts 0x00090c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c21 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts64octets 0x00090c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c23 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts65to127octets 0x00090c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c25 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts128to255octets 0x00090c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c27 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts256to511octets 0x00090c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c29 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts512to1023octets 0x00090c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c2b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstat_pkts1024to1518octets 0x00090c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c2d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts1519toxoctets 0x00090c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c2f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_fragments 0x00090c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c31 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_jabbers 0x00090c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c33 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatscrcerr 0x00090c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c35 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicastmacctrlframes 0x00090c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c37 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastmac_ctrlframes 0x00090c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c39 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastmac_ctrlframes 0x00090c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c3b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pfcmacctrlframes 0x00090c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00090c3d - - - b[31:0] b[31:0] - -
- - - - - tx_transfer_status 0x00091001 1 RO uint32 b[0:0] - - -
- - - - - tx_padins_control 0x00091040 1 RW uint32 b[0:0] - - -
- - - - - tx_crcins_control 0x00091080 1 RW uint32 b[1:0] - - -
- - - - - tx_pktunderflow_error 0x000910c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000910c1 - - - b[31:0] b[31:0] - -
- - - - - tx_preamble_control 0x00091100 1 RW uint32 b[0:0] - - -
- - - - - tx_pauseframe_control 0x00091140 1 RW uint32 b[1:0] - - -
- - - - - tx_pauseframe_quanta 0x00091141 1 RW uint32 b[15:0] - - -
- - - - - tx_pauseframe_enable 0x00091142 1 RW uint32 b[0:0] - - -
- - - - - pfc_pause_quanta_0 0x00091180 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_1 0x00091181 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_2 0x00091182 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_3 0x00091183 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_4 0x00091184 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_5 0x00091185 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_6 0x00091186 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_7 0x00091187 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_0 0x00091190 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_1 0x00091191 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_2 0x00091192 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_3 0x00091193 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_4 0x00091194 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_5 0x00091195 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_6 0x00091196 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_7 0x00091197 1 RW uint32 b[31:0] - - -
- - - - - tx_pfc_priority_enable 0x000911a0 1 RW uint32 b[7:0] - - -
- - - - - tx_addrins_control 0x00091200 1 RW uint32 b[0:0] - - -
- - - - - tx_addrins_macaddr0 0x00091201 1 RW uint32 b[31:0] - - -
- - - - - tx_addrins_macaddr1 0x00091202 1 RW uint32 b[15:0] - - -
- - - - - tx_frame_maxlength 0x00091801 1 RW uint32 b[15:0] - - -
- - - - - tx_stats_clr 0x00091c00 1 RW uint32 b[0:0] - - -
- - - - - tx_stats_framesok 0x00091c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c03 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_frameserr 0x00091c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c05 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_framescrcerr 0x00091c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c07 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_octetsok 0x00091c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c09 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pausemacctrl_frames 0x00091c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c0b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_iferrors 0x00091c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c0d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_framesok 0x00091c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c0f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_frameserr 0x00091c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c11 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastframesok 0x00091c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c13 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicast_frameserr 0x00091c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c15 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastframesok 0x00091c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c17 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcast_frameserr 0x00091c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c19 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatsoctets 0x00091c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c1b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatspkts 0x00091c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c1d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_undersizepkts 0x00091c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c1f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_oversizepkts 0x00091c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c21 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts64octets 0x00091c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c23 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts65to127octets 0x00091c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c25 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts128to255octets 0x00091c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c27 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts256to511octets 0x00091c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c29 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts512to1023octets 0x00091c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c2b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstat_pkts1024to1518octets 0x00091c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c2d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts1519toxoctets 0x00091c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c2f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_fragments 0x00091c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c31 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_jabbers 0x00091c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c33 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatscrcerr 0x00091c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c35 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicastmacctrlframes 0x00091c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c37 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastmac_ctrlframes 0x00091c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c39 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastmac_ctrlframes 0x00091c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c3b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pfcmacctrlframes 0x00091c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00091c3d - - - b[31:0] b[31:0] - -
- REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00092000 1 RO uint32 b[0:0] - - -
- - - - - xgmii_tx_ready 0x00092000 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x00092000 1 RO uint32 b[3:2] - - -
\ No newline at end of file
+# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
+# ---------------------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
+ ROM_SYSTEM_INFO 1 1 RAM data 0x00000000 32768 RO char8 b[31:0] b[7:0] - -
+ PIO_SYSTEM_INFO 1 1 REG info 0x00008000 1 RO uint32 b[31:0] - - -
+ - - - - info_gn_index 0x00008000 1 RO uint32 b[7:0] - - -
+ - - - - info_hw_version 0x00008000 1 RO uint32 b[9:8] - - -
+ - - - - info_cs_sim 0x00008000 1 RO uint32 b[10:10] - - -
+ - - - - info_fw_version_major 0x00008000 1 RO uint32 b[19:16] - - -
+ - - - - info_fw_version_minor 0x00008000 1 RO uint32 b[23:20] - - -
+ - - - - info_rom_version 0x00008000 1 RO uint32 b[26:24] - - -
+ - - - - info_technology 0x00008000 1 RO uint32 b[31:27] - - -
+ - - - - use_phy 0x00008001 1 RO uint32 b[7:0] - - -
+ - - - - design_name 0x00008002 52 RO char8 b[31:0] b[7:0] - -
+ - - - - stamp_date 0x0000800f 1 RO uint32 b[31:0] - - -
+ - - - - stamp_time 0x00008010 1 RO uint32 b[31:0] - - -
+ - - - - stamp_commit 0x00008011 3 RO uint32 b[31:0] - - -
+ - - - - design_note 0x00008014 52 RO char8 b[31:0] b[7:0] - -
+ REG_WDI 1 1 REG wdi_override 0x00010000 1 WO uint32 b[31:0] - - -
+ REG_FPGA_TEMP_SENS 1 1 REG temp 0x00018000 1 RO uint32 b[31:0] - - -
+ REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00018000 6 RO uint32 b[31:0] - - -
+ RAM_SCRAP 1 1 RAM data 0x00020000 512 RW uint32 b[31:0] - - -
+ AVS_ETH_0_TSE 1 1 REG status 0x00028000 1024 RO uint32 b[31:0] - - -
+ AVS_ETH_0_REG 1 1 REG status 0x00028000 12 RO uint32 b[31:0] - - -
+ AVS_ETH_0_RAM 1 1 RAM data 0x00028400 1024 RW uint32 b[31:0] - - -
+ PIO_PPS 1 1 REG capture_cnt 0x00030000 1 RO uint32 b[29:0] - - -
+ - - - - stable 0x00030000 1 RO uint32 b[30:30] - - -
+ - - - - toggle 0x00030000 1 RO uint32 b[31:31] - - -
+ - - - - expected_cnt 0x00030001 1 RW uint32 b[27:0] - - -
+ - - - - edge 0x00030001 1 RW uint32 b[31:31] - - -
+ - - - - offset_cnt 0x00030002 1 RO uint32 b[27:0] - - -
+ REG_EPCS 1 1 REG addr 0x00038000 1 WO uint32 b[23:0] - - -
+ - - - - rden 0x00038001 1 WO uint32 b[0:0] - - -
+ - - - - read_bit 0x00038002 1 WO uint32 b[0:0] - - -
+ - - - - write_bit 0x00038003 1 WO uint32 b[0:0] - - -
+ - - - - sector_erase 0x00038004 1 WO uint32 b[0:0] - - -
+ - - - - busy 0x00038005 1 RO uint32 b[0:0] - - -
+ - - - - unprotect 0x00038006 1 WO uint32 b[31:0] - - -
+ REG_DPMM_CTRL 1 1 REG rd_usedw 0x00040000 1 RO uint32 b[31:0] - - -
+ REG_DPMM_DATA 1 1 FIFO data 0x00040400 1 RO uint32 b[31:0] - - -
+ REG_MMDP_CTRL 1 1 REG wr_usedw 0x00048000 1 RO uint32 b[31:0] - - -
+ - - - - wr_availw 0x00048001 1 RO uint32 b[31:0] - - -
+ REG_MMDP_DATA 1 1 FIFO data 0x00048400 1 WO uint32 b[31:0] - - -
+ REG_REMU 1 1 REG reconfigure 0x00050000 1 WO uint32 b[31:0] - - -
+ - - - - param 0x00050001 1 WO uint32 b[2:0] - - -
+ - - - - read_param 0x00050002 1 WO uint32 b[0:0] - - -
+ - - - - write_param 0x00050003 1 WO uint32 b[0:0] - - -
+ - - - - data_out 0x00050004 1 RO uint32 b[23:0] - - -
+ - - - - data_in 0x00050005 1 WO uint32 b[23:0] - - -
+ - - - - busy 0x00050006 1 RO uint32 b[0:0] - - -
+ REG_SDP_INFO 1 1 REG block_period 0x00058000 1 RO uint32 b[15:0] - - -
+ - - - - beam_repositioning_flag 0x00058001 1 RW uint32 b[0:0] - - -
+ - - - - fsub_type 0x00058002 1 RO uint32 b[0:0] - - -
+ - - - - f_adc 0x00058003 1 RO uint32 b[0:0] - - -
+ - - - - nyquist_zone_index 0x00058004 1 RW uint32 b[1:0] - - -
+ - - - - observation_id 0x00058005 1 RW uint32 b[31:0] - - -
+ - - - - antenna_band_index 0x00058006 1 RW uint32 b[0:0] - - -
+ - - - - station_id 0x00058007 1 RW uint32 b[15:0] - - -
+ REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00060000 1 RW uint32 b[0:0] - - -
+ - - - - use_cable_to_next_rn 0x00060001 1 RW uint32 b[0:0] - - -
+ - - - - n_rn 0x00060002 1 RW uint32 b[7:0] - - -
+ - - - - o_rn 0x00060003 1 RW uint32 b[7:0] - - -
+ PIO_JESD_CTRL 1 1 REG enable 0x00068000 1 RW uint32 b[30:0] - - -
+ - - - - reset 0x00068000 1 RW uint32 b[31:31] - - -
+ JESD204B 1 12 REG rx_lane_ctrl_common 0x00070000 1 RW uint32 b[2:0] - - 256
+ - - - - rx_lane_ctrl_0 0x00070001 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_1 0x00070002 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_2 0x00070003 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_3 0x00070004 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_4 0x00070005 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_5 0x00070006 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_6 0x00070007 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_7 0x00070008 1 RW uint32 b[2:0] - - -
+ - - - - rx_dll_ctrl 0x00070014 1 RW uint32 b[16:0] - - -
+ - - - - rx_syncn_sysref_ctrl 0x00070015 1 RW uint32 b[24:0] - - -
+ - - - - rx_csr_sysref_always_on 0x00070015 1 RW uint32 b[1:1] - - -
+ - - - - rx_csr_rbd_offset 0x00070015 1 RW uint32 b[10:3] - - -
+ - - - - rx_csr_lmfc_offset 0x00070015 1 RW uint32 b[19:12] - - -
+ - - - - rx_err0 0x00070018 1 RW uint32 b[8:0] - - -
+ - - - - rx_err1 0x00070019 1 RW uint32 b[9:0] - - -
+ - - - - csr_dev_syncn 0x00070020 1 RO uint32 b[0:0] - - -
+ - - - - csr_rbd_count 0x00070020 1 RO uint32 b[10:3] - - -
+ - - - - rx_status1 0x00070021 1 RW uint32 b[23:0] - - -
+ - - - - rx_status2 0x00070022 1 RW uint32 b[23:0] - - -
+ - - - - rx_status3 0x00070023 1 RW uint32 b[7:0] - - -
+ - - - - rx_ilas_csr_l 0x00070025 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_f 0x00070025 1 RW uint32 b[15:8] - - -
+ - - - - rx_ilas_csr_k 0x00070025 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_m 0x00070025 1 RW uint32 b[31:24] - - -
+ - - - - rx_ilas_csr_n 0x00070026 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_cs 0x00070026 1 RW uint32 b[7:6] - - -
+ - - - - rx_ilas_csr_np 0x00070026 1 RW uint32 b[12:8] - - -
+ - - - - rx_ilas_csr_subclassv 0x00070026 1 RW uint32 b[15:13] - - -
+ - - - - rx_ilas_csr_s 0x00070026 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_jesdv 0x00070026 1 RW uint32 b[23:21] - - -
+ - - - - rx_ilas_csr_cf 0x00070026 1 RW uint32 b[28:24] - - -
+ - - - - rx_ilas_csr_hd 0x00070026 1 RW uint32 b[31:31] - - -
+ - - - - rx_status4 0x0007003c 1 RW uint32 b[15:0] - - -
+ - - - - rx_status5 0x0007003d 1 RW uint32 b[15:0] - - -
+ - - - - rx_status6 0x0007003e 1 RW uint32 b[23:0] - - -
+ - - - - rx_status7 0x0007003f 1 RO uint32 b[31:0] - - -
+ REG_DP_SHIFTRAM 1 12 REG shift 0x00078000 1 RW uint32 b[11:0] - - 2
+ REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00080000 1 RW uint32 b[0:0] - - -
+ - - - - dp_on_pps 0x00080000 1 RW uint32 b[1:1] - - -
+ - - - - nof_clk_per_sync 0x00080001 1 RW uint32 b[31:0] - - -
+ - - - - bsn_init 0x00080002 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00080003 - - - b[31:0] b[63:32] - -
+ - - - - bsn_time_offset 0x00080004 1 RW uint32 b[9:0] - - -
+ REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00088000 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00088001 - - - b[31:0] b[63:32] - -
+ REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00090000 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x00090000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00090000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00090001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00090002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00090003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00090004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00090005 1 RO uint32 b[31:0] - - -
+ - - - - bsn_first 0x00090006 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00090007 - - - b[31:0] b[63:32] - -
+ - - - - bsn_first_cycle_cnt 0x00090008 1 RO uint32 b[31:0] - - -
+ REG_WG 1 12 REG mode 0x00098000 1 RW uint32 b[7:0] - - 4
+ - - - - nof_samples 0x00098000 1 RW uint32 b[31:16] - - -
+ - - - - phase 0x00098001 1 RW uint32 b[15:0] - - -
+ - - - - freq 0x00098002 1 RW uint32 b[30:0] - - -
+ - - - - ampl 0x00098003 1 RW uint32 b[16:0] - - -
+ RAM_WG 1 12 RAM data 0x0009c000 1024 RW uint32 b[17:0] - - 1024
+ RAM_ST_HISTOGRAM 1 12 RAM data 0x000a0000 512 RW uint32 b[31:0] b[27:0] - 512
+ REG_ADUH_MONITOR 1 12 REG mean_sum 0x000a8000 1 RO int64 b[31:0] b[31:0] - 4
+ - - - - - 0x000a8001 - - - b[31:0] b[63:32] - -
+ - - - - power_sum 0x000a8002 1 RO int64 b[31:0] b[31:0] - -
+ - - - - - 0x000a8003 - - - b[31:0] b[63:32] - -
+ REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x000b0000 1 RO uint32 b[31:0] - - 2
+ - - - - word_cnt 0x000b0001 1 RO uint32 b[31:0] - - -
+ RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x000b4000 1024 RW uint32 b[31:0] b[15:0] - 1024
+ REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[0:0] - - -
+ RAM_FIL_COEFS 1 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - - 1024
+ RAM_EQUALIZER_GAINS 1 6 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024
+ REG_DP_SELECTOR 1 1 REG input_select 0x000d0000 1 RW uint32 b[0:0] - - -
+ RAM_ST_SST 1 6 RAM data 0x000d8000 1024 RW uint64 b[31:0] b[31:0] - 2048
+ - - - - - 0x000d8001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_SST 1 1 REG enable 0x000e0000 1 RW uint32 b[0:0] - - -
+ REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x000e8000 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000e8001 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x000e8002 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_statistics_per_packet 0x000e8003 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_bytes_per_statistic 0x000e8004 1 RW uint32 b[7:0] - - -
+ - - - - sdp_nof_signal_inputs 0x000e8005 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x000e8006 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_sst_signal_input_index 0x000e8006 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id_sst_reserved 0x000e8006 1 RW uint32 b[31:8] - - -
+ - - - - sdp_integration_interval 0x000e8007 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x000e8008 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x000e8009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x000e800a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x000e800b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x000e800c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x000e800d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x000e800e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x000e800f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x000e8010 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x000e8011 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x000e8012 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x000e8013 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x000e8014 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x000e8015 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x000e8016 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x000e8017 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x000e8018 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x000e8019 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x000e801a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x000e801b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x000e801c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x000e801d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x000e801e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x000e801f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x000e8020 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x000e8021 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x000e8022 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x000e8023 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x000e8024 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x000e8025 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x000e8026 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x000e8027 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000e8028 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x000e8029 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000e802a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x000e802b 1 RW uint32 b[15:0] - - -
+ REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000f0000 1 RW uint32 b[0:0] - - -
+ - - - - ctrl_interval_size 0x000f0001 1 RW uint32 b[30:0] - - -
+ - - - - ctrl_start_bsn 0x000f0002 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000f0003 - - - b[31:0] b[63:32] - -
+ - - - - mon_current_input_bsn 0x000f0004 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000f0005 - - - b[31:0] b[63:32] - -
+ - - - - mon_input_bsn_at_sync 0x000f0006 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000f0007 - - - b[31:0] b[63:32] - -
+ - - - - mon_output_enable 0x000f0008 1 RO uint32 b[0:0] - - -
+ - - - - mon_output_sync_bsn 0x000f0009 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000f000a - - - b[31:0] b[63:32] - -
+ - - - - block_size 0x000f000b 1 RO uint32 b[31:0] - - -
+ RAM_ST_XSQ 1 9 RAM data 0x00100000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
+ - - - - - 0x00100001 - - - b[31:0] b[63:32] - -
+ - - - - - 0x00100002 - - - b[31:0] b[95:64] - -
+ - - - - - 0x00100003 - - - b[31:0] b[127:96] - -
+ REG_CROSSLETS_INFO 1 1 REG offset 0x00110000 15 RW uint32 b[31:0] - - -
+ - - - - step 0x0011000f 1 RW uint32 b[31:0] - - -
+ REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00118000 1 RW uint32 b[31:0] - - -
+ - - - - unused 0x00118001 1 RW uint32 b[31:0] - - -
+ REG_STAT_ENABLE_XST 1 1 REG enable 0x00120000 1 RW uint32 b[0:0] - - -
+ REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00128000 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00128001 - - - b[31:0] b[63:32] - -
+ - - - - block_period 0x00128002 1 RW uint32 b[15:0] - - -
+ - - - - nof_statistics_per_packet 0x00128003 1 RW uint32 b[15:0] - - -
+ - - - - nof_bytes_per_statistic 0x00128004 1 RW uint32 b[7:0] - - -
+ - - - - nof_signal_inputs 0x00128005 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x00128006 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_xst_signal_input_b_index 0x00128006 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id_xst_signal_input_a_index 0x00128006 1 RW uint32 b[15:8] - - -
+ - - - - sdp_data_id_xst_subband_index 0x00128006 1 RW uint32 b[24:16] - - -
+ - - - - sdp_data_id_xst_reserved 0x00128006 1 RW uint32 b[31:25] - - -
+ - - - - sdp_integration_interval 0x00128007 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x00128008 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x00128009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x0012800a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x0012800b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x0012800c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0012800d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0012800e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0012800f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x00128010 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00128011 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00128012 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00128013 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00128014 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00128015 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00128016 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00128017 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00128018 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00128019 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x0012801a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0012801b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0012801c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0012801d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0012801e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0012801f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x00128020 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00128021 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00128022 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00128023 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00128024 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00128025 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00128026 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00128027 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00128028 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00128029 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0012802a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x0012802b 1 RW uint32 b[15:0] - - -
+ REG_BSN_ALIGN 1 9 REG enable 0x00130000 1 RW uint32 b[0:0] - - 1
+ REG_BSN_MONITOR_V2_BSN_ALIGN_INPUT 1 9 REG xon_stable 0x00138000 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00138000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00138000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00138001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00138002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00138003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00138004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00138005 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00138008 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_BSN_ALIGN_OUTPUT 1 1 REG xon_stable 0x00140000 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x00140000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00140000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00140001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00140002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00140003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00140004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00140005 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00140008 1 RO uint32 b[31:0] - - -
+ REG_XST_UDP_MONITOR 1 1 REG xon_stable 0x00148000 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x00148000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00148000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00148001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00148002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00148003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00148004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00148005 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00148008 1 RO uint32 b[31:0] - - -
+ REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00150000 1 RO uint32 b[0:0] - - -
+ - - - - transport_nof_hops 0x00150001 1 RW uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00158000 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00158000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00158000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00158001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00158002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00158003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00158004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00158005 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00158008 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_RING_TX_XST 1 16 REG xon_stable 0x00160000 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00160000 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00160000 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00160001 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00160002 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00160003 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00160004 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00160005 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00160008 1 RO uint32 b[31:0] - - -
+ REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x00168000 8 RO uint32 b[31:0] - - -
+ - - - - total_discarded_blocks 0x00168008 1 RO uint32 b[31:0] - - -
+ - - - - total_block_count 0x00168009 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x0016800a 1 RW uint32 b[31:0] - - -
+ REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x00170000 1 RO uint32 b[31:0] - - -
+ - - - - nof_sync 0x00170001 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x00170002 1 RW uint32 b[31:0] - - -
+ REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00178000 1 RW uint32 b[0:0] - - 1
+ - - - - rx_transfer_status 0x00178001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00178002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00178040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00178080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x001780c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001780c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x001780c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001780c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00178100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00178140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00178800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00178801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00178802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00178803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00178804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00178805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00178806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00178807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00178808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00178809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0017880a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0017880b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00178818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00178c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00178c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00178c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00178c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00178c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00178c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00178c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00178c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00178c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00178c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00178c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00178c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00178c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00178c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00178c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00178c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00178c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00178c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00178c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00178c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00178c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00178c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00178c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00178c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00178c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00178c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00178c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00178c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00178c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00178c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00178c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00178c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00179001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00179040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00179080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x001790c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001790c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00179100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00179140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00179141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00179142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00179180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00179181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00179182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00179183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00179184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00179185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00179186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00179187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00179190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00179191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00179192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00179193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00179194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00179195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00179196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00179197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x001791a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00179200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00179201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00179202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00179801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00179c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00179c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00179c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00179c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00179c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00179c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00179c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00179c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00179c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00179c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00179c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00179c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00179c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00179c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00179c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00179c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00179c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00179c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00179c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00179c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00179c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00179c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00179c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00179c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00179c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00179c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00179c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00179c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00179c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00179c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00179c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00179c3d - - - b[31:0] b[31:0] - -
+ REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00180000 1 RO uint32 b[0:0] - - 1
+ - - - - xgmii_tx_ready 0x00180000 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x00180000 1 RO uint32 b[3:2] - - -
+ RAM_SS_SS_WIDE 2 6 RAM data 0x00188000 976 RW uint32 b[9:0] - 8192 1024
+ RAM_BF_WEIGHTS 2 12 RAM data 0x00190000 976 RW cint16_ir b[31:0] - 16384 1024
+ REG_BF_SCALE 2 1 REG scale 0x00198000 1 RW uint32 b[15:0] - 2 2
+ - - - - unused 0x00198001 1 RW uint32 b[31:0] - - -
+ REG_HDR_DAT 2 1 REG bsn 0x001a0000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x001a0001 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x001a0002 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_beamlets_per_block 0x001a0003 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_blocks_per_packet 0x001a0004 1 RW uint32 b[7:0] - - -
+ - - - - sdp_beamlet_index 0x001a0005 1 RW uint32 b[15:0] - - -
+ - - - - sdp_beamlet_scale 0x001a0006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_reserved 0x001a0007 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x001a0008 - - - b[7:0] b[39:32] - -
+ - - - - sdp_source_info_gn_index 0x001a0009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_beamlet_width 0x001a000a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_repositioning_flag 0x001a000b 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x001a000c 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x001a000d 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x001a000e 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x001a000f 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x001a0010 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x001a0011 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x001a0012 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x001a0013 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x001a0014 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x001a0015 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x001a0016 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x001a0017 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x001a0018 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x001a0019 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x001a001a 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x001a001b 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x001a001c 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x001a001d 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x001a001e 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x001a001f 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x001a0020 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x001a0021 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x001a0022 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x001a0023 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x001a0024 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x001a0025 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x001a0026 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x001a0027 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x001a0028 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x001a0029 - - - b[15:0] b[47:32] - -
+ REG_DP_XONOFF 2 1 REG enable_stream 0x001a8000 1 RW uint32 b[0:0] - 2 2
+ RAM_ST_BST 2 1 RAM data 0x001b0000 976 RW uint64 b[31:0] b[31:0] 2048 2048
+ - - - - - 0x001b0001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_BST 2 1 REG enable 0x001b8000 1 RW uint32 b[0:0] - 2 2
+ REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x001c0000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x001c0001 - - - b[31:0] b[63:32] - -
+ - - - - block_period 0x001c0002 1 RW uint32 b[15:0] - - -
+ - - - - nof_statistics_per_packet 0x001c0003 1 RW uint32 b[15:0] - - -
+ - - - - nof_bytes_per_statistic 0x001c0004 1 RW uint32 b[7:0] - - -
+ - - - - nof_signal_inputs 0x001c0005 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x001c0006 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_bst_beamlet_index 0x001c0006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_data_id_bst_reserved 0x001c0006 1 RW uint32 b[31:16] - - -
+ - - - - sdp_integration_interval 0x001c0007 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x001c0008 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x001c0009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x001c000a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x001c000b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x001c000c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x001c000d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x001c000e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x001c000f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x001c0010 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x001c0011 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x001c0012 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x001c0013 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x001c0014 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x001c0015 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x001c0016 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x001c0017 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x001c0018 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x001c0019 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x001c001a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x001c001b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x001c001c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x001c001d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x001c001e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x001c001f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x001c0020 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x001c0021 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x001c0022 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x001c0023 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x001c0024 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x001c0025 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x001c0026 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x001c0027 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x001c0028 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x001c0029 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x001c002a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x001c002b 1 RW uint32 b[15:0] - - -
+ REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x001c8000 1 RW uint32 b[0:0] - - -
+ - - - - rx_transfer_status 0x001c8001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x001c8002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x001c8040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x001c8080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x001c80c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c80c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x001c80c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c80c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x001c8100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x001c8140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x001c8800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x001c8801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x001c8802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x001c8803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x001c8804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x001c8805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x001c8806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x001c8807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x001c8808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x001c8809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x001c880a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x001c880b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x001c8818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x001c8c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x001c8c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x001c8c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x001c8c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x001c8c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x001c8c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x001c8c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x001c8c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x001c8c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x001c8c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x001c8c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x001c8c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x001c8c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x001c8c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x001c8c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x001c8c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x001c8c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x001c8c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x001c8c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x001c8c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x001c8c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x001c8c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x001c8c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x001c8c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x001c8c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x001c8c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x001c8c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x001c8c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x001c8c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x001c8c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x001c8c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c8c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x001c9001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x001c9040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x001c9080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x001c90c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c90c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x001c9100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x001c9140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x001c9141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x001c9142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x001c9180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x001c9181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x001c9182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x001c9183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x001c9184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x001c9185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x001c9186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x001c9187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x001c9190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x001c9191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x001c9192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x001c9193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x001c9194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x001c9195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x001c9196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x001c9197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x001c91a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x001c9200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x001c9201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x001c9202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x001c9801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x001c9c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x001c9c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x001c9c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x001c9c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x001c9c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x001c9c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x001c9c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x001c9c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x001c9c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x001c9c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x001c9c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x001c9c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x001c9c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x001c9c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x001c9c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x001c9c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x001c9c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x001c9c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x001c9c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x001c9c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x001c9c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x001c9c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x001c9c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x001c9c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x001c9c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x001c9c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x001c9c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x001c9c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x001c9c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x001c9c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x001c9c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x001c9c3d - - - b[31:0] b[31:0] - -
+ REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x001d0000 1 RO uint32 b[0:0] - - -
+ - - - - xgmii_tx_ready 0x001d0000 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x001d0000 1 RO uint32 b[3:2] - - -
\ No newline at end of file
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
index 3951ee819990f2ab21d14bd21b72cbb0978baaf3..9facafa00919f715c56a5b207d1b1cd2073d77f5 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
@@ -18,534 +18,768 @@ number_of_columns = 13
# col 12: mm_peripheral_span (in MM words), if - then the span is not used or already defined on first line of MM port
# col 13: mm_port_span (in MM words), if - then the span is not used or already defined on first line of MM port
#
-# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
-# ---------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
- ROM_SYSTEM_INFO 1 1 RAM data 0x00004000 32768 RO char8 b[31:0] b[7:0] - -
- PIO_SYSTEM_INFO 1 1 REG info 0x00000000 1 RO uint32 b[31:0] - - -
- - - - - info_gn_index 0x00000000 1 RO uint32 b[7:0] - - -
- - - - - info_hw_version 0x00000000 1 RO uint32 b[9:8] - - -
- - - - - info_cs_sim 0x00000000 1 RO uint32 b[10:10] - - -
- - - - - info_fw_version_major 0x00000000 1 RO uint32 b[19:16] - - -
- - - - - info_fw_version_minor 0x00000000 1 RO uint32 b[23:20] - - -
- - - - - info_rom_version 0x00000000 1 RO uint32 b[26:24] - - -
- - - - - info_technology 0x00000000 1 RO uint32 b[31:27] - - -
- - - - - use_phy 0x00000001 1 RO uint32 b[7:0] - - -
- - - - - design_name 0x00000002 52 RO char8 b[31:0] b[7:0] - -
- - - - - stamp_date 0x0000000f 1 RO uint32 b[31:0] - - -
- - - - - stamp_time 0x00000010 1 RO uint32 b[31:0] - - -
- - - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - -
- - - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - -
- REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - -
- REG_FPGA_TEMP_SENS 1 1 REG temp 0x0003b048 1 RO uint32 b[31:0] - - -
- REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0003b030 6 RO uint32 b[31:0] - - -
- RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - -
- AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - -
- AVS_ETH_0_REG 1 1 REG status 0x00000c10 12 RO uint32 b[31:0] - - -
- AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - -
- PIO_PPS 1 1 REG capture_cnt 0x0003b06c 1 RO uint32 b[29:0] - - -
- - - - - stable 0x0003b06c 1 RO uint32 b[30:30] - - -
- - - - - toggle 0x0003b06c 1 RO uint32 b[31:31] - - -
- - - - - expected_cnt 0x0003b06d 1 RW uint32 b[27:0] - - -
- - - - - edge 0x0003b06d 1 RW uint32 b[31:31] - - -
- - - - - offset_cnt 0x0003b06e 1 RO uint32 b[27:0] - - -
- REG_EPCS 1 1 REG addr 0x0003b050 1 WO uint32 b[23:0] - - -
- - - - - rden 0x0003b051 1 WO uint32 b[0:0] - - -
- - - - - read_bit 0x0003b052 1 WO uint32 b[0:0] - - -
- - - - - write_bit 0x0003b053 1 WO uint32 b[0:0] - - -
- - - - - sector_erase 0x0003b054 1 WO uint32 b[0:0] - - -
- - - - - busy 0x0003b055 1 RO uint32 b[0:0] - - -
- - - - - unprotect 0x0003b056 1 WO uint32 b[31:0] - - -
- REG_DPMM_CTRL 1 1 REG rd_usedw 0x0003b084 1 RO uint32 b[31:0] - - -
- REG_DPMM_DATA 1 1 FIFO data 0x0003b082 1 RO uint32 b[31:0] - - -
- REG_MMDP_CTRL 1 1 REG wr_usedw 0x0003b080 1 RO uint32 b[31:0] - - -
- - - - - wr_availw 0x0003b081 1 RO uint32 b[31:0] - - -
- REG_MMDP_DATA 1 1 FIFO data 0x0003b07e 1 WO uint32 b[31:0] - - -
- REG_REMU 1 1 REG reconfigure 0x0003b058 1 WO uint32 b[31:0] - - -
- - - - - param 0x0003b059 1 WO uint32 b[2:0] - - -
- - - - - read_param 0x0003b05a 1 WO uint32 b[0:0] - - -
- - - - - write_param 0x0003b05b 1 WO uint32 b[0:0] - - -
- - - - - data_out 0x0003b05c 1 RO uint32 b[23:0] - - -
- - - - - data_in 0x0003b05d 1 WO uint32 b[23:0] - - -
- - - - - busy 0x0003b05e 1 RO uint32 b[0:0] - - -
- REG_SDP_INFO 1 1 REG block_period 0x0003b020 1 RO uint32 b[15:0] - - -
- - - - - n_rn 0x0003b021 1 RW uint32 b[7:0] - - -
- - - - - o_rn 0x0003b022 1 RW uint32 b[7:0] - - -
- - - - - n_si 0x0003b023 1 RW uint32 b[7:0] - - -
- - - - - o_si 0x0003b024 1 RW uint32 b[7:0] - - -
- - - - - beam_repositioning_flag 0x0003b025 1 RW uint32 b[0:0] - - -
- - - - - fsub_type 0x0003b026 1 RO uint32 b[0:0] - - -
- - - - - f_adc 0x0003b027 1 RO uint32 b[0:0] - - -
- - - - - nyquist_zone_index 0x0003b028 1 RW uint32 b[1:0] - - -
- - - - - observation_id 0x0003b029 1 RW uint32 b[31:0] - - -
- - - - - antenna_band_index 0x0003b02a 1 RO uint32 b[0:0] - - -
- - - - - station_id 0x0003b02b 1 RW uint32 b[15:0] - - -
- PIO_JESD_CTRL 1 1 REG enable 0x0003b074 1 RW uint32 b[30:0] - - -
- - - - - reset 0x0003b074 1 RW uint32 b[31:31] - - -
- JESD204B 1 12 REG rx_lane_ctrl_common 0x0003a000 1 RW uint32 b[2:0] - - 256
- - - - - rx_lane_ctrl_0 0x0003a001 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_1 0x0003a002 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_2 0x0003a003 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_3 0x0003a004 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_4 0x0003a005 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_5 0x0003a006 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_6 0x0003a007 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_7 0x0003a008 1 RW uint32 b[2:0] - - -
- - - - - rx_dll_ctrl 0x0003a014 1 RW uint32 b[16:0] - - -
- - - - - rx_syncn_sysref_ctrl 0x0003a015 1 RW uint32 b[24:0] - - -
- - - - - rx_csr_sysref_always_on 0x0003a015 1 RW uint32 b[1:1] - - -
- - - - - rx_csr_rbd_offset 0x0003a015 1 RW uint32 b[10:3] - - -
- - - - - rx_csr_lmfc_offset 0x0003a015 1 RW uint32 b[19:12] - - -
- - - - - rx_err0 0x0003a018 1 RW uint32 b[8:0] - - -
- - - - - rx_err1 0x0003a019 1 RW uint32 b[9:0] - - -
- - - - - csr_dev_syncn 0x0003a020 1 RO uint32 b[0:0] - - -
- - - - - csr_rbd_count 0x0003a020 1 RO uint32 b[10:3] - - -
- - - - - rx_status1 0x0003a021 1 RW uint32 b[23:0] - - -
- - - - - rx_status2 0x0003a022 1 RW uint32 b[23:0] - - -
- - - - - rx_status3 0x0003a023 1 RW uint32 b[7:0] - - -
- - - - - rx_ilas_csr_l 0x0003a025 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_f 0x0003a025 1 RW uint32 b[15:8] - - -
- - - - - rx_ilas_csr_k 0x0003a025 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_m 0x0003a025 1 RW uint32 b[31:24] - - -
- - - - - rx_ilas_csr_n 0x0003a026 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_cs 0x0003a026 1 RW uint32 b[7:6] - - -
- - - - - rx_ilas_csr_np 0x0003a026 1 RW uint32 b[12:8] - - -
- - - - - rx_ilas_csr_subclassv 0x0003a026 1 RW uint32 b[15:13] - - -
- - - - - rx_ilas_csr_s 0x0003a026 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_jesdv 0x0003a026 1 RW uint32 b[23:21] - - -
- - - - - rx_ilas_csr_cf 0x0003a026 1 RW uint32 b[28:24] - - -
- - - - - rx_ilas_csr_hd 0x0003a026 1 RW uint32 b[31:31] - - -
- - - - - rx_status4 0x0003a03c 1 RW uint32 b[15:0] - - -
- - - - - rx_status5 0x0003a03d 1 RW uint32 b[15:0] - - -
- - - - - rx_status6 0x0003a03e 1 RW uint32 b[23:0] - - -
- - - - - rx_status7 0x0003a03f 1 RO uint32 b[31:0] - - -
- REG_DP_SHIFTRAM 1 12 REG shift 0x00000c20 1 RW uint32 b[11:0] - - 2
- REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0003b040 1 RW uint32 b[0:0] - - -
- - - - - dp_on_pps 0x0003b040 1 RW uint32 b[1:1] - - -
- - - - - nof_clk_per_sync 0x0003b041 1 RW uint32 b[31:0] - - -
- - - - - bsn_init 0x0003b042 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b043 - - - b[31:0] b[63:32] - -
- - - - - bsn_time_offset 0x0003b044 1 RW uint32 b[9:0] - - -
- REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0003b07a 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b07b - - - b[31:0] b[63:32] - -
- REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - -
- - - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - -
- - - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - -
- - - - - bsn_at_sync 0x00000101 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000102 - - - b[31:0] b[63:32] - -
- - - - - nof_sop 0x00000103 1 RO uint32 b[31:0] - - -
- - - - - nof_valid 0x00000104 1 RO uint32 b[31:0] - - -
- - - - - nof_err 0x00000105 1 RO uint32 b[31:0] - - -
- - - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000107 - - - b[31:0] b[63:32] - -
- - - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - -
- REG_WG 1 12 REG mode 0x00000d00 1 RW uint32 b[7:0] - - 4
- - - - - nof_samples 0x00000d00 1 RW uint32 b[31:16] - - -
- - - - - phase 0x00000d01 1 RW uint32 b[15:0] - - -
- - - - - freq 0x00000d02 1 RW uint32 b[30:0] - - -
- - - - - ampl 0x00000d03 1 RW uint32 b[16:0] - - -
- RAM_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - - 1024
- RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512
- REG_ADUH_MONITOR 1 12 REG mean_sum 0x00000d40 1 RO int64 b[31:0] b[31:0] - 4
- - - - - - 0x00000d41 - - - b[31:0] b[63:32] - -
- - - - - power_sum 0x00000d42 1 RO int64 b[31:0] b[31:0] - -
- - - - - - 0x00000d43 - - - b[31:0] b[63:32] - -
- REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000020 1 RO uint32 b[31:0] - - 2
- - - - - word_cnt 0x00000021 1 RO uint32 b[31:0] - - -
- RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
- REG_SI 1 1 REG enable 0x0003b07c 1 RW uint32 b[0:0] - - -
- RAM_FIL_COEFS 1 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - - 1024
- RAM_EQUALIZER_GAINS 1 6 RAM data 0x00038000 1024 RW cint16_ir b[31:0] - - 1024
- REG_DP_SELECTOR 1 1 REG input_select 0x0003b078 1 RW uint32 b[0:0] - - -
- RAM_ST_SST 1 6 RAM data 0x00034000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - - 0x00034001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_SST 1 1 REG enable 0x0003b072 1 RW uint32 b[0:0] - - -
- REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000c41 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_statistics_per_packet 0x00000c43 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_bytes_per_statistic 0x00000c44 1 RW uint32 b[7:0] - - -
- - - - - sdp_nof_signal_inputs 0x00000c45 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x00000c46 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_sst_signal_input_index 0x00000c46 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id_sst_reserved 0x00000c46 1 RW uint32 b[31:8] - - -
- - - - - sdp_integration_interval 0x00000c47 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x00000c48 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x00000c49 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x00000c4a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x00000c4b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x00000c4c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x00000c4d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x00000c4e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x00000c4f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x00000c50 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00000c51 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00000c52 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00000c53 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00000c54 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00000c55 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00000c56 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00000c57 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00000c58 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00000c59 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x00000c5a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x00000c5b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x00000c5c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x00000c5d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x00000c5e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x00000c5f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x00000c60 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x00000c61 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x00000c62 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x00000c63 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x00000c64 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x00000c65 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x00000c66 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x00000c67 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000c68 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000c6a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - -
- REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0003b000 1 RW uint32 b[0:0] - - -
- - - - - ctrl_interval_size 0x0003b001 1 RW uint32 b[30:0] - - -
- - - - - ctrl_start_bsn 0x0003b002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b003 - - - b[31:0] b[63:32] - -
- - - - - mon_current_input_bsn 0x0003b004 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b005 - - - b[31:0] b[63:32] - -
- - - - - mon_input_bsn_at_sync 0x0003b006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b007 - - - b[31:0] b[63:32] - -
- - - - - mon_output_enable 0x0003b008 1 RO uint32 b[0:0] - - -
- - - - - mon_output_sync_bsn 0x0003b009 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003b00a - - - b[31:0] b[63:32] - -
- - - - - block_size 0x0003b00b 1 RO uint32 b[31:0] - - -
- RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
- - - - - - 0x00010001 - - - b[31:0] b[63:32] - -
- - - - - - 0x00010002 - - - b[31:0] b[95:64] - -
- - - - - - 0x00010003 - - - b[31:0] b[127:96] - -
- REG_CROSSLETS_INFO 1 1 REG offset 0x0003b010 15 RW uint32 b[31:0] - - -
- - - - - step 0x0003b01f 1 RW uint32 b[31:0] - - -
- REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00000c02 1 RW uint32 b[31:0] - - -
- - - - - unused 0x00000c03 1 RW uint32 b[31:0] - - -
- REG_STAT_ENABLE_XST 1 1 REG enable 0x0003b070 1 RW uint32 b[0:0] - - -
- REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000041 - - - b[31:0] b[63:32] - -
- - - - - block_period 0x00000042 1 RW uint32 b[15:0] - - -
- - - - - nof_statistics_per_packet 0x00000043 1 RW uint32 b[15:0] - - -
- - - - - nof_bytes_per_statistic 0x00000044 1 RW uint32 b[7:0] - - -
- - - - - nof_signal_inputs 0x00000045 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x00000046 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_xst_signal_input_b_index 0x00000046 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id_xst_signal_input_a_index 0x00000046 1 RW uint32 b[15:8] - - -
- - - - - sdp_data_id_xst_subband_index 0x00000046 1 RW uint32 b[24:16] - - -
- - - - - sdp_data_id_xst_reserved 0x00000046 1 RW uint32 b[31:25] - - -
- - - - - sdp_integration_interval 0x00000047 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x00000048 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x00000049 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0000004a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0000004b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0000004c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0000004d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0000004e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0000004f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x00000050 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00000051 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00000052 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00000053 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00000054 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00000055 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00000056 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00000057 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00000058 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00000059 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0000005a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0000005b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0000005c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0000005d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0000005e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0000005f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x00000060 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x00000061 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x00000062 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x00000063 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x00000064 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x00000065 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x00000066 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x00000067 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000068 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0000006a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - -
- RAM_SS_SS_WIDE 2 6 RAM data 0x00028000 976 RW uint32 b[9:0] - 8192 1024
- RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024
- REG_BF_SCALE 2 1 REG scale 0x0003b068 1 RW uint32 b[15:0] - 2 2
- - - - - unused 0x0003b069 1 RW uint32 b[31:0] - - -
- REG_HDR_DAT 2 1 REG bsn 0x00000c80 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x00000c81 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x00000c82 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_beamlets_per_block 0x00000c83 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_blocks_per_packet 0x00000c84 1 RW uint32 b[7:0] - - -
- - - - - sdp_beamlet_index 0x00000c85 1 RW uint32 b[15:0] - - -
- - - - - sdp_beamlet_scale 0x00000c86 1 RW uint32 b[15:0] - - -
- - - - - sdp_reserved 0x00000c87 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000c88 - - - b[7:0] b[39:32] - -
- - - - - sdp_source_info_gn_index 0x00000c89 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_beamlet_width 0x00000c8a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_repositioning_flag 0x00000c8b 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x00000c8c 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x00000c8d 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x00000c8e 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x00000c8f 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00000c90 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00000c91 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00000c92 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00000c93 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00000c94 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00000c95 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00000c96 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00000c97 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00000c98 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x00000c99 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x00000c9a 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x00000c9b 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x00000c9c 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x00000c9d 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x00000c9e 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x00000c9f 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x00000ca0 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x00000ca1 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x00000ca2 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x00000ca3 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x00000ca4 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x00000ca5 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x00000ca6 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000ca7 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x00000ca8 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x00000ca9 - - - b[15:0] b[47:32] - -
- REG_DP_XONOFF 2 1 REG enable_stream 0x0003b064 1 RW uint32 b[0:0] - 2 2
- RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - - 0x00001001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_BST 2 1 REG enable 0x0003b060 1 RW uint32 b[0:0] - 2 2
- REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000080 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x00000081 - - - b[31:0] b[63:32] - -
- - - - - block_period 0x00000082 1 RW uint32 b[15:0] - - -
- - - - - nof_statistics_per_packet 0x00000083 1 RW uint32 b[15:0] - - -
- - - - - nof_bytes_per_statistic 0x00000084 1 RW uint32 b[7:0] - - -
- - - - - nof_signal_inputs 0x00000085 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x00000086 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_bst_beamlet_index 0x00000086 1 RW uint32 b[15:0] - - -
- - - - - sdp_data_id_bst_reserved 0x00000086 1 RW uint32 b[31:16] - - -
- - - - - sdp_integration_interval 0x00000087 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x00000088 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x00000089 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0000008a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0000008b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0000008c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0000008d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0000008e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0000008f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x00000090 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x00000091 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x00000092 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x00000093 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x00000094 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x00000095 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x00000096 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x00000097 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x00000098 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x00000099 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0000009a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0000009b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0000009c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0000009d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0000009e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0000009f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x000000a0 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x000000a1 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x000000a2 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x000000a3 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x000000a4 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x000000a5 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x000000a6 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x000000a7 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x000000a8 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x000000a9 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x000000aa - - - b[15:0] b[47:32] - -
- - - - - word_align 0x000000ab 1 RW uint32 b[15:0] - - -
- REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - -
- - - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - -
- - - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - -
- - - - - rx_padcrc_control 0x00006040 1 RW uint32 b[1:0] - - -
- - - - - rx_crccheck_control 0x00006080 1 RW uint32 b[1:0] - - -
- - - - - rx_pktovrflow_error 0x000060c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000060c1 - - - b[31:0] b[31:0] - -
- - - - - rx_pktovrflow_etherstatsdropevents 0x000060c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000060c3 - - - b[31:0] b[31:0] - -
- - - - - rx_lane_decoder_preamble_control 0x00006100 1 RW uint32 b[0:0] - - -
- - - - - rx_preamble_inserter_control 0x00006140 1 RW uint32 b[0:0] - - -
- - - - - rx_frame_control 0x00006800 1 RW uint32 b[19:0] - - -
- - - - - rx_frame_maxlength 0x00006801 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr0 0x00006802 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr1 0x00006803 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_0 0x00006804 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_1 0x00006805 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_0 0x00006806 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_1 0x00006807 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_0 0x00006808 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_1 0x00006809 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_0 0x0000680a 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_1 0x0000680b 1 RW uint32 b[15:0] - - -
- - - - - rx_pfc_control 0x00006818 1 RW uint32 b[16:0] - - -
- - - - - rx_stats_clr 0x00006c00 1 RW uint32 b[0:0] - - -
- - - - - rx_stats_framesok 0x00006c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c03 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_frameserr 0x00006c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c05 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_framescrcerr 0x00006c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c07 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_octetsok 0x00006c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c09 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pausemacctrl_frames 0x00006c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c0b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_iferrors 0x00006c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c0d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_framesok 0x00006c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c0f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_frameserr 0x00006c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c11 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastframesok 0x00006c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c13 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicast_frameserr 0x00006c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c15 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastframesok 0x00006c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c17 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcast_frameserr 0x00006c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c19 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatsoctets 0x00006c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c1b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatspkts 0x00006c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c1d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_undersizepkts 0x00006c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c1f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_oversizepkts 0x00006c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c21 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts64octets 0x00006c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c23 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts65to127octets 0x00006c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c25 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts128to255octets 0x00006c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c27 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts256to511octets 0x00006c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c29 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts512to1023octets 0x00006c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c2b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstat_pkts1024to1518octets 0x00006c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c2d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts1519toxoctets 0x00006c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c2f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_fragments 0x00006c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c31 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_jabbers 0x00006c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c33 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatscrcerr 0x00006c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c35 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicastmacctrlframes 0x00006c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c37 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastmac_ctrlframes 0x00006c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c39 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastmac_ctrlframes 0x00006c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c3b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pfcmacctrlframes 0x00006c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00006c3d - - - b[31:0] b[31:0] - -
- - - - - tx_transfer_status 0x00007001 1 RO uint32 b[0:0] - - -
- - - - - tx_padins_control 0x00007040 1 RW uint32 b[0:0] - - -
- - - - - tx_crcins_control 0x00007080 1 RW uint32 b[1:0] - - -
- - - - - tx_pktunderflow_error 0x000070c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000070c1 - - - b[31:0] b[31:0] - -
- - - - - tx_preamble_control 0x00007100 1 RW uint32 b[0:0] - - -
- - - - - tx_pauseframe_control 0x00007140 1 RW uint32 b[1:0] - - -
- - - - - tx_pauseframe_quanta 0x00007141 1 RW uint32 b[15:0] - - -
- - - - - tx_pauseframe_enable 0x00007142 1 RW uint32 b[0:0] - - -
- - - - - pfc_pause_quanta_0 0x00007180 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_1 0x00007181 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_2 0x00007182 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_3 0x00007183 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_4 0x00007184 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_5 0x00007185 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_6 0x00007186 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_7 0x00007187 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_0 0x00007190 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_1 0x00007191 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_2 0x00007192 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_3 0x00007193 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_4 0x00007194 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_5 0x00007195 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_6 0x00007196 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_7 0x00007197 1 RW uint32 b[31:0] - - -
- - - - - tx_pfc_priority_enable 0x000071a0 1 RW uint32 b[7:0] - - -
- - - - - tx_addrins_control 0x00007200 1 RW uint32 b[0:0] - - -
- - - - - tx_addrins_macaddr0 0x00007201 1 RW uint32 b[31:0] - - -
- - - - - tx_addrins_macaddr1 0x00007202 1 RW uint32 b[15:0] - - -
- - - - - tx_frame_maxlength 0x00007801 1 RW uint32 b[15:0] - - -
- - - - - tx_stats_clr 0x00007c00 1 RW uint32 b[0:0] - - -
- - - - - tx_stats_framesok 0x00007c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c03 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_frameserr 0x00007c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c05 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_framescrcerr 0x00007c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c07 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_octetsok 0x00007c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c09 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pausemacctrl_frames 0x00007c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c0b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_iferrors 0x00007c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c0d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_framesok 0x00007c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c0f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_frameserr 0x00007c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c11 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastframesok 0x00007c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c13 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicast_frameserr 0x00007c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c15 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastframesok 0x00007c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c17 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcast_frameserr 0x00007c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c19 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatsoctets 0x00007c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c1b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatspkts 0x00007c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c1d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_undersizepkts 0x00007c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c1f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_oversizepkts 0x00007c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c21 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts64octets 0x00007c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c23 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts65to127octets 0x00007c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c25 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts128to255octets 0x00007c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c27 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts256to511octets 0x00007c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c29 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts512to1023octets 0x00007c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c2b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstat_pkts1024to1518octets 0x00007c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c2d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts1519toxoctets 0x00007c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c2f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_fragments 0x00007c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c31 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_jabbers 0x00007c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c33 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatscrcerr 0x00007c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c35 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicastmacctrlframes 0x00007c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c37 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastmac_ctrlframes 0x00007c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c39 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastmac_ctrlframes 0x00007c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c3b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00007c3d - - - b[31:0] b[31:0] - -
- REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0003b076 1 RO uint32 b[0:0] - - -
- - - - - xgmii_tx_ready 0x0003b076 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x0003b076 1 RO uint32 b[3:2] - - -
\ No newline at end of file
+# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
+# ---------------------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
+ ROM_SYSTEM_INFO 1 1 RAM data 0x00004000 32768 RO char8 b[31:0] b[7:0] - -
+ PIO_SYSTEM_INFO 1 1 REG info 0x00000000 1 RO uint32 b[31:0] - - -
+ - - - - info_gn_index 0x00000000 1 RO uint32 b[7:0] - - -
+ - - - - info_hw_version 0x00000000 1 RO uint32 b[9:8] - - -
+ - - - - info_cs_sim 0x00000000 1 RO uint32 b[10:10] - - -
+ - - - - info_fw_version_major 0x00000000 1 RO uint32 b[19:16] - - -
+ - - - - info_fw_version_minor 0x00000000 1 RO uint32 b[23:20] - - -
+ - - - - info_rom_version 0x00000000 1 RO uint32 b[26:24] - - -
+ - - - - info_technology 0x00000000 1 RO uint32 b[31:27] - - -
+ - - - - use_phy 0x00000001 1 RO uint32 b[7:0] - - -
+ - - - - design_name 0x00000002 52 RO char8 b[31:0] b[7:0] - -
+ - - - - stamp_date 0x0000000f 1 RO uint32 b[31:0] - - -
+ - - - - stamp_time 0x00000010 1 RO uint32 b[31:0] - - -
+ - - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - -
+ - - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - -
+ REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - -
+ REG_FPGA_TEMP_SENS 1 1 REG temp 0x0003d1f8 1 RO uint32 b[31:0] - - -
+ REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0003d1d0 6 RO uint32 b[31:0] - - -
+ RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - -
+ AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - -
+ AVS_ETH_0_REG 1 1 REG status 0x00000c10 12 RO uint32 b[31:0] - - -
+ AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - -
+ PIO_PPS 1 1 REG capture_cnt 0x0003d224 1 RO uint32 b[29:0] - - -
+ - - - - stable 0x0003d224 1 RO uint32 b[30:30] - - -
+ - - - - toggle 0x0003d224 1 RO uint32 b[31:31] - - -
+ - - - - expected_cnt 0x0003d225 1 RW uint32 b[27:0] - - -
+ - - - - edge 0x0003d225 1 RW uint32 b[31:31] - - -
+ - - - - offset_cnt 0x0003d226 1 RO uint32 b[27:0] - - -
+ REG_EPCS 1 1 REG addr 0x0003d200 1 WO uint32 b[23:0] - - -
+ - - - - rden 0x0003d201 1 WO uint32 b[0:0] - - -
+ - - - - read_bit 0x0003d202 1 WO uint32 b[0:0] - - -
+ - - - - write_bit 0x0003d203 1 WO uint32 b[0:0] - - -
+ - - - - sector_erase 0x0003d204 1 WO uint32 b[0:0] - - -
+ - - - - busy 0x0003d205 1 RO uint32 b[0:0] - - -
+ - - - - unprotect 0x0003d206 1 WO uint32 b[31:0] - - -
+ REG_DPMM_CTRL 1 1 REG rd_usedw 0x0003d240 1 RO uint32 b[31:0] - - -
+ REG_DPMM_DATA 1 1 FIFO data 0x0003d23e 1 RO uint32 b[31:0] - - -
+ REG_MMDP_CTRL 1 1 REG wr_usedw 0x0003d23c 1 RO uint32 b[31:0] - - -
+ - - - - wr_availw 0x0003d23d 1 RO uint32 b[31:0] - - -
+ REG_MMDP_DATA 1 1 FIFO data 0x0003d23a 1 WO uint32 b[31:0] - - -
+ REG_REMU 1 1 REG reconfigure 0x0003d208 1 WO uint32 b[31:0] - - -
+ - - - - param 0x0003d209 1 WO uint32 b[2:0] - - -
+ - - - - read_param 0x0003d20a 1 WO uint32 b[0:0] - - -
+ - - - - write_param 0x0003d20b 1 WO uint32 b[0:0] - - -
+ - - - - data_out 0x0003d20c 1 RO uint32 b[23:0] - - -
+ - - - - data_in 0x0003d20d 1 WO uint32 b[23:0] - - -
+ - - - - busy 0x0003d20e 1 RO uint32 b[0:0] - - -
+ REG_SDP_INFO 1 1 REG block_period 0x0003d1c0 1 RO uint32 b[15:0] - - -
+ - - - - beam_repositioning_flag 0x0003d1c1 1 RW uint32 b[0:0] - - -
+ - - - - fsub_type 0x0003d1c2 1 RO uint32 b[0:0] - - -
+ - - - - f_adc 0x0003d1c3 1 RO uint32 b[0:0] - - -
+ - - - - nyquist_zone_index 0x0003d1c4 1 RW uint32 b[1:0] - - -
+ - - - - observation_id 0x0003d1c5 1 RW uint32 b[31:0] - - -
+ - - - - antenna_band_index 0x0003d1c6 1 RW uint32 b[0:0] - - -
+ - - - - station_id 0x0003d1c7 1 RW uint32 b[15:0] - - -
+ REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x0003d210 1 RW uint32 b[0:0] - - -
+ - - - - use_cable_to_next_rn 0x0003d211 1 RW uint32 b[0:0] - - -
+ - - - - n_rn 0x0003d212 1 RW uint32 b[7:0] - - -
+ - - - - o_rn 0x0003d213 1 RW uint32 b[7:0] - - -
+ PIO_JESD_CTRL 1 1 REG enable 0x0003d230 1 RW uint32 b[30:0] - - -
+ - - - - reset 0x0003d230 1 RW uint32 b[31:31] - - -
+ JESD204B 1 12 REG rx_lane_ctrl_common 0x0003c000 1 RW uint32 b[2:0] - - 256
+ - - - - rx_lane_ctrl_0 0x0003c001 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_1 0x0003c002 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_2 0x0003c003 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_3 0x0003c004 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_4 0x0003c005 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_5 0x0003c006 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_6 0x0003c007 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_7 0x0003c008 1 RW uint32 b[2:0] - - -
+ - - - - rx_dll_ctrl 0x0003c014 1 RW uint32 b[16:0] - - -
+ - - - - rx_syncn_sysref_ctrl 0x0003c015 1 RW uint32 b[24:0] - - -
+ - - - - rx_csr_sysref_always_on 0x0003c015 1 RW uint32 b[1:1] - - -
+ - - - - rx_csr_rbd_offset 0x0003c015 1 RW uint32 b[10:3] - - -
+ - - - - rx_csr_lmfc_offset 0x0003c015 1 RW uint32 b[19:12] - - -
+ - - - - rx_err0 0x0003c018 1 RW uint32 b[8:0] - - -
+ - - - - rx_err1 0x0003c019 1 RW uint32 b[9:0] - - -
+ - - - - csr_dev_syncn 0x0003c020 1 RO uint32 b[0:0] - - -
+ - - - - csr_rbd_count 0x0003c020 1 RO uint32 b[10:3] - - -
+ - - - - rx_status1 0x0003c021 1 RW uint32 b[23:0] - - -
+ - - - - rx_status2 0x0003c022 1 RW uint32 b[23:0] - - -
+ - - - - rx_status3 0x0003c023 1 RW uint32 b[7:0] - - -
+ - - - - rx_ilas_csr_l 0x0003c025 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_f 0x0003c025 1 RW uint32 b[15:8] - - -
+ - - - - rx_ilas_csr_k 0x0003c025 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_m 0x0003c025 1 RW uint32 b[31:24] - - -
+ - - - - rx_ilas_csr_n 0x0003c026 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_cs 0x0003c026 1 RW uint32 b[7:6] - - -
+ - - - - rx_ilas_csr_np 0x0003c026 1 RW uint32 b[12:8] - - -
+ - - - - rx_ilas_csr_subclassv 0x0003c026 1 RW uint32 b[15:13] - - -
+ - - - - rx_ilas_csr_s 0x0003c026 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_jesdv 0x0003c026 1 RW uint32 b[23:21] - - -
+ - - - - rx_ilas_csr_cf 0x0003c026 1 RW uint32 b[28:24] - - -
+ - - - - rx_ilas_csr_hd 0x0003c026 1 RW uint32 b[31:31] - - -
+ - - - - rx_status4 0x0003c03c 1 RW uint32 b[15:0] - - -
+ - - - - rx_status5 0x0003c03d 1 RW uint32 b[15:0] - - -
+ - - - - rx_status6 0x0003c03e 1 RW uint32 b[23:0] - - -
+ - - - - rx_status7 0x0003c03f 1 RO uint32 b[31:0] - - -
+ REG_DP_SHIFTRAM 1 12 REG shift 0x00000c20 1 RW uint32 b[11:0] - - 2
+ REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0003d1f0 1 RW uint32 b[0:0] - - -
+ - - - - dp_on_pps 0x0003d1f0 1 RW uint32 b[1:1] - - -
+ - - - - nof_clk_per_sync 0x0003d1f1 1 RW uint32 b[31:0] - - -
+ - - - - bsn_init 0x0003d1f2 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1f3 - - - b[31:0] b[63:32] - -
+ - - - - bsn_time_offset 0x0003d1f4 1 RW uint32 b[9:0] - - -
+ REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0003d236 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d237 - - - b[31:0] b[63:32] - -
+ REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00000101 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000102 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00000103 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00000104 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00000105 1 RO uint32 b[31:0] - - -
+ - - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000107 - - - b[31:0] b[63:32] - -
+ - - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - -
+ REG_WG 1 12 REG mode 0x0003d080 1 RW uint32 b[7:0] - - 4
+ - - - - nof_samples 0x0003d080 1 RW uint32 b[31:16] - - -
+ - - - - phase 0x0003d081 1 RW uint32 b[15:0] - - -
+ - - - - freq 0x0003d082 1 RW uint32 b[30:0] - - -
+ - - - - ampl 0x0003d083 1 RW uint32 b[16:0] - - -
+ RAM_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - - 1024
+ RAM_ST_HISTOGRAM 1 12 RAM data 0x00006000 512 RW uint32 b[31:0] b[27:0] - 512
+ REG_ADUH_MONITOR 1 12 REG mean_sum 0x0003d0c0 1 RO int64 b[31:0] b[31:0] - 4
+ - - - - - 0x0003d0c1 - - - b[31:0] b[63:32] - -
+ - - - - power_sum 0x0003d0c2 1 RO int64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d0c3 - - - b[31:0] b[63:32] - -
+ REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000020 1 RO uint32 b[31:0] - - 2
+ - - - - word_cnt 0x00000021 1 RO uint32 b[31:0] - - -
+ RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
+ REG_SI 1 1 REG enable 0x0003d238 1 RW uint32 b[0:0] - - -
+ RAM_FIL_COEFS 1 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - - 1024
+ RAM_EQUALIZER_GAINS 1 6 RAM data 0x0003a000 1024 RW cint16_ir b[31:0] - - 1024
+ REG_DP_SELECTOR 1 1 REG input_select 0x0003d234 1 RW uint32 b[0:0] - - -
+ RAM_ST_SST 1 6 RAM data 0x00034000 1024 RW uint64 b[31:0] b[31:0] - 2048
+ - - - - - 0x00034001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_SST 1 1 REG enable 0x0003d22e 1 RW uint32 b[0:0] - - -
+ REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000c41 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_statistics_per_packet 0x00000c43 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_bytes_per_statistic 0x00000c44 1 RW uint32 b[7:0] - - -
+ - - - - sdp_nof_signal_inputs 0x00000c45 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x00000c46 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_sst_signal_input_index 0x00000c46 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id_sst_reserved 0x00000c46 1 RW uint32 b[31:8] - - -
+ - - - - sdp_integration_interval 0x00000c47 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x00000c48 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x00000c49 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x00000c4a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x00000c4b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x00000c4c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x00000c4d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x00000c4e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x00000c4f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x00000c50 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00000c51 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00000c52 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00000c53 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00000c54 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00000c55 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00000c56 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00000c57 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00000c58 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00000c59 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x00000c5a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x00000c5b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x00000c5c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x00000c5d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x00000c5e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x00000c5f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x00000c60 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00000c61 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00000c62 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00000c63 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00000c64 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00000c65 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00000c66 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00000c67 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000c68 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000c6a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - -
+ REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0003d1a0 1 RW uint32 b[0:0] - - -
+ - - - - ctrl_interval_size 0x0003d1a1 1 RW uint32 b[30:0] - - -
+ - - - - ctrl_start_bsn 0x0003d1a2 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1a3 - - - b[31:0] b[63:32] - -
+ - - - - mon_current_input_bsn 0x0003d1a4 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1a5 - - - b[31:0] b[63:32] - -
+ - - - - mon_input_bsn_at_sync 0x0003d1a6 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1a7 - - - b[31:0] b[63:32] - -
+ - - - - mon_output_enable 0x0003d1a8 1 RO uint32 b[0:0] - - -
+ - - - - mon_output_sync_bsn 0x0003d1a9 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1aa - - - b[31:0] b[63:32] - -
+ - - - - block_size 0x0003d1ab 1 RO uint32 b[31:0] - - -
+ RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
+ - - - - - 0x00010001 - - - b[31:0] b[63:32] - -
+ - - - - - 0x00010002 - - - b[31:0] b[95:64] - -
+ - - - - - 0x00010003 - - - b[31:0] b[127:96] - -
+ REG_CROSSLETS_INFO 1 1 REG offset 0x0003d1b0 15 RW uint32 b[31:0] - - -
+ - - - - step 0x0003d1bf 1 RW uint32 b[31:0] - - -
+ REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x0003d22a 1 RW uint32 b[31:0] - - -
+ - - - - unused 0x0003d22b 1 RW uint32 b[31:0] - - -
+ REG_STAT_ENABLE_XST 1 1 REG enable 0x0003d22c 1 RW uint32 b[0:0] - - -
+ REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000041 - - - b[31:0] b[63:32] - -
+ - - - - block_period 0x00000042 1 RW uint32 b[15:0] - - -
+ - - - - nof_statistics_per_packet 0x00000043 1 RW uint32 b[15:0] - - -
+ - - - - nof_bytes_per_statistic 0x00000044 1 RW uint32 b[7:0] - - -
+ - - - - nof_signal_inputs 0x00000045 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x00000046 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_xst_signal_input_b_index 0x00000046 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id_xst_signal_input_a_index 0x00000046 1 RW uint32 b[15:8] - - -
+ - - - - sdp_data_id_xst_subband_index 0x00000046 1 RW uint32 b[24:16] - - -
+ - - - - sdp_data_id_xst_reserved 0x00000046 1 RW uint32 b[31:25] - - -
+ - - - - sdp_integration_interval 0x00000047 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x00000048 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x00000049 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x0000004a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x0000004b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x0000004c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0000004d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0000004e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0000004f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x00000050 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00000051 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00000052 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00000053 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00000054 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00000055 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00000056 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00000057 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00000058 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00000059 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x0000005a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0000005b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0000005c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0000005d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0000005e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0000005f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x00000060 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00000061 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00000062 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00000063 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00000064 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00000065 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00000066 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00000067 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000068 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0000006a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - -
+ REG_BSN_ALIGN 1 9 REG enable 0x0003d190 1 RW uint32 b[0:0] - - 1
+ REG_BSN_MONITOR_V2_BSN_ALIGN_INPUT 1 9 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00000d00 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00000d00 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00000d01 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000d02 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00000d03 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00000d04 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00000d05 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00000d08 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_BSN_ALIGN_OUTPUT 1 1 REG xon_stable 0x0003d1e8 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x0003d1e8 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x0003d1e8 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x0003d1e9 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1ea - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x0003d1eb 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x0003d1ec 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x0003d1ed 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x0003d1f0 1 RO uint32 b[31:0] - - -
+ REG_XST_UDP_MONITOR 1 1 REG xon_stable 0x0003d1e0 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x0003d1e0 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x0003d1e0 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x0003d1e1 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d1e2 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x0003d1e3 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x0003d1e4 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x0003d1e5 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x0003d1e8 1 RO uint32 b[31:0] - - -
+ REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x0003d228 1 RO uint32 b[0:0] - - -
+ - - - - transport_nof_hops 0x0003d229 1 RW uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00000c80 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00000c80 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00000c80 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00000c81 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000c82 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00000c83 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00000c84 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00000c85 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00000c88 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_RING_TX_XST 1 16 REG xon_stable 0x00000080 1 RO uint32 b[0:0] - - 8
+ - - - - ready_stable 0x00000080 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00000080 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00000081 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000082 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00000083 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00000084 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00000085 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00000088 1 RO uint32 b[31:0] - - -
+ REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x0003d180 8 RO uint32 b[31:0] - - -
+ - - - - total_discarded_blocks 0x0003d188 1 RO uint32 b[31:0] - - -
+ - - - - total_block_count 0x0003d189 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x0003d18a 1 RW uint32 b[31:0] - - -
+ REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x0003d214 1 RO uint32 b[31:0] - - -
+ - - - - nof_sync 0x0003d215 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x0003d216 1 RW uint32 b[31:0] - - -
+ REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00002000 1 RW uint32 b[0:0] - - 1
+ - - - - rx_transfer_status 0x00002001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00002002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00002040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00002080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x000020c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000020c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x000020c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000020c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00002100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00002140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00002800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00002801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00002802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00002803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00002804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00002805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00002806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00002807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00002808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00002809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0000280a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0000280b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00002818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00002c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00002c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00002c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00002c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00002c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00002c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00002c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00002c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00002c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00002c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00002c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00002c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00002c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00002c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00002c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00002c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00002c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00002c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00002c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00002c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00002c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00002c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00002c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00002c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00002c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00002c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00002c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00002c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00002c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00002c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00002c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00002c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00003001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00003040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00003080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x000030c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000030c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00003100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00003140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00003141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00003142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00003180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00003181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00003182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00003183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00003184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00003185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00003186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00003187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00003190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00003191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00003192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00003193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00003194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00003195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00003196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00003197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x000031a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00003200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00003201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00003202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00003801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00003c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00003c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00003c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00003c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00003c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00003c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00003c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00003c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00003c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00003c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00003c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00003c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00003c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00003c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00003c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00003c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00003c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00003c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00003c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00003c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00003c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00003c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00003c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00003c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00003c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00003c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00003c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00003c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00003c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00003c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00003c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00003c3d - - - b[31:0] b[31:0] - -
+ REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00000c02 1 RO uint32 b[0:0] - - 1
+ - - - - xgmii_tx_ready 0x00000c02 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x00000c02 1 RO uint32 b[3:2] - - -
+ RAM_SS_SS_WIDE 2 6 RAM data 0x00028000 976 RW uint32 b[9:0] - 8192 1024
+ RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024
+ REG_BF_SCALE 2 1 REG scale 0x0003d220 1 RW uint32 b[15:0] - 2 2
+ - - - - unused 0x0003d221 1 RW uint32 b[31:0] - - -
+ REG_HDR_DAT 2 1 REG bsn 0x0003d000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x0003d001 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x0003d002 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_beamlets_per_block 0x0003d003 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_blocks_per_packet 0x0003d004 1 RW uint32 b[7:0] - - -
+ - - - - sdp_beamlet_index 0x0003d005 1 RW uint32 b[15:0] - - -
+ - - - - sdp_beamlet_scale 0x0003d006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_reserved 0x0003d007 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d008 - - - b[7:0] b[39:32] - -
+ - - - - sdp_source_info_gn_index 0x0003d009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_beamlet_width 0x0003d00a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_repositioning_flag 0x0003d00b 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0003d00c 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0003d00d 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0003d00e 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x0003d00f 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x0003d010 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x0003d011 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x0003d012 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x0003d013 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x0003d014 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x0003d015 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x0003d016 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x0003d017 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x0003d018 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x0003d019 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0003d01a 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0003d01b 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0003d01c 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0003d01d 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0003d01e 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x0003d01f 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x0003d020 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x0003d021 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x0003d022 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x0003d023 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x0003d024 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x0003d025 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x0003d026 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d027 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x0003d028 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003d029 - - - b[15:0] b[47:32] - -
+ REG_DP_XONOFF 2 1 REG enable_stream 0x0003d21c 1 RW uint32 b[0:0] - 2 2
+ RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048
+ - - - - - 0x00001001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_BST 2 1 REG enable 0x0003d218 1 RW uint32 b[0:0] - 2 2
+ REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000d80 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x00000d81 - - - b[31:0] b[63:32] - -
+ - - - - block_period 0x00000d82 1 RW uint32 b[15:0] - - -
+ - - - - nof_statistics_per_packet 0x00000d83 1 RW uint32 b[15:0] - - -
+ - - - - nof_bytes_per_statistic 0x00000d84 1 RW uint32 b[7:0] - - -
+ - - - - nof_signal_inputs 0x00000d85 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x00000d86 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_bst_beamlet_index 0x00000d86 1 RW uint32 b[15:0] - - -
+ - - - - sdp_data_id_bst_reserved 0x00000d86 1 RW uint32 b[31:16] - - -
+ - - - - sdp_integration_interval 0x00000d87 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x00000d88 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x00000d89 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x00000d8a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x00000d8b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x00000d8c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x00000d8d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x00000d8e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x00000d8f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x00000d90 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00000d91 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00000d92 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00000d93 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00000d94 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00000d95 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00000d96 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00000d97 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00000d98 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00000d99 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x00000d9a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x00000d9b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x00000d9c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x00000d9d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x00000d9e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x00000d9f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x00000da0 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00000da1 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00000da2 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00000da3 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00000da4 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00000da5 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00000da6 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00000da7 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000da8 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00000da9 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00000daa - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x00000dab 1 RW uint32 b[15:0] - - -
+ REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00038000 1 RW uint32 b[0:0] - - -
+ - - - - rx_transfer_status 0x00038001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00038002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00038040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00038080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x000380c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000380c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x000380c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000380c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00038100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00038140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00038800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00038801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00038802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00038803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00038804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00038805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00038806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00038807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00038808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00038809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0003880a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0003880b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00038818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00038c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00038c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00038c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00038c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00038c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00038c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00038c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00038c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00038c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00038c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00038c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00038c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00038c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00038c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00038c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00038c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00038c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00038c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00038c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00038c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00038c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00038c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00038c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00038c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00038c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00038c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00038c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00038c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00038c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00038c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00038c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00038c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00039001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00039040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00039080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x000390c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000390c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00039100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00039140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00039141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00039142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00039180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00039181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00039182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00039183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00039184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00039185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00039186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00039187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00039190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00039191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00039192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00039193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00039194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00039195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00039196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00039197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x000391a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00039200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00039201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00039202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00039801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00039c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00039c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00039c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00039c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00039c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00039c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00039c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00039c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00039c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00039c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00039c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00039c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00039c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00039c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00039c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00039c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00039c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00039c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00039c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00039c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00039c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00039c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00039c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00039c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00039c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00039c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00039c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00039c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00039c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00039c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00039c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00039c3d - - - b[31:0] b[31:0] - -
+ REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0003d232 1 RO uint32 b[0:0] - - -
+ - - - - xgmii_tx_ready 0x0003d232 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x0003d232 1 RO uint32 b[3:2] - - -
\ No newline at end of file
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/tb_lofar2_unb2b_sdp_station_bf.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/tb_lofar2_unb2b_sdp_station_bf.vhd
index 05ec67b6c8576091105eaecb67bdb58ff53018ab..e8ce4aa58bc61676155d7925d19b2a7891079c50 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/tb_lofar2_unb2b_sdp_station_bf.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/tb_lofar2_unb2b_sdp_station_bf.vhd
@@ -97,8 +97,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_sdp_station_bf IS
CONSTANT c_unb_nr : NATURAL := 0; -- UniBoard 0
CONSTANT c_node_nr : NATURAL := 0;
CONSTANT c_gn_index : NATURAL := c_unb_nr * 4 + c_node_nr; -- this node GN
- CONSTANT c_O_rn : NATURAL := 0;
- CONSTANT c_N_rn : NATURAL := 16;
CONSTANT c_init_bsn : NATURAL := 17; -- some recognizable value >= 0
CONSTANT c_id : STD_LOGIC_VECTOR(7 DOWNTO 0) := TO_UVEC(c_gn_index, 8);
@@ -115,7 +113,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_sdp_station_bf IS
CONSTANT c_sa_clk_period : TIME := tech_pll_clk_644_period; -- 644MHz
CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk to speed up M&C
- CONSTANT c_cross_clock_domain_latency : NATURAL := 20;
CONSTANT c_nof_block_per_sync : NATURAL := 16;
CONSTANT c_nof_clk_per_sync : NATURAL := c_nof_block_per_sync * c_sdp_N_fft;
@@ -150,10 +147,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_sdp_station_bf IS
'1', -- f_adc, 0 = 160 MHz, 1 = 200 MHz
'0', -- fsub_type, 0 = critically sampled, 1 = oversampled
'0', -- beam_repositioning_flag
- x"01", -- O_si, not used
- x"02", -- N_si, not used
- TO_UVEC(c_O_rn, 8), -- O_rn
- TO_UVEC(c_N_rn, 8), -- N_rn
x"1400" -- block_period = 5120
);
@@ -531,36 +524,27 @@ BEGIN
-- Set and check SDP info
----------------------------------------------------------------------------
-- TYPE t_sdp_info IS RECORD
- -- 11 station_id : STD_LOGIC_VECTOR(15 DOWNTO 0);
- -- 10 antenna_band_index : STD_LOGIC;
- -- 9 observation_id : STD_LOGIC_VECTOR(31 DOWNTO 0);
- -- 8 nyquist_zone_index : STD_LOGIC_VECTOR(1 DOWNTO 0);
- -- 7 f_adc : STD_LOGIC;
- -- 6 fsub_type : STD_LOGIC;
- -- 5 beam_repositioning_flag : STD_LOGIC;
- -- 4 O_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 3 N_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 2 O_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 1 N_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
+ -- 7 station_id : STD_LOGIC_VECTOR(15 DOWNTO 0);
+ -- 6 antenna_band_index : STD_LOGIC;
+ -- 5 observation_id : STD_LOGIC_VECTOR(31 DOWNTO 0);
+ -- 4 nyquist_zone_index : STD_LOGIC_VECTOR(1 DOWNTO 0);
+ -- 3 f_adc : STD_LOGIC;
+ -- 2 fsub_type : STD_LOGIC;
+ -- 1 beam_repositioning_flag : STD_LOGIC;
-- 0 block_period : STD_LOGIC_VECTOR(15 DOWNTO 0);
-- END RECORD;
-- . Write
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 11, TO_UINT(c_exp_sdp_info.station_id), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 9, TO_UINT(c_exp_sdp_info.observation_id), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 8, TO_UINT(c_exp_sdp_info.nyquist_zone_index), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 5, TO_UINT(slv(c_exp_sdp_info.beam_repositioning_flag)), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 4, TO_UINT(c_exp_sdp_info.O_si), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 3, TO_UINT(c_exp_sdp_info.N_si), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 2, TO_UINT(c_exp_sdp_info.O_rn), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 1, TO_UINT(c_exp_sdp_info.N_rn), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 7, TO_UINT(c_exp_sdp_info.station_id), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 6, TO_UINT(slv(c_exp_sdp_info.antenna_band_index)), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 5, TO_UINT(c_exp_sdp_info.observation_id), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 4, TO_UINT(c_exp_sdp_info.nyquist_zone_index), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 1, TO_UINT(slv(c_exp_sdp_info.beam_repositioning_flag)), tb_clk);
-- . Read
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 10, rd_data, tb_clk); rd_sdp_info.antenna_band_index <= rd_data(0);
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 7, rd_data, tb_clk); rd_sdp_info.f_adc <= rd_data(0);
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 6, rd_data, tb_clk); rd_sdp_info.fsub_type <= rd_data(0);
+ mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 3, rd_data, tb_clk); rd_sdp_info.f_adc <= rd_data(0);
+ mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 2, rd_data, tb_clk); rd_sdp_info.fsub_type <= rd_data(0);
mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 0, rd_data, tb_clk); rd_sdp_info.block_period <= rd_data(15 DOWNTO 0);
proc_common_wait_some_cycles(tb_clk, 1);
-- . Verify read
- ASSERT c_exp_sdp_info.antenna_band_index = rd_sdp_info.antenna_band_index REPORT "Wrong MM read SDP info antenna_band_index" SEVERITY ERROR;
ASSERT c_exp_sdp_info.f_adc = rd_sdp_info.f_adc REPORT "Wrong MM read SDP info f_adc" SEVERITY ERROR;
ASSERT c_exp_sdp_info.fsub_type = rd_sdp_info.fsub_type REPORT "Wrong MM read SDP info fsub_type" SEVERITY ERROR;
ASSERT c_exp_sdp_info.block_period = rd_sdp_info.block_period REPORT "Wrong MM read SDP info block_period" SEVERITY ERROR;
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/tb_lofar2_unb2c_sdp_station_bf.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/tb_lofar2_unb2c_sdp_station_bf.vhd
index 1526b134c410682e23adef74492b4f2295c05efb..257123269176fbca6ff5a72b651b5c6aa11f0d29 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/tb_lofar2_unb2c_sdp_station_bf.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/tb_lofar2_unb2c_sdp_station_bf.vhd
@@ -97,8 +97,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station_bf IS
CONSTANT c_unb_nr : NATURAL := 0; -- UniBoard 0
CONSTANT c_node_nr : NATURAL := 0;
CONSTANT c_gn_index : NATURAL := c_unb_nr * 4 + c_node_nr; -- this node GN
- CONSTANT c_O_rn : NATURAL := 0;
- CONSTANT c_N_rn : NATURAL := 16;
CONSTANT c_init_bsn : NATURAL := 17; -- some recognizable value >= 0
CONSTANT c_id : STD_LOGIC_VECTOR(7 DOWNTO 0) := TO_UVEC(c_gn_index, 8);
@@ -149,10 +147,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station_bf IS
'1', -- f_adc, 0 = 160 MHz, 1 = 200 MHz
'0', -- fsub_type, 0 = critically sampled, 1 = oversampled
'0', -- beam_repositioning_flag
- x"01", -- O_si, not used
- x"02", -- N_si, not used
- TO_UVEC(c_O_rn, 8), -- O_rn
- TO_UVEC(c_N_rn, 8), -- N_rn
x"1400" -- block_period = 5120
);
@@ -512,36 +506,27 @@ BEGIN
-- Set and check SDP info
----------------------------------------------------------------------------
-- TYPE t_sdp_info IS RECORD
- -- 11 station_id : STD_LOGIC_VECTOR(15 DOWNTO 0);
- -- 10 antenna_band_index : STD_LOGIC;
- -- 9 observation_id : STD_LOGIC_VECTOR(31 DOWNTO 0);
- -- 8 nyquist_zone_index : STD_LOGIC_VECTOR(1 DOWNTO 0);
- -- 7 f_adc : STD_LOGIC;
- -- 6 fsub_type : STD_LOGIC;
- -- 5 beam_repositioning_flag : STD_LOGIC;
- -- 4 O_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 3 N_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 2 O_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
- -- 1 N_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
+ -- 7 station_id : STD_LOGIC_VECTOR(15 DOWNTO 0);
+ -- 6 antenna_band_index : STD_LOGIC;
+ -- 5 observation_id : STD_LOGIC_VECTOR(31 DOWNTO 0);
+ -- 4 nyquist_zone_index : STD_LOGIC_VECTOR(1 DOWNTO 0);
+ -- 3 f_adc : STD_LOGIC;
+ -- 2 fsub_type : STD_LOGIC;
+ -- 1 beam_repositioning_flag : STD_LOGIC;
-- 0 block_period : STD_LOGIC_VECTOR(15 DOWNTO 0);
-- END RECORD;
-- . Write
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 11, TO_UINT(c_exp_sdp_info.station_id), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 9, TO_UINT(c_exp_sdp_info.observation_id), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 8, TO_UINT(c_exp_sdp_info.nyquist_zone_index), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 5, TO_UINT(slv(c_exp_sdp_info.beam_repositioning_flag)), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 4, TO_UINT(c_exp_sdp_info.O_si), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 3, TO_UINT(c_exp_sdp_info.N_si), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 2, TO_UINT(c_exp_sdp_info.O_rn), tb_clk);
- mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 1, TO_UINT(c_exp_sdp_info.N_rn), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 7, TO_UINT(c_exp_sdp_info.station_id), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 6, TO_UINT(slv(c_exp_sdp_info.antenna_band_index)), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 5, TO_UINT(c_exp_sdp_info.observation_id), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 4, TO_UINT(c_exp_sdp_info.nyquist_zone_index), tb_clk);
+ mmf_mm_bus_wr(c_mm_file_reg_sdp_info, 1, TO_UINT(slv(c_exp_sdp_info.beam_repositioning_flag)), tb_clk);
-- . Read
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 10, rd_data, tb_clk); rd_sdp_info.antenna_band_index <= rd_data(0);
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 7, rd_data, tb_clk); rd_sdp_info.f_adc <= rd_data(0);
- mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 6, rd_data, tb_clk); rd_sdp_info.fsub_type <= rd_data(0);
+ mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 3, rd_data, tb_clk); rd_sdp_info.f_adc <= rd_data(0);
+ mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 2, rd_data, tb_clk); rd_sdp_info.fsub_type <= rd_data(0);
mmf_mm_bus_rd(c_mm_file_reg_sdp_info, 0, rd_data, tb_clk); rd_sdp_info.block_period <= rd_data(15 DOWNTO 0);
proc_common_wait_some_cycles(tb_clk, 1);
-- . Verify read
- ASSERT c_exp_sdp_info.antenna_band_index = rd_sdp_info.antenna_band_index REPORT "Wrong MM read SDP info antenna_band_index" SEVERITY ERROR;
ASSERT c_exp_sdp_info.f_adc = rd_sdp_info.f_adc REPORT "Wrong MM read SDP info f_adc" SEVERITY ERROR;
ASSERT c_exp_sdp_info.fsub_type = rd_sdp_info.fsub_type REPORT "Wrong MM read SDP info fsub_type" SEVERITY ERROR;
ASSERT c_exp_sdp_info.block_period = rd_sdp_info.block_period REPORT "Wrong MM read SDP info block_period" SEVERITY ERROR;
diff --git a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
index 25a06589b55204a66e325bfac1d79e9eedb36c6d..e45e1d737a5f1ea3b1f1cdff74bdc333e9a3e6b9 100644
--- a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
+++ b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
@@ -18,17 +18,13 @@ peripherals:
The other info fields apply per antenna band (low band or high band). An FPGA node only
participates in one band."
fields:
- - - { field_name: station_id, mm_width: 16, access_mode: RW, address_offset: 0x2C }
- - - { field_name: antenna_band_index, mm_width: 1, access_mode: RO, address_offset: 0x28 }
- - - { field_name: observation_id, mm_width: 32, access_mode: RW, address_offset: 0x24 }
- - - { field_name: nyquist_zone_index, mm_width: 2, access_mode: RW, address_offset: 0x20 }
- - - { field_name: f_adc, mm_width: 1, access_mode: RO, address_offset: 0x1C }
- - - { field_name: fsub_type, mm_width: 1, access_mode: RO, address_offset: 0x18 }
- - - { field_name: beam_repositioning_flag, mm_width: 1, access_mode: RW, address_offset: 0x14 }
- - - { field_name: O_si, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: N_si, mm_width: 8, access_mode: RW, address_offset: 0xC }
- - - { field_name: O_rn, mm_width: 8, access_mode: RW, address_offset: 0x8 }
- - - { field_name: N_rn, mm_width: 8, access_mode: RW, address_offset: 0x4 }
+ - - { field_name: station_id, mm_width: 16, access_mode: RW, address_offset: 0x1C }
+ - - { field_name: antenna_band_index, mm_width: 1, access_mode: RW, address_offset: 0x18 }
+ - - { field_name: observation_id, mm_width: 32, access_mode: RW, address_offset: 0x14 }
+ - - { field_name: nyquist_zone_index, mm_width: 2, access_mode: RW, address_offset: 0x10 }
+ - - { field_name: f_adc, mm_width: 1, access_mode: RO, address_offset: 0xC }
+ - - { field_name: fsub_type, mm_width: 1, access_mode: RO, address_offset: 0x8 }
+ - - { field_name: beam_repositioning_flag, mm_width: 1, access_mode: RW, address_offset: 0x4 }
- - { field_name: block_period, mm_width: 16, access_mode: RO, address_offset: 0x0 }
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
index 35dd7db50ee289430627302dc61bbaf88172db3a..27239f05789ef3f0a5317ba0408a1dc738ff2609 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_correlator.vhd
@@ -35,6 +35,7 @@ USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_network_layers_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
+USE ring_lib.ring_pkg.ALL;
USE work.sdp_pkg.ALL;
ENTITY node_sdp_correlator IS
@@ -78,6 +79,7 @@ ENTITY node_sdp_correlator IS
reg_xst_udp_monitor_cipo : OUT t_mem_cipo;
sdp_info : IN t_sdp_info;
+ ring_info : IN t_ring_info;
gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0);
stat_eth_src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0);
stat_ip_src_addr : IN STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0);
@@ -421,6 +423,7 @@ BEGIN
ip_src_addr => stat_ip_src_addr,
gn_index => TO_UINT(gn_id),
+ ring_info => ring_info,
sdp_info => sdp_info,
nof_crosslets => nof_crosslets,
crosslets_info => crosslets_info
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info.vhd
index 81b001393f66f8cabcc9749bc56486b81f1c7d67..1e8aa33621e61ec599f4068f2e75a1e0be9bc327 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info.vhd
@@ -106,7 +106,6 @@ BEGIN
END IF;
END PROCESS;
- sdp_info_ro.antenna_band_index <= '0' WHEN gn_index < c_sdp_N_pn_lb ELSE '1';
sdp_info_ro.f_adc <= f_adc;
sdp_info_ro.fsub_type <= fsub_type;
sdp_info_ro.block_period <= block_period;
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
index 62bd4b9c5e8e3d0e29bce6da7d67ec002bc0a1ba..0fbbe4d31b2cd8b3d8a8dc88159d67b998b38c38 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
@@ -60,18 +60,14 @@ END sdp_info_reg;
ARCHITECTURE str OF sdp_info_reg IS
- CONSTANT c_field_arr : t_common_field_arr(11 DOWNTO 0) :=
+ CONSTANT c_field_arr : t_common_field_arr(7 DOWNTO 0) :=
( (field_name_pad("station_id"), "RW", 16, field_default(0)),
- (field_name_pad("antenna_band_index"), "RO", 1, field_default(0)),
+ (field_name_pad("antenna_band_index"), "RW", 1, field_default(0)),
(field_name_pad("observation_id"), "RW", 32, field_default(0)),
(field_name_pad("nyquist_zone_index"), "RW", 2, field_default(0)),
(field_name_pad("f_adc"), "RO", 1, field_default(0)),
(field_name_pad("fsub_type"), "RO", 1, field_default(0)),
(field_name_pad("beam_repositioning_flag"), "RW", 1, field_default(0)),
- (field_name_pad("O_si"), "RW", 8, field_default(0)),
- (field_name_pad("N_si"), "RW", 8, field_default(0)),
- (field_name_pad("O_rn"), "RW", 8, field_default(0)),
- (field_name_pad("N_rn"), "RW", 8, field_default(0)),
(field_name_pad("block_period"), "RO", 16, field_default(0)) );
SIGNAL mm_fields_in : STD_LOGIC_VECTOR(field_slv_in_len(c_field_arr)-1 DOWNTO 0);
@@ -90,7 +86,6 @@ BEGIN
sdp_info_rd <= sdp_info_wr;
-- overrule the read only fields
- sdp_info_rd.antenna_band_index <= sdp_info_ro.antenna_band_index;
sdp_info_rd.f_adc <= sdp_info_ro.f_adc;
sdp_info_rd.fsub_type <= sdp_info_ro.fsub_type;
sdp_info_rd.block_period <= sdp_info_ro.block_period;
@@ -119,19 +114,15 @@ BEGIN
);
-- add "RO" fields to mm_fields
- mm_fields_in(field_hi(c_field_arr, "antenna_band_index") DOWNTO field_lo(c_field_arr, "antenna_band_index")) <= slv(sdp_info_rd.antenna_band_index);
- mm_fields_in(field_hi(c_field_arr, "f_adc") DOWNTO field_lo(c_field_arr, "f_adc")) <= slv(sdp_info_rd.f_adc);
- mm_fields_in(field_hi(c_field_arr, "fsub_type") DOWNTO field_lo(c_field_arr, "fsub_type")) <= slv(sdp_info_rd.fsub_type);
- mm_fields_in(field_hi(c_field_arr, "block_period") DOWNTO field_lo(c_field_arr, "block_period")) <= sdp_info_rd.block_period;
+ mm_fields_in(field_hi(c_field_arr, "f_adc") DOWNTO field_lo(c_field_arr, "f_adc")) <= slv(sdp_info_rd.f_adc);
+ mm_fields_in(field_hi(c_field_arr, "fsub_type") DOWNTO field_lo(c_field_arr, "fsub_type")) <= slv(sdp_info_rd.fsub_type);
+ mm_fields_in(field_hi(c_field_arr, "block_period") DOWNTO field_lo(c_field_arr, "block_period")) <= sdp_info_rd.block_period;
-- get "RW" fields from mm_fields
sdp_info_wr.station_id <= mm_fields_out(field_hi(c_field_arr, "station_id") DOWNTO field_lo(c_field_arr, "station_id"));
+ sdp_info_wr.antenna_band_index <= sl(mm_fields_out(field_hi(c_field_arr, "antenna_band_index") DOWNTO field_lo(c_field_arr, "antenna_band_index")));
sdp_info_wr.observation_id <= mm_fields_out(field_hi(c_field_arr, "observation_id") DOWNTO field_lo(c_field_arr, "observation_id"));
sdp_info_wr.nyquist_zone_index <= mm_fields_out(field_hi(c_field_arr, "nyquist_zone_index") DOWNTO field_lo(c_field_arr, "nyquist_zone_index"));
sdp_info_wr.beam_repositioning_flag <= sl(mm_fields_out(field_hi(c_field_arr, "beam_repositioning_flag") DOWNTO field_lo(c_field_arr, "beam_repositioning_flag")));
- sdp_info_wr.O_si <= mm_fields_out(field_hi(c_field_arr, "O_si") DOWNTO field_lo(c_field_arr, "O_si"));
- sdp_info_wr.N_si <= mm_fields_out(field_hi(c_field_arr, "N_si") DOWNTO field_lo(c_field_arr, "N_si"));
- sdp_info_wr.O_rn <= mm_fields_out(field_hi(c_field_arr, "O_rn") DOWNTO field_lo(c_field_arr, "O_rn"));
- sdp_info_wr.N_rn <= mm_fields_out(field_hi(c_field_arr, "N_rn") DOWNTO field_lo(c_field_arr, "N_rn"));
END str;
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index a97a3e1d948abb80f141e55c094be8b7c374dc79..b2cbccdd8914dca0b22b4449470795b0de6d3e73 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -52,31 +52,28 @@ PACKAGE sdp_pkg is
f_adc : STD_LOGIC;
fsub_type : STD_LOGIC;
beam_repositioning_flag : STD_LOGIC;
- O_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- N_si : STD_LOGIC_VECTOR(7 DOWNTO 0);
- O_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
- N_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
block_period : STD_LOGIC_VECTOR(15 DOWNTO 0);
END RECORD;
CONSTANT c_sdp_info_rst : t_sdp_info :=
( (OTHERS => '0'), '0', (OTHERS => '0'), (OTHERS => '0'),
'0', '0', '0',
- (OTHERS => '0'), (OTHERS => '0'), (OTHERS => '0'), (OTHERS => '0'),
(OTHERS => '0') );
-------------------------------------------------
-- SDP specific parameters as defined in:
-- L3 SDP Decision: SDP Parameter definitions
CONSTANT c_sdp_f_adc_MHz : NATURAL := 200;
- CONSTANT c_sdp_N_beamsets : NATURAL := 2;
+ CONSTANT c_sdp_N_beamsets : NATURAL := 2; -- = N_beamsets_sdp in doc
+ CONSTANT c_sdp_N_cross_sets_sdp : NATURAL := 1;
CONSTANT c_sdp_N_crosslets_max : NATURAL := 7;
CONSTANT c_sdp_N_fft : NATURAL := 1024;
CONSTANT c_sdp_N_pn_lb : NATURAL := 16;
CONSTANT c_sdp_N_pn_max : NATURAL := 16; -- gn 0:31 --> pn 0:15, pn 0:15 per antenna band
CONSTANT c_sdp_N_pol : NATURAL := 2;
CONSTANT c_sdp_N_pol_bf : NATURAL := 2;
- CONSTANT c_sdp_N_ring_lanes_max : NATURAL := 8;
+ CONSTANT c_sdp_N_rings_sdp : NATURAL := 1;
+ CONSTANT c_sdp_N_ring_lanes_max : NATURAL := 8; -- = N_lane in doc
CONSTANT c_sdp_N_sub : NATURAL := 512;
CONSTANT c_sdp_N_sync_rcu : NATURAL := 1;
CONSTANT c_sdp_N_taps : NATURAL := 16;
@@ -551,13 +548,18 @@ END PACKAGE sdp_pkg;
PACKAGE BODY sdp_pkg IS
FUNCTION func_sdp_gn_index_to_pn_index(gn_index : NATURAL) RETURN NATURAL IS
- -- Determine PN index that starts at 0 per antenna band.
- -- For LOFAR2 SDP there are two antenna bands: LB and HB. The LB starts at
- -- GN index = 0 and has c_sdp_N_pn_lb = c_sdp_N_pn_max = 16 nodes. The HB
- -- starts at c_sdp_N_pn_max. Assume every antenna_band starts at a GN:
+ -- Determine PN index that starts at 0 per antenna band. For LOFAR2 SDP
+ -- each antenna_band has c_sdp_N_pn_max = 16 PN. The pn_index defines the
+ -- PN index within an antenna_band:
--
-- pn_index = gn_index MOD c_sdp_N_pn_max
--
+ -- The c_sdp_N_pn_max = 16 fits the LB and HB of LOFAR2:
+ -- . The LB starts at GN index = 0 and has c_sdp_N_pn_lb = c_sdp_N_pn_max
+ -- = 16 nodes.
+ -- . The HB starts at GN index = c_sdp_N_pn_max, and has 8 or 16 nodes
+ -- dependent on the type of station.
+ --
-- The fact that c_sdp_N_pn_max = 16 implies that instead of implementing
-- MOD it is possible to do:
--
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
index 1494eb112642c4e85e5401299cdf9c7dd2d97299..36ab5c31f894559bb67b51e2e29f1c5e8afdc804 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
@@ -666,6 +666,7 @@ BEGIN
reg_xst_udp_monitor_cipo => reg_xst_udp_monitor_cipo,
sdp_info => sdp_info,
+ ring_info => ring_info,
gn_id => gn_id,
stat_eth_src_mac => stat_eth_src_mac,
stat_ip_src_addr => stat_ip_src_addr,
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
index ee230cc31c3f325471d368daf8609602adc5b408..45f4be06831c117b547a6c89da4c4cdc061fb3f6 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
@@ -135,6 +135,7 @@ ENTITY sdp_statistics_offload IS
ip_src_addr : IN STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0);
gn_index : IN NATURAL;
+ ring_info : IN t_ring_info := c_ring_info_rst; -- only needed for XST
sdp_info : IN t_sdp_info;
subband_calibrated_flag : IN STD_LOGIC := '0';
nof_crosslets : IN STD_LOGIC_VECTOR(c_sdp_nof_crosslets_reg_w-1 DOWNTO 0) := (OTHERS => '0');
@@ -294,13 +295,13 @@ BEGIN
-- Derive and pipeline dynamic parameters
gn_index_reg <= gn_index WHEN rising_edge(dp_clk);
pn_index <= func_sdp_gn_index_to_pn_index(gn_index) WHEN rising_edge(dp_clk);
- rn_index <= gn_index - TO_UINT(sdp_info.O_rn) WHEN rising_edge(dp_clk);
+ rn_index <= gn_index - TO_UINT(ring_info.O_rn) WHEN rising_edge(dp_clk);
local_si_offset <= pn_index * c_sdp_S_pn WHEN rising_edge(dp_clk);
nof_cycles_dly <= gn_index * g_offload_time WHEN rising_edge(dp_clk);
nof_packets <= func_sdp_get_stat_nof_packets(g_statistics_type, c_sdp_S_pn, g_P_sq, r.nof_crosslets) WHEN rising_edge(dp_clk);
- remote_rn <= func_nof_hops_to_source_rn(r.instance_count, rn_index, TO_UINT(sdp_info.N_rn), g_crosslets_direction);
- remote_gn <= TO_UINT(sdp_info.O_rn) + remote_rn;
+ remote_rn <= func_ring_nof_hops_to_source_rn(r.instance_count, rn_index, TO_UINT(ring_info.N_rn), g_crosslets_direction);
+ remote_gn <= TO_UINT(ring_info.O_rn) + remote_rn;
remote_pn <= func_sdp_gn_index_to_pn_index(remote_gn) WHEN rising_edge(dp_clk);
remote_si_offset <= remote_pn * c_sdp_S_pn WHEN rising_edge(dp_clk);
diff --git a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
index c5af514ec646acc3987dc5f197dd730d49bd29bc..552b5ee8f28d839ba42a1d43be788724fcc18cb0 100644
--- a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
+++ b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
@@ -49,21 +49,15 @@ ARCHITECTURE tb OF tb_sdp_info IS
CONSTANT c_dp_clk_period : TIME := 5 ns; -- 200 MHz
CONSTANT c_mm_clk_period : TIME := 20 ns; -- 50 MHz
- CONSTANT c_cross_clock_domain_latency : NATURAL := 20;
-
-- used mm_adresses on mm bus
- CONSTANT c_mm_addr_block_period : NATURAL := 0;
- CONSTANT c_mm_addr_N_rn : NATURAL := 1;
- CONSTANT c_mm_addr_O_rn : NATURAL := 2;
- CONSTANT c_mm_addr_N_si : NATURAL := 3;
- CONSTANT c_mm_addr_O_si : NATURAL := 4;
- CONSTANT c_mm_addr_beam_repositioning_flag : NATURAL := 5;
- CONSTANT c_mm_addr_fsub_type : NATURAL := 6;
- CONSTANT c_mm_addr_f_adc : NATURAL := 7;
- CONSTANT c_mm_addr_nyquist_zone_index : NATURAL := 8;
- CONSTANT c_mm_addr_observation_id : NATURAL := 9;
- CONSTANT c_mm_addr_antenna_band_index : NATURAL := 10;
- CONSTANT c_mm_addr_station_id : NATURAL := 11;
+ CONSTANT c_mm_addr_block_period : NATURAL := 0;
+ CONSTANT c_mm_addr_beam_repositioning_flag : NATURAL := 1;
+ CONSTANT c_mm_addr_fsub_type : NATURAL := 2;
+ CONSTANT c_mm_addr_f_adc : NATURAL := 3;
+ CONSTANT c_mm_addr_nyquist_zone_index : NATURAL := 4;
+ CONSTANT c_mm_addr_observation_id : NATURAL := 5;
+ CONSTANT c_mm_addr_antenna_band_index : NATURAL := 6;
+ CONSTANT c_mm_addr_station_id : NATURAL := 7;
SIGNAL tb_end : STD_LOGIC := '0';
SIGNAL tb_mm_reg_end : STD_LOGIC := '0';
@@ -103,74 +97,61 @@ BEGIN
-- default all register hold value 0, try to write 1 in all registers
proc_mem_mm_bus_wr(c_mm_addr_block_period ,11 ,mm_clk, reg_miso, reg_mosi); -- RO
- proc_mem_mm_bus_wr(c_mm_addr_N_rn ,12 ,mm_clk, reg_miso, reg_mosi);
- proc_mem_mm_bus_wr(c_mm_addr_O_rn ,13 ,mm_clk, reg_miso, reg_mosi);
- proc_mem_mm_bus_wr(c_mm_addr_N_si ,14 ,mm_clk, reg_miso, reg_mosi);
- proc_mem_mm_bus_wr(c_mm_addr_O_si ,15 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_beam_repositioning_flag,1 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_fsub_type ,1 ,mm_clk, reg_miso, reg_mosi); -- RO
proc_mem_mm_bus_wr(c_mm_addr_f_adc ,1 ,mm_clk, reg_miso, reg_mosi); -- RO
proc_mem_mm_bus_wr(c_mm_addr_nyquist_zone_index ,3 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_observation_id ,16 ,mm_clk, reg_miso, reg_mosi);
- proc_mem_mm_bus_wr(c_mm_addr_antenna_band_index ,1 ,mm_clk, reg_miso, reg_mosi); -- RO
+ proc_mem_mm_bus_wr(c_mm_addr_antenna_band_index ,1 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_station_id ,17 ,mm_clk, reg_miso, reg_mosi);
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
-
- proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response /= 11 REPORT "wrong block_period (not read only)" SEVERITY ERROR;
-
- proc_mem_mm_bus_rd(c_mm_addr_N_rn, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 12 REPORT "wrong N_rn" SEVERITY ERROR;
-
- proc_mem_mm_bus_rd(c_mm_addr_O_rn, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 13 REPORT "wrong O_rn" SEVERITY ERROR;
-
- proc_mem_mm_bus_rd(c_mm_addr_N_si, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 14 REPORT "wrong N_si" SEVERITY ERROR;
+ proc_common_wait_cross_clock_domain_latency(dp_clk, mm_clk);
- proc_mem_mm_bus_rd(c_mm_addr_O_si, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 15 REPORT "wrong O_si" SEVERITY ERROR;
-
- proc_mem_mm_bus_rd(c_mm_addr_beam_repositioning_flag, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 1 REPORT "wrong beam_repositioning_flag" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response /= 11 REPORT "Wrong block_period (not read only)" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_fsub_type, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response /= 1 REPORT "wrong fsub_type (not read only)" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_beam_repositioning_flag, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 1 REPORT "Wrong beam_repositioning_flag" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_f_adc, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ proc_mem_mm_bus_rd(c_mm_addr_fsub_type, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response /= 1 REPORT "wrong f_adc (not read only)" SEVERITY ERROR;
+ ASSERT mm_natural_response /= 1 REPORT "Wrong fsub_type (not read only)" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_nyquist_zone_index, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 3 REPORT "wrong nyquist_zone_index" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_f_adc, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response /= 1 REPORT "Wrong f_adc (not read only)" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_observation_id, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 16 REPORT "wrong observation_id" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_nyquist_zone_index, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 3 REPORT "Wrong nyquist_zone_index" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_antenna_band_index, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response /= 1 REPORT "wrong antenna_band_index (not read only)" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_observation_id, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 16 REPORT "Wrong observation_id" SEVERITY ERROR;
- proc_mem_mm_bus_rd(c_mm_addr_station_id, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 17 REPORT "wrong station_id" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_antenna_band_index, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 1 REPORT "Wrong antenna_band_index" SEVERITY ERROR;
- -- check if antenna_band_index is changed on change of gn_index
- -- '0' <= 16, '1' > 16
- gn_index <= 32;
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
- proc_mem_mm_bus_rd(c_mm_addr_antenna_band_index, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 1 REPORT "wrong antenna_band_index" SEVERITY ERROR;
+ proc_mem_mm_bus_rd(c_mm_addr_station_id, mm_clk, reg_mosi);
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata);
+ proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 17 REPORT "Wrong station_id" SEVERITY ERROR;
-- check block_period if f_adc and fsub_type are changed
-- f_adc = '0' and fsub_type = '0' => block_period = 6400
@@ -178,28 +159,28 @@ BEGIN
-- f_adc = '0' and fsub_type = '1' => block_period = 5400
-- f_adc = '1' and fsub_type = '1' => block_period = 4320
f_adc <= '0'; fsub_type <= '0';
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
+ proc_common_wait_cross_clock_domain_latency(dp_clk, mm_clk);
proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi);
proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata(15 DOWNTO 0));
proc_common_wait_some_cycles(mm_clk, 1);
ASSERT mm_natural_response = 6400 REPORT "wrong block_period, expected 6400" SEVERITY ERROR;
f_adc <= '1'; fsub_type <= '0';
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
+ proc_common_wait_cross_clock_domain_latency(dp_clk, mm_clk);
proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi);
proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata(15 DOWNTO 0));
proc_common_wait_some_cycles(mm_clk, 1);
ASSERT mm_natural_response = 5120 REPORT "wrong block_period, expected 5120" SEVERITY ERROR;
f_adc <= '0'; fsub_type <= '1';
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
+ proc_common_wait_cross_clock_domain_latency(dp_clk, mm_clk);
proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi);
proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata(15 DOWNTO 0));
proc_common_wait_some_cycles(mm_clk, 1);
ASSERT mm_natural_response = 5400 REPORT "wrong block_period, expected 5400" SEVERITY ERROR;
f_adc <= '1'; fsub_type <= '1';
- proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
+ proc_common_wait_cross_clock_domain_latency(dp_clk, mm_clk);
proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi);
proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata(15 DOWNTO 0));
@@ -218,10 +199,6 @@ BEGIN
proc_common_wait_until_high(mm_clk, tb_mm_reg_end); -- wait for p_mm_reg_stimuli done
ASSERT TO_UINT(sdp_info.block_period) = 4320 REPORT "wrong sdp_info.block_period value" SEVERITY ERROR;
- ASSERT TO_UINT(sdp_info.N_rn) = 12 REPORT "wrong sdp_info.N_rn value" SEVERITY ERROR;
- ASSERT TO_UINT(sdp_info.O_rn) = 13 REPORT "wrong sdp_info.O_rn value" SEVERITY ERROR;
- ASSERT TO_UINT(sdp_info.N_si) = 14 REPORT "wrong sdp_info.N_si value" SEVERITY ERROR;
- ASSERT TO_UINT(sdp_info.O_si) = 15 REPORT "wrong sdp_info.O_si value" SEVERITY ERROR;
ASSERT sdp_info.beam_repositioning_flag = '1' REPORT "wrong sdp_info.beam_repositioning_flag value" SEVERITY ERROR;
ASSERT sdp_info.fsub_type = '1' REPORT "wrong sdp_info.fsub_type value" SEVERITY ERROR;
ASSERT sdp_info.f_adc = '1' REPORT "wrong sdp_info.f_adc value" SEVERITY ERROR;
diff --git a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
index 24e9ea2bd2849c2ac9bce59626b9caa68c9a95eb..0c30fa8fb3a9d587e752b79d106fd4715073fec6 100644
--- a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
@@ -101,13 +101,15 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
'1', -- f_adc, 0 = 160 MHz, 1 = 200 MHz
'0', -- fsub_type, 0 = critically sampled, 1 = oversampled
'0', -- beam_repositioning_flag
- x"01", -- O_si, not used
- x"02", -- N_si, not used
- TO_UVEC(g_O_rn, 8), -- O_rn
- TO_UVEC(g_N_rn, 8), -- N_rn
x"1400" -- block_period = 5120
);
+ CONSTANT c_exp_ring_info : t_ring_info := (TO_UVEC(g_O_rn, 8), -- GN index of first GN in ring
+ TO_UVEC(g_N_rn, 8), -- number of GN in ring
+ '0', -- use_cable_to_next_rn
+ '0' -- use_cable_to_previous_rn
+ );
+
CONSTANT c_beamlet_index : NATURAL := g_beamset_id * c_sdp_S_sub_bf;
CONSTANT c_crosslets_info_rec : t_sdp_crosslets_info := (offset_arr => (1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15), step => 16);
@@ -340,7 +342,7 @@ BEGIN
cur_crosslet <= test_offload_eop_cnt MOD g_nof_crosslets;
-- derive source RN index
- source_rn <= func_nof_hops_to_source_rn(cur_X_sq_cell, rn_index, g_N_rn, g_crosslets_direction);
+ source_rn <= func_ring_nof_hops_to_source_rn(cur_X_sq_cell, rn_index, g_N_rn, g_crosslets_direction);
source_gn <= g_O_rn + source_rn;
-- Prepare exp_sdp_stat_header before test_offload_sosi.eop, so that p_exp_sdp_stat_header can
@@ -702,7 +704,7 @@ BEGIN
ip_src_addr => c_ip_src_addr,
gn_index => gn_index,
-
+ ring_info => c_exp_ring_info,
sdp_info => c_exp_sdp_info,
subband_calibrated_flag => subband_calibrated_flag,
nof_crosslets => c_mm_nof_crosslets,
diff --git a/libraries/base/ring/src/vhdl/ring_lane.vhd b/libraries/base/ring/src/vhdl/ring_lane.vhd
index 73ab5af32b24ac3c13b5e9aabd9e6172092674ce..e0ccc75d9f3b84a0a67a5f98304032f607ddad68 100644
--- a/libraries/base/ring/src/vhdl/ring_lane.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane.vhd
@@ -92,7 +92,7 @@ END ring_lane;
ARCHITECTURE str OF ring_lane IS
CONSTANT c_lane_direction : STD_LOGIC := sel_a_b(g_lane_direction, '1', '0');
- SIGNAL lane_info : t_lane_info;
+ SIGNAL lane_info : t_ring_lane_info;
BEGIN
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info.vhd b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
index 64404d410a087d7813cc50869846790c141b316a..4cb4e6c23dc8f1e44ae312c606a33783fb644fc3 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
@@ -53,14 +53,14 @@ ENTITY ring_lane_info IS
lane_direction : IN STD_LOGIC;
-- sdp info
- lane_info : OUT t_lane_info
+ lane_info : OUT t_ring_lane_info
);
END ring_lane_info;
ARCHITECTURE str OF ring_lane_info IS
- SIGNAL lane_info_ro: t_lane_info; -- ro = read only
+ SIGNAL lane_info_ro: t_ring_lane_info; -- ro = read only
BEGIN
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
index 48c704142417e3ff572ea8ca378d5cf9b76ade86..584785ace3136a27538175fb94ebce48e37065ef 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
@@ -50,19 +50,19 @@ ENTITY ring_lane_info_reg IS
reg_miso : OUT t_mem_miso;
-- sdp info
- lane_info_ro : IN t_lane_info; -- ro = read only
- lane_info : OUT t_lane_info
+ lane_info_ro : IN t_ring_lane_info; -- ro = read only
+ lane_info : OUT t_ring_lane_info
);
END ring_lane_info_reg;
ARCHITECTURE str OF ring_lane_info_reg IS
- SIGNAL mm_fields_in : STD_LOGIC_VECTOR(field_slv_in_len(c_lane_info_field_arr)-1 DOWNTO 0);
- SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_lane_info_field_arr)-1 DOWNTO 0);
+ SIGNAL mm_fields_in : STD_LOGIC_VECTOR(field_slv_in_len(c_ring_lane_info_field_arr)-1 DOWNTO 0);
+ SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_ring_lane_info_field_arr)-1 DOWNTO 0);
- SIGNAL lane_info_rd : t_lane_info;
- SIGNAL lane_info_wr : t_lane_info;
+ SIGNAL lane_info_rd : t_ring_lane_info;
+ SIGNAL lane_info_wr : t_ring_lane_info;
BEGIN
@@ -81,7 +81,7 @@ BEGIN
u_mm_fields: ENTITY mm_lib.mm_fields
GENERIC MAP(
g_use_slv_in_val => FALSE, -- use FALSE to save logic when always slv_in_val='1'
- g_field_arr => c_lane_info_field_arr
+ g_field_arr => c_ring_lane_info_field_arr
)
PORT MAP (
mm_clk => mm_clk,
@@ -100,9 +100,9 @@ BEGIN
);
-- add "RO" fields to mm_fields
- mm_fields_in(field_hi(c_lane_info_field_arr, "lane_direction") DOWNTO field_lo(c_lane_info_field_arr, "lane_direction")) <= slv(lane_info_rd.lane_direction);
+ mm_fields_in(field_hi(c_ring_lane_info_field_arr, "lane_direction") DOWNTO field_lo(c_ring_lane_info_field_arr, "lane_direction")) <= slv(lane_info_rd.lane_direction);
-- get "RW" fields from mm_fields
- lane_info_wr.transport_nof_hops <= mm_fields_out(field_hi(c_lane_info_field_arr, "transport_nof_hops") DOWNTO field_lo(c_lane_info_field_arr, "transport_nof_hops"));
+ lane_info_wr.transport_nof_hops <= mm_fields_out(field_hi(c_ring_lane_info_field_arr, "transport_nof_hops") DOWNTO field_lo(c_ring_lane_info_field_arr, "transport_nof_hops"));
END str;
diff --git a/libraries/base/ring/src/vhdl/ring_pkg.vhd b/libraries/base/ring/src/vhdl/ring_pkg.vhd
index 8a41f1b36dc65cc56eee281556e053a713a9957c..41ecf785cedd835bc29d1b7270f45c6499d52560 100644
--- a/libraries/base/ring/src/vhdl/ring_pkg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_pkg.vhd
@@ -35,15 +35,15 @@ USE common_lib.common_network_layers_pkg.ALL;
PACKAGE ring_pkg is
-- lane info, see https://support.astron.nl/confluence/x/jyu7Ag
- TYPE t_lane_info IS RECORD
+ TYPE t_ring_lane_info IS RECORD
transport_nof_hops : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
lane_direction : STD_LOGIC;
END RECORD;
- CONSTANT c_lane_info_rst : t_lane_info :=
+ CONSTANT c_ring_lane_info_rst : t_ring_lane_info :=
( (OTHERS => '0'), '0' );
- CONSTANT c_lane_info_field_arr : t_common_field_arr(1 DOWNTO 0) :=
+ CONSTANT c_ring_lane_info_field_arr : t_common_field_arr(1 DOWNTO 0) :=
( (field_name_pad("transport_nof_hops"), "RW", 32, field_default(0)),
(field_name_pad("lane_direction"), "RO", 1, field_default(0)) );
@@ -93,14 +93,14 @@ PACKAGE ring_pkg is
);
CONSTANT c_ring_dp_hdr_field_size : NATURAL := ceil_div(field_slv_len(c_ring_dp_hdr_field_arr), c_longword_w);
- FUNCTION func_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : NATURAL) RETURN NATURAL;
- FUNCTION func_nof_hops_to_source_rn(hops, this_rn, N_rn : STD_LOGIC_VECTOR; lane_dir : NATURAL) RETURN STD_LOGIC_VECTOR; -- return vector length is same as hops vector length
+ FUNCTION func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : NATURAL) RETURN NATURAL;
+ FUNCTION func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn : STD_LOGIC_VECTOR; lane_dir : NATURAL) RETURN STD_LOGIC_VECTOR; -- return vector length is same as hops vector length
END PACKAGE ring_pkg;
PACKAGE BODY ring_pkg IS
- FUNCTION func_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : NATURAL) RETURN NATURAL IS
+ FUNCTION func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : NATURAL) RETURN NATURAL IS
VARIABLE v_source_rn : INTEGER;
VARIABLE v_source_rn_nat : NATURAL;
BEGIN
@@ -123,9 +123,9 @@ PACKAGE BODY ring_pkg IS
RETURN v_source_rn_nat;
END;
- FUNCTION func_nof_hops_to_source_rn(hops, this_rn, N_rn : STD_LOGIC_VECTOR; lane_dir : NATURAL) RETURN STD_LOGIC_VECTOR IS
+ FUNCTION func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn : STD_LOGIC_VECTOR; lane_dir : NATURAL) RETURN STD_LOGIC_VECTOR IS
BEGIN
- RETURN TO_UVEC(func_nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(this_rn), TO_UINT(N_rn), lane_dir),hops'LENGTH);
+ RETURN TO_UVEC(func_ring_nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(this_rn), TO_UINT(N_rn), lane_dir),hops'LENGTH);
END;
END ring_pkg;
diff --git a/libraries/base/ring/src/vhdl/ring_rx.vhd b/libraries/base/ring/src/vhdl/ring_rx.vhd
index cf000d439c874721360366092056d9fff673f9b5..92a6ae69ea45c47430d237efccb1fb2bb2624eee 100644
--- a/libraries/base/ring/src/vhdl/ring_rx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_rx.vhd
@@ -199,7 +199,7 @@ BEGIN
-- Convert nof_hops to source RN
monitor_sosi <= decoded_sosi;
- monitor_sosi.channel <= func_nof_hops_to_source_rn(decoded_sosi.channel, this_rn, N_rn, g_lane_direction);
+ monitor_sosi.channel <= func_ring_nof_hops_to_source_rn(decoded_sosi.channel, this_rn, N_rn, g_lane_direction);
END IF;
END PROCESS;
diff --git a/libraries/base/ring/src/vhdl/ring_tx.vhd b/libraries/base/ring/src/vhdl/ring_tx.vhd
index 742d0718311ea66c1282e681453b28cda147324a..5e0b781f9639f798348f1df8ba78df5ad79a0845 100644
--- a/libraries/base/ring/src/vhdl/ring_tx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_tx.vhd
@@ -205,7 +205,7 @@ BEGIN
-- Convert nof_hops to source RN
monitor_sosi <= validated_sosi;
- monitor_sosi.channel <= func_nof_hops_to_source_rn(validated_sosi.channel, this_rn, N_rn, g_lane_direction);
+ monitor_sosi.channel <= func_ring_nof_hops_to_source_rn(validated_sosi.channel, this_rn, N_rn, g_lane_direction);
END IF;
END PROCESS;
diff --git a/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
index 7b152204a3d02b20209eb8084ca95ed8e6b99dbf..09d06a669b4fc0b784486e4d2889a427fb98ccde 100644
--- a/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
+++ b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
@@ -67,7 +67,7 @@ ARCHITECTURE tb OF tb_ring_lane_info IS
-- signals used to change settings of ring_lane_info
SIGNAL lane_direction : STD_LOGIC := '0';
- SIGNAL lane_info : t_lane_info;
+ SIGNAL lane_info : t_ring_lane_info;
-- signals used for response of mm bus
SIGNAL mm_natural_response : NATURAL;