diff --git a/libraries/base/ring/hdllib.cfg b/libraries/base/ring/hdllib.cfg
index 7ba2d20b96256c3a83f726dd0cdd78eaacb6c7c3..d4452e8b64c7013b3bed1dca2884f3fa2bb58ae6 100644
--- a/libraries/base/ring/hdllib.cfg
+++ b/libraries/base/ring/hdllib.cfg
@@ -1,14 +1,18 @@
-hdl_lib_name = lofar2_ring
-hdl_library_clause_name = lofar2_ring_lib
-hdl_lib_uses_synth = common dp technology mm dp diag tr_10GbE
+hdl_lib_name = ring
+hdl_library_clause_name = ring_lib
+hdl_lib_uses_synth = common dp technology mm dp diag
hdl_lib_uses_sim =
hdl_lib_technology =
synth_files =
-
+ src/vhdl/ring_pkg.vhd
+ src/vhdl/ring_lane_info_reg.vhd
+ src/vhdl/ring_lane_info.vhd
test_bench_files =
+ tb/vhdl/tb_ring_lane_info.vhd
regression_test_vhdl =
+ tb/vhdl/tb_ring_lane_info.vhd
[modelsim_project_file]
diff --git a/libraries/base/ring/ring.peripheral.yaml b/libraries/base/ring/ring.peripheral.yaml
index a0b991efb87598f013bc1b8f1e04e2bf20fa3be8..dfa91403a1e74a2d3be813f1f2b2f9227a2b54ee 100644
--- a/libraries/base/ring/ring.peripheral.yaml
+++ b/libraries/base/ring/ring.peripheral.yaml
@@ -2,452 +2,21 @@ schema_name: args
schema_version: 1.0
schema_type: peripheral
-hdl_library_name: sdp
-hdl_library_description: "Station Digital Processor (SDP) for LOFAR2.0"
+hdl_library_name: ring
+hdl_library_description: "Ring for UniBoard2"
peripherals:
- - peripheral_name: sdp_info # pi_sdp_info.py
- peripheral_description: "SDP info."
+ - peripheral_name: ring_lane_info # pi_ring_lane_info.py
+ peripheral_description: "Ring lane info."
mm_ports:
- # MM port for sdp_info.vhd
- - mm_port_name: REG_SDP_INFO
+ # MM port for ring_lane+info.vhd
+ - mm_port_name: REG_RING_LANE_INFO
mm_port_type: REG
- mm_port_span: 16 * MM_BUS_SIZE
+ mm_port_span: 4 * MM_BUS_SIZE
mm_port_description: |
- "The SDP info contains central SDP information. The station_id applies to the entire station.
- The other info fields apply per antenna band (low band or high band). An FPGA node only
- participates in one band."
+ "The ring lane info contains information about the ring lanes."
fields:
- - - { field_name: station_id, mm_width: 16, access_mode: RW, address_offset: 0x2C }
- - - { field_name: antenna_band_index, mm_width: 1, access_mode: RO, address_offset: 0x28 }
- - - { field_name: observation_id, mm_width: 32, access_mode: RW, address_offset: 0x24 }
- - - { field_name: nyquist_zone_index, mm_width: 2, access_mode: RW, address_offset: 0x20 }
- - - { field_name: f_adc, mm_width: 1, access_mode: RO, address_offset: 0x1C }
- - - { field_name: fsub_type, mm_width: 1, access_mode: RO, address_offset: 0x18 }
- - - { field_name: beam_repositioning_flag, mm_width: 1, access_mode: RW, address_offset: 0x14 }
- - - { field_name: O_si, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: N_si, mm_width: 8, access_mode: RW, address_offset: 0xC }
- - - { field_name: O_rn, mm_width: 8, access_mode: RW, address_offset: 0x8 }
- - - { field_name: N_rn, mm_width: 8, access_mode: RW, address_offset: 0x4 }
- - - { field_name: block_period, mm_width: 16, access_mode: RO, address_offset: 0x0 }
-
-
- - peripheral_name: sdp_crosslets_subband_select # pi_sdp_crosslets_info.py
- peripheral_description: "SDP crosslets info."
- mm_ports:
- # MM port for sdp_info.vhd
- - mm_port_name: REG_CROSSLETS_INFO
- mm_port_type: REG
- mm_port_span: 16 * MM_BUS_SIZE
- mm_port_description: |
- "The SDP crosslets info contains the step size and 15 offsets, that are used to select a new
- crosslet subband for every integration interval"
- fields:
- - - { field_name: step, access_mode: RW, address_offset: 0x3C }
- - - field_name: offset
- number_of_fields: 15
- address_offset: 0x0
-
-
- - peripheral_name: sdp_subband_equalizer # pi_sdp_subband_equalizer.py
- peripheral_description: "SDP Subband equalizer coefficients."
- parameters:
- # Parameters of pi_sdp_subband_equalizer.py, fixed in sdp_subband_equalizer.vhd / sdp_pkg.vhd
- - { name: P_pfb, value: 6 } # P_pfb = S_pn / Q_fft = 12 / 2 = 6
- - { name: Q_fft, value: 2 }
- - { name: N_sub, value: 512 }
- mm_ports:
- # MM port for sdp_subband_equalizer.vhd
- - mm_port_name: RAM_EQUALIZER_GAINS
- mm_port_type: RAM
- mm_port_span: ceil_pow2(Q_fft * N_sub) * MM_BUS_SIZE
- mm_port_description: |
- "The subband weigths are stored in P_pfb = S_pn / Q_fft = 6 blocks of
- Q_fft * N_sub = 2 * 512 = 1024 complex coefficients as:
-
- (cint16)subband_weights[S_pn/Q_fft]_[Q_fft][N_sub]
-
- where S_pn = 12, Q_fft = 2 and N_sub = 512 are defined in sdp_pkg.vhd."
- number_of_mm_ports: P_pfb
- fields:
- - - field_name: coef
- field_description: |
- "Complex coefficient to calibrate the gain and phase per subband. Packed as imaginary in high part,
- real in low part of mm_width = N_complex * W_sub_weight = 2 * 16 = 32 bit."
- number_of_fields: Q_fft * N_sub # = 1024 = 2 signal inputs * 512 subbands
- address_offset: 0x0
- mm_width: 32 # = N_complex * W_sub_weight
- radix: cint16_ir
-
-
- - peripheral_name: sdp_bf_weights # pi_sdp_bf_weights.py
- peripheral_description: "SDP Beamformer weights (= beamlet weights)."
- parameters:
- # Parameters of pi_sdp_bf_weights.py, fixed in sdp_bf_weights.vhd / sdp_pkg.vhd
- - { name: N_pol_bf, value: 2 }
- - { name: P_pfb, value: 6 } # P_pfb = S_pn / Q_fft = 12 / 2 = 6
- - { name: Q_fft, value: 2 }
- - { name: S_sub_bf, value: 488 }
- mm_ports:
- # MM port for sdp_beamformer_local.vhd / sdp_bf_weights.vhd / mms_dp_gain_serial_arr.vhd
- - mm_port_name: RAM_BF_WEIGHTS
- mm_port_type: RAM
- mm_port_span: ceil_pow2(Q_fft * S_sub_bf) * MM_BUS_SIZE
- mm_port_description: |
- "The beamlet weigths are stored in N_pol_bf * P_pfb = 2 * 6 = 12 instances, where
- P_pfb = S_pn / Q_fft = 6. Per instance there is a block of Q_fft * S_sub_bf =
- 2 * 488 = 976 complex BF weights. The N_pol_bf = 2 represents the two beamformer
- polarizations, to distinguish these from the N_pol = 2 antenna polarizations. The
- beamlet weigths for S_pn = P_pfb * Q_fft = 12 signal inputs are therefore defined by:
-
- (cint16)bf_weights[N_pol_bf][P_pfb]_[Q_fft][S_sub_bf]
-
- where N_pol_bf = 2, P_pfb = 6 and Q_fft = 2 and S_sub_bf = 488, defined in sdp_pkg.vhd.
-
- The pairs of Q_fft signal inputs that are multiplexed per block are mapped to the N_pol = 2
- polarizations of an antenna. Therefore A_pn = P_pfb = 6 is the number dual polarization
- antennas per peripheral. The beamlet weigths for S_pn = A_pn * N_pol = 12 signal inputs
- are therefore defined by:
-
- (cint16)bf_weights[N_pol_bf][A_pn]_[N_pol][S_sub_bf]
-
- where N_pol_bf = 2, A_pn = 6 and N_pol = 2 and S_sub_bf = 488, defined in sdp_pkg.vhd.
-
- The BF weights can implement the full 2x2 Jones matrix for weighting and adding the
- signal input polarizations [x, y] per dual polarization antenna. The polarization index
- mapping is index 0 = X and index 1 = Y. The co-polarization BF weights (XX, YY) are set
- when index of N_pol_bf and index of N_pol are the same. The cross-polarization BF
- weights (XY, YX) are set when index of N_pol_bf and index of N_pol are different. If
- no cross-polarization weighting is needed, then these weights can be kept 0."
- number_of_mm_ports: N_pol_bf * P_pfb # = 12 = 2 beam polarizations * 6 complex PFB units
- fields:
- - - field_name: coef
- field_description: |
- "Complex weight per subband. Packed as imaginary in high part, real in low part
- of mm_width = N_complex * W_bf_weight = 2 * 16 = 32 bit."
- number_of_fields: Q_fft * S_sub_bf # = 976 = 2 signal inputs * 488 beamlets
- address_offset: 0x0
- mm_width: 32 # = N_complex * W_bf_weight
- radix: cint16_ir
-
-
- - peripheral_name: sdp_bf_scale # pi_sdp_bf_scale.py
- peripheral_description: "SDP BF beamlet data output scaling and requantization."
- parameters:
- # Parameters fixed in node_sdp_beamformer.vhd / mms_dp_scale.vhd / sdp_pkg.vhd
- - { name: g_gain_w, value: 16 }
- - { name: g_lsb_w, value: 15 }
- mm_ports:
- # MM port for node_sdp_beamformer.vhd / mms_dp_scale.vhd / mms_dp_gain.vhd / mms_dp_gain_arr.vhd
- - mm_port_name: REG_BF_SCALE
- mm_port_type: REG
- mm_port_span: 2 * MM_BUS_SIZE
- mm_port_description: |
- "The beamlet scale function scales the beamlet sum with a real scale factor and then
- requantizes the result to beamlet data output with less bits.
- The beamlet scale factor has g_gain_w bits and the value 2**g_lsb_w represents a gain of 1.
- For example for g_gain_w = 16, g_lsb_w = 15, a beamlet sum of 18 bits and beamlet data
- output of 8 bits, a scale value of:
- . 2**g_lsb_w = 2**15 selects the lowest 8 bits of the beamlet sum and clips the highest
- 10 bits,
- . 2**11 rounds the lowest 4 bits, selects the next 8 bits of the beamlet sum and clips
- the highest 6 bits,
- . 2**5 rounds the lowest 10 bits and selects the highest 8 bits of the beamlet sum."
- fields:
- - - field_name: scale
- field_description: ""
- number_of_fields: 1
- address_offset: 0x0
- mm_width: g_gain_w
- #user_width: g_gain_w # EK TODO: check parameter passing to user_width
- radix: uint32 # scale factor is unsigned value
- resolution_w: 0 - g_lsb_w
- - - field_name: unused
- field_description: "Not used."
- address_offset: 0x4
-
-
- - peripheral_name: sdp_beamformer_output_hdr_dat # pi_dp_offload_tx_hdr_dat_lofar2_beamformer_output.py
- peripheral_description: "SDP BF beamlet data output header."
- mm_ports:
- # MM port for sdp_beamformer_output.vhd / dp_offload_tx_v3.vhd
- - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
- mm_port_type: REG
- mm_port_span: 64 * MM_BUS_SIZE
- mm_port_description: |
- "The ETH/IP/UDP/application header fields for the beamlet data output offload UDP packets.
-
- The header fields are described in ICD STAT-CEP [1].
-
- https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L1%20Interface%20Control%20Documents/STAT%20to%20CEP%20ICD
-
- From tb_dp_offload_tx_v3.vhd simulation it follows that:
- . the header fields are stored in reversed address order due to that the array in VHDL has
- range (h downto 0) where the first header field (eth_destination_mac) is at index h.
- . the RO fields are filled in by the logic, when the packet header is transmitted, however
- the read value does not still represents the MM write value, not the transmitted value.
- . dp_bsn with user_width = 64 is stored as:
- word byte
- addr addr bits
- 0 0x0 [31:0] = dp_bsn[31:0]
- 1 0x4 [31:0] = dp_bsn[63:32]
- . eth_dst_mac with user_width = 48 is stored as:
- word byte
- addr addr bits
- 21 0x84 [31:0] = eth_dst_mac[31:0]
- 22 0x88 [15:0] = eth_dst_mac[47:32]
- "
- fields:
- # eth field group
- - - { field_name: eth_destination_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RW, address_offset: 0xA0 }
- - - { field_name: eth_source_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RO, address_offset: 0x98 }
- - - { field_name: eth_type, mm_width: 16, access_mode: RO, address_offset: 0x94 }
- # ip field group
- - - { field_name: ip_version, mm_width: 4, access_mode: RW, address_offset: 0x90 }
- - - { field_name: ip_header_length, mm_width: 4, access_mode: RW, address_offset: 0x8C }
- - - { field_name: ip_services, mm_width: 8, access_mode: RW, address_offset: 0x88 }
- - - { field_name: ip_total_length, mm_width: 16, access_mode: RW, address_offset: 0x84 }
- - - { field_name: ip_identification, mm_width: 16, access_mode: RW, address_offset: 0x80 }
- - - { field_name: ip_flags, mm_width: 3, access_mode: RW, address_offset: 0x7C }
- - - { field_name: ip_fragment_offset, mm_width: 13, access_mode: RW, address_offset: 0x78 }
- - - { field_name: ip_time_to_live, mm_width: 8, access_mode: RW, address_offset: 0x74 }
- - - { field_name: ip_protocol, mm_width: 8, access_mode: RW, address_offset: 0x70 }
- - - { field_name: ip_header_checksum, mm_width: 16, access_mode: RW, address_offset: 0x6C }
- - - { field_name: ip_source_address, mm_width: 32, access_mode: RW, address_offset: 0x68 }
- - - { field_name: ip_destination_address, mm_width: 32, access_mode: RW, address_offset: 0x64 }
- # udp field group
- - - { field_name: udp_source_port, mm_width: 16, access_mode: RW, address_offset: 0x60 }
- - - { field_name: udp_destination_port, mm_width: 16, access_mode: RW, address_offset: 0x5C }
- - - { field_name: udp_length, mm_width: 16, access_mode: RW, address_offset: 0x58 }
- - - { field_name: udp_checksum, mm_width: 16, access_mode: RW, address_offset: 0x54 }
- # application field group
- - - { field_name: sdp_marker, mm_width: 8, access_mode: RO, address_offset: 0x50 }
- - - { field_name: sdp_version_id, mm_width: 8, access_mode: RO, address_offset: 0x4C }
- - - { field_name: sdp_observation_id, mm_width: 32, access_mode: RW, address_offset: 0x48 }
- - - { field_name: sdp_station_id, mm_width: 16, access_mode: RW, address_offset: 0x44 }
- - - { field_name: sdp_source_info_antenna_band_index, mm_width: 1, bit_offset: 15, access_mode: RW, address_offset: 0x40 }
- - - { field_name: sdp_source_info_nyquist_zone_index, mm_width: 2, bit_offset: 13, access_mode: RW, address_offset: 0x3C }
- - - { field_name: sdp_source_info_f_adc, mm_width: 1, bit_offset: 12, access_mode: RW, address_offset: 0x38 }
- - - { field_name: sdp_source_info_fsub_type, mm_width: 1, bit_offset: 11, access_mode: RW, address_offset: 0x34 }
- - - { field_name: sdp_source_info_payload_error, mm_width: 1, bit_offset: 10, access_mode: RW, address_offset: 0x30 }
- - - { field_name: sdp_source_info_repositioning_flag, mm_width: 1, bit_offset: 9, access_mode: RW, address_offset: 0x2C }
- - - { field_name: sdp_source_info_beamlet_width, mm_width: 3, bit_offset: 5, access_mode: RW, address_offset: 0x28 }
- - - { field_name: sdp_source_info_gn_index, mm_width: 5, bit_offset: 0, access_mode: RW, address_offset: 0x24 }
-
- - - { field_name: sdp_reserved, mm_width: 32, user_width: 40, radix: uint64, access_mode: RW, address_offset: 0x1C }
- - - { field_name: sdp_beamlet_scale, mm_width: 16, access_mode: RW, address_offset: 0x18 }
- - - { field_name: sdp_beamlet_index, mm_width: 16, access_mode: RW, address_offset: 0x14 }
- - - { field_name: sdp_nof_blocks_per_packet, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: sdp_nof_beamlets_per_block, mm_width: 16, access_mode: RW, address_offset: 0xC }
- - - { field_name: sdp_block_period, mm_width: 16, access_mode: RW, address_offset: 0x8 }
- - - { field_name: BSN, mm_width: 32, user_width: 64, radix: uint64, access_mode: RW, address_offset: 0x0 }
-
-
- - peripheral_name: sdp_statistics_offload_hdr_dat_sst # pi_dp_offload_tx_hdr_dat_lofar2_sdp_statistics_offload.py
- peripheral_description: "SDP statistics offload header for the subband statistics (SST)."
- mm_ports:
- # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
- - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
- mm_port_type: REG
- mm_port_span: 64 * MM_BUS_SIZE
- mm_port_description: |
- "The ETH/IP/UDP/application header fields for the SST offload UDP packets.
-
- The Subband statistics (SST) are integrated auto power values of the subbands per signal input.
- The SST specific settings are defined by data_id_sst.
-
- The statistics offload header fields are described in ICD SC-SDP [1].
-
- [1] https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L2%20Interface%20Control%20Documents/SC%20to%20SDP%20ICD
- "
- fields:
- # eth field group
- - - { field_name: word_align, mm_width: 16, access_mode: RW, address_offset: 0xAC }
- - - { field_name: eth_destination_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RW, address_offset: 0xA4 }
- - - { field_name: eth_source_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RO, address_offset: 0x9C }
- - - { field_name: eth_type, mm_width: 16, access_mode: RO, address_offset: 0x98 }
- # ip field group
- - - { field_name: ip_version, mm_width: 4, access_mode: RW, address_offset: 0x94 }
- - - { field_name: ip_header_length, mm_width: 4, access_mode: RW, address_offset: 0x90 }
- - - { field_name: ip_services, mm_width: 8, access_mode: RW, address_offset: 0x8C }
- - - { field_name: ip_total_length, mm_width: 16, access_mode: RW, address_offset: 0x88 }
- - - { field_name: ip_identification, mm_width: 16, access_mode: RW, address_offset: 0x84 }
- - - { field_name: ip_flags, mm_width: 3, access_mode: RW, address_offset: 0x80 }
- - - { field_name: ip_fragment_offset, mm_width: 13, access_mode: RW, address_offset: 0x7C }
- - - { field_name: ip_time_to_live, mm_width: 8, access_mode: RW, address_offset: 0x78 }
- - - { field_name: ip_protocol, mm_width: 8, access_mode: RW, address_offset: 0x74 }
- - - { field_name: ip_header_checksum, mm_width: 16, access_mode: RW, address_offset: 0x70 }
- - - { field_name: ip_source_address, mm_width: 32, access_mode: RW, address_offset: 0x6C }
- - - { field_name: ip_destination_address, mm_width: 32, access_mode: RW, address_offset: 0x68 }
- # udp field group
- - - { field_name: udp_source_port, mm_width: 16, access_mode: RW, address_offset: 0x64 }
- - - { field_name: udp_destination_port, mm_width: 16, access_mode: RW, address_offset: 0x60 }
- - - { field_name: udp_length, mm_width: 16, access_mode: RW, address_offset: 0x5C }
- - - { field_name: udp_checksum, mm_width: 16, access_mode: RW, address_offset: 0x58 }
- # application field group
- - - { field_name: sdp_marker, mm_width: 8, access_mode: RO, address_offset: 0x54 }
- - - { field_name: sdp_version_id, mm_width: 8, access_mode: RO, address_offset: 0x50 }
- - - { field_name: sdp_observation_id, mm_width: 32, access_mode: RW, address_offset: 0x4C }
- - - { field_name: sdp_station_id, mm_width: 16, access_mode: RW, address_offset: 0x48 }
- - - { field_name: sdp_source_info_antenna_band_index, mm_width: 1, bit_offset: 15, access_mode: RW, address_offset: 0x44 }
- - - { field_name: sdp_source_info_nyquist_zone_index, mm_width: 2, bit_offset: 13, access_mode: RW, address_offset: 0x40 }
- - - { field_name: sdp_source_info_f_adc, mm_width: 1, bit_offset: 12, access_mode: RW, address_offset: 0x3C }
- - - { field_name: sdp_source_info_fsub_type, mm_width: 1, bit_offset: 11, access_mode: RW, address_offset: 0x38 }
- - - { field_name: sdp_source_info_payload_error, mm_width: 1, bit_offset: 10, access_mode: RW, address_offset: 0x34 }
- - - { field_name: sdp_source_info_beam_repositioning_flag, mm_width: 1, bit_offset: 9, access_mode: RW, address_offset: 0x30 }
- - - { field_name: sdp_source_info_subband_calibrated_flag, mm_width: 1, bit_offset: 8, access_mode: RW, address_offset: 0x2C }
- - - { field_name: sdp_source_info_reserved, mm_width: 3, bit_offset: 5, access_mode: RW, address_offset: 0x28 }
- - - { field_name: sdp_source_info_gn_index, mm_width: 5, bit_offset: 0, access_mode: RW, address_offset: 0x24 }
- - - { field_name: sdp_reserved, mm_width: 8, access_mode: RW, address_offset: 0x20 }
- - - { field_name: sdp_integration_interval, mm_width: 24, access_mode: RW, address_offset: 0x1C }
- - - { field_name: sdp_data_id, mm_width: 32, access_mode: RW, address_offset: 0x18 }
- - "sdp_data_id_sst":
- - { field_name: reserved, mm_width: 24, bit_offset: 8, access_mode: RW, address_offset: 0x18 }
- - { field_name: signal_input_index, mm_width: 8, bit_offset: 0, access_mode: RW, address_offset: 0x18 }
-
- - - { field_name: sdp_nof_signal_inputs, mm_width: 8, access_mode: RW, address_offset: 0x14 }
- - - { field_name: sdp_nof_bytes_per_statistic, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: sdp_nof_statistics_per_packet, mm_width: 16, access_mode: RW, address_offset: 0xC }
- - - { field_name: sdp_block_period, mm_width: 16, access_mode: RW, address_offset: 0x8 }
- - - { field_name: BSN, mm_width: 32, user_width: 64, radix: uint64, access_mode: RW, address_offset: 0x0 }
-
-
- - peripheral_name: sdp_statistics_offload_hdr_dat_bst # pi_dp_offload_tx_hdr_dat_lofar2_sdp_statistics_offload.py
- peripheral_description: "SDP statistics offload header for the beamlet statistics (BST)."
- mm_ports:
- # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
- - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
- mm_port_type: REG
- mm_port_span: 64 * MM_BUS_SIZE
- mm_port_description: |
- "The ETH/IP/UDP/application header fields for the BST offload UDP packets.
-
- The beamlet statistics (BST) are integrated auto power values of the beamlets per beamset
- The BST specific settings are defined by data_id_bst.
-
- The statistics offload header fields are described in ICD SC-SDP [1].
-
- [1] https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L2%20Interface%20Control%20Documents/SC%20to%20SDP%20ICD
- "
- fields:
- # eth field group
- - - { field_name: word_align, mm_width: 16, access_mode: RW, address_offset: 0xAC }
- - - { field_name: eth_destination_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RW, address_offset: 0xA4 }
- - - { field_name: eth_source_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RO, address_offset: 0x9C }
- - - { field_name: eth_type, mm_width: 16, access_mode: RO, address_offset: 0x98 }
- # ip field group
- - - { field_name: ip_version, mm_width: 4, access_mode: RW, address_offset: 0x94 }
- - - { field_name: ip_header_length, mm_width: 4, access_mode: RW, address_offset: 0x90 }
- - - { field_name: ip_services, mm_width: 8, access_mode: RW, address_offset: 0x8C }
- - - { field_name: ip_total_length, mm_width: 16, access_mode: RW, address_offset: 0x88 }
- - - { field_name: ip_identification, mm_width: 16, access_mode: RW, address_offset: 0x84 }
- - - { field_name: ip_flags, mm_width: 3, access_mode: RW, address_offset: 0x80 }
- - - { field_name: ip_fragment_offset, mm_width: 13, access_mode: RW, address_offset: 0x7C }
- - - { field_name: ip_time_to_live, mm_width: 8, access_mode: RW, address_offset: 0x78 }
- - - { field_name: ip_protocol, mm_width: 8, access_mode: RW, address_offset: 0x74 }
- - - { field_name: ip_header_checksum, mm_width: 16, access_mode: RW, address_offset: 0x70 }
- - - { field_name: ip_source_address, mm_width: 32, access_mode: RW, address_offset: 0x6C }
- - - { field_name: ip_destination_address, mm_width: 32, access_mode: RW, address_offset: 0x68 }
- # udp field group
- - - { field_name: udp_source_port, mm_width: 16, access_mode: RW, address_offset: 0x64 }
- - - { field_name: udp_destination_port, mm_width: 16, access_mode: RW, address_offset: 0x60 }
- - - { field_name: udp_length, mm_width: 16, access_mode: RW, address_offset: 0x5C }
- - - { field_name: udp_checksum, mm_width: 16, access_mode: RW, address_offset: 0x58 }
- # application field group
- - - { field_name: sdp_marker, mm_width: 8, access_mode: RO, address_offset: 0x54 }
- - - { field_name: sdp_version_id, mm_width: 8, access_mode: RO, address_offset: 0x50 }
- - - { field_name: sdp_observation_id, mm_width: 32, access_mode: RW, address_offset: 0x4C }
- - - { field_name: sdp_station_id, mm_width: 16, access_mode: RW, address_offset: 0x48 }
- - - { field_name: sdp_source_info_antenna_band_index, mm_width: 1, bit_offset: 15, access_mode: RW, address_offset: 0x44 }
- - - { field_name: sdp_source_info_nyquist_zone_index, mm_width: 2, bit_offset: 13, access_mode: RW, address_offset: 0x40 }
- - - { field_name: sdp_source_info_f_adc, mm_width: 1, bit_offset: 12, access_mode: RW, address_offset: 0x3C }
- - - { field_name: sdp_source_info_fsub_type, mm_width: 1, bit_offset: 11, access_mode: RW, address_offset: 0x38 }
- - - { field_name: sdp_source_info_payload_error, mm_width: 1, bit_offset: 10, access_mode: RW, address_offset: 0x34 }
- - - { field_name: sdp_source_info_beam_repositioning_flag, mm_width: 1, bit_offset: 9, access_mode: RW, address_offset: 0x30 }
- - - { field_name: sdp_source_info_subband_calibrated_flag, mm_width: 1, bit_offset: 8, access_mode: RW, address_offset: 0x2C }
- - - { field_name: sdp_source_info_reserved, mm_width: 3, bit_offset: 5, access_mode: RW, address_offset: 0x28 }
- - - { field_name: sdp_source_info_gn_index, mm_width: 5, bit_offset: 0, access_mode: RW, address_offset: 0x24 }
- - - { field_name: sdp_reserved, mm_width: 8, access_mode: RW, address_offset: 0x20 }
- - - { field_name: sdp_integration_interval, mm_width: 24, access_mode: RW, address_offset: 0x1C }
- - - { field_name: sdp_data_id, mm_width: 32, access_mode: RW, address_offset: 0x18 }
- - "sdp_data_id_bst":
- - { field_name: reserved, mm_width: 16, bit_offset: 16, access_mode: RW, address_offset: 0x18 }
- - { field_name: beamlet_index, mm_width: 16, bit_offset: 0, access_mode: RW, address_offset: 0x18 }
-
- - - { field_name: nof_signal_inputs, mm_width: 8, access_mode: RW, address_offset: 0x14 }
- - - { field_name: nof_bytes_per_statistic, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: nof_statistics_per_packet, mm_width: 16, access_mode: RW, address_offset: 0xC }
- - - { field_name: block_period, mm_width: 16, access_mode: RW, address_offset: 0x8 }
- - - { field_name: BSN, mm_width: 32, user_width: 64, radix: uint64, access_mode: RW, address_offset: 0x0 }
-
-
- - peripheral_name: sdp_statistics_offload_hdr_dat_xst # pi_dp_offload_tx_hdr_dat_lofar2_sdp_statistics_offload.py
- peripheral_description: "SDP statistics offload header for the cross-subband statistics (XST)."
- mm_ports:
- # MM port for sdp_statistics_offload.vhd / dp_offload_tx_v3.vhd
- - mm_port_name: REG_DP_OFFLOAD_TX_HDR_DAT
- mm_port_type: REG
- mm_port_span: 64 * MM_BUS_SIZE
- mm_port_description: |
- "The ETH/IP/UDP/application header fields for the XST offload UDP packets.
-
- The crosslet statistics (XST) are integrated cross power values of the subbands from all
- pairs of signal inputs per suband.
- The XST specific settings are defined by data_id_xst.
-
- The statistics offload header fields are described in ICD SC-SDP [1].
-
- [1] https://plm.astron.nl/polarion/#/project/LOFAR2System/wiki/L2%20Interface%20Control%20Documents/SC%20to%20SDP%20ICD
- "
- fields:
- # eth field group
- - - { field_name: word_align, mm_width: 16, access_mode: RW, address_offset: 0xAC }
- - - { field_name: eth_destination_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RW, address_offset: 0xA4 }
- - - { field_name: eth_source_mac, mm_width: 32, user_width: 48, radix: uint64, access_mode: RO, address_offset: 0x9C }
- - - { field_name: eth_type, mm_width: 16, access_mode: RO, address_offset: 0x98 }
- # ip field group
- - - { field_name: ip_version, mm_width: 4, access_mode: RW, address_offset: 0x94 }
- - - { field_name: ip_header_length, mm_width: 4, access_mode: RW, address_offset: 0x90 }
- - - { field_name: ip_services, mm_width: 8, access_mode: RW, address_offset: 0x8C }
- - - { field_name: ip_total_length, mm_width: 16, access_mode: RW, address_offset: 0x88 }
- - - { field_name: ip_identification, mm_width: 16, access_mode: RW, address_offset: 0x84 }
- - - { field_name: ip_flags, mm_width: 3, access_mode: RW, address_offset: 0x80 }
- - - { field_name: ip_fragment_offset, mm_width: 13, access_mode: RW, address_offset: 0x7C }
- - - { field_name: ip_time_to_live, mm_width: 8, access_mode: RW, address_offset: 0x78 }
- - - { field_name: ip_protocol, mm_width: 8, access_mode: RW, address_offset: 0x74 }
- - - { field_name: ip_header_checksum, mm_width: 16, access_mode: RW, address_offset: 0x70 }
- - - { field_name: ip_source_address, mm_width: 32, access_mode: RW, address_offset: 0x6C }
- - - { field_name: ip_destination_address, mm_width: 32, access_mode: RW, address_offset: 0x68 }
- # udp field group
- - - { field_name: udp_source_port, mm_width: 16, access_mode: RW, address_offset: 0x64 }
- - - { field_name: udp_destination_port, mm_width: 16, access_mode: RW, address_offset: 0x60 }
- - - { field_name: udp_length, mm_width: 16, access_mode: RW, address_offset: 0x5C }
- - - { field_name: udp_checksum, mm_width: 16, access_mode: RW, address_offset: 0x58 }
- # application field group
- - - { field_name: sdp_marker, mm_width: 8, access_mode: RO, address_offset: 0x54 }
- - - { field_name: sdp_version_id, mm_width: 8, access_mode: RO, address_offset: 0x50 }
- - - { field_name: sdp_observation_id, mm_width: 32, access_mode: RW, address_offset: 0x4C }
- - - { field_name: sdp_station_id, mm_width: 16, access_mode: RW, address_offset: 0x48 }
- - - { field_name: sdp_source_info_antenna_band_index, mm_width: 1, bit_offset: 15, access_mode: RW, address_offset: 0x44 }
- - - { field_name: sdp_source_info_nyquist_zone_index, mm_width: 2, bit_offset: 13, access_mode: RW, address_offset: 0x40 }
- - - { field_name: sdp_source_info_f_adc, mm_width: 1, bit_offset: 12, access_mode: RW, address_offset: 0x3C }
- - - { field_name: sdp_source_info_fsub_type, mm_width: 1, bit_offset: 11, access_mode: RW, address_offset: 0x38 }
- - - { field_name: sdp_source_info_payload_error, mm_width: 1, bit_offset: 10, access_mode: RW, address_offset: 0x34 }
- - - { field_name: sdp_source_info_beam_repositioning_flag, mm_width: 1, bit_offset: 9, access_mode: RW, address_offset: 0x30 }
- - - { field_name: sdp_source_info_subband_calibrated_flag, mm_width: 1, bit_offset: 8, access_mode: RW, address_offset: 0x2C }
- - - { field_name: sdp_source_info_reserved, mm_width: 3, bit_offset: 5, access_mode: RW, address_offset: 0x28 }
- - - { field_name: sdp_source_info_gn_index, mm_width: 5, bit_offset: 0, access_mode: RW, address_offset: 0x24 }
- - - { field_name: sdp_reserved, mm_width: 8, access_mode: RW, address_offset: 0x20 }
- - - { field_name: sdp_integration_interval, mm_width: 24, access_mode: RW, address_offset: 0x1C }
- - - { field_name: sdp_data_id, mm_width: 32, access_mode: RW, address_offset: 0x18 }
- - "sdp_data_id_xst":
- - { field_name: reserved, mm_width: 7, bit_offset: 25, access_mode: RW, address_offset: 0x18 }
- - { field_name: subband_index, mm_width: 9, bit_offset: 16, access_mode: RW, address_offset: 0x18 }
- - { field_name: signal_input_A_index, mm_width: 8, bit_offset: 8, access_mode: RW, address_offset: 0x18 }
- - { field_name: signal_input_B_index, mm_width: 8, bit_offset: 0, access_mode: RW, address_offset: 0x18 }
-
- - - { field_name: nof_signal_inputs, mm_width: 8, access_mode: RW, address_offset: 0x14 }
- - - { field_name: nof_bytes_per_statistic, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: nof_statistics_per_packet, mm_width: 16, access_mode: RW, address_offset: 0xC }
- - - { field_name: block_period, mm_width: 16, access_mode: RW, address_offset: 0x8 }
- - - { field_name: BSN, mm_width: 32, user_width: 64, radix: uint64, access_mode: RW, address_offset: 0x0 }
+ - - { field_name: transport_nof_hops, mm_width: 32, access_mode: RW, address_offset: 0xC }
+ - - { field_name: lane_direction, mm_width: 1, access_mode: RO, address_offset: 0x8 }
+ - - { field_name: tx_select, mm_width: 1, access_mode: RW, address_offset: 0x4 }
+ - - { field_name: rx_select, mm_width: 1, access_mode: RW, address_offset: 0x0 }
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info.vhd b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
index 869ce43cb9d03ca03c07c94ca6a22876ade6ff8b..64404d410a087d7813cc50869846790c141b316a 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
@@ -25,7 +25,7 @@
-- Purpose:
-- . Ring lane info register
-- Description:
---
+-- See ring_pkg.vhd
-- Remark:
-- .
-------------------------------------------------------------------------------
@@ -35,6 +35,7 @@ USE IEEE.STD_LOGIC_1164.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_field_pkg.ALL;
+USE work.ring_pkg.ALL;
ENTITY ring_lane_info IS
PORT (
@@ -80,6 +81,6 @@ BEGIN
);
- lane_info_ro.lane_direction <= lane_direction;
+ lane_info_ro.lane_direction <= lane_direction;
END str;
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
index 1ed8937b5aafd3907b6feb3131b70d88620d9e74..cc805353e543a1948f9d33736934bb15fc86d759 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
@@ -20,12 +20,12 @@
-------------------------------------------------------------------------------
--
--- Author: R. Donker
+-- Author: R. van der Walle
-- Purpose:
-- . Ring lane info register
-- Description:
---
+-- See ring_pkg.vhd
-- Remark:
-- .
-------------------------------------------------------------------------------
@@ -56,7 +56,7 @@ ENTITY ring_lane_info_reg IS
END ring_lane_info_reg;
-ARCHITECTURE str OF lane_info_reg IS
+ARCHITECTURE str OF ring_lane_info_reg IS
SIGNAL mm_fields_in : STD_LOGIC_VECTOR(field_slv_in_len(c_lane_info_field_arr)-1 DOWNTO 0);
SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_lane_info_field_arr)-1 DOWNTO 0);
@@ -104,7 +104,7 @@ BEGIN
-- get "RW" fields from mm_fields
lane_info_wr.transport_nof_hops <= mm_fields_out(field_hi(c_lane_info_field_arr, "transport_nof_hops") DOWNTO field_lo(c_lane_info_field_arr, "transport_nof_hops"));
- lane_info_wr.tx_select <= mm_fields_out(field_hi(c_lane_info_field_arr, "tx_select") DOWNTO field_lo(c_lane_info_field_arr, "tx_select"));
- lane_info_wr.rx_select <= mm_fields_out(field_hi(c_lane_info_field_arr, "rx_select") DOWNTO field_lo(c_lane_info_field_arr, "rx_select"));
+ lane_info_wr.tx_select <= sl(mm_fields_out(field_hi(c_lane_info_field_arr, "tx_select") DOWNTO field_lo(c_lane_info_field_arr, "tx_select")));
+ lane_info_wr.rx_select <= sl(mm_fields_out(field_hi(c_lane_info_field_arr, "rx_select") DOWNTO field_lo(c_lane_info_field_arr, "rx_select")));
END str;
diff --git a/libraries/base/ring/src/vhdl/ring_pkg.vhd b/libraries/base/ring/src/vhdl/ring_pkg.vhd
index c3e01e265639b8e75b3c10f8cd0dc24e44eca613..4786e34fb59f1d07cbb733e64246272ec20a5e3a 100644
--- a/libraries/base/ring/src/vhdl/ring_pkg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_pkg.vhd
@@ -32,7 +32,7 @@ USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_field_pkg.ALL;
-PACKAGE sdp_pkg is
+PACKAGE ring_pkg is
-- lane info, see https://support.astron.nl/confluence/x/jyu7Ag
-- +====================+========+==============================================================================+===========================+
-- | Field | Access | Description | Remark |
@@ -78,10 +78,10 @@ PACKAGE sdp_pkg is
(field_name_pad("tx_select"), "RW", 1, field_default(0)),
(field_name_pad("rx_select"), "RW", 1, field_default(0)) );
- END PACKAGE sdp_pkg;
+ END PACKAGE ring_pkg;
-PACKAGE BODY sdp_pkg IS
+PACKAGE BODY ring_pkg IS
-END sdp_pkg;
+END ring_pkg;
diff --git a/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..7744465c7ab13d171cc7d1fde94f8754c59bcbd5
--- /dev/null
+++ b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
@@ -0,0 +1,154 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright 2021
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
+--
+-- http://www.apache.org/licenses/LICENSE-2.0
+--
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
+--
+-------------------------------------------------------------------------------
+
+-------------------------------------------------------------------------------
+--
+-- Author: R. van der Walle
+
+-- Purpose:
+-- . test bench for ring_lane_info.vhd (and ring_lane_info_reg.vhd)
+-- Description:
+--
+-- Remark:
+-- .
+-------------------------------------------------------------------------------
+
+LIBRARY IEEE, common_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
+USE common_lib.tb_common_pkg.ALL;
+USE common_lib.tb_common_mem_pkg.ALL;
+USE work.ring_pkg.ALL;
+
+
+ENTITY tb_ring_lane_info IS
+END tb_ring_lane_info;
+
+ARCHITECTURE tb OF tb_ring_lane_info IS
+ CONSTANT c_dp_clk_period : TIME := 5 ns; -- 200 MHz
+ CONSTANT c_mm_clk_period : TIME := 20 ns; -- 50 MHz
+
+ CONSTANT c_cross_clock_domain_latency : NATURAL := 20;
+
+ -- used mm_adresses on mm bus
+ CONSTANT c_mm_addr_rx_select : NATURAL := 0;
+ CONSTANT c_mm_addr_tx_select : NATURAL := 1;
+ CONSTANT c_mm_addr_lane_direction : NATURAL := 2;
+ CONSTANT c_mm_addr_transport_nof_hops : NATURAL := 3;
+
+ SIGNAL tb_end : STD_LOGIC := '0';
+ SIGNAL tb_mm_reg_end : STD_LOGIC := '0';
+
+ SIGNAL dp_clk : STD_LOGIC := '1'; -- digital data path clock = 200 MHz (deser factor 4);
+ SIGNAL dp_rst : STD_LOGIC;
+
+ SIGNAL mm_clk : STD_LOGIC := '1'; -- MM control clock = 50 MHz
+ SIGNAL mm_rst : STD_LOGIC;
+
+ SIGNAL reg_mosi : t_mem_mosi := c_mem_mosi_rst;
+ SIGNAL reg_miso : t_mem_miso;
+
+ -- signals used to change settings of ring_lane_info
+ SIGNAL lane_direction : STD_LOGIC := '0';
+
+ SIGNAL lane_info : t_lane_info;
+
+ -- signals used for response of mm bus
+ SIGNAL mm_natural_response : NATURAL;
+BEGIN
+ dp_rst <= '1', '0' AFTER c_dp_clk_period*7;
+ dp_clk <= (NOT dp_clk) OR tb_end AFTER c_dp_clk_period/2;
+
+ mm_rst <= '1', '0' AFTER c_mm_clk_period*7;
+ mm_clk <= (NOT mm_clk) OR tb_end AFTER c_mm_clk_period/2;
+
+ p_mm_reg_stimuli : PROCESS
+ BEGIN
+ reg_mosi <= c_mem_mosi_rst;
+
+ -- initialyze
+ proc_common_wait_until_low(mm_clk, mm_rst);
+ proc_common_wait_some_cycles(mm_clk, 100);
+
+ -- default all register hold value 0, try to write 1 in all registers
+ proc_mem_mm_bus_wr(c_mm_addr_transport_nof_hops ,11 ,mm_clk, reg_miso, reg_mosi);
+ proc_mem_mm_bus_wr(c_mm_addr_lane_direction ,1 ,mm_clk, reg_miso, reg_mosi); -- RO
+ proc_mem_mm_bus_wr(c_mm_addr_tx_select ,1 ,mm_clk, reg_miso, reg_mosi);
+ proc_mem_mm_bus_wr(c_mm_addr_rx_select ,1 ,mm_clk, reg_miso, reg_mosi);
+ proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
+
+
+ proc_mem_mm_bus_rd(c_mm_addr_transport_nof_hops, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 11 REPORT "wrong c_mm_addr_transport_nof_hops" SEVERITY ERROR;
+
+ proc_mem_mm_bus_rd(c_mm_addr_lane_direction, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response /= 1 REPORT "wrong lane_direction (not read only)" SEVERITY ERROR;
+
+ proc_mem_mm_bus_rd(c_mm_addr_tx_select, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 1 REPORT "wrong tx_select" SEVERITY ERROR;
+
+ proc_mem_mm_bus_rd(c_mm_addr_rx_select, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
+ mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
+ ASSERT mm_natural_response = 1 REPORT "wrong rx_select" SEVERITY ERROR;
+
+ proc_common_wait_some_cycles(mm_clk, 100);
+ tb_mm_reg_end <= '1';
+ WAIT;
+
+ END PROCESS;
+
+ -- check if values in lane_info match with expected values
+ p_lane_info_stimuli : PROCESS
+ BEGIN
+ proc_common_wait_until_high(mm_clk, tb_mm_reg_end); -- wait for p_mm_reg_stimuli done
+
+ ASSERT TO_UINT(lane_info.transport_nof_hops) = 11 REPORT "wrong lane_info.transport_nof_hops value" SEVERITY ERROR;
+ ASSERT lane_info.lane_direction = '0' REPORT "wrong lane_info.lane_direction value" SEVERITY ERROR;
+ ASSERT lane_info.tx_select = '1' REPORT "wrong lane_info.tx_select value" SEVERITY ERROR;
+ ASSERT lane_info.rx_select = '1' REPORT "wrong lane_info.rx_select value" SEVERITY ERROR;
+
+ proc_common_wait_some_cycles(mm_clk, 100);
+ tb_end <= '1';
+ WAIT;
+ END PROCESS;
+
+
+ -- SDP info
+ u_dut: ENTITY work.ring_lane_info
+ PORT MAP (
+ mm_clk => mm_clk,
+ mm_rst => mm_rst,
+
+ dp_clk => dp_clk,
+ dp_rst => dp_rst,
+
+ reg_mosi => reg_mosi,
+ reg_miso => reg_miso,
+
+ lane_direction => lane_direction,
+
+ lane_info => lane_info
+ );
+
+END tb;