diff --git a/libraries/technology/ip_arria10/voltage_sense/compile_ip.tcl b/libraries/technology/ip_arria10/voltage_sense/compile_ip.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..ae08e35d37b326c97f6408db138752a9ba4b3f21
--- /dev/null
+++ b/libraries/technology/ip_arria10/voltage_sense/compile_ip.tcl
@@ -0,0 +1,36 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+set IP_DIR   "$env(RADIOHDL)/libraries/technology/ip_arria10/voltage_sense/generated/sim"
+
+#vlib ./work/         ;# Assume library work already exists
+
+vmap ip_arria10_voltage_sense_altera_voltage_sense_150 ./work/
+
+  vcom "$IP_DIR/ip_arria10_voltage_sense.vhd"
+
diff --git a/libraries/technology/ip_arria10/voltage_sense/generate_ip.sh b/libraries/technology/ip_arria10/voltage_sense/generate_ip.sh
new file mode 100755
index 0000000000000000000000000000000000000000..86b053bc2e17e200c14bcee6308fff236cd42321
--- /dev/null
+++ b/libraries/technology/ip_arria10/voltage_sense/generate_ip.sh
@@ -0,0 +1,44 @@
+#!/bin/bash
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2014                                                        
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>           
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands                             
+#                                                                           
+# This program is free software: you can redistribute it and/or modify      
+# it under the terms of the GNU General Public License as published by      
+# the Free Software Foundation, either version 3 of the License, or         
+# (at your option) any later version.                                       
+#                                                                           
+# This program is distributed in the hope that it will be useful,           
+# but WITHOUT ANY WARRANTY; without even the implied warranty of            
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             
+# GNU General Public License for more details.                              
+#                                                                           
+# You should have received a copy of the GNU General Public License         
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.     
+#
+# -------------------------------------------------------------------------- #
+#
+# Purpose: Generate IP with Qsys
+# Description:
+#   Generate the IP in a separate generated/ subdirectory.
+#
+# Usage:
+#
+#   ./generate_ip.sh
+#
+
+# Tool settings for selected target "unb2" with arria10
+. ${RADIOHDL}/tools/quartus/set_quartus unb2
+
+#qsys-generate --help
+
+# Only generate the source IP
+# - use --synthesis=VHDL to have top level in VHDL similar as with MegaWizard
+qsys-generate ip_arria10_voltage_sense.qsys \
+              --synthesis=VHDL \
+              --simulation=VHDL \
+              --output-directory=generated \
+              --allow-mixed-language-simulation
diff --git a/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg b/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..5b0fcb4501deb1da7f2999d2b2f8e9e45cec3839
--- /dev/null
+++ b/libraries/technology/ip_arria10/voltage_sense/hdllib.cfg
@@ -0,0 +1,15 @@
+hdl_lib_name = ip_arria10_voltage_sense 
+hdl_library_clause_name = ip_arria10_voltage_sense_altera_voltage_sense_150
+hdl_lib_uses_synth = 
+hdl_lib_uses_sim = 
+
+hdl_lib_technology = ip_arria10
+
+modelsim_compile_ip_files =
+    $RADIOHDL/libraries/technology/ip_arria10/voltage_sense/compile_ip.tcl
+
+synth_files =
+    
+test_bench_files = 
+
+quartus_qip_files = generated/ip_arria10_voltage_sense.qip