diff --git a/libraries/io/tr_xaui/tb/vhdl/tb_tr_xaui.vhd b/libraries/io/tr_xaui/tb/vhdl/tb_tr_xaui.vhd index 8b3dbc00d920b008528dd27e701d63b5dcd2a774..6470dde411f2227f1bccd57c659435d149ce5798 100644 --- a/libraries/io/tr_xaui/tb/vhdl/tb_tr_xaui.vhd +++ b/libraries/io/tr_xaui/tb/vhdl/tb_tr_xaui.vhd @@ -20,7 +20,7 @@ -- -------------------------------------------------------------------------------- --- Purpose: Test bench for tr_xaui using diagnostics +-- Purpose: Test bench for tr_xaui using diagnostics and PHY loop back with delay and link_fault -- Description: -- Usage: -- > as 10 @@ -112,18 +112,17 @@ BEGIN -- verify link proc_common_wait_until_low(rx_clk, rx_rst); - proc_common_wait_some_cycles(rx_clk, 20); - snk_diag_en <= (OTHERS=>'1'); proc_common_wait_some_cycles(tx_clk, 20); - src_diag_en <= (OTHERS=>'1'); + src_diag_en <= (OTHERS=>'1'); -- first enable Tx seq + proc_common_wait_some_cycles(rx_clk, 20); + snk_diag_en <= (OTHERS=>'1'); -- then enable Rx seq proc_common_wait_some_cycles(rx_clk, 50); - verify_en <= '1'; + verify_en <= '1'; -- p_verify that Rx seq result is OK WAIT FOR 5 us; -- model link fault - snk_diag_en <= (OTHERS=>'0'); - src_diag_en <= (OTHERS=>'0'); - verify_en <= '0'; + verify_en <= '0'; -- p_verify stop + snk_diag_en <= (OTHERS=>'0'); -- disable Rx seq to avoid Error due to link_fault, keep Tx seq enabled link_fault <= '1'; WAIT FOR 1 us; @@ -132,11 +131,9 @@ BEGIN WAIT FOR 1 us; proc_common_wait_until_low(rx_clk, rx_rst); proc_common_wait_some_cycles(rx_clk, 20); - snk_diag_en <= (OTHERS=>'1'); - proc_common_wait_some_cycles(tx_clk, 20); - src_diag_en <= (OTHERS=>'1'); + snk_diag_en <= (OTHERS=>'1'); -- enable Rx seq again proc_common_wait_some_cycles(rx_clk, 50); - verify_en <= '1'; + verify_en <= '1'; -- p_verify that Rx seq result is OK WAIT FOR 5 us; -- Stop the simulation