From 841d5da89495269235e05b9058ed99c29492eb3c Mon Sep 17 00:00:00 2001
From: Pieter Donker <donker@astron.nl>
Date: Mon, 15 May 2023 12:35:09 +0000
Subject: [PATCH] Update .gitlab-ci.yml file

---
 .gitlab-ci.yml | 74 +-------------------------------------------------
 1 file changed, 1 insertion(+), 73 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 7bd76865ab..9c7a23df66 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -27,6 +27,7 @@
 
 stages:
     - linting
+
 #   - simulation
 #   - synthesis
 #   - hardware
@@ -108,78 +109,5 @@ lint-vhdl-applications-lofar2:
         - cd applications/lofar2
         - find . -name "*.vhd" -exec vsg -c ../../vsg_config.yaml -f {} \;
 
-###############################################################################
-# HDL simulation stage
-###############################################################################
-sim-compile:
-    tags:
-        - fpga
-    stage: simulation
-    allow_failure: true
-    script:
-        - echo "Compiling for simulation"
-        - mkdir build
-        - touch build/info.txt
-    artifacts:
-        paths:
-            - build/
-
-sim-run:
-    tags:
-        - fpga
-    stage: simulation
-    allow_failure: true
-    script:
-        - echo "Running simulations"
-#        - test -f "build/info.txt" # This fails despite having artifact (see
-                                    # sim-compile code block where a folder and
-                                    # file are generated and preserved by using
-                                    # 'artifacts').
-
-###############################################################################
-# HDL synthesis stage
-###############################################################################
-synth-compile:
-    tags:
-        - fpga
-    stage: synthesis
-    allow_failure: true
-    script:
-        - echo "Compiling for synthesis"
-
-synth-check-fmax:
-    tags:
-        - fpga
-    stage: synthesis
-    allow_failure: true
-    script:
-        - echo "Checking achieved fMax"
-
-synth-check-programming-files:
-    tags:
-        - fpga
-    stage: synthesis
-    allow_failure: true
-    script:
-        - echo "Checking if programming files have been generated"
-
-
-###############################################################################
-# Trigger hardware test only on merge request
-###############################################################################
-
-trigger-opc-ua-test:
-    stage: hardware
-    allow_failure: true
-    variables:
-        HDL_BRANCH: '$CI_COMMIT_BRANCH'
-    only:
-        changes:
-            - applications/lofar2/images/lofar2_unb2b_sdp_station_full.tar.gz
-#        - merge_requests
-
-    trigger:
-        project: LOFAR2.0/sdptr
-        branch: L2SDP-658 #Point to specific branch when needed. Otherwise comment this out to trigger test in downstream master repo.
 
 
-- 
GitLab