diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
index 50bdf0d744212110daff5d71e872d0b45c96d9e9..3c3c279cc25a7452be8131dc00d5f72f0a4dbdbc 100644
--- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
+++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg
@@ -12,6 +12,7 @@ hdl_lib_excludes = ip_arria10_tse_sgmii_gx
                    ip_arria10_transceiver_reset_controller_1
                    ip_arria10_transceiver_reset_controller_24
                    ip_arria10_ddr4_8g_2400
+                   ip_arria10_ddr4_4g_1600
 
 synth_files =
     unb2_test_ddr_MB_I_II.vhd
@@ -20,7 +21,7 @@ test_bench_files =
     tb_unb2_test_ddr_MB_I_II.vhd
 
 modelsim_compile_ip_files =
-    $RADIOHDL/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
+    $RADIOHDL/libraries/technology/ip_arria10/ddr4_4g_2000/copy_hex_files.tcl
     
 modelsim_copy_files =
     ../../src/hex hex