From 81299e4987108d2bb864f1b1e2a78effc15d2d78 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Thu, 5 Jun 2014 06:23:44 +0000
Subject: [PATCH] Rename ip_altera_mf into ip_stratixiv.
---
libraries/technology/iobuf/tech_iobuf_component_pkg.vhd | 6 +++---
libraries/technology/iobuf/tech_iobuf_ddio_in.vhd | 6 +++---
libraries/technology/iobuf/tech_iobuf_ddio_out.vhd | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
index ed1c4f421f..936c729d91 100644
--- a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
@@ -27,10 +27,10 @@ USE IEEE.STD_LOGIC_1164.ALL;
PACKAGE tech_iobuf_component_pkg IS
-----------------------------------------------------------------------------
- -- altera_mf
+ -- ip_stratixiv
-----------------------------------------------------------------------------
- COMPONENT altera_mf_ddio_in IS
+ COMPONENT ip_stratixiv_ddio_in IS
GENERIC(
g_device_family : STRING := "Stratix IV";
g_width : NATURAL := 1
@@ -45,7 +45,7 @@ PACKAGE tech_iobuf_component_pkg IS
);
END COMPONENT;
- COMPONENT altera_mf_ddio_out IS
+ COMPONENT ip_stratixiv_ddio_out IS
GENERIC(
g_device_family : STRING := "Stratix IV";
g_width : NATURAL := 1
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
index 560837a916..70272e2092 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
@@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
-LIBRARY ip_altera_mf_lib;
+LIBRARY ip_stratixiv_lib;
ENTITY tech_iobuf_ddio_in IS
GENERIC (
@@ -48,8 +48,8 @@ ARCHITECTURE str OF tech_iobuf_ddio_in IS
BEGIN
- gen_altera_mf : IF g_technology=c_tech_stratixiv GENERATE
- u0 : altera_mf_ddio_in
+ gen_ip_stratixiv : IF g_technology=c_tech_stratixiv GENERATE
+ u0 : ip_stratixiv_ddio_in
GENERIC MAP ("Stratix IV", g_width)
PORT MAP (in_dat, in_clk, in_clk_en, rst, out_dat_hi, out_dat_lo);
END GENERATE;
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
index 24ad2a7bc7..2832c82db2 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
@@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
-LIBRARY ip_altera_mf_lib;
+LIBRARY ip_stratixiv_lib;
ENTITY tech_iobuf_ddio_out IS
GENERIC (
@@ -48,8 +48,8 @@ ARCHITECTURE str OF tech_iobuf_ddio_out IS
BEGIN
- gen_altera_mf : IF g_technology=c_tech_stratixiv GENERATE
- u0 : altera_mf_ddio_out
+ gen_ip_stratixiv : IF g_technology=c_tech_stratixiv GENERATE
+ u0 : ip_stratixiv_ddio_out
GENERIC MAP ("Stratix IV", g_width)
PORT MAP (rst, in_clk, in_clk_en, in_dat_hi, in_dat_lo, out_dat);
END GENERATE;
--
GitLab