diff --git a/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.qsf b/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.qsf
index 8e3a2c3065621be8a18abe9332ef08c1124ecd2c..66076265594c62affcc8c4caadb3cd79773fabfb 100644
--- a/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.qsf
+++ b/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.qsf
@@ -67,7 +67,6 @@ set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
 set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
 set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
 set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
-set_global_assignment -name SMART_RECOMPILE ON
 set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
 set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
 
diff --git a/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc b/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
index aaa54dd1553026b1c45cc8fe043adb5eb53fb3c8..61984066239e7909f191da031c1bafe4abf77acf 100644
--- a/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
+++ b/boards/uniboard2/libraries/unb2_board/quartus/unb2_board.sdc
@@ -33,11 +33,8 @@ create_clock -period 1.552 -name {SA_CLK} { SA_CLK }
 create_clock -period 1.552 -name {SB_CLK} { SB_CLK }
 create_clock -period 1.552 -name {BCK_REF_CLK} { BCK_REF_CLK }
 
-
-
 derive_pll_clocks
-
-#derive_clock_uncertainty
+derive_clock_uncertainty
 
 # Effectively set false path from this clock to all other clocks
 #set_clock_groups -asynchronous -group [get_clocks altera_reserved_tck]