diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
index 9facafa00919f715c56a5b207d1b1cd2073d77f5..3c27ce464b71aa6706fd57f98d98d7a74d415cea 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
@@ -36,97 +36,97 @@ number_of_columns = 13
- - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - -
- - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - -
REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - -
- REG_FPGA_TEMP_SENS 1 1 REG temp 0x0003d1f8 1 RO uint32 b[31:0] - - -
- REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0003d1d0 6 RO uint32 b[31:0] - - -
+ REG_FPGA_TEMP_SENS 1 1 REG temp 0x00043210 1 RO uint32 b[31:0] - - -
+ REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x000431e0 6 RO uint32 b[31:0] - - -
RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - -
AVS_ETH_0_REG 1 1 REG status 0x00000c10 12 RO uint32 b[31:0] - - -
AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - -
- PIO_PPS 1 1 REG capture_cnt 0x0003d224 1 RO uint32 b[29:0] - - -
- - - - - stable 0x0003d224 1 RO uint32 b[30:30] - - -
- - - - - toggle 0x0003d224 1 RO uint32 b[31:31] - - -
- - - - - expected_cnt 0x0003d225 1 RW uint32 b[27:0] - - -
- - - - - edge 0x0003d225 1 RW uint32 b[31:31] - - -
- - - - - offset_cnt 0x0003d226 1 RO uint32 b[27:0] - - -
- REG_EPCS 1 1 REG addr 0x0003d200 1 WO uint32 b[23:0] - - -
- - - - - rden 0x0003d201 1 WO uint32 b[0:0] - - -
- - - - - read_bit 0x0003d202 1 WO uint32 b[0:0] - - -
- - - - - write_bit 0x0003d203 1 WO uint32 b[0:0] - - -
- - - - - sector_erase 0x0003d204 1 WO uint32 b[0:0] - - -
- - - - - busy 0x0003d205 1 RO uint32 b[0:0] - - -
- - - - - unprotect 0x0003d206 1 WO uint32 b[31:0] - - -
- REG_DPMM_CTRL 1 1 REG rd_usedw 0x0003d240 1 RO uint32 b[31:0] - - -
- REG_DPMM_DATA 1 1 FIFO data 0x0003d23e 1 RO uint32 b[31:0] - - -
- REG_MMDP_CTRL 1 1 REG wr_usedw 0x0003d23c 1 RO uint32 b[31:0] - - -
- - - - - wr_availw 0x0003d23d 1 RO uint32 b[31:0] - - -
- REG_MMDP_DATA 1 1 FIFO data 0x0003d23a 1 WO uint32 b[31:0] - - -
- REG_REMU 1 1 REG reconfigure 0x0003d208 1 WO uint32 b[31:0] - - -
- - - - - param 0x0003d209 1 WO uint32 b[2:0] - - -
- - - - - read_param 0x0003d20a 1 WO uint32 b[0:0] - - -
- - - - - write_param 0x0003d20b 1 WO uint32 b[0:0] - - -
- - - - - data_out 0x0003d20c 1 RO uint32 b[23:0] - - -
- - - - - data_in 0x0003d20d 1 WO uint32 b[23:0] - - -
- - - - - busy 0x0003d20e 1 RO uint32 b[0:0] - - -
- REG_SDP_INFO 1 1 REG block_period 0x0003d1c0 1 RO uint32 b[15:0] - - -
- - - - - beam_repositioning_flag 0x0003d1c1 1 RW uint32 b[0:0] - - -
- - - - - fsub_type 0x0003d1c2 1 RO uint32 b[0:0] - - -
- - - - - f_adc 0x0003d1c3 1 RO uint32 b[0:0] - - -
- - - - - nyquist_zone_index 0x0003d1c4 1 RW uint32 b[1:0] - - -
- - - - - observation_id 0x0003d1c5 1 RW uint32 b[31:0] - - -
- - - - - antenna_band_index 0x0003d1c6 1 RW uint32 b[0:0] - - -
- - - - - station_id 0x0003d1c7 1 RW uint32 b[15:0] - - -
- REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x0003d210 1 RW uint32 b[0:0] - - -
- - - - - use_cable_to_next_rn 0x0003d211 1 RW uint32 b[0:0] - - -
- - - - - n_rn 0x0003d212 1 RW uint32 b[7:0] - - -
- - - - - o_rn 0x0003d213 1 RW uint32 b[7:0] - - -
- PIO_JESD_CTRL 1 1 REG enable 0x0003d230 1 RW uint32 b[30:0] - - -
- - - - - reset 0x0003d230 1 RW uint32 b[31:31] - - -
- JESD204B 1 12 REG rx_lane_ctrl_common 0x0003c000 1 RW uint32 b[2:0] - - 256
- - - - - rx_lane_ctrl_0 0x0003c001 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_1 0x0003c002 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_2 0x0003c003 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_3 0x0003c004 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_4 0x0003c005 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_5 0x0003c006 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_6 0x0003c007 1 RW uint32 b[2:0] - - -
- - - - - rx_lane_ctrl_7 0x0003c008 1 RW uint32 b[2:0] - - -
- - - - - rx_dll_ctrl 0x0003c014 1 RW uint32 b[16:0] - - -
- - - - - rx_syncn_sysref_ctrl 0x0003c015 1 RW uint32 b[24:0] - - -
- - - - - rx_csr_sysref_always_on 0x0003c015 1 RW uint32 b[1:1] - - -
- - - - - rx_csr_rbd_offset 0x0003c015 1 RW uint32 b[10:3] - - -
- - - - - rx_csr_lmfc_offset 0x0003c015 1 RW uint32 b[19:12] - - -
- - - - - rx_err0 0x0003c018 1 RW uint32 b[8:0] - - -
- - - - - rx_err1 0x0003c019 1 RW uint32 b[9:0] - - -
- - - - - csr_dev_syncn 0x0003c020 1 RO uint32 b[0:0] - - -
- - - - - csr_rbd_count 0x0003c020 1 RO uint32 b[10:3] - - -
- - - - - rx_status1 0x0003c021 1 RW uint32 b[23:0] - - -
- - - - - rx_status2 0x0003c022 1 RW uint32 b[23:0] - - -
- - - - - rx_status3 0x0003c023 1 RW uint32 b[7:0] - - -
- - - - - rx_ilas_csr_l 0x0003c025 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_f 0x0003c025 1 RW uint32 b[15:8] - - -
- - - - - rx_ilas_csr_k 0x0003c025 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_m 0x0003c025 1 RW uint32 b[31:24] - - -
- - - - - rx_ilas_csr_n 0x0003c026 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_cs 0x0003c026 1 RW uint32 b[7:6] - - -
- - - - - rx_ilas_csr_np 0x0003c026 1 RW uint32 b[12:8] - - -
- - - - - rx_ilas_csr_subclassv 0x0003c026 1 RW uint32 b[15:13] - - -
- - - - - rx_ilas_csr_s 0x0003c026 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_jesdv 0x0003c026 1 RW uint32 b[23:21] - - -
- - - - - rx_ilas_csr_cf 0x0003c026 1 RW uint32 b[28:24] - - -
- - - - - rx_ilas_csr_hd 0x0003c026 1 RW uint32 b[31:31] - - -
- - - - - rx_status4 0x0003c03c 1 RW uint32 b[15:0] - - -
- - - - - rx_status5 0x0003c03d 1 RW uint32 b[15:0] - - -
- - - - - rx_status6 0x0003c03e 1 RW uint32 b[23:0] - - -
- - - - - rx_status7 0x0003c03f 1 RO uint32 b[31:0] - - -
- REG_DP_SHIFTRAM 1 12 REG shift 0x00000c20 1 RW uint32 b[11:0] - - 2
- REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0003d1f0 1 RW uint32 b[0:0] - - -
- - - - - dp_on_pps 0x0003d1f0 1 RW uint32 b[1:1] - - -
- - - - - nof_clk_per_sync 0x0003d1f1 1 RW uint32 b[31:0] - - -
- - - - - bsn_init 0x0003d1f2 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1f3 - - - b[31:0] b[63:32] - -
- - - - - bsn_time_offset 0x0003d1f4 1 RW uint32 b[9:0] - - -
- REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0003d236 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d237 - - - b[31:0] b[63:32] - -
+ PIO_PPS 1 1 REG capture_cnt 0x0004323c 1 RO uint32 b[29:0] - - -
+ - - - - stable 0x0004323c 1 RO uint32 b[30:30] - - -
+ - - - - toggle 0x0004323c 1 RO uint32 b[31:31] - - -
+ - - - - expected_cnt 0x0004323d 1 RW uint32 b[27:0] - - -
+ - - - - edge 0x0004323d 1 RW uint32 b[31:31] - - -
+ - - - - offset_cnt 0x0004323e 1 RO uint32 b[27:0] - - -
+ REG_EPCS 1 1 REG addr 0x00043218 1 WO uint32 b[31:0] - - -
+ - - - - rden 0x00043219 1 WO uint32 b[0:0] - - -
+ - - - - read_bit 0x0004321a 1 WO uint32 b[0:0] - - -
+ - - - - write_bit 0x0004321b 1 WO uint32 b[0:0] - - -
+ - - - - sector_erase 0x0004321c 1 WO uint32 b[0:0] - - -
+ - - - - busy 0x0004321d 1 RO uint32 b[0:0] - - -
+ - - - - unprotect 0x0004321e 1 WO uint32 b[31:0] - - -
+ REG_DPMM_CTRL 1 1 REG rd_usedw 0x00043256 1 RO uint32 b[31:0] - - -
+ REG_DPMM_DATA 1 1 FIFO data 0x00043254 1 RO uint32 b[31:0] - - -
+ REG_MMDP_CTRL 1 1 REG wr_usedw 0x00043252 1 RO uint32 b[31:0] - - -
+ - - - - wr_availw 0x00043253 1 RO uint32 b[31:0] - - -
+ REG_MMDP_DATA 1 1 FIFO data 0x00043250 1 WO uint32 b[31:0] - - -
+ REG_REMU 1 1 REG reconfigure 0x00043220 1 WO uint32 b[31:0] - - -
+ - - - - param 0x00043221 1 WO uint32 b[2:0] - - -
+ - - - - read_param 0x00043222 1 WO uint32 b[0:0] - - -
+ - - - - write_param 0x00043223 1 WO uint32 b[0:0] - - -
+ - - - - data_out 0x00043224 1 RO uint32 b[31:0] - - -
+ - - - - data_in 0x00043225 1 WO uint32 b[31:0] - - -
+ - - - - busy 0x00043226 1 RO uint32 b[0:0] - - -
+ REG_SDP_INFO 1 1 REG block_period 0x000431d0 1 RO uint32 b[15:0] - - -
+ - - - - beam_repositioning_flag 0x000431d1 1 RW uint32 b[0:0] - - -
+ - - - - fsub_type 0x000431d2 1 RO uint32 b[0:0] - - -
+ - - - - f_adc 0x000431d3 1 RO uint32 b[0:0] - - -
+ - - - - nyquist_zone_index 0x000431d4 1 RW uint32 b[1:0] - - -
+ - - - - observation_id 0x000431d5 1 RW uint32 b[31:0] - - -
+ - - - - antenna_band_index 0x000431d6 1 RW uint32 b[0:0] - - -
+ - - - - station_id 0x000431d7 1 RW uint32 b[15:0] - - -
+ REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00043228 1 RW uint32 b[0:0] - - -
+ - - - - use_cable_to_next_rn 0x00043229 1 RW uint32 b[0:0] - - -
+ - - - - n_rn 0x0004322a 1 RW uint32 b[7:0] - - -
+ - - - - o_rn 0x0004322b 1 RW uint32 b[7:0] - - -
+ PIO_JESD_CTRL 1 1 REG enable 0x00043246 1 RW uint32 b[30:0] - - -
+ - - - - reset 0x00043246 1 RW uint32 b[31:31] - - -
+ JESD204B 1 12 REG rx_lane_ctrl_common 0x00042000 1 RW uint32 b[2:0] - - 256
+ - - - - rx_lane_ctrl_0 0x00042001 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_1 0x00042002 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_2 0x00042003 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_3 0x00042004 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_4 0x00042005 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_5 0x00042006 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_6 0x00042007 1 RW uint32 b[2:0] - - -
+ - - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - -
+ - - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - -
+ - - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - -
+ - - - - rx_csr_sysref_always_on 0x00042015 1 RW uint32 b[1:1] - - -
+ - - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - -
+ - - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - -
+ - - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - -
+ - - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - -
+ - - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - -
+ - - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - -
+ - - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - -
+ - - - - rx_status2 0x00042022 1 RW uint32 b[23:0] - - -
+ - - - - rx_status3 0x00042023 1 RW uint32 b[7:0] - - -
+ - - - - rx_ilas_csr_l 0x00042025 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_f 0x00042025 1 RW uint32 b[15:8] - - -
+ - - - - rx_ilas_csr_k 0x00042025 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_m 0x00042025 1 RW uint32 b[31:24] - - -
+ - - - - rx_ilas_csr_n 0x00042026 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_cs 0x00042026 1 RW uint32 b[7:6] - - -
+ - - - - rx_ilas_csr_np 0x00042026 1 RW uint32 b[12:8] - - -
+ - - - - rx_ilas_csr_subclassv 0x00042026 1 RW uint32 b[15:13] - - -
+ - - - - rx_ilas_csr_s 0x00042026 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_jesdv 0x00042026 1 RW uint32 b[23:21] - - -
+ - - - - rx_ilas_csr_cf 0x00042026 1 RW uint32 b[28:24] - - -
+ - - - - rx_ilas_csr_hd 0x00042026 1 RW uint32 b[31:31] - - -
+ - - - - rx_status4 0x0004203c 1 RW uint32 b[15:0] - - -
+ - - - - rx_status5 0x0004203d 1 RW uint32 b[15:0] - - -
+ - - - - rx_status6 0x0004203e 1 RW uint32 b[23:0] - - -
+ - - - - rx_status7 0x0004203f 1 RO uint32 b[31:0] - - -
+ REG_DP_SHIFTRAM 1 12 REG shift 0x00043180 1 RW uint32 b[11:0] - - 2
+ REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00043208 1 RW uint32 b[0:0] - - -
+ - - - - dp_on_pps 0x00043208 1 RW uint32 b[1:1] - - -
+ - - - - nof_clk_per_sync 0x00043209 1 RW uint32 b[31:0] - - -
+ - - - - bsn_init 0x0004320a 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0004320b - - - b[31:0] b[63:32] - -
+ - - - - bsn_time_offset 0x0004320c 1 RW uint32 b[9:0] - - -
+ REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0004324c 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0004324d - - - b[31:0] b[63:32] - -
REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - -
@@ -138,27 +138,27 @@ number_of_columns = 13
- - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00000107 - - - b[31:0] b[63:32] - -
- - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - -
- REG_WG 1 12 REG mode 0x0003d080 1 RW uint32 b[7:0] - - 4
- - - - - nof_samples 0x0003d080 1 RW uint32 b[31:16] - - -
- - - - - phase 0x0003d081 1 RW uint32 b[15:0] - - -
- - - - - freq 0x0003d082 1 RW uint32 b[30:0] - - -
- - - - - ampl 0x0003d083 1 RW uint32 b[16:0] - - -
- RAM_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - - 1024
- RAM_ST_HISTOGRAM 1 12 RAM data 0x00006000 512 RW uint32 b[31:0] b[27:0] - 512
- REG_ADUH_MONITOR 1 12 REG mean_sum 0x0003d0c0 1 RO int64 b[31:0] b[31:0] - 4
- - - - - - 0x0003d0c1 - - - b[31:0] b[63:32] - -
- - - - - power_sum 0x0003d0c2 1 RO int64 b[31:0] b[31:0] - -
- - - - - - 0x0003d0c3 - - - b[31:0] b[63:32] - -
- REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000020 1 RO uint32 b[31:0] - - 2
- - - - - word_cnt 0x00000021 1 RO uint32 b[31:0] - - -
+ REG_WG 1 12 REG mode 0x00043080 1 RW uint32 b[7:0] - - 4
+ - - - - nof_samples 0x00043080 1 RW uint32 b[31:16] - - -
+ - - - - phase 0x00043081 1 RW uint32 b[15:0] - - -
+ - - - - freq 0x00043082 1 RW uint32 b[30:0] - - -
+ - - - - ampl 0x00043083 1 RW uint32 b[16:0] - - -
+ RAM_WG 1 12 RAM data 0x00034000 1024 RW uint32 b[17:0] - - 1024
+ RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512
+ REG_ADUH_MONITOR 1 12 REG mean_sum 0x000430c0 1 RO int64 b[31:0] b[31:0] - 4
+ - - - - - 0x000430c1 - - - b[31:0] b[63:32] - -
+ - - - - power_sum 0x000430c2 1 RO int64 b[31:0] b[31:0] - -
+ - - - - - 0x000430c3 - - - b[31:0] b[63:32] - -
+ REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000c20 1 RO uint32 b[31:0] - - 2
+ - - - - word_cnt 0x00000c21 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
- REG_SI 1 1 REG enable 0x0003d238 1 RW uint32 b[0:0] - - -
- RAM_FIL_COEFS 1 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - - 1024
- RAM_EQUALIZER_GAINS 1 6 RAM data 0x0003a000 1024 RW cint16_ir b[31:0] - - 1024
- REG_DP_SELECTOR 1 1 REG input_select 0x0003d234 1 RW uint32 b[0:0] - - -
- RAM_ST_SST 1 6 RAM data 0x00034000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - - 0x00034001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_SST 1 1 REG enable 0x0003d22e 1 RW uint32 b[0:0] - - -
+ REG_SI 1 1 REG enable 0x0004324e 1 RW uint32 b[0:0] - - -
+ RAM_FIL_COEFS 1 16 RAM data 0x00038000 1024 RW uint32 b[15:0] - - 1024
+ RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024
+ REG_DP_SELECTOR 1 1 REG input_select 0x0004324a 1 RW uint32 b[0:0] - - -
+ RAM_ST_SST 1 6 RAM data 0x0003c000 1024 RW uint64 b[31:0] b[31:0] - 2048
+ - - - - - 0x0003c001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_SST 1 1 REG enable 0x00043244 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c41 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - -
@@ -205,27 +205,27 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c6a - - - b[15:0] b[47:32] - -
- - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - -
- REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0003d1a0 1 RW uint32 b[0:0] - - -
- - - - - ctrl_interval_size 0x0003d1a1 1 RW uint32 b[30:0] - - -
- - - - - ctrl_start_bsn 0x0003d1a2 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1a3 - - - b[31:0] b[63:32] - -
- - - - - mon_current_input_bsn 0x0003d1a4 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1a5 - - - b[31:0] b[63:32] - -
- - - - - mon_input_bsn_at_sync 0x0003d1a6 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1a7 - - - b[31:0] b[63:32] - -
- - - - - mon_output_enable 0x0003d1a8 1 RO uint32 b[0:0] - - -
- - - - - mon_output_sync_bsn 0x0003d1a9 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1aa - - - b[31:0] b[63:32] - -
- - - - - block_size 0x0003d1ab 1 RO uint32 b[31:0] - - -
+ REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000431b0 1 RW uint32 b[0:0] - - -
+ - - - - ctrl_interval_size 0x000431b1 1 RW uint32 b[30:0] - - -
+ - - - - ctrl_start_bsn 0x000431b2 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000431b3 - - - b[31:0] b[63:32] - -
+ - - - - mon_current_input_bsn 0x000431b4 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000431b5 - - - b[31:0] b[63:32] - -
+ - - - - mon_input_bsn_at_sync 0x000431b6 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000431b7 - - - b[31:0] b[63:32] - -
+ - - - - mon_output_enable 0x000431b8 1 RO uint32 b[0:0] - - -
+ - - - - mon_output_sync_bsn 0x000431b9 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000431ba - - - b[31:0] b[63:32] - -
+ - - - - block_size 0x000431bb 1 RO uint32 b[31:0] - - -
RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
- - - - - 0x00010001 - - - b[31:0] b[63:32] - -
- - - - - 0x00010002 - - - b[31:0] b[95:64] - -
- - - - - 0x00010003 - - - b[31:0] b[127:96] - -
- REG_CROSSLETS_INFO 1 1 REG offset 0x0003d1b0 15 RW uint32 b[31:0] - - -
- - - - - step 0x0003d1bf 1 RW uint32 b[31:0] - - -
- REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x0003d22a 1 RW uint32 b[31:0] - - -
- - - - - unused 0x0003d22b 1 RW uint32 b[31:0] - - -
- REG_STAT_ENABLE_XST 1 1 REG enable 0x0003d22c 1 RW uint32 b[0:0] - - -
+ REG_CROSSLETS_INFO 1 1 REG offset 0x000431c0 15 RW uint32 b[31:0] - - -
+ - - - - step 0x000431cf 1 RW uint32 b[31:0] - - -
+ REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00043240 1 RW uint32 b[31:0] - - -
+ - - - - unused 0x00043241 1 RW uint32 b[31:0] - - -
+ REG_STAT_ENABLE_XST 1 1 REG enable 0x00043242 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000041 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000042 1 RW uint32 b[15:0] - - -
@@ -274,8 +274,9 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0000006a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - -
- REG_BSN_ALIGN 1 9 REG enable 0x0003d190 1 RW uint32 b[0:0] - - 1
- REG_BSN_MONITOR_V2_BSN_ALIGN_INPUT 1 9 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8
+ REG_BSN_ALIGN_V2 1 9 REG enable 0x00000020 1 RW uint32 b[0:0] - - 2
+ - - - - replaced_pkt_cnt 0x00000021 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_BSN_ALIGN_V2_INPUT 1 9 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8
- - - - ready_stable 0x00000d00 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000d00 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00000d01 1 RO uint64 b[31:0] b[31:0] - -
@@ -284,26 +285,26 @@ number_of_columns = 13
- - - - nof_valid 0x00000d04 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00000d05 1 RO uint32 b[31:0] - - -
- - - - latency 0x00000d08 1 RO uint32 b[31:0] - - -
- REG_BSN_MONITOR_V2_BSN_ALIGN_OUTPUT 1 1 REG xon_stable 0x0003d1e8 1 RO uint32 b[0:0] - - -
- - - - - ready_stable 0x0003d1e8 1 RO uint32 b[1:1] - - -
- - - - - sync_timeout 0x0003d1e8 1 RO uint32 b[2:2] - - -
- - - - - bsn_at_sync 0x0003d1e9 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1ea - - - b[31:0] b[63:32] - -
- - - - - nof_sop 0x0003d1eb 1 RO uint32 b[31:0] - - -
- - - - - nof_valid 0x0003d1ec 1 RO uint32 b[31:0] - - -
- - - - - nof_err 0x0003d1ed 1 RO uint32 b[31:0] - - -
- - - - - latency 0x0003d1f0 1 RO uint32 b[31:0] - - -
- REG_XST_UDP_MONITOR 1 1 REG xon_stable 0x0003d1e0 1 RO uint32 b[0:0] - - -
- - - - - ready_stable 0x0003d1e0 1 RO uint32 b[1:1] - - -
- - - - - sync_timeout 0x0003d1e0 1 RO uint32 b[2:2] - - -
- - - - - bsn_at_sync 0x0003d1e1 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d1e2 - - - b[31:0] b[63:32] - -
- - - - - nof_sop 0x0003d1e3 1 RO uint32 b[31:0] - - -
- - - - - nof_valid 0x0003d1e4 1 RO uint32 b[31:0] - - -
- - - - - nof_err 0x0003d1e5 1 RO uint32 b[31:0] - - -
- - - - - latency 0x0003d1e8 1 RO uint32 b[31:0] - - -
- REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x0003d228 1 RO uint32 b[0:0] - - -
- - - - - transport_nof_hops 0x0003d229 1 RW uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_BSN_ALIGN_V2_OUTPUT 1 1 REG xon_stable 0x00043200 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x00043200 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x00043200 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x00043201 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00043202 - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x00043203 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x00043204 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x00043205 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00043208 1 RO uint32 b[31:0] - - -
+ REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x000431f8 1 RO uint32 b[0:0] - - -
+ - - - - ready_stable 0x000431f8 1 RO uint32 b[1:1] - - -
+ - - - - sync_timeout 0x000431f8 1 RO uint32 b[2:2] - - -
+ - - - - bsn_at_sync 0x000431f9 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x000431fa - - - b[31:0] b[63:32] - -
+ - - - - nof_sop 0x000431fb 1 RO uint32 b[31:0] - - -
+ - - - - nof_valid 0x000431fc 1 RO uint32 b[31:0] - - -
+ - - - - nof_err 0x000431fd 1 RO uint32 b[31:0] - - -
+ - - - - latency 0x00043200 1 RO uint32 b[31:0] - - -
+ REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00000c02 1 RO uint32 b[0:0] - - -
+ - - - - transport_nof_hops 0x00000c03 1 RW uint32 b[31:0] - - -
REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00000c80 1 RO uint32 b[0:0] - - 8
- - - - ready_stable 0x00000c80 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000c80 1 RO uint32 b[2:2] - - -
@@ -322,242 +323,242 @@ number_of_columns = 13
- - - - nof_valid 0x00000084 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00000085 1 RO uint32 b[31:0] - - -
- - - - latency 0x00000088 1 RO uint32 b[31:0] - - -
- REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x0003d180 8 RO uint32 b[31:0] - - -
- - - - - total_discarded_blocks 0x0003d188 1 RO uint32 b[31:0] - - -
- - - - - total_block_count 0x0003d189 1 RO uint32 b[31:0] - - -
- - - - - clear 0x0003d18a 1 RW uint32 b[31:0] - - -
- REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x0003d214 1 RO uint32 b[31:0] - - -
- - - - - nof_sync 0x0003d215 1 RO uint32 b[31:0] - - -
- - - - - clear 0x0003d216 1 RW uint32 b[31:0] - - -
- REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00002000 1 RW uint32 b[0:0] - - 1
- - - - - rx_transfer_status 0x00002001 1 RO uint32 b[0:0] - - -
- - - - - tx_transfer_control 0x00002002 1 RW uint32 b[0:0] - - -
- - - - - rx_padcrc_control 0x00002040 1 RW uint32 b[1:0] - - -
- - - - - rx_crccheck_control 0x00002080 1 RW uint32 b[1:0] - - -
- - - - - rx_pktovrflow_error 0x000020c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000020c1 - - - b[31:0] b[31:0] - -
- - - - - rx_pktovrflow_etherstatsdropevents 0x000020c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000020c3 - - - b[31:0] b[31:0] - -
- - - - - rx_lane_decoder_preamble_control 0x00002100 1 RW uint32 b[0:0] - - -
- - - - - rx_preamble_inserter_control 0x00002140 1 RW uint32 b[0:0] - - -
- - - - - rx_frame_control 0x00002800 1 RW uint32 b[19:0] - - -
- - - - - rx_frame_maxlength 0x00002801 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr0 0x00002802 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr1 0x00002803 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_0 0x00002804 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_1 0x00002805 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_0 0x00002806 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_1 0x00002807 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_0 0x00002808 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_1 0x00002809 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_0 0x0000280a 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_1 0x0000280b 1 RW uint32 b[15:0] - - -
- - - - - rx_pfc_control 0x00002818 1 RW uint32 b[16:0] - - -
- - - - - rx_stats_clr 0x00002c00 1 RW uint32 b[0:0] - - -
- - - - - rx_stats_framesok 0x00002c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c03 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_frameserr 0x00002c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c05 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_framescrcerr 0x00002c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c07 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_octetsok 0x00002c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c09 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pausemacctrl_frames 0x00002c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c0b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_iferrors 0x00002c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c0d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_framesok 0x00002c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c0f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_frameserr 0x00002c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c11 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastframesok 0x00002c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c13 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicast_frameserr 0x00002c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c15 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastframesok 0x00002c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c17 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcast_frameserr 0x00002c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c19 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatsoctets 0x00002c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c1b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatspkts 0x00002c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c1d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_undersizepkts 0x00002c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c1f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_oversizepkts 0x00002c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c21 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts64octets 0x00002c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c23 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts65to127octets 0x00002c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c25 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts128to255octets 0x00002c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c27 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts256to511octets 0x00002c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c29 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts512to1023octets 0x00002c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c2b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstat_pkts1024to1518octets 0x00002c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c2d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts1519toxoctets 0x00002c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c2f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_fragments 0x00002c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c31 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_jabbers 0x00002c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c33 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatscrcerr 0x00002c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c35 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicastmacctrlframes 0x00002c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c37 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastmac_ctrlframes 0x00002c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c39 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastmac_ctrlframes 0x00002c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c3b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pfcmacctrlframes 0x00002c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00002c3d - - - b[31:0] b[31:0] - -
- - - - - tx_transfer_status 0x00003001 1 RO uint32 b[0:0] - - -
- - - - - tx_padins_control 0x00003040 1 RW uint32 b[0:0] - - -
- - - - - tx_crcins_control 0x00003080 1 RW uint32 b[1:0] - - -
- - - - - tx_pktunderflow_error 0x000030c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000030c1 - - - b[31:0] b[31:0] - -
- - - - - tx_preamble_control 0x00003100 1 RW uint32 b[0:0] - - -
- - - - - tx_pauseframe_control 0x00003140 1 RW uint32 b[1:0] - - -
- - - - - tx_pauseframe_quanta 0x00003141 1 RW uint32 b[15:0] - - -
- - - - - tx_pauseframe_enable 0x00003142 1 RW uint32 b[0:0] - - -
- - - - - pfc_pause_quanta_0 0x00003180 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_1 0x00003181 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_2 0x00003182 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_3 0x00003183 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_4 0x00003184 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_5 0x00003185 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_6 0x00003186 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_7 0x00003187 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_0 0x00003190 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_1 0x00003191 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_2 0x00003192 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_3 0x00003193 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_4 0x00003194 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_5 0x00003195 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_6 0x00003196 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_7 0x00003197 1 RW uint32 b[31:0] - - -
- - - - - tx_pfc_priority_enable 0x000031a0 1 RW uint32 b[7:0] - - -
- - - - - tx_addrins_control 0x00003200 1 RW uint32 b[0:0] - - -
- - - - - tx_addrins_macaddr0 0x00003201 1 RW uint32 b[31:0] - - -
- - - - - tx_addrins_macaddr1 0x00003202 1 RW uint32 b[15:0] - - -
- - - - - tx_frame_maxlength 0x00003801 1 RW uint32 b[15:0] - - -
- - - - - tx_stats_clr 0x00003c00 1 RW uint32 b[0:0] - - -
- - - - - tx_stats_framesok 0x00003c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c03 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_frameserr 0x00003c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c05 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_framescrcerr 0x00003c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c07 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_octetsok 0x00003c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c09 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pausemacctrl_frames 0x00003c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c0b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_iferrors 0x00003c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c0d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_framesok 0x00003c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c0f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_frameserr 0x00003c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c11 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastframesok 0x00003c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c13 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicast_frameserr 0x00003c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c15 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastframesok 0x00003c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c17 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcast_frameserr 0x00003c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c19 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatsoctets 0x00003c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c1b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatspkts 0x00003c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c1d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_undersizepkts 0x00003c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c1f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_oversizepkts 0x00003c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c21 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts64octets 0x00003c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c23 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts65to127octets 0x00003c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c25 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts128to255octets 0x00003c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c27 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts256to511octets 0x00003c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c29 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts512to1023octets 0x00003c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c2b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstat_pkts1024to1518octets 0x00003c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c2d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts1519toxoctets 0x00003c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c2f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_fragments 0x00003c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c31 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_jabbers 0x00003c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c33 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatscrcerr 0x00003c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c35 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicastmacctrlframes 0x00003c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c37 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastmac_ctrlframes 0x00003c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c39 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastmac_ctrlframes 0x00003c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c3b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pfcmacctrlframes 0x00003c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00003c3d - - - b[31:0] b[31:0] - -
- REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00000c02 1 RO uint32 b[0:0] - - 1
- - - - - xgmii_tx_ready 0x00000c02 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x00000c02 1 RO uint32 b[3:2] - - -
- RAM_SS_SS_WIDE 2 6 RAM data 0x00028000 976 RW uint32 b[9:0] - 8192 1024
- RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024
- REG_BF_SCALE 2 1 REG scale 0x0003d220 1 RW uint32 b[15:0] - 2 2
- - - - - unused 0x0003d221 1 RW uint32 b[31:0] - - -
- REG_HDR_DAT 2 1 REG bsn 0x0003d000 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x0003d001 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x0003d002 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_beamlets_per_block 0x0003d003 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_blocks_per_packet 0x0003d004 1 RW uint32 b[7:0] - - -
- - - - - sdp_beamlet_index 0x0003d005 1 RW uint32 b[15:0] - - -
- - - - - sdp_beamlet_scale 0x0003d006 1 RW uint32 b[15:0] - - -
- - - - - sdp_reserved 0x0003d007 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d008 - - - b[7:0] b[39:32] - -
- - - - - sdp_source_info_gn_index 0x0003d009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_beamlet_width 0x0003d00a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_repositioning_flag 0x0003d00b 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0003d00c 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0003d00d 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0003d00e 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0003d00f 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x0003d010 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x0003d011 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x0003d012 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x0003d013 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x0003d014 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x0003d015 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x0003d016 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x0003d017 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x0003d018 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0003d019 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0003d01a 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0003d01b 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0003d01c 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0003d01d 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0003d01e 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0003d01f 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x0003d020 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x0003d021 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x0003d022 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x0003d023 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x0003d024 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x0003d025 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x0003d026 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d027 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x0003d028 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0003d029 - - - b[15:0] b[47:32] - -
- REG_DP_XONOFF 2 1 REG enable_stream 0x0003d21c 1 RW uint32 b[0:0] - 2 2
+ REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x000431a0 8 RO uint32 b[31:0] - - -
+ - - - - total_discarded_blocks 0x000431a8 1 RO uint32 b[31:0] - - -
+ - - - - total_block_count 0x000431a9 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x000431aa 1 RW uint32 b[31:0] - - -
+ REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x0004322c 1 RO uint32 b[31:0] - - -
+ - - - - nof_sync 0x0004322d 1 RO uint32 b[31:0] - - -
+ - - - - clear 0x0004322e 1 RW uint32 b[31:0] - - -
+ REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00020000 1 RW uint32 b[0:0] - - 1
+ - - - - rx_transfer_status 0x00020001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00020002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00020040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00020080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x000200c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000200c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x000200c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000200c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00020100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00020140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00020800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00020801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00020802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00020803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00020804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00020805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00020806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00020807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00020808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00020809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0002080a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0002080b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00020818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00020c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00020c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00020c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00020c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00020c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00020c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00020c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00020c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00020c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00020c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00020c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00020c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00020c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00020c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00020c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00020c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00020c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00020c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00020c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00020c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00020c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00020c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00020c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00020c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00020c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00020c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00020c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00020c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00020c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00020c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00020c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00020c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00021001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00021040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00021080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x000210c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000210c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00021100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00021140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00021141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00021142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00021180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00021181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00021182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00021183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00021184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00021185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00021186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00021187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00021190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00021191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00021192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00021193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00021194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00021195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00021196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00021197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x000211a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00021200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00021201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00021202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00021801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00021c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00021c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00021c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00021c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00021c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00021c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00021c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00021c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00021c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00021c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00021c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00021c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00021c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00021c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00021c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00021c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00021c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00021c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00021c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00021c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00021c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00021c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00021c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00021c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00021c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00021c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00021c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00021c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00021c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00021c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00021c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00021c3d - - - b[31:0] b[31:0] - -
+ REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x000431f0 1 RO uint32 b[0:0] - - 1
+ - - - - xgmii_tx_ready 0x000431f0 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x000431f0 1 RO uint32 b[3:2] - - -
+ RAM_SS_SS_WIDE 2 6 RAM data 0x00030000 976 RW uint32 b[9:0] - 8192 1024
+ RAM_BF_WEIGHTS 2 12 RAM data 0x00028000 976 RW cint16_ir b[31:0] - 16384 1024
+ REG_BF_SCALE 2 1 REG scale 0x00043238 1 RW uint32 b[15:0] - 2 2
+ - - - - unused 0x00043239 1 RW uint32 b[31:0] - - -
+ REG_HDR_DAT 2 1 REG bsn 0x00043000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x00043001 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x00043002 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_beamlets_per_block 0x00043003 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_blocks_per_packet 0x00043004 1 RW uint32 b[7:0] - - -
+ - - - - sdp_beamlet_index 0x00043005 1 RW uint32 b[15:0] - - -
+ - - - - sdp_beamlet_scale 0x00043006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_reserved 0x00043007 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00043008 - - - b[7:0] b[39:32] - -
+ - - - - sdp_source_info_gn_index 0x00043009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_beamlet_width 0x0004300a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_repositioning_flag 0x0004300b 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0004300c 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0004300d 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0004300e 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x0004300f 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00043010 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00043011 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00043012 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00043013 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00043014 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00043015 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00043016 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00043017 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00043018 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x00043019 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0004301a 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0004301b 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0004301c 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0004301d 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0004301e 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x0004301f 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00043020 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00043021 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00043022 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00043023 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00043024 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00043025 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00043026 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00043027 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00043028 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00043029 - - - b[15:0] b[47:32] - -
+ REG_DP_XONOFF 2 1 REG enable_stream 0x00043234 1 RW uint32 b[0:0] - 2 2
RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - 0x00001001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_BST 2 1 REG enable 0x0003d218 1 RW uint32 b[0:0] - 2 2
+ REG_STAT_ENABLE_BST 2 1 REG enable 0x00043230 1 RW uint32 b[0:0] - 2 2
REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000d80 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - 0x00000d81 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000d82 1 RW uint32 b[15:0] - - -
@@ -604,182 +605,182 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000da9 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000daa - - - b[15:0] b[47:32] - -
- - - - word_align 0x00000dab 1 RW uint32 b[15:0] - - -
- REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00038000 1 RW uint32 b[0:0] - - -
- - - - - rx_transfer_status 0x00038001 1 RO uint32 b[0:0] - - -
- - - - - tx_transfer_control 0x00038002 1 RW uint32 b[0:0] - - -
- - - - - rx_padcrc_control 0x00038040 1 RW uint32 b[1:0] - - -
- - - - - rx_crccheck_control 0x00038080 1 RW uint32 b[1:0] - - -
- - - - - rx_pktovrflow_error 0x000380c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000380c1 - - - b[31:0] b[31:0] - -
- - - - - rx_pktovrflow_etherstatsdropevents 0x000380c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000380c3 - - - b[31:0] b[31:0] - -
- - - - - rx_lane_decoder_preamble_control 0x00038100 1 RW uint32 b[0:0] - - -
- - - - - rx_preamble_inserter_control 0x00038140 1 RW uint32 b[0:0] - - -
- - - - - rx_frame_control 0x00038800 1 RW uint32 b[19:0] - - -
- - - - - rx_frame_maxlength 0x00038801 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr0 0x00038802 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr1 0x00038803 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_0 0x00038804 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_1 0x00038805 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_0 0x00038806 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_1 0x00038807 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_0 0x00038808 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_1 0x00038809 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_0 0x0003880a 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_1 0x0003880b 1 RW uint32 b[15:0] - - -
- - - - - rx_pfc_control 0x00038818 1 RW uint32 b[16:0] - - -
- - - - - rx_stats_clr 0x00038c00 1 RW uint32 b[0:0] - - -
- - - - - rx_stats_framesok 0x00038c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c03 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_frameserr 0x00038c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c05 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_framescrcerr 0x00038c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c07 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_octetsok 0x00038c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c09 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pausemacctrl_frames 0x00038c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c0b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_iferrors 0x00038c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c0d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_framesok 0x00038c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c0f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_frameserr 0x00038c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c11 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastframesok 0x00038c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c13 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicast_frameserr 0x00038c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c15 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastframesok 0x00038c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c17 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcast_frameserr 0x00038c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c19 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatsoctets 0x00038c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c1b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatspkts 0x00038c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c1d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_undersizepkts 0x00038c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c1f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_oversizepkts 0x00038c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c21 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts64octets 0x00038c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c23 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts65to127octets 0x00038c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c25 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts128to255octets 0x00038c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c27 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts256to511octets 0x00038c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c29 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts512to1023octets 0x00038c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c2b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstat_pkts1024to1518octets 0x00038c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c2d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts1519toxoctets 0x00038c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c2f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_fragments 0x00038c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c31 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_jabbers 0x00038c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c33 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatscrcerr 0x00038c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c35 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicastmacctrlframes 0x00038c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c37 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastmac_ctrlframes 0x00038c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c39 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastmac_ctrlframes 0x00038c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c3b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pfcmacctrlframes 0x00038c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00038c3d - - - b[31:0] b[31:0] - -
- - - - - tx_transfer_status 0x00039001 1 RO uint32 b[0:0] - - -
- - - - - tx_padins_control 0x00039040 1 RW uint32 b[0:0] - - -
- - - - - tx_crcins_control 0x00039080 1 RW uint32 b[1:0] - - -
- - - - - tx_pktunderflow_error 0x000390c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000390c1 - - - b[31:0] b[31:0] - -
- - - - - tx_preamble_control 0x00039100 1 RW uint32 b[0:0] - - -
- - - - - tx_pauseframe_control 0x00039140 1 RW uint32 b[1:0] - - -
- - - - - tx_pauseframe_quanta 0x00039141 1 RW uint32 b[15:0] - - -
- - - - - tx_pauseframe_enable 0x00039142 1 RW uint32 b[0:0] - - -
- - - - - pfc_pause_quanta_0 0x00039180 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_1 0x00039181 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_2 0x00039182 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_3 0x00039183 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_4 0x00039184 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_5 0x00039185 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_6 0x00039186 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_7 0x00039187 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_0 0x00039190 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_1 0x00039191 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_2 0x00039192 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_3 0x00039193 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_4 0x00039194 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_5 0x00039195 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_6 0x00039196 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_7 0x00039197 1 RW uint32 b[31:0] - - -
- - - - - tx_pfc_priority_enable 0x000391a0 1 RW uint32 b[7:0] - - -
- - - - - tx_addrins_control 0x00039200 1 RW uint32 b[0:0] - - -
- - - - - tx_addrins_macaddr0 0x00039201 1 RW uint32 b[31:0] - - -
- - - - - tx_addrins_macaddr1 0x00039202 1 RW uint32 b[15:0] - - -
- - - - - tx_frame_maxlength 0x00039801 1 RW uint32 b[15:0] - - -
- - - - - tx_stats_clr 0x00039c00 1 RW uint32 b[0:0] - - -
- - - - - tx_stats_framesok 0x00039c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c03 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_frameserr 0x00039c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c05 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_framescrcerr 0x00039c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c07 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_octetsok 0x00039c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c09 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pausemacctrl_frames 0x00039c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c0b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_iferrors 0x00039c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c0d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_framesok 0x00039c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c0f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_frameserr 0x00039c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c11 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastframesok 0x00039c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c13 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicast_frameserr 0x00039c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c15 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastframesok 0x00039c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c17 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcast_frameserr 0x00039c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c19 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatsoctets 0x00039c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c1b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatspkts 0x00039c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c1d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_undersizepkts 0x00039c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c1f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_oversizepkts 0x00039c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c21 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts64octets 0x00039c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c23 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts65to127octets 0x00039c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c25 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts128to255octets 0x00039c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c27 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts256to511octets 0x00039c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c29 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts512to1023octets 0x00039c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c2b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstat_pkts1024to1518octets 0x00039c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c2d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts1519toxoctets 0x00039c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c2f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_fragments 0x00039c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c31 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_jabbers 0x00039c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c33 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatscrcerr 0x00039c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c35 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicastmacctrlframes 0x00039c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c37 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastmac_ctrlframes 0x00039c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c39 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastmac_ctrlframes 0x00039c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c3b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pfcmacctrlframes 0x00039c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00039c3d - - - b[31:0] b[31:0] - -
- REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0003d232 1 RO uint32 b[0:0] - - -
- - - - - xgmii_tx_ready 0x0003d232 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x0003d232 1 RO uint32 b[3:2] - - -
\ No newline at end of file
+ REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - -
+ - - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00006040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00006080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x000060c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000060c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x000060c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000060c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00006100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00006140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00006800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00006801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00006802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00006803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00006804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00006805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00006806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00006807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00006808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00006809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0000680a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0000680b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00006818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00006c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00006c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00006c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00006c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00006c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00006c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00006c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00006c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00006c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00006c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00006c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00006c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00006c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00006c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00006c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00006c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00006c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00006c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00006c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00006c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00006c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00006c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00006c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00006c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00006c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00006c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00006c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00006c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00006c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00006c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00006c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00006c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00007001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00007040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00007080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x000070c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000070c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00007100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00007140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00007141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00007142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00007180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00007181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00007182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00007183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00007184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00007185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00007186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00007187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00007190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00007191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00007192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00007193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00007194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00007195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00007196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00007197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x000071a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00007200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00007201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00007202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00007801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00007c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00007c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00007c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00007c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00007c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00007c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00007c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00007c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00007c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00007c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00007c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00007c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00007c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00007c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00007c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00007c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00007c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00007c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00007c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00007c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00007c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00007c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00007c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00007c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00007c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00007c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00007c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00007c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00007c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00007c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00007c3d - - - b[31:0] b[31:0] - -
+ REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00043248 1 RO uint32 b[0:0] - - -
+ - - - - xgmii_tx_ready 0x00043248 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x00043248 1 RO uint32 b[3:2] - - -
\ No newline at end of file
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
index ec61c554e1d9224213f550744994132598d0feea..11f71912060c66fd2d324bd4a0530a103d6b1738 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
@@ -258,7 +258,7 @@ END ctrl_unb2b_board;
ARCHITECTURE str OF ctrl_unb2b_board IS
- CONSTANT c_rom_version : NATURAL := 2; -- Only increment when something changes to the register map of rom_system_info.
+ CONSTANT c_rom_version : NATURAL := 3; -- Only increment when something changes to the register map of rom_system_info.
CONSTANT c_reset_len : NATURAL := 4; -- >= c_meta_delay_len from common_pkg
CONSTANT c_mm_clk_freq : NATURAL := sel_a_b(g_sim=FALSE,g_mm_clk_freq,c_unb2b_board_mm_clk_freq_10M);
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
index 105a8f3b95a2d81afb8253ca857262316c2b60ab..20c4278e6951dfa1f2b727784a5ee751ebf87523 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
@@ -241,7 +241,7 @@ END ctrl_unb2c_board;
ARCHITECTURE str OF ctrl_unb2c_board IS
- CONSTANT c_rom_version : NATURAL := 2; -- Only increment when something changes to the register map of rom_system_info.
+ CONSTANT c_rom_version : NATURAL := 3; -- Only increment when something changes to the register map of rom_system_info.
CONSTANT c_reset_len : NATURAL := 4; -- >= c_meta_delay_len from common_pkg
CONSTANT c_mm_clk_freq : NATURAL := sel_a_b(g_sim=FALSE,g_mm_clk_freq,c_unb2c_board_mm_clk_freq_10M);
diff --git a/libraries/base/dp/dp.peripheral.yaml b/libraries/base/dp/dp.peripheral.yaml
index 64e18fe4e39c713ae535859a07f67f936db76315..9cca7c30d99b6efd5ea8c17f1b7c3d549c246ff1 100644
--- a/libraries/base/dp/dp.peripheral.yaml
+++ b/libraries/base/dp/dp.peripheral.yaml
@@ -129,7 +129,6 @@ peripherals:
address_offset: 1 * MM_BUS_SIZE
access_mode: RO
-
- peripheral_name: dp_bsn_source # pi_dp_bsn_source.py
peripheral_description: "Block Sequence Number (BSN) source for timestamping blocks of data samples."
parameters: