From 7e557b924b843e2c50184e905cea2e500e846627 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Fri, 12 Aug 2022 10:22:11 +0200
Subject: [PATCH] added dp_pipeline_ready to ease timing closure

---
 .../sdp/src/vhdl/sdp_beamformer_output.vhd    | 38 +++++++++++++------
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
index b7638e6df6..091abd86db 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
@@ -83,15 +83,17 @@ ARCHITECTURE str OF sdp_beamformer_output IS
   CONSTANT c_fifo_fill              : NATURAL := c_sdp_cep_payload_nof_longwords;
   CONSTANT c_fifo_size              : NATURAL := c_fifo_fill*2; -- Make fifo size large enough for adding header and muxing beamsets.
  
-  SIGNAL snk_in_concat           : t_dp_sosi;
-  SIGNAL dp_packet_merge_src_out : t_dp_sosi;
-  SIGNAL dp_repack_data_src_out  : t_dp_sosi;
-  SIGNAL dp_fifo_sc_src_out      : t_dp_sosi;
-  SIGNAL dp_fifo_sc_src_in       : t_dp_siso;
-  SIGNAL dp_offload_tx_src_out   : t_dp_sosi;
-  SIGNAL dp_offload_tx_src_in    : t_dp_siso;
-  SIGNAL ip_checksum_src_out     : t_dp_sosi;
-  SIGNAL ip_checksum_src_in      : t_dp_siso;
+  SIGNAL snk_in_concat             : t_dp_sosi;
+  SIGNAL dp_packet_merge_src_out   : t_dp_sosi;
+  SIGNAL dp_repack_data_src_out    : t_dp_sosi;
+  SIGNAL dp_fifo_sc_src_out        : t_dp_sosi;
+  SIGNAL dp_fifo_sc_src_in         : t_dp_siso;
+  SIGNAL dp_offload_tx_src_out     : t_dp_sosi;
+  SIGNAL dp_offload_tx_src_in      : t_dp_siso;
+  SIGNAL ip_checksum_src_out       : t_dp_sosi;
+  SIGNAL ip_checksum_src_in        : t_dp_siso;
+  SIGNAL dp_pipeline_ready_src_out : t_dp_sosi;
+  SIGNAL dp_pipeline_ready_src_in  : t_dp_siso;
 
   SIGNAL common_fifo_rd_req : STD_LOGIC;
   SIGNAL payload_err        : STD_LOGIC_VECTOR(0 DOWNTO 0);
@@ -269,6 +271,20 @@ BEGIN
     src_in  => ip_checksum_src_in
   );
 
+  -------------------------------------------------------------------------------
+  -- dp_pipeline_ready to ease timing closure
+  -------------------------------------------------------------------------------
+  u_dp_pipeline_ready : ENTITY dp_lib.dp_pipeline_ready
+  PORT MAP(
+    rst => dp_rst,
+    clk => dp_clk,
+
+    snk_out => ip_checksum_src_in,
+    snk_in  => ip_checksum_src_out,
+    src_in  => dp_pipeline_ready_src_in,
+    src_out => dp_pipeline_ready_src_out
+  );
+
   -------------------------------------------------------------------------------
   -- mms_dp_xonoff
   ------------------------------------------------------------------------------- 
@@ -289,8 +305,8 @@ BEGIN
     dp_clk      => dp_clk, 
 
     -- ST sinks
-    snk_out_arr(0) => ip_checksum_src_in,  
-    snk_in_arr(0)  => ip_checksum_src_out, 
+    snk_out_arr(0) => dp_pipeline_ready_src_in,  
+    snk_in_arr(0)  => dp_pipeline_ready_src_out, 
     -- ST source
     src_in_arr(0)  => src_in, 
     src_out_arr(0) => out_sosi
-- 
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