diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
index bc503a623c5354fe8f628693f00d45c5a6bb32c5..b5f0b886486e2624b83b4c91d54f8783075dccf5 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
@@ -104,20 +104,13 @@ peripherals:
     mm_port_names:
       - REG_DP_SHIFTRAM
 
-  - peripheral_name: dp/dp_bsn_source
+  - peripheral_name: dp/dp_bsn_source_v2
     parameter_overrides:
-      - { name: g_nof_block_per_sync, value: c_nof_block_per_sync }
+      - { name: g_nof_clk_per_sync, value: c_nof_clk_per_pps }
+      - { name: g_block_size, value: c_N_fft }
+      - { name: g_bsn_time_offset_w, value: ceil_log2(c_N_fft) }
     mm_port_names:
-      - REG_BSN_SOURCE
-      
-  # TODO: Use REG_BSN_SOURCE_V2 instead of REG_BSN_SOURCE
-  #peripheral_name: dp/dp_bsn_source_v2
-  #parameter_overrides:
-  #  - { name: g_nof_clk_per_sync, value: c_nof_clk_per_pps }
-  #  - { name: g_block_size, value: c_N_fft }
-  #  - { name: g_bsn_time_offset_w, value: ceil_log2(c_N_fft) }
-  #mm_port_names:
-  #  - REG_BSN_SOURCE_V2
+      - REG_BSN_SOURCE_V2
       
   - peripheral_name: dp/dp_bsn_scheduler
     mm_port_names:
@@ -159,8 +152,8 @@ peripherals:
       - { name: g_data_w, value: c_W_adc_jesd }
       - { name: g_nof_data, value: c_V_si_db }
     mm_port_names:
-      - REG_DIAG_DATA_BUF_BSN
-      - RAM_DIAG_DATA_BUF_BSN
+      - REG_DIAG_DATA_BUFFER_BSN
+      - RAM_DIAG_DATA_BUFFER_BSN
   
   #############################################################################
   # Fsub = Subband Filterbank (from node_sdp_filterbank.vhd)
@@ -250,15 +243,15 @@ peripherals:
     mm_port_names:
       - RAM_ST_BST
 
-  - peripheral_name: common/common_variable_delay
-    peripheral_group: bst
-    mm_port_names:
-      - REG_STAT_ENABLE_BST
+  # - peripheral_name: common/common_variable_delay
+  #   peripheral_group: bst
+  #   mm_port_names:
+  #     - REG_STAT_ENABLE_BST
 
-  - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_bst
-    peripheral_group: bst
-    mm_port_names:
-      - REG_STAT_HDR_INFO_BST
+  # - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_bst
+  #   peripheral_group: bst
+  #   mm_port_names:
+  #     - REG_STAT_HDR_INFO_BST
 
   - peripheral_name: nw_10GbE/nw_10GbE_unb2legacy
     peripheral_group: beamlet_output
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/qsys_lofar2_unb2b_sdp_station.qsys b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/qsys_lofar2_unb2b_sdp_station.qsys
index 07e80d91aaa70391fc56c9247be7338cedc0d471..113634ea66237e5b64fbc3b3306278e027b3fa31 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/qsys_lofar2_unb2b_sdp_station.qsys
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/qsys_lofar2_unb2b_sdp_station.qsys
@@ -22,7 +22,7 @@
    {
       datum baseAddress
       {
-         value = "638976";
+         value = "8192";
          type = "String";
       }
    }
@@ -38,7 +38,7 @@
    {
       datum baseAddress
       {
-         value = "8192";
+         value = "4096";
          type = "String";
       }
    }
@@ -83,7 +83,7 @@
    {
       datum baseAddress
       {
-         value = "622592";
+         value = "655360";
          type = "String";
       }
    }
@@ -250,7 +250,7 @@
    {
       datum baseAddress
       {
-         value = "589824";
+         value = "98304";
          type = "String";
       }
    }
@@ -266,7 +266,7 @@
    {
       datum baseAddress
       {
-         value = "458752";
+         value = "524288";
          type = "String";
       }
    }
@@ -298,7 +298,7 @@
    {
       datum baseAddress
       {
-         value = "65536";
+         value = "393216";
          type = "String";
       }
    }
@@ -330,7 +330,7 @@
    {
       datum baseAddress
       {
-         value = "524288";
+         value = "589824";
          type = "String";
       }
    }
@@ -346,7 +346,7 @@
    {
       datum baseAddress
       {
-         value = "393216";
+         value = "458752";
          type = "String";
       }
    }
@@ -865,7 +865,7 @@
       }
       datum baseAddress
       {
-         value = "4096";
+         value = "65536";
          type = "String";
       }
    }
@@ -5397,7 +5397,7 @@
                     <consumedSystemInfos>
                         <entry>
                             <key>ADDRESS_MAP</key>
-                            <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3300' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3500' end='0x3540' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3540' end='0x3580' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0x3580' end='0x35A0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x35A0' end='0x35C0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x35C0' end='0x35E0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x35E0' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0x3600' end='0x3610' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0x3610' end='0x3620' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3620' end='0x3628' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0x3628' end='0x3630' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3630' end='0x3638' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3638' end='0x3640' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3640' end='0x3648' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3648' end='0x3650' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3650' end='0x3658' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3658' end='0x3660' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3660' end='0x3668' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3668' end='0x3670' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3670' end='0x3678' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x90000' end='0x98000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0x98000' end='0x9C000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x9C000' end='0x9D000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                            <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='reg_diag_data_buffer_bsn.mem' start='0x80' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_stat_hdr_dat.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /&gt;&lt;slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='reg_stat_enable.mem' start='0x3008' end='0x3010' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /&gt;&lt;slave name='reg_dp_shiftram.mem' start='0x3080' end='0x3100' datawidth='32' /&gt;&lt;slave name='reg_wg.mem' start='0x3100' end='0x3200' datawidth='32' /&gt;&lt;slave name='reg_aduh_monitor.mem' start='0x3200' end='0x3300' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x3300' end='0x3400' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x3400' end='0x3500' datawidth='32' /&gt;&lt;slave name='reg_sdp_info.mem' start='0x3500' end='0x3540' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0x3540' end='0x3580' datawidth='32' /&gt;&lt;slave name='reg_bsn_source_v2.mem' start='0x3580' end='0x35A0' datawidth='32' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x35A0' end='0x35C0' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x35C0' end='0x35E0' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x35E0' end='0x3600' datawidth='32' /&gt;&lt;slave name='reg_dp_xonoff.mem' start='0x3600' end='0x3610' datawidth='32' /&gt;&lt;slave name='reg_bf_scale.mem' start='0x3610' end='0x3620' datawidth='32' /&gt;&lt;slave name='pio_jesd_ctrl.mem' start='0x3620' end='0x3628' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_eth10g.mem' start='0x3628' end='0x3630' datawidth='32' /&gt;&lt;slave name='reg_dp_selector.mem' start='0x3630' end='0x3638' datawidth='32' /&gt;&lt;slave name='reg_bsn_scheduler.mem' start='0x3638' end='0x3640' datawidth='32' /&gt;&lt;slave name='reg_si.mem' start='0x3640' end='0x3648' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x3648' end='0x3650' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x3650' end='0x3658' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3658' end='0x3660' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3660' end='0x3668' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3668' end='0x3670' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3670' end='0x3678' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /&gt;&lt;slave name='ram_equalizer_gains.mem' start='0x18000' end='0x20000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /&gt;&lt;slave name='ram_ss_ss_wide.mem' start='0x60000' end='0x70000' datawidth='32' /&gt;&lt;slave name='ram_wg.mem' start='0x70000' end='0x80000' datawidth='32' /&gt;&lt;slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /&gt;&lt;slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /&gt;&lt;slave name='jesd204b.mem' start='0xA0000' end='0xA4000' datawidth='32' /&gt;&lt;slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
                         </entry>
                         <entry>
                             <key>ADDRESS_WIDTH</key>
@@ -32692,7 +32692,7 @@
                         <name>coe_address_export</name>
                         <role>export</role>
                         <direction>Output</direction>
-                        <width>10</width>
+                        <width>13</width>
                         <lowerBound>0</lowerBound>
                         <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                     </port>
@@ -32752,42 +32752,42 @@
                 <type>avalon</type>
                 <isStart>false</isStart>
                 <ports>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
                     <port>
                         <name>avs_mem_address</name>
                         <role>address</role>
                         <direction>Input</direction>
-                        <width>10</width>
+                        <width>13</width>
                         <lowerBound>0</lowerBound>
                         <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                     </port>
                     <port>
-                        <name>avs_mem_write</name>
-                        <role>write</role>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
                         <direction>Input</direction>
                         <width>1</width>
                         <lowerBound>0</lowerBound>
                         <vhdlType>STD_LOGIC</vhdlType>
                     </port>
                     <port>
-                        <name>avs_mem_writedata</name>
-                        <role>writedata</role>
-                        <direction>Input</direction>
-                        <width>32</width>
-                        <lowerBound>0</lowerBound>
-                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
-                    </port>
-                    <port>
-                        <name>avs_mem_read</name>
-                        <role>read</role>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
                         <direction>Input</direction>
                         <width>1</width>
                         <lowerBound>0</lowerBound>
                         <vhdlType>STD_LOGIC</vhdlType>
                     </port>
                     <port>
-                        <name>avs_mem_readdata</name>
-                        <role>readdata</role>
-                        <direction>Output</direction>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
                         <width>32</width>
                         <lowerBound>0</lowerBound>
                         <vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -32825,7 +32825,7 @@
                         </entry>
                         <entry>
                             <key>addressSpan</key>
-                            <value>4096</value>
+                            <value>32768</value>
                         </entry>
                         <entry>
                             <key>addressUnits</key>
@@ -33231,11 +33231,11 @@
                     <suppliedSystemInfos>
                         <entry>
                             <key>ADDRESS_MAP</key>
-                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
                         </entry>
                         <entry>
                             <key>ADDRESS_WIDTH</key>
-                            <value>12</value>
+                            <value>15</value>
                         </entry>
                         <entry>
                             <key>MAX_SLAVE_DATA_WIDTH</key>
@@ -34041,7 +34041,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="rom_system_info.mem">
-  <parameter name="baseAddress" value="0x1000" />
+  <parameter name="baseAddress" value="0x00010000" />
  </connection>
  <connection
    kind="avalon"
@@ -34132,7 +34132,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="ram_st_sst.mem">
-  <parameter name="baseAddress" value="0x00080000" />
+  <parameter name="baseAddress" value="0x00090000" />
  </connection>
  <connection
    kind="avalon"
@@ -34146,7 +34146,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="ram_fil_coefs.mem">
-  <parameter name="baseAddress" value="0x00070000" />
+  <parameter name="baseAddress" value="0x00080000" />
  </connection>
  <connection
    kind="avalon"
@@ -34167,7 +34167,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="ram_wg.mem">
-  <parameter name="baseAddress" value="0x00060000" />
+  <parameter name="baseAddress" value="0x00070000" />
  </connection>
  <connection
    kind="avalon"
@@ -34209,7 +34209,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="jesd204b.mem">
-  <parameter name="baseAddress" value="0x00098000" />
+  <parameter name="baseAddress" value="0x000a0000" />
  </connection>
  <connection
    kind="avalon"
@@ -34223,14 +34223,14 @@
    version="18.0"
    start="cpu_0.data_master"
    end="ram_equalizer_gains.mem">
-  <parameter name="baseAddress" value="0x00090000" />
+  <parameter name="baseAddress" value="0x00018000" />
  </connection>
  <connection
    kind="avalon"
    version="18.0"
    start="cpu_0.data_master"
    end="ram_ss_ss_wide.mem">
-  <parameter name="baseAddress" value="0x00010000" />
+  <parameter name="baseAddress" value="0x00060000" />
  </connection>
  <connection
    kind="avalon"
@@ -34328,7 +34328,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="avs_eth_0.mms_ram">
-  <parameter name="baseAddress" value="0x0009c000" />
+  <parameter name="baseAddress" value="0x2000" />
  </connection>
  <connection
    kind="avalon"
@@ -34342,7 +34342,7 @@
    version="18.0"
    start="cpu_0.data_master"
    end="avs_eth_0.mms_tse">
-  <parameter name="baseAddress" value="0x2000" />
+  <parameter name="baseAddress" value="0x1000" />
  </connection>
  <connection
    kind="avalon"
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
index 57018b560bec906485bd5e61760b449c99308278..8640b0fcf5e91101992b84779111a995b8455836 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
@@ -113,7 +113,7 @@ ARCHITECTURE str OF lofar2_unb2b_sdp_station IS
   CONSTANT c_revision_select        : t_lofar2_unb2b_sdp_station_config := func_sel_revision_rec(g_design_name);
 
   -- Firmware version x.y
-  CONSTANT c_fw_version             : t_unb2b_board_fw_version := (1, 1);
+  CONSTANT c_fw_version             : t_unb2b_board_fw_version := (2, 0);
   CONSTANT c_mm_clk_freq            : NATURAL := c_unb2b_board_mm_clk_freq_100M;
   CONSTANT c_lofar2_sample_clk_freq : NATURAL := c_sdp_f_adc_MHz * 10**6;  -- fixed 200 MHz for LOFAR2.0 stage 1
 
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
index 077878a6f2043bfc5e1f4b95e62d81c22324b73a..6f888f8c81df8afd74fe0bce241637f33de86023 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
@@ -406,8 +406,8 @@ BEGIN
       rom_system_info_reset_export              => OPEN,
       rom_system_info_clk_export                => OPEN,
 --    ToDo: This has changed in the peripherals package
-      rom_system_info_address_export            => rom_unb_system_info_mosi.address(9 DOWNTO 0), 
---      rom_system_info_address_export            => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0), 
+--      rom_system_info_address_export            => rom_unb_system_info_mosi.address(9 DOWNTO 0), 
+      rom_system_info_address_export            => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0), 
       rom_system_info_write_export              => rom_unb_system_info_mosi.wr,
       rom_system_info_writedata_export          => rom_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
       rom_system_info_read_export               => rom_unb_system_info_mosi.rd,
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
index c6d2fa51f9c0dcf50fa2f17a8ce31d35ebc9680a..f7b7faaaa6aa3ae10dd32edda4fb0d5b3af2d7af 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
@@ -337,7 +337,7 @@ PACKAGE qsys_lofar2_unb2b_sdp_station_pkg IS
             reg_wg_write_export                       : out std_logic;                                        -- export
             reg_wg_writedata_export                   : out std_logic_vector(31 downto 0);                    -- export
             reset_reset_n                             : in  std_logic                     := 'X';             -- reset_n
-            rom_system_info_address_export            : out std_logic_vector(9 downto 0);                     -- export
+            rom_system_info_address_export            : out std_logic_vector(12 downto 0);                     -- export
             rom_system_info_clk_export                : out std_logic;                                        -- export
             rom_system_info_read_export               : out std_logic;                                        -- export
             rom_system_info_readdata_export           : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index 30ff635d11b41dea803c2aa1ce11dc937c199319..6ece926fae5b8c38ab4d02a1289c10cb61fcf036 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -256,7 +256,7 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_xst_udp_src_port_15_8  : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D2";  -- TBC
 
   CONSTANT c_sdp_stat_nof_hdr_fields : NATURAL := 1+3+12+4+20+1; -- 592b; 18.5 32b words
-  CONSTANT c_sdp_stat_hdr_field_sel  : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "1"&"101"&"111111111101"&"0111"&"01000000000000000100"&"0";  -- 0=data path, 1=MM controlled TODO
+  CONSTANT c_sdp_stat_hdr_field_sel  : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "1"&"101"&"111111111001"&"0111"&"01000000000000000100"&"0";  -- 0=data path, 1=MM controlled TODO
 
   CONSTANT c_sdp_stat_hdr_field_arr : t_common_field_arr(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := (
       ( field_name_pad("word_align"                              ), "RW", 16, field_default(0) ),