From 7c71ba313866263bbe31dc793b38a36d6805d03f Mon Sep 17 00:00:00 2001 From: Pepping <pepping> Date: Thu, 2 Apr 2015 14:21:52 +0000 Subject: [PATCH] Added mm ports --- libraries/io/ddr3/src/vhdl/ddr3.vhd | 6 +++++- libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/libraries/io/ddr3/src/vhdl/ddr3.vhd b/libraries/io/ddr3/src/vhdl/ddr3.vhd index 4cf20b4639..dc78a1d67a 100644 --- a/libraries/io/ddr3/src/vhdl/ddr3.vhd +++ b/libraries/io/ddr3/src/vhdl/ddr3.vhd @@ -46,7 +46,11 @@ ENTITY ddr3 IS g_flush_sop_start_channel : NATURAL := 0; g_flush_nof_channels : NATURAL := 0 ); - PORT ( + PORT ( + -- MM clock + reset + mm_rst : IN STD_LOGIC; + mm_clk : IN STD_LOGIC; + ctlr_ref_clk : IN STD_LOGIC; ctlr_rst : IN STD_LOGIC; -- asynchronous reset input to controller diff --git a/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd b/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd index d302198c9f..0339062314 100644 --- a/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd +++ b/libraries/io/ddr3/src/vhdl/ddr3_transpose.vhd @@ -217,7 +217,11 @@ BEGIN g_flush_sop_start_channel => 0, g_flush_nof_channels => 0 ) - PORT MAP ( + PORT MAP ( + + mm_clk => mm_clk, + mm_rst => mm_rst, + ctlr_ref_clk => dp_ref_clk, ctlr_rst => dp_ref_rst, -- GitLab