From 7c30c986880d8c78fa7c667020e8cd6cb997f598 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Tue, 20 Oct 2015 09:12:43 +0000
Subject: [PATCH] Added usage comment.

---
 libraries/base/common/tb/vhdl/tb_common_shiftram.vhd | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/libraries/base/common/tb/vhdl/tb_common_shiftram.vhd b/libraries/base/common/tb/vhdl/tb_common_shiftram.vhd
index 14c3dca6f1..a59170a1c3 100644
--- a/libraries/base/common/tb/vhdl/tb_common_shiftram.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_shiftram.vhd
@@ -25,6 +25,9 @@
 -- . The DUT output counter stream is verified
 -- . Correct shift and counter values at the output with respect to the input 
 --   counter values are verified
+-- Usage:
+-- > as 10
+-- > run -all  -- signal tb_end will stop the simulation by stopping the clk
 
 LIBRARY IEEE, common_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
-- 
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