diff --git a/boards/uniboard2/designs/unb2_test/tb/python/tc_unb2_test.py b/boards/uniboard2/designs/unb2_test/tb/python/tc_unb2_test.py index 3cbb6ea2b6027b716738182890d8989987c95962..f076747cf58fde75049f3ca80b56c7e55fc1e112 100644 --- a/boards/uniboard2/designs/unb2_test/tb/python/tc_unb2_test.py +++ b/boards/uniboard2/designs/unb2_test/tb/python/tc_unb2_test.py @@ -317,6 +317,17 @@ def test_tr_10GbE(tc,io,cmd): verify_10GbE_status(tc,stat_name,tr10.read_reg(tc.nodeNrs,'REG_TR_10GBE_QSFP_RING',inst_offs+(REGMAP[stat_name][2][0]),1)) +def test_eth10g(tc,io,cmd): + tc.set_section_id('eth10g link status - ') + tc.append_log(3, '>>>') + tc.append_log(1, '>>> %s' % help_text(tc,io,cmd)) + tc.append_log(3, '>>>') + + from pi_eth10g import REGMAP,PiEth10g + eth10g = PiEth10g(tc,io,inst_name='QSFP_RING') + tc.append_log(1, '>>> %d' % eth10g.read_eth10g()) + + def test_tx_seq(tc,io,cmd): tc.set_section_id('tx seq - ') tc.append_log(3, '>>>') @@ -327,7 +338,6 @@ def test_tx_seq(tc,io,cmd): tx_seq = PiDiagTxSeq(tc,io,inst_name='10GBE') tx_seq.write(tc.nodeNrs,inst_nrs=0, registers=[('control', 1)],regmap=REGMAP) - # instanceName is taken from tc.gpString on_execute(class_definition=PiDiagTxSeq,regmap=REGMAP) # this reads/shows ALL status @@ -565,6 +575,7 @@ Cmd['REMU'] = (test_remu, 'using pi_remu to load user image (access REG_RE Cmd['WDI'] = (test_wdi, 'using pi_wdi to reset to image in bank 0 (access REG_WDI)','') Cmd['XAUI'] = (test_tr_xaui, 'using pi_tr_xaui to read xaui status (access REG_TR_XAUI)','(-r for addressing streams)') Cmd['10GBE'] = (test_tr_10GbE,'using pi_tr_10GbE to read 10GbE status (access REG_TR_10GBE)','(-r for addressing streams)') +Cmd['ETH10G'] = (test_eth10g, 'using pi_eth10g to read eth10g link status (access REG_ETH10G_*)','(-r for addressing streams)') Cmd['DDR'] = (test_ddr_stat,'using pi_io_ddr to read DDR3 status (access REG_IO_DDR)','') Cmd['TXSEQ'] = (test_tx_seq, 'using pi_diag_tx_seq','') Cmd['RXSEQ'] = (test_rx_seq, 'using pi_diag_rx_seq','')