From 79f760b3fa074ad572ce8fd645db1dd847380750 Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Thu, 11 Jun 2015 09:15:43 +0000
Subject: [PATCH] using all 24 10GbE tranceivers (all QSFPs)
---
.../designs/unb2_test/src/vhdl/unb2_test.vhd | 51 ++++++++++++-------
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
index 377532c13a..cab5731b9c 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
@@ -20,7 +20,7 @@
--
-------------------------------------------------------------------------------
-LIBRARY IEEE, common_lib, unb2_board_lib, dp_lib, eth_lib, tr_10GbE_lib, diag_lib, technology_lib, tech_ddr_lib, reorder_lib;
+LIBRARY IEEE, common_lib, unb2_board_lib, dp_lib, eth_lib, tr_10GbE_lib, diag_lib, technology_lib, tech_ddr_lib, reorder_lib, tech_clkbuf_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
USE common_lib.common_pkg.ALL;
@@ -98,14 +98,14 @@ ENTITY unb2_test IS
QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
- --QSFP_2_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- --QSFP_2_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
- --QSFP_3_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- --QSFP_3_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
- --QSFP_4_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- --QSFP_4_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
- --QSFP_5_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- --QSFP_5_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_2_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_2_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_3_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_3_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_4_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_4_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_5_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_5_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
QSFP_SDA : INOUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.i2c_w-1 downto 0);
QSFP_SCL : INOUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.i2c_w-1 downto 0);
@@ -148,7 +148,7 @@ ARCHITECTURE str OF unb2_test IS
CONSTANT c_use_MB_I : NATURAL := sel_a_b(c_use_ddr,1,0); -- 1: use MB_I 0: do not use
CONSTANT c_use_MB_II : NATURAL := 0;
- CONSTANT c_nof_qsfp : NATURAL := 8;--c_unb2_board_tr_qsfp.nof_bus * c_unb2_board_tr_qsfp.bus_w;
+ CONSTANT c_nof_qsfp : NATURAL := c_unb2_board_tr_qsfp.nof_bus * c_unb2_board_tr_qsfp.bus_w;
CONSTANT c_nof_ring : NATURAL := c_unb2_board_tr_ring.nof_bus * c_unb2_board_tr_ring.bus_w;
CONSTANT c_nof_back0 : NATURAL := c_unb2_board_tr_back.bus_w;
CONSTANT c_nof_back1 : NATURAL := c_unb2_board_tr_back.bus_w;
@@ -211,6 +211,8 @@ ARCHITECTURE str OF unb2_test IS
SIGNAL dp_clk : STD_LOGIC;
SIGNAL dp_rst : STD_LOGIC;
+ SIGNAL SA_CLK_buf : STD_LOGIC;
+
-- PIOs
SIGNAL pout_wdi : STD_LOGIC;
@@ -784,6 +786,17 @@ BEGIN
reg_diag_rx_seq_miso => reg_diag_rx_seq_10GbE_miso
);
+
+ u_sa_clk_buf : ENTITY tech_clkbuf_lib.tech_clkbuf
+ GENERIC MAP (
+ g_technology => g_technology,
+ g_clock_net => "GLOBAL"
+ )
+ PORT MAP (
+ inclk => SA_CLK,
+ outclk => SA_CLK_buf
+ );
+
u_tr_10GbE_qsfp_and_ring: ENTITY unb2_board_lib.unb2_board_10gbe -- QSFP and Ring lines
GENERIC MAP (
g_technology => g_technology,
@@ -794,7 +807,7 @@ BEGIN
g_tx_fifo_size => c_def_10GbE_block_size*2
)
PORT MAP (
- tr_ref_clk => SA_CLK,
+ tr_ref_clk => SA_CLK_buf,
mm_rst => mm_rst,
mm_clk => mm_clk,
reg_mac_mosi => reg_tr_10GbE_qsfp_ring_mosi,
@@ -819,17 +832,17 @@ BEGIN
i_QSFP_RX(0) <= QSFP_0_RX;
i_QSFP_RX(1) <= QSFP_1_RX;
- --i_QSFP_RX(2) <= QSFP_2_RX;
- --i_QSFP_RX(3) <= QSFP_3_RX;
- --i_QSFP_RX(4) <= QSFP_4_RX;
- --i_QSFP_RX(5) <= QSFP_5_RX;
+ i_QSFP_RX(2) <= QSFP_2_RX;
+ i_QSFP_RX(3) <= QSFP_3_RX;
+ i_QSFP_RX(4) <= QSFP_4_RX;
+ i_QSFP_RX(5) <= QSFP_5_RX;
QSFP_0_TX <= i_QSFP_TX(0);
QSFP_1_TX <= i_QSFP_TX(1);
- --QSFP_2_TX <= i_QSFP_TX(2);
- --QSFP_3_TX <= i_QSFP_TX(3);
- --QSFP_4_TX <= i_QSFP_TX(4);
- --QSFP_5_TX <= i_QSFP_TX(5);
+ QSFP_2_TX <= i_QSFP_TX(2);
+ QSFP_3_TX <= i_QSFP_TX(3);
+ QSFP_4_TX <= i_QSFP_TX(4);
+ QSFP_5_TX <= i_QSFP_TX(5);
--
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