From 79ca44d8589030373689416b050ddd02e40c3996 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Fri, 15 Jun 2018 11:18:02 +0000
Subject: [PATCH] The in_siso.xon for upstream can remain on, because flush
will handle out_siso.xon.
---
libraries/base/dp/src/vhdl/dp_xonoff.vhd | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/libraries/base/dp/src/vhdl/dp_xonoff.vhd b/libraries/base/dp/src/vhdl/dp_xonoff.vhd
index 34c1b7cdbf..2a1ae13bfe 100644
--- a/libraries/base/dp/src/vhdl/dp_xonoff.vhd
+++ b/libraries/base/dp/src/vhdl/dp_xonoff.vhd
@@ -21,6 +21,11 @@
-- Purpose: Add flow XON-XOFF control by flushing frames
-- Description:
+-- The in_siso.ready = out_siso.ready so passed on unchanged, to support
+-- detailed output to input flow control per cycle. The in_siso.xon is
+-- always '1', because the out_siso.xon is taken care of in this
+-- dp_xonoff.vhd by flushing any in_sosi data when out_siso.xon = '0'.
+--
-- When g_bypass=TRUE then the in and out are wired and the component is void.
-- When g_bypass=FALSE then:
-- The output is ON when flush='0'.
@@ -70,7 +75,8 @@ BEGIN
END GENERATE;
no_bypass : IF g_bypass=FALSE GENERATE
- in_siso <= out_siso; -- pass on ready for detailed flow control per cycle
+ in_siso.ready <= out_siso.ready; -- pass on ready for detailed flow control per cycle
+ in_siso.xon <= '1'; -- upstream can remain on, because flush will handle out_siso.xon
nxt_flush <= NOT out_siso.xon; -- use xon for flow control at frame level
p_clk: PROCESS(clk, rst)
--
GitLab