From 79b8e0bcc7dd7a3b84ae535b63776352683d7688 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Mon, 2 Jun 2014 09:25:26 +0000
Subject: [PATCH] Use m25p128 behavioral VHDL model from Numonyx directory in
$UNB. - avoids need to compile the model in ip_stratixiv_lib, because it
needs to be compiled first and should not be in the synth_files key. - use
model from Numonyx directory in $UNB, instead of the stripped copy in $UNB
epcs/tb/vhdl/m25p128_model. - Numonyx is now part of Micron company, but
still keep it in the name.
---
libraries/external/numonyx_m25p128/hdllib.cfg | 17 +++++++++++++++++
.../technology/altera/stratixiv/hdllib.cfg | 10 +---------
.../stratixiv/ip_stratixiv_asmi_parallel.vhd | 6 ++++--
3 files changed, 22 insertions(+), 11 deletions(-)
create mode 100644 libraries/external/numonyx_m25p128/hdllib.cfg
diff --git a/libraries/external/numonyx_m25p128/hdllib.cfg b/libraries/external/numonyx_m25p128/hdllib.cfg
new file mode 100644
index 0000000000..f6f07cb7a7
--- /dev/null
+++ b/libraries/external/numonyx_m25p128/hdllib.cfg
@@ -0,0 +1,17 @@
+hdl_lib_name = numonyx_m25p128
+hdl_library_clause_name = numonyx_m25p128_lib
+hdl_lib_uses =
+
+build_sim_dir = $HDL_BUILD_DIR
+build_synth_dir =
+
+synth_files =
+test_bench_files =
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/StringLib.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/def.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/CUIcommandData.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/data.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/BlockLib.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/TimingData.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/lib/MemoryLib.vhd
+ $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/code/m25p128_model/M25P128.vhd
diff --git a/libraries/technology/altera/stratixiv/hdllib.cfg b/libraries/technology/altera/stratixiv/hdllib.cfg
index d9fd716773..ebb74bb383 100644
--- a/libraries/technology/altera/stratixiv/hdllib.cfg
+++ b/libraries/technology/altera/stratixiv/hdllib.cfg
@@ -1,19 +1,11 @@
hdl_lib_name = ip_stratixiv
hdl_library_clause_name = ip_stratixiv_lib
-hdl_lib_uses =
+hdl_lib_uses = numonyx_m25p128_lib
build_sim_dir = $HDL_BUILD_DIR
build_synth_dir =
synth_files =
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/StringLib.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/def.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/CUIcommandData.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/data.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/BlockLib.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/TimingData.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/MemoryLib.vhd
- $UNB/Firmware/modules/epcs/tb/vhdl/m25p128_model/M25P128.vhd
ip_stratixiv_asmi_parallel.vhd
ip_stratixiv_remote_update.vhd
diff --git a/libraries/technology/altera/stratixiv/ip_stratixiv_asmi_parallel.vhd b/libraries/technology/altera/stratixiv/ip_stratixiv_asmi_parallel.vhd
index cd94454677..1e3f83df11 100644
--- a/libraries/technology/altera/stratixiv/ip_stratixiv_asmi_parallel.vhd
+++ b/libraries/technology/altera/stratixiv/ip_stratixiv_asmi_parallel.vhd
@@ -44,6 +44,8 @@
LIBRARY stratixiv;
USE stratixiv.all;
+
+ LIBRARY numonyx_m25p128_lib;
--synthesis_resources = a_graycounter 4 lpm_compare 2 lpm_counter 2 lut 29 mux21 1 reg 106 stratixiv_asmiblock 1
LIBRARY ieee;
@@ -892,9 +894,9 @@
-- ASTRON, DS:
-- ==========
-- synthesis translate_off
- u_M25P128: ENTITY work.M25P128
+ u_M25P128: ENTITY numonyx_m25p128_lib.M25P128
GENERIC MAP(
- MemoryFileName => "../../../tb/vhdl/m25p128_model/sim/memory_file",
+ MemoryFileName => "../../../../../UniBoard/trunk/Firmware/modules/Numonyx/NU_M25P128_V10/sim/memory_file",
TimingCheckOn => FALSE
)
PORT MAP (
--
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