diff --git a/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd b/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
index a56f0dbd838e41d4fd666cbd746a684b80019296..27603f4efd283eae3b7ce83b65cca8a6864e0746 100644
--- a/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
+++ b/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
@@ -22,7 +22,7 @@
 -- Purpose: Reusable test bench link connection for the tech_mac_10g
 -- Description:
 -- . Support XGMII layer connect
--- . Support serial layer connect with optional link_fault
+-- . Support PHY serial layer connect with optional link_fault
 -- . Support link delay
 
 LIBRARY IEEE, common_lib, dp_lib;
@@ -37,25 +37,31 @@ ENTITY tb_tech_mac_10g_link_connect IS
     g_link_delay  : TIME :=  0 ns
   );
   PORT (
+    link_fault    : IN  STD_LOGIC := '0';  -- when '1' then forces rx_serial_arr(0)='0'
+
     -- XGMII layer connect
-    xgmii_tx_data : IN  STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0) := (OTHERS=>'X');  -- 72 bit
-    xgmii_rx_data : OUT STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);                   -- 72 bit
+    xgmii_tx_data : IN  STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0) := (OTHERS=>'X');        -- 72 bit
+    xgmii_rx_data : OUT STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);                         -- 72 bit
     
-    -- Serial layer connect
-    link_fault    : IN  STD_LOGIC := '0';              -- when '1' then forces rx_serial_arr(0)='0'
-    tx_serial_arr : IN  STD_LOGIC_VECTOR(0 DOWNTO 0) := (OTHERS=>'X');
-    rx_serial_arr : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);  -- connects to delayed tx_serial_arr(0) when g_loopback=TRUE else to rx_serial_in
+    -- 10GBASE-R serial layer connect
+    serial_tx_arr : IN  STD_LOGIC_VECTOR(0 DOWNTO 0) := (OTHERS=>'X');
+    serial_rx_arr : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                                   -- connects to delayed serial_tx_arr(0) when g_loopback=TRUE else to serial_rx_in
+    serial_tx_out : OUT STD_LOGIC;                                                      -- connects to delayed serial_tx_arr(0)
+    serial_rx_in  : IN  STD_LOGIC := 'X';                                               -- used when g_loopback=FALSE
     
-    -- . external connect
-    tx_serial_out : OUT STD_LOGIC;                     -- connects to delayed tx_serial_arr(0)
-    rx_serial_in  : IN  STD_LOGIC := 'X'               -- used when g_loopback=FALSE
+    -- XAUI serial layer connect
+    xaui_tx_arr   : IN  t_xaui_arr(0 DOWNTO 0) := (OTHERS=>(OTHERS=>'X'));
+    xaui_rx_arr   : OUT t_xaui_arr(0 DOWNTO 0);                                         -- connects to delayed xaui_tx_arr(0) when g_loopback=TRUE else to xaui_rx_in
+    xaui_tx_out   : OUT STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0);                  -- connects to delayed xaui_tx_arr(0)
+    xaui_rx_in    : IN  STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0) := (OTHERS=>'X')  -- used when g_loopback=FALSE
   );
 END tb_tech_mac_10g_link_connect;
 
 
 ARCHITECTURE tb OF tb_tech_mac_10g_link_connect IS
   
-  SIGNAL tx_serial_arr_dly   : STD_LOGIC_VECTOR(0 DOWNTO 0);
+  SIGNAL serial_tx_arr_dly   : STD_LOGIC_VECTOR(0 DOWNTO 0);
+  SIGNAL xaui_tx_arr_dly     : t_xaui_arr(0 DOWNTO 0);
 
 BEGIN
   -----------------------------------------------------------------------------
@@ -64,20 +70,39 @@ BEGIN
   xgmii_rx_data <= TRANSPORT xgmii_tx_data AFTER g_link_delay;
 
   -----------------------------------------------------------------------------
-  -- Serial layer link
+  -- 10GBASE-R serial layer link
   -----------------------------------------------------------------------------
-  tx_serial_arr_dly <= TRANSPORT tx_serial_arr AFTER g_link_delay;
-  tx_serial_out <= tx_serial_arr_dly(0);
+  serial_tx_arr_dly <= TRANSPORT serial_tx_arr AFTER g_link_delay;
+  serial_tx_out <= serial_tx_arr_dly(0);
   
-  p_rx_serial : PROCESS(tx_serial_arr_dly, rx_serial_in, link_fault)
+  p_serial_rx : PROCESS(serial_tx_arr_dly, serial_rx_in, link_fault)
   BEGIN
     IF g_loopback=TRUE THEN
-      rx_serial_arr    <= tx_serial_arr_dly;
+      serial_rx_arr    <= serial_tx_arr_dly;
     ELSE
-      rx_serial_arr(0) <= rx_serial_in;
+      serial_rx_arr(0) <= serial_rx_in;
     END IF;
     IF link_fault='1' THEN
-      rx_serial_arr(0) <= '0';
+      serial_rx_arr(0) <= '0';
     END IF;
   END PROCESS;
+
+  -----------------------------------------------------------------------------
+  -- XAUI serial layer link
+  -----------------------------------------------------------------------------
+  xaui_tx_arr_dly <= TRANSPORT xaui_tx_arr AFTER g_link_delay;
+  xaui_tx_out <= xaui_tx_arr_dly(0);
+  
+  p_xaui_rx : PROCESS(xaui_tx_arr_dly, xaui_rx_in, link_fault)
+  BEGIN
+    IF g_loopback=TRUE THEN
+      xaui_rx_arr    <= xaui_tx_arr_dly;
+    ELSE
+      xaui_rx_arr(0) <= xaui_rx_in;
+    END IF;
+    IF link_fault='1' THEN
+      xaui_rx_arr(0) <= (OTHERS=>'0');
+    END IF;
+  END PROCESS;
+
 END tb;