From 77c7e6f4e5bc184b226c554394de3e156aa9994d Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Thu, 18 Mar 2021 13:41:32 +0100
Subject: [PATCH] Added common/common_variable_delay for REG_STAT_ENABLE of SST
offload.
---
.../lofar2_unb2b_beamformer.fpga.yaml | 4 +++
.../lofar2_unb2b_filterbank.fpga.yaml | 10 +++++--
libraries/base/common/common.peripheral.yaml | 26 +++++++++++++++++++
3 files changed, 38 insertions(+), 2 deletions(-)
create mode 100644 libraries/base/common/common.peripheral.yaml
diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.fpga.yaml
index cb7b1d7945..1f6ada6af2 100644
--- a/applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/lofar2_unb2b_beamformer.fpga.yaml
@@ -194,6 +194,10 @@ peripherals:
slave_port_names:
- REG_STAT_HDR_INFO
+ - peripheral_name: common/common_variable_delay
+ slave_port_names:
+ - REG_STAT_ENABLE
+
#############################################################################
# BF = Beamformer (from node_sdp_beamformer.vhd)
#############################################################################
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/lofar2_unb2b_filterbank.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_filterbank/lofar2_unb2b_filterbank.fpga.yaml
index 2270b22c66..5b833077df 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/lofar2_unb2b_filterbank.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/lofar2_unb2b_filterbank.fpga.yaml
@@ -164,5 +164,11 @@ peripherals:
slave_port_names:
- RAM_ST_SST
-
-
+ - peripheral_name: sdp/sdp_statistics_offload_hdr_dat_sst
+ slave_port_names:
+ - REG_STAT_HDR_INFO
+
+ - peripheral_name: common/common_variable_delay
+ slave_port_names:
+ - REG_STAT_ENABLE
+
diff --git a/libraries/base/common/common.peripheral.yaml b/libraries/base/common/common.peripheral.yaml
new file mode 100644
index 0000000000..88f2140b6f
--- /dev/null
+++ b/libraries/base/common/common.peripheral.yaml
@@ -0,0 +1,26 @@
+schema_name: args
+schema_version: 1.0
+schema_type: peripheral
+
+hdl_library_name: common
+hdl_library_description: "Common peripherals for common logic and memory."
+
+peripherals:
+ - peripheral_name: common_variable_delay # pi_common_variable_delay.py ???
+ peripheral_description: |
+ "The common_variable_delay.vhd logic can delay an input pulse by a number of clock cycles.
+ The delay depends on an internal signal input, such that it the delay is not fixed, but
+ can be different for different instances.
+ The delay is not programmable, but delayed output pulse can be enabled when enable = 1
+ or disabled when enable = 0."
+ slave_ports:
+ # MM port for mms_common_variable_delay.vhd / mms_common_reg.vhd
+ - slave_name: REG_COMMON_VARIABLE_DELAY
+ slave_type: REG
+ slave_description: ""
+ fields:
+ - - field_name: enable
+ field_description: "When 1 pass on delayed pulse to the output, else disable the output pulse."
+ width: 1
+ access_mode: RW
+ address_offset: 0x0
--
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