From 763231c8badc8eb3b7a8977a330fc9a3006c5f8e Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Tue, 26 May 2015 14:00:41 +0000
Subject: [PATCH] mm_clk frequency back to 50MHz (as it was before)

---
 boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd
index 2f3e2d6f30..fe44cfe325 100644
--- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd
+++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd
@@ -72,7 +72,7 @@ ARCHITECTURE str OF unb2_minimal IS
 
   -- Firmware version x.y
   CONSTANT c_fw_version             : t_unb2_board_fw_version := (1, 1);
-  CONSTANT c_mm_clk_freq            : NATURAL := c_unb2_board_mm_clk_freq_125M;
+  CONSTANT c_mm_clk_freq            : NATURAL := c_unb2_board_mm_clk_freq_50M;
 
   -- System
   SIGNAL cs_sim                     : STD_LOGIC;
-- 
GitLab