From 738d01cd226cedeaa683a2a2b642e5bcab5ddd0b Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Fri, 25 Jun 2021 11:58:28 +0200
Subject: [PATCH] added mem mux for beamlet index in VHDL
---
.../src/vhdl/lofar2_unb2b_sdp_station.vhd | 44 +++-
.../src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd | 80 ++----
.../qsys_lofar2_unb2b_sdp_station_pkg.vhd | 42 ++--
.../lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd | 230 +++++++++---------
4 files changed, 189 insertions(+), 207 deletions(-)
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
index fbf9ce2279..d79ab32df2 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
@@ -366,10 +366,14 @@ ARCHITECTURE str OF lofar2_unb2b_sdp_station IS
-- BST
----------------------------------------------
-- Statistics Enable
+ SIGNAL reg_stat_enable_bst_mosi : t_mem_mosi := c_mem_mosi_rst;
+ SIGNAL reg_stat_enable_bst_miso : t_mem_miso := c_mem_miso_rst;
SIGNAL reg_stat_enable_bst_mosi_arr : t_mem_mosi_arr(c_sdp_N_beamsets-1 DOWNTO 0) := (OTHERS => c_mem_mosi_rst);
SIGNAL reg_stat_enable_bst_miso_arr : t_mem_miso_arr(c_sdp_N_beamsets-1 DOWNTO 0) := (OTHERS => c_mem_miso_rst);
- -- Statistics header info
+ -- Statistics header info
+ SIGNAL reg_stat_hdr_dat_bst_mosi : t_mem_mosi := c_mem_mosi_rst;
+ SIGNAL reg_stat_hdr_dat_bst_miso : t_mem_miso := c_mem_miso_rst;
SIGNAL reg_stat_hdr_dat_bst_mosi_arr : t_mem_mosi_arr(c_sdp_N_beamsets-1 DOWNTO 0) := (OTHERS => c_mem_mosi_rst);
SIGNAL reg_stat_hdr_dat_bst_miso_arr : t_mem_miso_arr(c_sdp_N_beamsets-1 DOWNTO 0) := (OTHERS => c_mem_miso_rst);
@@ -691,14 +695,10 @@ BEGIN
reg_stat_enable_sst_miso => reg_stat_enable_sst_miso,
reg_stat_hdr_dat_sst_mosi => reg_stat_hdr_dat_sst_mosi,
reg_stat_hdr_dat_sst_miso => reg_stat_hdr_dat_sst_miso,
- reg_stat_enable_bst_0_mosi => reg_stat_enable_bst_mosi_arr(0),
- reg_stat_enable_bst_0_miso => reg_stat_enable_bst_miso_arr(0),
- reg_stat_hdr_dat_bst_0_mosi => reg_stat_hdr_dat_bst_mosi_arr(0),
- reg_stat_hdr_dat_bst_0_miso => reg_stat_hdr_dat_bst_miso_arr(0),
- reg_stat_enable_bst_1_mosi => reg_stat_enable_bst_mosi_arr(1),
- reg_stat_enable_bst_1_miso => reg_stat_enable_bst_miso_arr(1),
- reg_stat_hdr_dat_bst_1_mosi => reg_stat_hdr_dat_bst_mosi_arr(1),
- reg_stat_hdr_dat_bst_1_miso => reg_stat_hdr_dat_bst_miso_arr(1),
+ reg_stat_enable_bst_mosi => reg_stat_enable_bst_mosi,
+ reg_stat_enable_bst_miso => reg_stat_enable_bst_miso,
+ reg_stat_hdr_dat_bst_mosi => reg_stat_hdr_dat_bst_mosi,
+ reg_stat_hdr_dat_bst_miso => reg_stat_hdr_dat_bst_miso,
reg_dp_sync_insert_v2_mosi => reg_dp_sync_insert_v2_mosi,
reg_dp_sync_insert_v2_miso => reg_dp_sync_insert_v2_miso,
reg_crosslets_info_mosi => reg_crosslets_info_mosi,
@@ -1009,7 +1009,31 @@ BEGIN
mosi_arr => ram_st_bst_mosi_arr,
miso_arr => ram_st_bst_miso_arr
);
-
+
+ u_mem_mux_reg_stat_enable_bst : ENTITY common_lib.common_mem_mux
+ GENERIC MAP (
+ g_nof_mosi => c_sdp_N_beamsets,
+ g_mult_addr_w => c_sdp_reg_stat_enable_addr_w
+ )
+ PORT MAP (
+ mosi => reg_stat_enable_bst_mosi,
+ miso => reg_stat_enable_bst_miso,
+ mosi_arr => reg_stat_enable_bst_mosi_arr,
+ miso_arr => reg_stat_enable_bst_miso_arr
+ );
+
+ u_mem_mux_reg_stat_hdr_dat_bst : ENTITY common_lib.common_mem_mux
+ GENERIC MAP (
+ g_nof_mosi => c_sdp_N_beamsets,
+ g_mult_addr_w => c_sdp_reg_stat_hdr_dat_addr_w
+ )
+ PORT MAP (
+ mosi => reg_stat_hdr_dat_bst_mosi,
+ miso => reg_stat_hdr_dat_bst_miso,
+ mosi_arr => reg_stat_hdr_dat_bst_mosi_arr,
+ miso_arr => reg_stat_hdr_dat_bst_miso_arr
+ );
+
-----------------------------------------------------------------------------
-- DP MUX
-----------------------------------------------------------------------------
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
index d6824efd58..7e1bbd3620 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/mmm_lofar2_unb2b_sdp_station.vhd
@@ -190,21 +190,13 @@ ENTITY mmm_lofar2_unb2b_sdp_station IS
reg_stat_hdr_dat_sst_mosi : OUT t_mem_mosi;
reg_stat_hdr_dat_sst_miso : IN t_mem_miso;
- -- Beamlet Statistics offload BS 0
- reg_stat_enable_bst_0_mosi : OUT t_mem_mosi;
- reg_stat_enable_bst_0_miso : IN t_mem_miso;
+ -- Beamlet Statistics offload
+ reg_stat_enable_bst_mosi : OUT t_mem_mosi;
+ reg_stat_enable_bst_miso : IN t_mem_miso;
- -- Statistics header info
- reg_stat_hdr_dat_bst_0_mosi : OUT t_mem_mosi;
- reg_stat_hdr_dat_bst_0_miso : IN t_mem_miso;
-
- -- Beamlet Statistics offload BS 1
- reg_stat_enable_bst_1_mosi : OUT t_mem_mosi;
- reg_stat_enable_bst_1_miso : IN t_mem_miso;
-
- -- Statistics header info
- reg_stat_hdr_dat_bst_1_mosi : OUT t_mem_mosi;
- reg_stat_hdr_dat_bst_1_miso : IN t_mem_miso;
+ -- Beamlet Statistics header info
+ reg_stat_hdr_dat_bst_mosi : OUT t_mem_mosi;
+ reg_stat_hdr_dat_bst_miso : IN t_mem_miso;
-- dp_sync_insert_v2
reg_dp_sync_insert_v2_mosi : OUT t_mem_mosi;
@@ -353,17 +345,11 @@ BEGIN
u_mm_file_reg_stat_hdr_info_sst : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_DAT_SST")
PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_sst_mosi, reg_stat_hdr_dat_sst_miso);
- u_mm_file_reg_stat_enable_bst_0 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_ENABLE_BST_0")
- PORT MAP(mm_rst, mm_clk, reg_stat_enable_bst_0_mosi, reg_stat_enable_bst_0_miso );
-
- u_mm_file_reg_stat_hdr_info_bst_0 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_DAT_BST_0")
- PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_bst_0_mosi, reg_stat_hdr_dat_bst_0_miso);
-
- u_mm_file_reg_stat_enable_bst_1 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_ENABLE_BST_1")
- PORT MAP(mm_rst, mm_clk, reg_stat_enable_bst_1_mosi, reg_stat_enable_bst_1_miso );
+ u_mm_file_reg_stat_enable_bst : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_ENABLE_BST")
+ PORT MAP(mm_rst, mm_clk, reg_stat_enable_bst_mosi, reg_stat_enable_bst_miso );
- u_mm_file_reg_stat_hdr_info_bst_1 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_DAT_BST_1")
- PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_bst_1_mosi, reg_stat_hdr_dat_bst_1_miso);
+ u_mm_file_reg_stat_hdr_info_bst : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_STAT_HDR_DAT_BST")
+ PORT MAP(mm_rst, mm_clk, reg_stat_hdr_dat_bst_mosi, reg_stat_hdr_dat_bst_miso);
u_mm_file_reg_dp_sync_insert_v2 : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DP_SYNC_INSERT_V2")
PORT MAP(mm_rst, mm_clk, reg_dp_sync_insert_v2_mosi, reg_dp_sync_insert_v2_miso);
@@ -745,37 +731,21 @@ BEGIN
reg_stat_hdr_dat_sst_read_export => reg_stat_hdr_dat_sst_mosi.rd,
reg_stat_hdr_dat_sst_readdata_export => reg_stat_hdr_dat_sst_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_stat_enable_bst_0_clk_export => OPEN,
- reg_stat_enable_bst_0_reset_export => OPEN,
- reg_stat_enable_bst_0_address_export => reg_stat_enable_bst_0_mosi.address(c_sdp_reg_stat_enable_addr_w-1 DOWNTO 0),
- reg_stat_enable_bst_0_write_export => reg_stat_enable_bst_0_mosi.wr,
- reg_stat_enable_bst_0_writedata_export => reg_stat_enable_bst_0_mosi.wrdata(c_word_w-1 DOWNTO 0),
- reg_stat_enable_bst_0_read_export => reg_stat_enable_bst_0_mosi.rd,
- reg_stat_enable_bst_0_readdata_export => reg_stat_enable_bst_0_miso.rddata(c_word_w-1 DOWNTO 0),
-
- reg_stat_hdr_dat_bst_0_clk_export => OPEN,
- reg_stat_hdr_dat_bst_0_reset_export => OPEN,
- reg_stat_hdr_dat_bst_0_address_export => reg_stat_hdr_dat_bst_0_mosi.address(c_sdp_reg_stat_hdr_dat_addr_w-1 DOWNTO 0),
- reg_stat_hdr_dat_bst_0_write_export => reg_stat_hdr_dat_bst_0_mosi.wr,
- reg_stat_hdr_dat_bst_0_writedata_export => reg_stat_hdr_dat_bst_0_mosi.wrdata(c_word_w-1 DOWNTO 0),
- reg_stat_hdr_dat_bst_0_read_export => reg_stat_hdr_dat_bst_0_mosi.rd,
- reg_stat_hdr_dat_bst_0_readdata_export => reg_stat_hdr_dat_bst_0_miso.rddata(c_word_w-1 DOWNTO 0),
-
- reg_stat_enable_bst_1_clk_export => OPEN,
- reg_stat_enable_bst_1_reset_export => OPEN,
- reg_stat_enable_bst_1_address_export => reg_stat_enable_bst_1_mosi.address(c_sdp_reg_stat_enable_addr_w-1 DOWNTO 0),
- reg_stat_enable_bst_1_write_export => reg_stat_enable_bst_1_mosi.wr,
- reg_stat_enable_bst_1_writedata_export => reg_stat_enable_bst_1_mosi.wrdata(c_word_w-1 DOWNTO 0),
- reg_stat_enable_bst_1_read_export => reg_stat_enable_bst_1_mosi.rd,
- reg_stat_enable_bst_1_readdata_export => reg_stat_enable_bst_1_miso.rddata(c_word_w-1 DOWNTO 0),
-
- reg_stat_hdr_dat_bst_1_clk_export => OPEN,
- reg_stat_hdr_dat_bst_1_reset_export => OPEN,
- reg_stat_hdr_dat_bst_1_address_export => reg_stat_hdr_dat_bst_1_mosi.address(c_sdp_reg_stat_hdr_dat_addr_w-1 DOWNTO 0),
- reg_stat_hdr_dat_bst_1_write_export => reg_stat_hdr_dat_bst_1_mosi.wr,
- reg_stat_hdr_dat_bst_1_writedata_export => reg_stat_hdr_dat_bst_1_mosi.wrdata(c_word_w-1 DOWNTO 0),
- reg_stat_hdr_dat_bst_1_read_export => reg_stat_hdr_dat_bst_1_mosi.rd,
- reg_stat_hdr_dat_bst_1_readdata_export => reg_stat_hdr_dat_bst_1_miso.rddata(c_word_w-1 DOWNTO 0),
+ reg_stat_enable_bst_clk_export => OPEN,
+ reg_stat_enable_bst_reset_export => OPEN,
+ reg_stat_enable_bst_address_export => reg_stat_enable_bst_mosi.address(c_sdp_reg_stat_enable_bst_addr_w-1 DOWNTO 0),
+ reg_stat_enable_bst_write_export => reg_stat_enable_bst_mosi.wr,
+ reg_stat_enable_bst_writedata_export => reg_stat_enable_bst_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ reg_stat_enable_bst_read_export => reg_stat_enable_bst_mosi.rd,
+ reg_stat_enable_bst_readdata_export => reg_stat_enable_bst_miso.rddata(c_word_w-1 DOWNTO 0),
+
+ reg_stat_hdr_dat_bst_clk_export => OPEN,
+ reg_stat_hdr_dat_bst_reset_export => OPEN,
+ reg_stat_hdr_dat_bst_address_export => reg_stat_hdr_dat_bst_mosi.address(c_sdp_reg_stat_hdr_dat_bst_addr_w-1 DOWNTO 0),
+ reg_stat_hdr_dat_bst_write_export => reg_stat_hdr_dat_bst_mosi.wr,
+ reg_stat_hdr_dat_bst_writedata_export => reg_stat_hdr_dat_bst_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ reg_stat_hdr_dat_bst_read_export => reg_stat_hdr_dat_bst_mosi.rd,
+ reg_stat_hdr_dat_bst_readdata_export => reg_stat_hdr_dat_bst_miso.rddata(c_word_w-1 DOWNTO 0),
reg_dp_sync_insert_v2_clk_export => OPEN,
reg_dp_sync_insert_v2_reset_export => OPEN,
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
index 5de02153d5..dfdc3433e9 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/qsys_lofar2_unb2b_sdp_station_pkg.vhd
@@ -301,34 +301,20 @@ PACKAGE qsys_lofar2_unb2b_sdp_station_pkg IS
reg_stat_hdr_dat_sst_reset_export : out std_logic; -- export
reg_stat_hdr_dat_sst_write_export : out std_logic; -- export
reg_stat_hdr_dat_sst_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_stat_enable_bst_0_address_export : out std_logic_vector(0 downto 0); -- export
- reg_stat_enable_bst_0_clk_export : out std_logic; -- export
- reg_stat_enable_bst_0_read_export : out std_logic; -- export
- reg_stat_enable_bst_0_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- reg_stat_enable_bst_0_reset_export : out std_logic; -- export
- reg_stat_enable_bst_0_write_export : out std_logic; -- export
- reg_stat_enable_bst_0_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_stat_hdr_dat_bst_0_address_export : out std_logic_vector(5 downto 0); -- export
- reg_stat_hdr_dat_bst_0_clk_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_0_read_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_0_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- reg_stat_hdr_dat_bst_0_reset_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_0_write_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_0_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_stat_enable_bst_1_address_export : out std_logic_vector(0 downto 0); -- export
- reg_stat_enable_bst_1_clk_export : out std_logic; -- export
- reg_stat_enable_bst_1_read_export : out std_logic; -- export
- reg_stat_enable_bst_1_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- reg_stat_enable_bst_1_reset_export : out std_logic; -- export
- reg_stat_enable_bst_1_write_export : out std_logic; -- export
- reg_stat_enable_bst_1_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_stat_hdr_dat_bst_1_address_export : out std_logic_vector(5 downto 0); -- export
- reg_stat_hdr_dat_bst_1_clk_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_1_read_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_1_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- reg_stat_hdr_dat_bst_1_reset_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_1_write_export : out std_logic; -- export
- reg_stat_hdr_dat_bst_1_writedata_export : out std_logic_vector(31 downto 0); -- export
+ reg_stat_enable_bst_address_export : out std_logic_vector(1 downto 0); -- export
+ reg_stat_enable_bst_clk_export : out std_logic; -- export
+ reg_stat_enable_bst_read_export : out std_logic; -- export
+ reg_stat_enable_bst_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
+ reg_stat_enable_bst_reset_export : out std_logic; -- export
+ reg_stat_enable_bst_write_export : out std_logic; -- export
+ reg_stat_enable_bst_writedata_export : out std_logic_vector(31 downto 0); -- export
+ reg_stat_hdr_dat_bst_address_export : out std_logic_vector(6 downto 0); -- export
+ reg_stat_hdr_dat_bst_clk_export : out std_logic; -- export
+ reg_stat_hdr_dat_bst_read_export : out std_logic; -- export
+ reg_stat_hdr_dat_bst_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
+ reg_stat_hdr_dat_bst_reset_export : out std_logic; -- export
+ reg_stat_hdr_dat_bst_write_export : out std_logic; -- export
+ reg_stat_hdr_dat_bst_writedata_export : out std_logic_vector(31 downto 0); -- export
reg_dp_sync_insert_v2_address_export : out std_logic_vector(0 downto 0); -- export
reg_dp_sync_insert_v2_clk_export : out std_logic; -- export
reg_dp_sync_insert_v2_read_export : out std_logic; -- export
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index 1dcc7eb619..2f50920b76 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -139,120 +139,8 @@ PACKAGE sdp_pkg is
true, 54, 2, 195313, c_fft_pipeline, c_fft_pipeline,
c_fil_ppf_pipeline);
- -- JESD204
- CONSTANT c_sdp_jesd204b_freq : STRING := "200MHz";
- CONSTANT c_sdp_jesd204b_mm_jesd_ctrl_reg : t_c_mem := (latency => 1,
- adr_w => 1,
- dat_w => c_word_w,
- nof_dat => 1,
- init_sl => '0');
-
- -- AIT MM address widths
- CONSTANT c_sdp_jesd204b_addr_w : NATURAL := 8 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_jesd_ctrl_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_bsn_monitor_input_addr_w : NATURAL := 8;
- CONSTANT c_sdp_reg_wg_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_ram_wg_addr_w : NATURAL := 10 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_reg_dp_shiftram_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_reg_bsn_source_v2_addr_w : NATURAL := 3;
- CONSTANT c_sdp_reg_bsn_scheduler_addr_w : NATURAL := 1;
- CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db_large); -- Dimension DB address range for largest DB, so that both the large and the default small DB fit.
- CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
- CONSTANT c_sdp_reg_aduh_monitor_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
-
- -- FSUB MM address widths
- CONSTANT c_sdp_ram_fil_coefs_addr_w : NATURAL := ceil_log2(c_sdp_N_fft * c_sdp_N_taps);
- CONSTANT c_sdp_ram_st_sst_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft*c_sdp_wpfb_subbands.stat_data_sz);
- CONSTANT c_sdp_reg_si_addr_w : NATURAL := 1; --enable/disable
- CONSTANT c_sdp_ram_equalizer_gains_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft);
- CONSTANT c_sdp_reg_dp_selector_addr_w : NATURAL := 1; --Select input 0 or 1.
-
- -- BF MM address widths
- CONSTANT c_sdp_reg_sdp_info_addr_w : NATURAL := 4;
- CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
- CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pol * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
- CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
- CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
- CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_S_sub_bf*c_sdp_N_pol*(c_longword_sz/c_word_sz));
-
- -- SST UDP offload MM address widths
- CONSTANT c_sdp_reg_stat_enable_addr_w :NATURAL := 1;
-
- -- XSUB
- CONSTANT c_sdp_crosslets_index_w : NATURAL := ceil_log2(c_sdp_N_sub);
- CONSTANT c_sdp_mm_reg_crosslets_info : t_c_mem := (latency => 1,
- adr_w => 4,
- dat_w => c_sdp_crosslets_index_w,
- nof_dat => 16, -- 15 offsets + 1 step
- init_sl => '0');
- CONSTANT c_sdp_crosslets_info_reg_w : NATURAL := c_sdp_mm_reg_crosslets_info.nof_dat*c_sdp_mm_reg_crosslets_info.dat_w;
-
- CONSTANT c_sdp_xst_nof_blk_per_sync_max : NATURAL := 200000;
- CONSTANT c_sdp_xst_nof_blk_per_sync_min : NATURAL := 19530;
-
- -- XSUB MM address widths
- CONSTANT c_sdp_reg_dp_sync_insert_v2_addr_w : NATURAL := 1;
- CONSTANT c_sdp_reg_crosslets_info_addr_w : NATURAL := c_sdp_mm_reg_crosslets_info.adr_w;
- CONSTANT c_sdp_reg_bsn_scheduler_xsub_addr_w : NATURAL := 1;
- CONSTANT c_sdp_ram_st_xsq_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + ceil_log2(c_sdp_N_crosslets * c_sdp_X_sq * c_nof_complex * (c_longword_sz/c_word_sz) );
-
- -- 10GbE offload (cep = central processor)
- CONSTANT c_sdp_cep_eth_src_mac_47_16 : STD_LOGIC_VECTOR(31 DOWNTO 0) := x"00228608"; -- 47:16, 15:8 = backplane, 7:0 = node
- CONSTANT c_sdp_cep_ip_src_addr_31_16 : STD_LOGIC_VECTOR(15 DOWNTO 0) := x"C0A8"; -- 31:16, 15:8 = backplane, 7:0 = node + 1 = 192.168.xx.yy
- CONSTANT c_sdp_cep_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D0"; -- 15:8, 7:0 = gn_id (= ID[7:0] = backplane[5:0] & node[1:0])
-
- CONSTANT c_sdp_cep_nof_blocks_per_packet : NATURAL := 4;
- CONSTANT c_sdp_cep_nof_beamlets_per_block : NATURAL := c_sdp_N_pol * c_sdp_S_sub_bf;
- CONSTANT c_sdp_cep_nof_hdr_fields : NATURAL := 3+12+4+18+1; -- 592b; 9.25 64b words
- CONSTANT c_sdp_cep_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := "101"&"111111111001"&"0111"&"1100"&"00000010"&"000110"&"0"; -- 0=data path, 1=MM controlled TODO
---CONSTANT c_sdp_cep_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := "100"&"000000010001"&"0100"&"0100"&"00000000"&"101000"&"0"; -- 0=data path, 1=MM controlled TODO
-
- CONSTANT c_sdp_cep_hdr_field_arr : t_common_field_arr(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := (
- ( field_name_pad("eth_dst_mac" ), "RW", 48, field_default(x"00074306C700") ), -- 00074306C700=DOP36-eth0
- ( field_name_pad("eth_src_mac" ), "RW", 48, field_default(0) ),
- ( field_name_pad("eth_type" ), "RW", 16, field_default(x"0800") ),
-
- ( field_name_pad("ip_version" ), "RW", 4, field_default(4) ),
- ( field_name_pad("ip_header_length" ), "RW", 4, field_default(5) ),
- ( field_name_pad("ip_services" ), "RW", 8, field_default(0) ),
- ( field_name_pad("ip_total_length" ), "RW", 16, field_default(7868) ),
- ( field_name_pad("ip_identification" ), "RW", 16, field_default(0) ),
- ( field_name_pad("ip_flags" ), "RW", 3, field_default(2) ),
- ( field_name_pad("ip_fragment_offset" ), "RW", 13, field_default(0) ),
- ( field_name_pad("ip_time_to_live" ), "RW", 8, field_default(127) ),
- ( field_name_pad("ip_protocol" ), "RW", 8, field_default(17) ),
- ( field_name_pad("ip_header_checksum" ), "RW", 16, field_default(0) ),
- ( field_name_pad("ip_src_addr" ), "RW", 32, field_default(0) ),
- ( field_name_pad("ip_dst_addr" ), "RW", 32, field_default(x"C0A80001") ), -- C0A80001=DOP36-eth0 '192.168.0.1'
-
- ( field_name_pad("udp_src_port" ), "RW", 16, field_default(0) ),
- ( field_name_pad("udp_dst_port" ), "RW", 16, field_default(5000) ),
- ( field_name_pad("udp_total_length" ), "RW", 16, field_default(7848) ),
- ( field_name_pad("udp_checksum" ), "RW", 16, field_default(0) ),
-
- ( field_name_pad("sdp_marker" ), "RW", 8, field_default(x"62") ),
- ( field_name_pad("sdp_version_id" ), "RW", 8, field_default(5) ),
- ( field_name_pad("sdp_observation_id" ), "RW", 32, field_default(0) ),
- ( field_name_pad("sdp_station_id" ), "RW", 16, field_default(0) ),
-
- ( field_name_pad("sdp_source_info_antenna_band_id" ), "RW", 1, field_default(0) ),
- ( field_name_pad("sdp_source_info_nyquist_zone_id" ), "RW", 2, field_default(0) ),
- ( field_name_pad("sdp_source_info_f_adc" ), "RW", 1, field_default(0) ),
- ( field_name_pad("sdp_source_info_fsub_type" ), "RW", 1, field_default(0) ),
- ( field_name_pad("sdp_source_info_payload_error" ), "RW", 1, field_default(0) ),
- ( field_name_pad("sdp_source_info_repositioning_flag" ), "RW", 1, field_default(0) ),
- ( field_name_pad("sdp_source_info_beamlet_width" ), "RW", 4, field_default(c_sdp_W_beamlet) ),
- ( field_name_pad("sdp_source_info_gn_id" ), "RW", 5, field_default(0) ),
-
- ( field_name_pad("sdp_reserved" ), "RW", 40, field_default(0) ),
- ( field_name_pad("sdp_beamlet_scale" ), "RW", 16, field_default(2**15) ),
- ( field_name_pad("sdp_beamlet_id" ), "RW", 16, field_default(0) ),
- ( field_name_pad("sdp_nof_blocks_per_packet" ), "RW", 8, field_default(c_sdp_cep_nof_blocks_per_packet) ),
- ( field_name_pad("sdp_nof_beamlets_per_block" ), "RW", 16, field_default(c_sdp_cep_nof_beamlets_per_block) ),
- ( field_name_pad("sdp_block_period" ), "RW", 16, field_default(5120) ),
-
- ( field_name_pad("dp_bsn" ), "RW", 64, field_default(0) )
- );
+ -- ST UDP offload MM address widths
+ CONSTANT c_sdp_reg_stat_enable_addr_w : NATURAL := 1;
-- 10GbE MM address widths
CONSTANT c_sdp_reg_hdr_dat_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(field_nof_words(c_sdp_cep_hdr_field_arr, c_word_w));
@@ -328,6 +216,120 @@ PACKAGE sdp_pkg is
);
CONSTANT c_sdp_reg_stat_hdr_dat_addr_w : NATURAL := ceil_log2(field_nof_words(c_sdp_stat_hdr_field_arr, c_word_w));
+ -- 10GbE offload (cep = central processor)
+ CONSTANT c_sdp_cep_eth_src_mac_47_16 : STD_LOGIC_VECTOR(31 DOWNTO 0) := x"00228608"; -- 47:16, 15:8 = backplane, 7:0 = node
+ CONSTANT c_sdp_cep_ip_src_addr_31_16 : STD_LOGIC_VECTOR(15 DOWNTO 0) := x"C0A8"; -- 31:16, 15:8 = backplane, 7:0 = node + 1 = 192.168.xx.yy
+ CONSTANT c_sdp_cep_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D0"; -- 15:8, 7:0 = gn_id (= ID[7:0] = backplane[5:0] & node[1:0])
+
+ CONSTANT c_sdp_cep_nof_blocks_per_packet : NATURAL := 4;
+ CONSTANT c_sdp_cep_nof_beamlets_per_block : NATURAL := c_sdp_N_pol * c_sdp_S_sub_bf;
+ CONSTANT c_sdp_cep_nof_hdr_fields : NATURAL := 3+12+4+18+1; -- 592b; 9.25 64b words
+ CONSTANT c_sdp_cep_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := "101"&"111111111001"&"0111"&"1100"&"00000010"&"000110"&"0"; -- 0=data path, 1=MM controlled TODO
+--CONSTANT c_sdp_cep_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := "100"&"000000010001"&"0100"&"0100"&"00000000"&"101000"&"0"; -- 0=data path, 1=MM controlled TODO
+
+ CONSTANT c_sdp_cep_hdr_field_arr : t_common_field_arr(c_sdp_cep_nof_hdr_fields-1 DOWNTO 0) := (
+ ( field_name_pad("eth_dst_mac" ), "RW", 48, field_default(x"00074306C700") ), -- 00074306C700=DOP36-eth0
+ ( field_name_pad("eth_src_mac" ), "RW", 48, field_default(0) ),
+ ( field_name_pad("eth_type" ), "RW", 16, field_default(x"0800") ),
+
+ ( field_name_pad("ip_version" ), "RW", 4, field_default(4) ),
+ ( field_name_pad("ip_header_length" ), "RW", 4, field_default(5) ),
+ ( field_name_pad("ip_services" ), "RW", 8, field_default(0) ),
+ ( field_name_pad("ip_total_length" ), "RW", 16, field_default(7868) ),
+ ( field_name_pad("ip_identification" ), "RW", 16, field_default(0) ),
+ ( field_name_pad("ip_flags" ), "RW", 3, field_default(2) ),
+ ( field_name_pad("ip_fragment_offset" ), "RW", 13, field_default(0) ),
+ ( field_name_pad("ip_time_to_live" ), "RW", 8, field_default(127) ),
+ ( field_name_pad("ip_protocol" ), "RW", 8, field_default(17) ),
+ ( field_name_pad("ip_header_checksum" ), "RW", 16, field_default(0) ),
+ ( field_name_pad("ip_src_addr" ), "RW", 32, field_default(0) ),
+ ( field_name_pad("ip_dst_addr" ), "RW", 32, field_default(x"C0A80001") ), -- C0A80001=DOP36-eth0 '192.168.0.1'
+
+ ( field_name_pad("udp_src_port" ), "RW", 16, field_default(0) ),
+ ( field_name_pad("udp_dst_port" ), "RW", 16, field_default(5000) ),
+ ( field_name_pad("udp_total_length" ), "RW", 16, field_default(7848) ),
+ ( field_name_pad("udp_checksum" ), "RW", 16, field_default(0) ),
+
+ ( field_name_pad("sdp_marker" ), "RW", 8, field_default(x"62") ),
+ ( field_name_pad("sdp_version_id" ), "RW", 8, field_default(5) ),
+ ( field_name_pad("sdp_observation_id" ), "RW", 32, field_default(0) ),
+ ( field_name_pad("sdp_station_id" ), "RW", 16, field_default(0) ),
+
+ ( field_name_pad("sdp_source_info_antenna_band_id" ), "RW", 1, field_default(0) ),
+ ( field_name_pad("sdp_source_info_nyquist_zone_id" ), "RW", 2, field_default(0) ),
+ ( field_name_pad("sdp_source_info_f_adc" ), "RW", 1, field_default(0) ),
+ ( field_name_pad("sdp_source_info_fsub_type" ), "RW", 1, field_default(0) ),
+ ( field_name_pad("sdp_source_info_payload_error" ), "RW", 1, field_default(0) ),
+ ( field_name_pad("sdp_source_info_repositioning_flag" ), "RW", 1, field_default(0) ),
+ ( field_name_pad("sdp_source_info_beamlet_width" ), "RW", 4, field_default(c_sdp_W_beamlet) ),
+ ( field_name_pad("sdp_source_info_gn_id" ), "RW", 5, field_default(0) ),
+
+ ( field_name_pad("sdp_reserved" ), "RW", 40, field_default(0) ),
+ ( field_name_pad("sdp_beamlet_scale" ), "RW", 16, field_default(2**15) ),
+ ( field_name_pad("sdp_beamlet_id" ), "RW", 16, field_default(0) ),
+ ( field_name_pad("sdp_nof_blocks_per_packet" ), "RW", 8, field_default(c_sdp_cep_nof_blocks_per_packet) ),
+ ( field_name_pad("sdp_nof_beamlets_per_block" ), "RW", 16, field_default(c_sdp_cep_nof_beamlets_per_block) ),
+ ( field_name_pad("sdp_block_period" ), "RW", 16, field_default(5120) ),
+
+ ( field_name_pad("dp_bsn" ), "RW", 64, field_default(0) )
+ );
+
+ -- JESD204
+ CONSTANT c_sdp_jesd204b_freq : STRING := "200MHz";
+ CONSTANT c_sdp_jesd204b_mm_jesd_ctrl_reg : t_c_mem := (latency => 1,
+ adr_w => 1,
+ dat_w => c_word_w,
+ nof_dat => 1,
+ init_sl => '0');
+
+
+ -- AIT MM address widths
+ CONSTANT c_sdp_jesd204b_addr_w : NATURAL := 8 + ceil_log2(c_sdp_S_pn);
+ CONSTANT c_sdp_jesd_ctrl_addr_w : NATURAL := 1;
+ CONSTANT c_sdp_reg_bsn_monitor_input_addr_w : NATURAL := 8;
+ CONSTANT c_sdp_reg_wg_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
+ CONSTANT c_sdp_ram_wg_addr_w : NATURAL := 10 + ceil_log2(c_sdp_S_pn);
+ CONSTANT c_sdp_reg_dp_shiftram_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
+ CONSTANT c_sdp_reg_bsn_source_v2_addr_w : NATURAL := 3;
+ CONSTANT c_sdp_reg_bsn_scheduler_addr_w : NATURAL := 1;
+ CONSTANT c_sdp_ram_diag_data_buf_bsn_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db_large); -- Dimension DB address range for largest DB, so that both the large and the default small DB fit.
+ CONSTANT c_sdp_reg_diag_data_buf_bsn_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn);
+ CONSTANT c_sdp_reg_aduh_monitor_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn);
+
+ -- FSUB MM address widths
+ CONSTANT c_sdp_ram_fil_coefs_addr_w : NATURAL := ceil_log2(c_sdp_N_fft * c_sdp_N_taps);
+ CONSTANT c_sdp_ram_st_sst_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft*c_sdp_wpfb_subbands.stat_data_sz);
+ CONSTANT c_sdp_reg_si_addr_w : NATURAL := 1; --enable/disable
+ CONSTANT c_sdp_ram_equalizer_gains_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft);
+ CONSTANT c_sdp_reg_dp_selector_addr_w : NATURAL := 1; --Select input 0 or 1.
+
+ -- BF MM address widths
+ CONSTANT c_sdp_reg_sdp_info_addr_w : NATURAL := 4;
+ CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
+ CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pol * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
+ CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
+ CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
+ CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_S_sub_bf*c_sdp_N_pol*(c_longword_sz/c_word_sz));
+ CONSTANT c_sdp_reg_stat_enable_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_enable_addr_w;
+ CONSTANT c_sdp_reg_stat_hdr_dat_bst_addr_w: NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_hdr_dat_addr_w;
+
+ -- XSUB
+ CONSTANT c_sdp_crosslets_index_w : NATURAL := ceil_log2(c_sdp_N_sub);
+ CONSTANT c_sdp_mm_reg_crosslets_info : t_c_mem := (latency => 1,
+ adr_w => 4,
+ dat_w => c_sdp_crosslets_index_w,
+ nof_dat => 16, -- 15 offsets + 1 step
+ init_sl => '0');
+ CONSTANT c_sdp_crosslets_info_reg_w : NATURAL := c_sdp_mm_reg_crosslets_info.nof_dat*c_sdp_mm_reg_crosslets_info.dat_w;
+
+ CONSTANT c_sdp_xst_nof_blk_per_sync_max : NATURAL := 200000;
+ CONSTANT c_sdp_xst_nof_blk_per_sync_min : NATURAL := 19530;
+
+ -- XSUB MM address widths
+ CONSTANT c_sdp_reg_dp_sync_insert_v2_addr_w : NATURAL := 1;
+ CONSTANT c_sdp_reg_crosslets_info_addr_w : NATURAL := c_sdp_mm_reg_crosslets_info.adr_w;
+ CONSTANT c_sdp_reg_bsn_scheduler_xsub_addr_w : NATURAL := 1;
+ CONSTANT c_sdp_ram_st_xsq_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + ceil_log2(c_sdp_N_crosslets * c_sdp_X_sq * c_nof_complex * (c_longword_sz/c_word_sz) );
END PACKAGE sdp_pkg;
--
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