diff --git a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_base/hdllib.cfg b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_base/hdllib.cfg
index 325598ff8bec0ec130f836b3bef527934af08a10..92ef38668a8c80f9a58943dc5916af6782711031 100644
--- a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_base/hdllib.cfg
+++ b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_base/hdllib.cfg
@@ -24,10 +24,6 @@ test_bench_files =
 [modelsim_project_file]
 modelsim_copy_files = ../../src/hex hex                                                   
 
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-
 
 [quartus_project_file]
 synth_top_level_entity =
diff --git a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_bf_tp/hdllib.cfg b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_bf_tp/hdllib.cfg
index 63de8bc3e21a2cf1828443efe939774cb5a25816..19f9efcc9a2b2918e5d424f0f2f88a33a95d6397 100644
--- a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_bf_tp/hdllib.cfg
+++ b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_bf_tp/hdllib.cfg
@@ -26,10 +26,6 @@ modelsim_copy_files = ../../src/hex hex
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/copy_hex_files.tcl
     
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-
 
 [quartus_project_file]
 synth_top_level_entity = apertif_unb1_fn_beamformer_bg_bf_tp
diff --git a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_tp/hdllib.cfg b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_tp/hdllib.cfg
index ebfc6cf96c282b3713aafbdd78a7c1021c84dfb5..34d6ec2a175b0e0a3c87712d2a771e5898febc3c 100644
--- a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_tp/hdllib.cfg
+++ b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_bg_tp/hdllib.cfg
@@ -26,10 +26,6 @@ modelsim_copy_files = ../../src/hex hex
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/copy_hex_files.tcl
     
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-
 
 [quartus_project_file]
 synth_top_level_entity = apertif_unb1_fn_beamformer_bg_tp
diff --git a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_transpose/hdllib.cfg b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_transpose/hdllib.cfg
index 3e5b81f372ef8c57e1e630fa10c3e12f3ab8f01d..4254adabfeb3eeac7e520b9953ed12bf1d899ecf 100644
--- a/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_transpose/hdllib.cfg
+++ b/applications/apertif/designs/apertif_unb1_fn_beamformer/revisions/apertif_unb1_fn_beamformer_transpose/hdllib.cfg
@@ -27,10 +27,6 @@ modelsim_copy_files = ../../src/hex hex
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/copy_hex_files.tcl
 
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-
 
 [quartus_project_file]
 synth_top_level_entity = apertif_unb1_fn_beamformer_transpose
diff --git a/applications/apertif/designs/apertif_unb1_fn_bf_emu/hdllib.cfg b/applications/apertif/designs/apertif_unb1_fn_bf_emu/hdllib.cfg
index 3f1f0f3cc7c261efb4721964cbaaf18011a8c5a8..26fbda9907f186f61a4484b22e0af0e49fdcea74 100644
--- a/applications/apertif/designs/apertif_unb1_fn_bf_emu/hdllib.cfg
+++ b/applications/apertif/designs/apertif_unb1_fn_bf_emu/hdllib.cfg
@@ -16,10 +16,6 @@ test_bench_files =
 [modelsim_project_file]
 modelsim_copy_files = src/hex hex                                                   
 
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-
 
 [quartus_project_file]
 synth_top_level_entity =
diff --git a/libraries/base/reorder/hdllib.cfg b/libraries/base/reorder/hdllib.cfg
index 0c87da8ed1ab6e745fd18e2ef75aba62aa56246d..36f998ac3c611337ea59e1f98c56e16f8f8e9f0c 100644
--- a/libraries/base/reorder/hdllib.cfg
+++ b/libraries/base/reorder/hdllib.cfg
@@ -37,10 +37,6 @@ test_bench_files =
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
 
-modelsim_search_libraries =                                                                                            
-    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
-    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip    
-    
 
 [quartus_project_file]