diff --git a/libraries/technology/ddr/hdllib.cfg b/libraries/technology/ddr/hdllib.cfg
index 27d142f6aaef34a618e286c8ca697b3bb1bc7eae..38bdc4045f6a0710bb78543b00be979e89a27e2e 100644
--- a/libraries/technology/ddr/hdllib.cfg
+++ b/libraries/technology/ddr/hdllib.cfg
@@ -19,6 +19,8 @@ hdl_lib_uses_ip = ip_stratixiv_ddr3_uphy_4g_800_master
ip_arria10_e1sg_ddr4_4g_2000
ip_arria10_e1sg_ddr4_8g_2400
ip_arria10_e2sg_ddr4_8g_1600
+ ip_arria10_e2sg_ddr4_16g_1600_64b
+ ip_arria10_e2sg_ddr4_16g_1600_72b
# ip_arria10_e2sg_ddr4_8g_2400
hdl_lib_uses_sim = ip_stratixiv_ddr3_mem_model
ip_arria10_ddr4_mem_model_141
@@ -44,6 +46,8 @@ hdl_lib_disclose_library_clause_names =
ip_stratixiv_ddr3_mem_model ip_stratixiv_ddr3_mem_model_lib
ip_arria10_ddr4_mem_model_141 ip_arria10_ddr4_mem_model_141
ip_arria10_e2sg_ddr4_8g_1600 ip_arria10_e2sg_ddr4_8g_1600_altera_emif_191
+ ip_arria10_e2sg_ddr4_16g_1600_64b ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_1910
+ ip_arria10_e2sg_ddr4_16g_1600_72b ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_1910
# ip_arria10_e2sg_ddr4_8g_2400 ip_arria10_e2sg_ddr4_8g_2400_altera_emif_191
synth_files =
diff --git a/libraries/technology/ddr/tech_ddr_arria10_e2sg.vhd b/libraries/technology/ddr/tech_ddr_arria10_e2sg.vhd
index 6fd22e0ea0f304924d020a74d682794e2108ef90..d936bdc4b7554ab45bff449f84b866d70b6ac42c 100644
--- a/libraries/technology/ddr/tech_ddr_arria10_e2sg.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10_e2sg.vhd
@@ -257,7 +257,7 @@ BEGIN
gen_ip_arria10_e2sg_ddr4_16g_1600_72b : IF g_tech_ddr.name="DDR4" AND c_gigabytes=16 AND g_tech_ddr.mts=1600 AND g_tech_ddr.dq_w=72 GENERATE
- u_ip_arria10_e2sg_ddr4_8g_1600_72b : ip_arria10_e2sg_ddr4_8g_1600_72b
+ u_ip_arria10_e2sg_ddr4_16g_1600_72b : ip_arria10_e2sg_ddr4_16g_1600_72b
PORT MAP (
amm_ready_0 => ctlr_miso.waitrequest_n, -- ctrl_amm_avalon_slave_0.waitrequest_n
amm_read_0 => ctlr_mosi.rd, -- .read
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/alt_mem_if_jtag_master_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/alt_mem_if_jtag_master_191/compile_ip.tcl
index d536e4a4db027ab37c9bb00c9f5cb08abd0e9c0a..6a422a978dc5ca152613cc38dced494d251d1a94 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/alt_mem_if_jtag_master_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/alt_mem_if_jtag_master_191/compile_ip.tcl
@@ -36,3 +36,11 @@ vmap alt_mem_if_jtag_master_191 ./work/
vcom "$IP_DIR/../alt_mem_if_jtag_master_191/sim/ip_arria10_e2sg_ddr4_8g_1600_alt_mem_if_jtag_master_191_rksoe3i.vhd" -work alt_mem_if_jtag_master_191
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../alt_mem_if_jtag_master_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_alt_mem_if_jtag_master_191_rksoe3i.vhd" -work alt_mem_if_jtag_master_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../alt_mem_if_jtag_master_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_alt_mem_if_jtag_master_191_rksoe3i.vhd" -work alt_mem_if_jtag_master_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_mm_bridge_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_mm_bridge_191/compile_ip.tcl
index a6876f47ee17c94f0f14f38a67ba70a2b29b304e..a98ab0bd16fb736775391e787972653c3746f196 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_mm_bridge_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_mm_bridge_191/compile_ip.tcl
@@ -33,3 +33,12 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vmap altera_avalon_mm_bridge_191 ./work/
vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_onchip_memory2_1920/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_onchip_memory2_1920/compile_ip.tcl
index ca1baf38777c012bf32fabb2b18aaf9c91ee59bd..87be9c3c25dbbb0f90789be7bde4ae1b4e044370 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_onchip_memory2_1920/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_onchip_memory2_1920/compile_ip.tcl
@@ -33,5 +33,13 @@ vmap altera_avalon_onchip_memory2_1920 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+
# copy previous 'set' and 'vcom' lines to include more ddr4 variants
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_sc_fifo_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_sc_fifo_191/compile_ip.tcl
index 092a26e15523d249fde99e9919fd7251d55fcc99..53adedc0d332eae89b71cdaf8d9047a0f76004d8 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_sc_fifo_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_avalon_sc_fifo_191/compile_ip.tcl
@@ -34,7 +34,15 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vmap altera_avalon_sc_fifo_191 ./work/
vlog "$IP_DIR/../altera_avalon_sc_fifo_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_avalon_sc_fifo_191_e5eqkcq.v" -work altera_avalon_sc_fifo_191
-
+
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog "$IP_DIR/../altera_avalon_sc_fifo_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_avalon_sc_fifo_191_e5eqkcq.v" -work altera_avalon_sc_fifo_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog "$IP_DIR/../altera_avalon_sc_fifo_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_avalon_sc_fifo_191_e5eqkcq.v" -work altera_avalon_sc_fifo_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
index 030db3f5a62e07536615fdc36b2929bc3b9f49ba..3c2347f5cff73270de8a1d3176b97c06cef2b8dc 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
@@ -41,10 +41,9 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
# ddr4_16g_1600_72b
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
- vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
-
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
@@ -105,24 +104,62 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_3yb4cia.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
+
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_3yb4cia.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
+
vmap altera_avalon_onchip_memory2_1920 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_avalon_onchip_memory2_1920/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_avalon_onchip_memory2_1920_popesdq.vhd" -work altera_avalon_onchip_memory2_1920
+
+
vmap altera_avalon_mm_bridge_191 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_avalon_mm_bridge_191_x6qdesi.v" -work altera_avalon_mm_bridge_191
+
+
vmap altera_emif_cal_slave_nf_191 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
vcom "$IP_DIR/../altera_emif_cal_slave_nf_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_emif_cal_slave_nf_191_rmzieji.vhd" -work altera_emif_cal_slave_nf_191
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_cal_slave_nf_191_rmzieji.vhd" -work altera_emif_cal_slave_nf_191
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_cal_slave_nf_191_rmzieji.vhd" -work altera_emif_cal_slave_nf_191
+
+
vmap altera_emif_1910 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
vcom "$IP_DIR/../altera_emif_1910/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_emif_1910_jhcj6zy.vhd" -work altera_emif_1910
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_emif_1910/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_1910_rvperma.vhd" -work altera_emif_1910
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_emif_1910/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_1910_3t6zvqq.vhd" -work altera_emif_1910
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
index 2db3696947ded6983d1e93ad90adbbc9a3c7b509..12bd8a8fab12aa8ba5970e83c2c90b1d57d67028 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
@@ -40,9 +40,9 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
# ddr4_16g_1600_72b
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
- vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_ip_col_if_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_ip_col_if_191/compile_ip.tcl
index 39a9046c4b0faaaf259768c1c62714319145f56c..34e538bd85aec1d045b646af3d4d0f25fa4d25c4 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_ip_col_if_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_ip_col_if_191/compile_ip.tcl
@@ -35,3 +35,12 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vmap altera_ip_col_if_191 ./work/
vcom "$IP_DIR/../altera_ip_col_if_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_ip_col_if_191_k6i7ubq.vhd" -work altera_ip_col_if_191
+
+# ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_ip_col_if_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_ip_col_if_191_k6i7ubq.vhd" -work altera_ip_col_if_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_ip_col_if_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_ip_col_if_191_k6i7ubq.vhd" -work altera_ip_col_if_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_master_translator_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_master_translator_191/compile_ip.tcl
index 23e9f50cad8e9eaf280eb1c0d21097fb90167510..c98fe5bf241bc5822d1f010c72a40abaa683dc7c 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_master_translator_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_master_translator_191/compile_ip.tcl
@@ -33,3 +33,11 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vmap altera_merlin_master_translator_191 ./work/
vlog -sv "$IP_DIR/../altera_merlin_master_translator_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_merlin_master_translator_191_g7h47bq.sv" -work altera_merlin_master_translator_191
+
+# ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog -sv "$IP_DIR/../altera_merlin_master_translator_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_merlin_master_translator_191_g7h47bq.sv" -work altera_merlin_master_translator_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog -sv "$IP_DIR/../altera_merlin_master_translator_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_merlin_master_translator_191_g7h47bq.sv" -work altera_merlin_master_translator_191
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_slave_translator_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_slave_translator_191/compile_ip.tcl
index 2e7e9ed643676450b04a636a5cd6e7367e921808..56f6eb803f9f2ec0c35861671af2e9af6c3df52c 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_slave_translator_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_merlin_slave_translator_191/compile_ip.tcl
@@ -35,3 +35,10 @@ vmap altera_merlin_slave_translator_191 ./work/
vlog -sv "$IP_DIR/../altera_merlin_slave_translator_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_merlin_slave_translator_191_x56fcki.sv" -work altera_merlin_slave_translator_191
+# ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog -sv "$IP_DIR/../altera_merlin_slave_translator_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_merlin_slave_translator_191_x56fcki.sv" -work altera_merlin_slave_translator_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog -sv "$IP_DIR/../altera_merlin_slave_translator_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_merlin_slave_translator_191_x56fcki.sv" -work altera_merlin_slave_translator_191
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_mm_interconnect_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_mm_interconnect_191/compile_ip.tcl
index d4aa7747c3c3ebd789559e062e8b2734f1a8542c..7d2bdac3477728b18fe38b870156dcd13d1aed1f 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_mm_interconnect_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_mm_interconnect_191/compile_ip.tcl
@@ -35,4 +35,14 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_mm_interconnect_191_3yb4cia.vhd" -work altera_mm_interconnect_191
vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_8g_1600_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_3yb4cia.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_3yb4cia.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_monheay.vhd" -work altera_mm_interconnect_191
+ vcom "$IP_DIR/../altera_mm_interconnect_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_mm_interconnect_191_dexdb4a.vhd" -work altera_mm_interconnect_191
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/channel_adapter_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/channel_adapter_191/compile_ip.tcl
index 9b1d2e39cb19b417b0017f27467ba75e47d6f06a..f353879770158c680a5df433fb00e25216ad0ba9 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/channel_adapter_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/channel_adapter_191/compile_ip.tcl
@@ -37,4 +37,13 @@ vmap channel_adapter_191 ./work/
vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_8g_1600_channel_adapter_191_cco4x3a.sv" -work channel_adapter_191
vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_8g_1600_channel_adapter_191_uc27kqq.sv" -work channel_adapter_191
-
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_channel_adapter_191_cco4x3a.sv" -work channel_adapter_191
+ vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_channel_adapter_191_uc27kqq.sv" -work channel_adapter_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_channel_adapter_191_cco4x3a.sv" -work channel_adapter_191
+ vlog -sv "$IP_DIR/../channel_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_channel_adapter_191_uc27kqq.sv" -work channel_adapter_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/timing_adapter_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/timing_adapter_191/compile_ip.tcl
index 31a8e0ed3ca92cf24761ca0bef3c4c9bfe181112..c3391288492d335e62dc7b415c653eafac48beff 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/timing_adapter_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/timing_adapter_191/compile_ip.tcl
@@ -36,4 +36,12 @@ vmap timing_adapter_191 ./work/
vlog -sv "$IP_DIR/../timing_adapter_191/sim/ip_arria10_e2sg_ddr4_8g_1600_timing_adapter_191_rrgemwi.sv" -work timing_adapter_191
+#ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+ vlog -sv "$IP_DIR/../timing_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_timing_adapter_191_rrgemwi.sv" -work timing_adapter_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+ vlog -sv "$IP_DIR/../timing_adapter_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_timing_adapter_191_rrgemwi.sv" -work timing_adapter_191
+
diff --git a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/hdllib.cfg b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/hdllib.cfg
index 38b095640eaa03d4cf6bfd51294cdef518a70792..d7cb9b0f2ef7410230433805d47d7d6330793fe0 100644
--- a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/hdllib.cfg
@@ -1,5 +1,5 @@
hdl_lib_name = ip_arria10_e2sg_ddr4_16g_1600_64b
-hdl_library_clause_name = ip_arria10_e2sg_ddr4_16g_1600_64bit_altera_emif_1910
+hdl_library_clause_name = ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_1910
hdl_lib_uses_synth =
hdl_lib_uses_sim = ip_arria10_e2sg_altera_emif_cal_slave_nf_191 ip_arria10_e2sg_altera_avalon_onchip_memory2_1920 ip_arria10_e2sg_altera_mm_interconnect_191 ip_arria10_e2sg_altera_reset_controller_191 ip_arria10_e2sg_altera_emif_arch_nf_191 ip_arria10_e2sg_altera_avalon_mm_bridge_191 ip_arria10_e2sg_altera_merlin_slave_translator_191 ip_arria10_e2sg_altera_avalon_sc_fifo_191 ip_arria10_e2sg_altera_ip_col_if_191 ip_arria10_e2sg_altera_jtag_dc_streaming_191 ip_arria10_e2sg_alt_mem_if_jtag_master_191 ip_arria10_e2sg_altera_avalon_st_bytes_to_packets_1910 ip_arria10_e2sg_altera_avalon_packets_to_master_1910 ip_arria10_e2sg_channel_adapter_191 ip_arria10_e2sg_timing_adapter_191 ip_arria10_e2sg_altera_avalon_st_packets_to_bytes_1910 ip_arria10_e2sg_altera_emif_1910 ip_arria10_e2sg_altera_merlin_master_translator_191