diff --git a/libraries/base/common/hdllib.cfg b/libraries/base/common/hdllib.cfg
index 22c74c8f3c500407dc23967c1eb4e18e1388e999..e42e9b956044f6124596fd2c96dcdba0b073840d 100644
--- a/libraries/base/common/hdllib.cfg
+++ b/libraries/base/common/hdllib.cfg
@@ -148,6 +148,7 @@ synth_files =
     tb/vhdl/tb_common_mem_pkg.vhd
     
 test_bench_files = 
+    tb/vhdl/tb_common_log.vhd
     tb/vhdl/tb_common_acapture.vhd
     tb/vhdl/tb_common_add_sub.vhd
     tb/vhdl/tb_common_adder_tree.vhd
diff --git a/libraries/base/common/tb/vhdl/tb_common_log.vhd b/libraries/base/common/tb/vhdl/tb_common_log.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..6c6182a10d841d37d45bf2de20f853df716916be
--- /dev/null
+++ b/libraries/base/common/tb/vhdl/tb_common_log.vhd
@@ -0,0 +1,69 @@
+-- --------------------------------------------------------------------------
+-- Copyright 2021
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
+--
+-- http://www.apache.org/licenses/LICENSE-2.0
+--
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
+-- --------------------------------------------------------------------------
+--
+-- Author: E. Kooistra, 11 May 2022
+-- Purpose: Show pow and log functions from common_pkg.vhd
+-- Description:
+-- Usage:
+-- > run -all
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE work.common_pkg.ALL;
+USE work.common_str_pkg.ALL;
+
+ENTITY tb_common_log IS
+END tb_common_log;
+
+ARCHITECTURE tb OF tb_common_log IS
+BEGIN
+
+  p_log : PROCESS
+    CONSTANT c_range : t_integer_arr := (99, 100, 101, 127, 128, 129);
+    VARIABLE vI      : NATURAL;
+  BEGIN
+    print_str("I: pow2, ceil_pow2");
+    FOR I IN 1 TO 20 LOOP
+      print_str(int_to_str(I) & ": " &
+                int_to_str(pow2(I)) & ", " &
+                int_to_str(ceil_pow2(I)));
+    END LOOP;
+    print_str("");
+    print_str("I: ceil_log2, true_log2, true_log_pow2, is_pow2, floor_log10");
+    FOR I IN 1 TO 20 LOOP
+      print_str(int_to_str(I) & ": " &
+                int_to_str(ceil_log2(I)) & ", " &
+                int_to_str(true_log2(I)) & ", " &
+                int_to_str(true_log_pow2(I)) & ", " &
+                bool_to_str(is_pow2(I)) & ", " &
+                int_to_str(floor_log10(I)));
+    END LOOP;
+    print_str("");
+    print_str("I: ceil_log2, true_log2, true_log_pow2, is_pow2, floor_log10");
+    FOR I IN c_range'RANGE LOOP
+      vI := c_range(I);
+      print_str(int_to_str(vI) & ": " &
+                int_to_str(ceil_log2(vI)) & ", " &
+                int_to_str(true_log2(vI)) & ", " &
+                int_to_str(true_log_pow2(vI)) & ", " &
+                bool_to_str(is_pow2(vI)) & ", " &
+                int_to_str(floor_log10(vI)));
+    END LOOP;
+    WAIT;
+  END PROCESS;
+
+END tb;