From 6f69f2634eb8afa6a08d4e63b911c54c8d51ed7f Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Mon, 22 Aug 2022 11:30:34 +0200
Subject: [PATCH] Use local input ref_sync for BSN monitor of beamlet output.
---
.../libraries/sdp/src/vhdl/node_sdp_beamformer.vhd | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
index b1972f74aa..e94ce343ec 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
@@ -132,11 +132,14 @@ ARCHITECTURE str OF node_sdp_beamformer IS
SIGNAL scope_bf_out_sosi_arr : t_dp_sosi_integer_arr(c_sdp_N_pol_bf-1 DOWNTO 0);
SIGNAL beamlet_scale : STD_LOGIC_VECTOR(c_sdp_W_beamlet_scale-1 DOWNTO 0);
- SIGNAL rn_index : NATURAL RANGE 0 TO c_sdp_N_pn_max-1 := 0;
+ SIGNAL rn_index : NATURAL RANGE 0 TO c_sdp_N_pn_max-1 := 0;
+ SIGNAL ref_sync : STD_LOGIC;
BEGIN
- rn_index <= TO_UINT(SUB_UVEC(gn_id, ring_info.O_rn)) WHEN rising_edge(dp_clk); -- Using register to ease timing closure.
+ -- Use register to ease timing closure.
+ rn_index <= TO_UINT(SUB_UVEC(gn_id, ring_info.O_rn)) WHEN rising_edge(dp_clk);
+ ref_sync <= in_sosi_arr(0).sync WHEN rising_edge(dp_clk);
---------------------------------------------------------------
-- Beamlet Subband Select
@@ -297,7 +300,7 @@ BEGIN
-- Streaming clock domain
dp_rst => dp_rst,
dp_clk => dp_clk,
- ref_sync => mon_bf_udp_sosi.sync,
+ ref_sync => ref_sync,
in_sosi_arr(0) => mon_bf_udp_sosi
);
--
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