From 6e057e270a87e63dee2b5e32714d9e01cb497108 Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Tue, 2 Aug 2022 11:33:37 +0200 Subject: [PATCH] Renamed signal names and clarified comment headers for 10GbE ring and 10GbE beamlet output. Redefined Tx FIFO fill and size using nof longword constants and by using c_fifo_tx_fill_margin. Distinguish beteen payload length and header length. --- .../libraries/sdp/src/vhdl/sdp_station.vhd | 243 ++++++++++-------- 1 file changed, 131 insertions(+), 112 deletions(-) diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd index 7396bd3d3a..7455fcaf62 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd @@ -26,7 +26,7 @@ -- Combines sdp nodes. Contains the UniBoard2 HW version independent LOFAR2 SDP application code. ------------------------------------------------------------------------------- -LIBRARY IEEE, common_lib, diag_lib, dp_lib, tech_jesd204b_lib, wpfb_lib, tech_pll_lib, tr_10gbe_lib, nw_10gbe_lib, eth_lib, ring_lib; +LIBRARY IEEE, common_lib, diag_lib, dp_lib, tech_jesd204b_lib, wpfb_lib, tech_pll_lib, tr_10GbE_lib, nw_10GbE_lib, eth_lib, ring_lib; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.NUMERIC_STD.ALL; USE common_lib.common_pkg.ALL; @@ -88,15 +88,6 @@ ENTITY sdp_station IS udp_tx_sosi_arr : OUT t_dp_sosi_arr(c_eth_nof_udp_ports-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); udp_tx_siso_arr : IN t_dp_siso_arr(c_eth_nof_udp_ports-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - ---------------------------------------------- - -- 10 GbE - ---------------------------------------------- - reg_nw_10GbE_mac_copi : IN t_mem_copi := c_mem_copi_rst; - reg_nw_10GbE_mac_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - - reg_nw_10GbE_eth10g_copi : IN t_mem_copi := c_mem_copi_rst; - reg_nw_10GbE_eth10g_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - ---------------------------------------------- -- AIT ---------------------------------------------- @@ -170,6 +161,7 @@ ENTITY sdp_station IS -- SST UDP offload bsn monitor reg_bsn_monitor_v2_sst_offload_copi : IN t_mem_copi := c_mem_copi_rst; reg_bsn_monitor_v2_sst_offload_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + ---------------------------------------------- -- SDP Info ---------------------------------------------- @@ -265,6 +257,18 @@ ENTITY sdp_station IS -- BF ring bsn at sync reg_dp_block_validate_bsn_at_sync_bf_copi : IN t_mem_copi := c_mem_copi_rst; reg_dp_block_validate_bsn_at_sync_bf_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + + ---------------------------------------------- + -- BST + ---------------------------------------------- + -- Statistics Enable + reg_stat_enable_bst_copi : IN t_mem_copi := c_mem_copi_rst; + reg_stat_enable_bst_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + + -- Statistics header info + reg_stat_hdr_dat_bst_copi : IN t_mem_copi := c_mem_copi_rst; + reg_stat_hdr_dat_bst_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + ---------------------------------------------- -- SST ---------------------------------------------- @@ -321,35 +325,38 @@ ENTITY sdp_station IS reg_dp_block_validate_bsn_at_sync_xst_copi : IN t_mem_copi := c_mem_copi_rst; reg_dp_block_validate_bsn_at_sync_xst_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - -- XST ring MAC + ---------------------------------------------- + -- tr 10 GbE for ring + ---------------------------------------------- + reg_tr_10GbE_mac_copi : IN t_mem_copi := c_mem_copi_rst; reg_tr_10GbE_mac_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - -- XST ring ETH reg_tr_10GbE_eth10g_copi : IN t_mem_copi := c_mem_copi_rst; reg_tr_10GbE_eth10g_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + -- RING_0 serial + RING_0_TX: OUT STD_LOGIC_VECTOR(c_quad - 1 DOWNTO 0) := (OTHERS => '0'); + RING_0_RX: IN STD_LOGIC_VECTOR(c_quad - 1 DOWNTO 0) := (OTHERS => '0'); + + -- RING_1 serial + RING_1_TX : OUT STD_LOGIC_VECTOR(c_quad - 1 DOWNTO 0) := (OTHERS => '0'); + RING_1_RX : IN STD_LOGIC_VECTOR(c_quad - 1 DOWNTO 0) := (OTHERS => '0'); ---------------------------------------------- - -- BST + -- nw 10 GbE for beamlet output ---------------------------------------------- - -- Statistics Enable - reg_stat_enable_bst_copi : IN t_mem_copi := c_mem_copi_rst; - reg_stat_enable_bst_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - - -- Statistics header info - reg_stat_hdr_dat_bst_copi : IN t_mem_copi := c_mem_copi_rst; - reg_stat_hdr_dat_bst_cipo : OUT t_mem_cipo := c_mem_cipo_rst; + reg_nw_10GbE_mac_copi : IN t_mem_copi := c_mem_copi_rst; + reg_nw_10GbE_mac_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - -- RING_0 serial - RING_0_TX: OUT STD_LOGIC_VECTOR( c_quad - 1 DOWNTO 0) := (OTHERS => '0'); - RING_0_RX: IN STD_LOGIC_VECTOR( c_quad - 1 DOWNTO 0) := (OTHERS => '0'); + reg_nw_10GbE_eth10g_copi : IN t_mem_copi := c_mem_copi_rst; + reg_nw_10GbE_eth10g_cipo : OUT t_mem_cipo := c_mem_cipo_rst; - -- RING_1 serial - RING_1_TX : OUT STD_LOGIC_VECTOR( c_quad - 1 DOWNTO 0) := (OTHERS => '0'); - RING_1_RX : IN STD_LOGIC_VECTOR( c_quad - 1 DOWNTO 0) := (OTHERS => '0'); + ---------------------------------------------- + -- QSFP for beamlet output and for ring cable + ---------------------------------------------- - -- QSFP serial + -- QSFP serial (6 QSFP ports per FPGA) unb2_board_front_io_serial_tx_arr : OUT STD_LOGIC_VECTOR(6 * c_quad-1 DOWNTO 0) := (OTHERS => '0'); unb2_board_front_io_serial_rx_arr : IN STD_LOGIC_VECTOR(6 * c_quad-1 DOWNTO 0) := (OTHERS => '0'); @@ -363,14 +370,17 @@ END sdp_station; ARCHITECTURE str OF sdp_station IS - -- 10 GbE Interface - CONSTANT c_nof_10GbE_offload_streams : NATURAL := 1; - CONSTANT c_nof_blocks_per_packet : NATURAL := 4; - CONSTANT c_nof_beamlets_per_block : NATURAL := c_sdp_N_pol * c_sdp_S_sub_bf; - CONSTANT c_10GbE_block_size : NATURAL := c_nof_blocks_per_packet * c_nof_beamlets_per_block / 4; -- 4 beamlets fit in 1 64bit longword - CONSTANT c_fifo_tx_fill : NATURAL := c_10GbE_block_size; - CONSTANT c_fifo_tx_size : NATURAL := c_fifo_tx_fill + 11; -- Make fifo size large enough for adding header. - + -- Make Tx FIFOs at least c_fifo_tx_fill_margin larger than needed to fit the largest Tx packet + CONSTANT c_fifo_tx_fill_margin : NATURAL := 10; -- >= c_fifo_fill_margin = 6 that is used in dp_fifo_fill_eop + + -- 10 GbE Interface for beamlet output + CONSTANT c_nof_10GbE_beamlet_output : NATURAL := 1; + + -- The nw_10GbE/tr_10GbE uses dp_fifo_fill_eop, so rely on releasing packets (beamlets, arp and ping) at eop instead + -- of at fill level. Make fifo size large enough to fit one packet and the c_fifo_tx_fill_margin. + CONSTANT c_fifo_tx_size_beamlet_output : NATURAL := true_log_pow2(c_sdp_cep_packet_nof_longwords + c_fifo_tx_fill_margin); -- = 976 + 6 --> 1024 + CONSTANT c_fifo_tx_fill_beamlet_output : NATURAL := c_fifo_tx_size_beamlet_output - c_fifo_tx_fill_margin; -- = maximum fill level, so rely on eop + -- Address widths of a single MM instance CONSTANT c_addr_w_ram_ss_ss_wide : NATURAL := ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); CONSTANT c_addr_w_ram_bf_weights : NATURAL := ceil_log2(c_sdp_N_pol * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); @@ -386,27 +396,37 @@ ARCHITECTURE str OF sdp_station IS CONSTANT c_f_adc : STD_LOGIC := '1'; -- '0' => 160M, '1' => 200M CONSTANT c_fsub_type : STD_LOGIC := '0'; -- '0' => critical sampled PFB, '1' => oversampled PFB - CONSTANT c_use_dp_layer : BOOLEAN := TRUE; - CONSTANT c_lane_packet_length_xst : NATURAL := c_sdp_N_crosslets_max * c_sdp_S_pn / 2; -- = crosslet subband select block size devided by 2 as it is repacked from 32b to 64b. = 42 words - CONSTANT c_lane_packet_length_bf : NATURAL := (c_sdp_S_sub_bf * c_sdp_N_pol_bf * 9) / 16; -- = beamlet block size repacked from 36b to 64b (9/16 = 36/64). = 549 words - CONSTANT c_err_bi : NATURAL := 0; + CONSTANT c_lane_payload_nof_longwords_xst : NATURAL := c_sdp_N_crosslets_max * c_sdp_S_pn / 2; -- = crosslet subband select block size divided by 2 as it is repacked from 32b to 64b. = 42 longwords + CONSTANT c_lane_payload_nof_longwords_bf : NATURAL := (c_sdp_S_sub_bf * c_sdp_N_pol_bf * 9) / 16; -- = beamlet block size repacked from 36b to 64b (9/16 = 36/64). = 549 longwords + CONSTANT c_lane_payload_nof_longwords_max : NATURAL := largest(c_lane_payload_nof_longwords_xst, c_lane_payload_nof_longwords_bf); + CONSTANT c_lane_packet_nof_longwords_max : NATURAL := c_lane_payload_nof_longwords_max + c_ring_dp_hdr_field_size; -- = 549 + 3 = 552 + + CONSTANT c_err_bi : NATURAL := 0; CONSTANT c_nof_err_counts : NATURAL := 8; CONSTANT c_bsn_at_sync_check_channel : NATURAL := 1; CONSTANT c_validate_channel : BOOLEAN := TRUE; CONSTANT c_validate_channel_mode : STRING := "="; - CONSTANT c_sync_timeout : NATURAL := sel_a_b(g_sim, g_sim_sync_timeout, c_sdp_N_clk_sync_timeout ); - CONSTANT c_xsub_fifo_tx_fill : NATURAL := c_lane_packet_length_bf + sel_a_b(c_use_dp_layer, c_ring_dp_hdr_field_size, c_ring_eth_hdr_field_size); --total max packet length (bf has largest packets) - CONSTANT c_xsub_fifo_tx_size : NATURAL := 2 * c_lane_packet_length_bf; + CONSTANT c_sync_timeout : NATURAL := sel_a_b(g_sim, g_sim_sync_timeout, c_sdp_N_clk_sync_timeout); + + -- Use same Tx FIFO size for all lanes in the ring to ease the code, no need to optimize Tx FIFO RAM usage per lane. + -- The tr_10GbE uses dp_fifo_fill_eop, so rely on releasing packets (beamlets, crosslets) at eop instead + -- of at fill level. Make fifo size large enough to fit one packet and the c_fifo_tx_fill_margin. + CONSTANT c_fifo_tx_size_ring : NATURAL := true_log_pow2(c_lane_packet_nof_longwords_max + c_fifo_tx_fill_margin); -- = 552 + 6 --> 1024 + CONSTANT c_fifo_tx_fill_ring : NATURAL := c_fifo_tx_size_ring - c_fifo_tx_fill_margin; -- = maximum fill level, so rely on eop CONSTANT c_nof_lane : NATURAL := 3; -- 0 = XST, 1 = BF_0, 2 = BF_1. CONSTANT c_nof_if : NATURAL := 3; -- 3 different interfaces, QSFP, RING_0 and RING_1 CONSTANT c_qsfp_if_offset : NATURAL := 0; -- QSFP signals are indexed at c_nof_if * I. CONSTANT c_ring_0_if_offset : NATURAL := 1; -- RING_0 signals are indexed at c_nof_if * I + 1. CONSTANT c_ring_1_if_offset : NATURAL := 2; -- RING_1 signals are indexed at c_nof_if * I + 2. - CONSTANT c_nof_mac : NATURAL := 12; -- Using 9 out of 12 (this is NOT optimized away during synthesis), must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48 + CONSTANT c_ring_nof_mac : NATURAL := 12; -- Using 9 out of 12 (this is NOT optimized away during synthesis), must match one of the MAC IP variations, e.g. 1, 3, 4, 12, 24, 48 + + SIGNAL gn_index : NATURAL := 0; + SIGNAL this_rn : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0); + + SIGNAL sdp_info : t_sdp_info := c_sdp_info_rst; + SIGNAL ring_info : t_ring_info; - SIGNAL gn_index : NATURAL := 0; - SIGNAL this_rn : STD_LOGIC_VECTOR(c_byte_w-1 DOWNTO 0); ---------------------------------------------- -- BF ---------------------------------------------- @@ -505,26 +525,29 @@ ARCHITECTURE str OF sdp_station IS SIGNAL bf_udp_siso_arr : t_dp_siso_arr(c_sdp_N_beamsets-1 DOWNTO 0); SIGNAL bf_10GbE_hdr_fields_out_arr : t_slv_1024_arr(c_sdp_N_beamsets-1 DOWNTO 0); - -- 10GbE + -- 10GbE clock SIGNAL tr_ref_clk_312 : STD_LOGIC; SIGNAL tr_ref_clk_156 : STD_LOGIC; SIGNAL tr_ref_rst_156 : STD_LOGIC; - SIGNAL tr_10gbe_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_mac-1 DOWNTO 0) := (OTHERS => '0'); - SIGNAL tr_10gbe_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_mac-1 DOWNTO 0) := (OTHERS => '0'); + -- 10GbE ring + SIGNAL tr_10gbe_ring_serial_tx_arr : STD_LOGIC_VECTOR(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => '0'); + SIGNAL tr_10gbe_ring_serial_rx_arr : STD_LOGIC_VECTOR(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => '0'); - SIGNAL nw_10gbe_snk_in_arr : t_dp_sosi_arr(c_nof_10GbE_offload_streams-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); - SIGNAL nw_10gbe_snk_out_arr : t_dp_siso_arr(c_nof_10GbE_offload_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL nw_10gbe_src_out_arr : t_dp_sosi_arr(c_nof_10GbE_offload_streams-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); - SIGNAL nw_10gbe_src_in_arr : t_dp_siso_arr(c_nof_10GbE_offload_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL tr_10gbe_ring_snk_in_arr : t_dp_sosi_arr(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL tr_10gbe_ring_snk_out_arr : t_dp_siso_arr(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL tr_10gbe_ring_src_out_arr : t_dp_sosi_arr(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL tr_10gbe_ring_src_in_arr : t_dp_siso_arr(c_ring_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL nw_10GbE_hdr_fields_in_arr : t_slv_1024_arr(c_nof_10GbE_offload_streams-1 DOWNTO 0); - - SIGNAL tr_10gbe_src_out_arr : t_dp_sosi_arr(c_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); - SIGNAL tr_10gbe_snk_in_arr : t_dp_sosi_arr(c_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); - SIGNAL tr_10gbe_src_in_arr : t_dp_siso_arr(c_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL tr_10gbe_snk_out_arr : t_dp_siso_arr(c_nof_mac-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + -- 10GbE beamlet output + SIGNAL nw_10gbe_beamlet_output_snk_in_arr : t_dp_sosi_arr(c_nof_10GbE_beamlet_output-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL nw_10gbe_beamlet_output_snk_out_arr : t_dp_siso_arr(c_nof_10GbE_beamlet_output-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL nw_10gbe_beamlet_output_src_out_arr : t_dp_sosi_arr(c_nof_10GbE_beamlet_output-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL nw_10gbe_beamlet_output_src_in_arr : t_dp_siso_arr(c_nof_10GbE_beamlet_output-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + + SIGNAL nw_10GbE_hdr_fields_in_arr : t_slv_1024_arr(c_nof_10GbE_beamlet_output-1 DOWNTO 0); + -- Network mac, ip, udp SIGNAL cep_eth_src_mac : STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0); SIGNAL cep_ip_src_addr : STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0); SIGNAL cep_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0); @@ -534,10 +557,6 @@ ARCHITECTURE str OF sdp_station IS SIGNAL bst_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0); SIGNAL xst_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0); - SIGNAL sdp_info : t_sdp_info := c_sdp_info_rst; - SIGNAL ring_info : t_ring_info; - - BEGIN ----------------------------------------------------------------------------- @@ -993,7 +1012,7 @@ BEGIN ); ----------------------------------------------------------------------------- - -- DP MUX + -- DP MUX to multiplex the c_sdp_N_beamsets via one beamlet output 10GbE link ----------------------------------------------------------------------------- -- Assign hdr_fields to nw_10GbE for ARP/PING functionality. Only the fields: -- eth_src_mac, ip_src_addr and ip_dst_addr are used. Which are identical for @@ -1014,21 +1033,21 @@ BEGIN snk_in_arr => bf_udp_sosi_arr, snk_out_arr => bf_udp_siso_arr, - src_out => nw_10gbe_snk_in_arr(0), - src_in => nw_10gbe_snk_out_arr(0) + src_out => nw_10gbe_beamlet_output_snk_in_arr(0), + src_in => nw_10gbe_beamlet_output_snk_out_arr(0) ); --------------- - -- nw_10GbE + -- nw_10GbE beamlet output --------------- - u_nw_10GbE: ENTITY nw_10GbE_lib.nw_10GbE + u_nw_10GbE_beamlet_output: ENTITY nw_10GbE_lib.nw_10GbE GENERIC MAP ( g_sim => g_sim, g_sim_level => 1, - g_nof_macs => c_nof_10GbE_offload_streams, + g_nof_macs => c_nof_10GbE_beamlet_output, g_direction => "TX_RX", - g_tx_fifo_fill => c_fifo_tx_fill, - g_tx_fifo_size => c_fifo_tx_size, + g_tx_fifo_fill => c_fifo_tx_fill_beamlet_output, + g_tx_fifo_size => c_fifo_tx_size_beamlet_output, g_ip_hdr_field_arr => c_sdp_cep_hdr_field_arr ) @@ -1054,15 +1073,15 @@ BEGIN dp_clk => dp_clk, dp_pps => dp_pps, - src_out_arr => nw_10gbe_src_out_arr, - src_in_arr => nw_10gbe_src_in_arr, - - snk_out_arr => nw_10gbe_snk_out_arr, - snk_in_arr => nw_10gbe_snk_in_arr, + snk_out_arr => nw_10gbe_beamlet_output_snk_out_arr, + snk_in_arr => nw_10gbe_beamlet_output_snk_in_arr, + src_out_arr => nw_10gbe_beamlet_output_src_out_arr, + src_in_arr => nw_10gbe_beamlet_output_src_in_arr, + -- Serial IO - serial_tx_arr => unb2_board_front_io_serial_tx_arr(c_nof_10GbE_offload_streams+c_quad-1 DOWNTO c_quad), - serial_rx_arr => unb2_board_front_io_serial_rx_arr(c_nof_10GbE_offload_streams+c_quad-1 DOWNTO c_quad), + serial_tx_arr => unb2_board_front_io_serial_tx_arr(c_nof_10GbE_beamlet_output+c_quad-1 DOWNTO c_quad), + serial_rx_arr => unb2_board_front_io_serial_rx_arr(c_nof_10GbE_beamlet_output+c_quad-1 DOWNTO c_quad), hdr_fields_in_arr => nw_10GbE_hdr_fields_in_arr ); @@ -1074,8 +1093,8 @@ BEGIN GENERIC MAP ( g_lane_direction => 1, -- transport in positive direction. g_lane_data_w => c_longword_w, - g_lane_packet_length => c_lane_packet_length_xst, - g_use_dp_layer => c_use_dp_layer, + g_lane_packet_length => c_lane_payload_nof_longwords_xst, + g_use_dp_layer => TRUE, g_nof_rx_monitors => c_sdp_N_pn_max, g_nof_tx_monitors => c_sdp_N_pn_max, g_err_bi => c_err_bi, @@ -1123,8 +1142,8 @@ BEGIN GENERIC MAP ( g_lane_direction => 1, -- transport in positive direction. g_lane_data_w => c_longword_w, - g_lane_packet_length => c_lane_packet_length_bf, - g_use_dp_layer => c_use_dp_layer, + g_lane_packet_length => c_lane_payload_nof_longwords_bf, + g_use_dp_layer => TRUE, g_nof_rx_monitors => 1, g_nof_tx_monitors => 1, g_err_bi => c_err_bi, @@ -1231,30 +1250,30 @@ BEGIN -- Combine seperate signals into array for tr_10GbE ----------------------------------------------------------------------------- gen_lane_wires : FOR I IN 0 TO c_nof_lane-1 GENERATE - -- QSFP_RX - lane_rx_cable_sosi_arr(I) <= tr_10gbe_src_out_arr(c_nof_if * I + c_qsfp_if_offset) WHEN ring_info.use_cable_to_previous_rn = '1' ELSE c_dp_sosi_rst; -- use_cable_to_previous_rn=1 -> even lanes receive from cable + -- QSFP_RX, use_cable_to_previous_rn=1 -> even lanes receive from cable + lane_rx_cable_sosi_arr(I) <= tr_10gbe_ring_src_out_arr(c_nof_if * I + c_qsfp_if_offset) WHEN ring_info.use_cable_to_previous_rn = '1' ELSE c_dp_sosi_rst; - -- QSFP_TX - tr_10gbe_snk_in_arr(c_nof_if * I + c_qsfp_if_offset) <= lane_tx_cable_sosi_arr(I) WHEN ring_info.use_cable_to_next_rn = '1' ELSE c_dp_sosi_rst; -- use_cable_to_next_rn=1 -> even lanes transmit to cable + -- QSFP_TX, use_cable_to_next_rn=1 -> even lanes transmit to cable + tr_10gbe_ring_snk_in_arr(c_nof_if * I + c_qsfp_if_offset) <= lane_tx_cable_sosi_arr(I) WHEN ring_info.use_cable_to_next_rn = '1' ELSE c_dp_sosi_rst; - -- RING_0_RX even lanes receive from RING_0 (from the left) - lane_rx_board_sosi_arr(I) <= tr_10gbe_src_out_arr(c_nof_if * I + c_ring_0_if_offset); + -- RING_0_RX even lanes receive from RING_0 (from the left) + lane_rx_board_sosi_arr(I) <= tr_10gbe_ring_src_out_arr(c_nof_if * I + c_ring_0_if_offset); - -- RING_1_TX even lanes transmit to RING_1 (to the right) - tr_10gbe_snk_in_arr(c_nof_if * I + c_ring_1_if_offset) <= lane_tx_board_sosi_arr(I); + -- RING_1_TX even lanes transmit to RING_1 (to the right) + tr_10gbe_ring_snk_in_arr(c_nof_if * I + c_ring_1_if_offset) <= lane_tx_board_sosi_arr(I); END GENERATE; ----------------------------------------------------------------------------- - -- tr_10GbE + -- tr_10GbE ring ----------------------------------------------------------------------------- - u_tr_10GbE: ENTITY tr_10GbE_lib.tr_10GbE + u_tr_10GbE_ring: ENTITY tr_10GbE_lib.tr_10GbE GENERIC MAP ( g_sim => g_sim, g_sim_level => 1, - g_nof_macs => c_nof_mac, + g_nof_macs => c_ring_nof_mac, g_direction => "TX_RX", - g_tx_fifo_fill => c_xsub_fifo_tx_fill, - g_tx_fifo_size => c_xsub_fifo_tx_size + g_tx_fifo_fill => c_fifo_tx_fill_ring, + g_tx_fifo_size => c_fifo_tx_size_ring ) PORT MAP ( -- Transceiver PLL reference clock @@ -1277,15 +1296,15 @@ BEGIN dp_rst => dp_rst, dp_clk => dp_clk, - src_out_arr => tr_10gbe_src_out_arr, - src_in_arr => tr_10gbe_src_in_arr, + src_out_arr => tr_10gbe_ring_src_out_arr, + src_in_arr => tr_10gbe_ring_src_in_arr, - snk_out_arr => tr_10gbe_snk_out_arr, - snk_in_arr => tr_10gbe_snk_in_arr, + snk_out_arr => tr_10gbe_ring_snk_out_arr, + snk_in_arr => tr_10gbe_ring_snk_in_arr, -- Serial IO - serial_tx_arr => tr_10gbe_serial_tx_arr, - serial_rx_arr => tr_10gbe_serial_rx_arr + serial_tx_arr => tr_10gbe_ring_serial_tx_arr, + serial_rx_arr => tr_10gbe_ring_serial_rx_arr ); ----------------------------------------------------------------------------- @@ -1295,19 +1314,19 @@ BEGIN -- QSFP port, RING_0 port and RING_1 port. gen_serial_wires : FOR I IN 0 TO c_nof_lane-1 GENERATE -- QSFP_TX - unb2_board_front_io_serial_tx_arr(I) <= tr_10gbe_serial_tx_arr(c_nof_if * I + c_qsfp_if_offset); + unb2_board_front_io_serial_tx_arr(I) <= tr_10gbe_ring_serial_tx_arr(c_nof_if * I + c_qsfp_if_offset); -- QSFP_RX - tr_10gbe_serial_rx_arr(c_nof_if * I + c_qsfp_if_offset) <= unb2_board_front_io_serial_rx_arr(I); + tr_10gbe_ring_serial_rx_arr(c_nof_if * I + c_qsfp_if_offset) <= unb2_board_front_io_serial_rx_arr(I); -- RING_0_TX - RING_0_TX(I) <= tr_10gbe_serial_tx_arr(c_nof_if * I + c_ring_0_if_offset); + RING_0_TX(I) <= tr_10gbe_ring_serial_tx_arr(c_nof_if * I + c_ring_0_if_offset); -- RING_0_RX - tr_10gbe_serial_rx_arr(c_nof_if * I + c_ring_0_if_offset) <= RING_0_RX(I); + tr_10gbe_ring_serial_rx_arr(c_nof_if * I + c_ring_0_if_offset) <= RING_0_RX(I); -- RING_1_TX - RING_1_TX(I) <= tr_10gbe_serial_tx_arr(c_nof_if * I + c_ring_1_if_offset); + RING_1_TX(I) <= tr_10gbe_ring_serial_tx_arr(c_nof_if * I + c_ring_1_if_offset); -- RING_1_RX - tr_10gbe_serial_rx_arr(c_nof_if * I + c_ring_1_if_offset) <= RING_1_RX(I); + tr_10gbe_ring_serial_rx_arr(c_nof_if * I + c_ring_1_if_offset) <= RING_1_RX(I); END GENERATE; END GENERATE; @@ -1328,12 +1347,12 @@ BEGIN -- LEDs ------------ -- QSFP 1 - Beamlets - unb2_board_qsfp_leds_tx_siso_arr(c_nof_10GbE_offload_streams+c_quad-1 DOWNTO c_quad) <= nw_10gbe_snk_out_arr; - unb2_board_qsfp_leds_tx_sosi_arr(c_nof_10GbE_offload_streams+c_quad-1 DOWNTO c_quad) <= nw_10gbe_snk_in_arr; - unb2_board_qsfp_leds_rx_sosi_arr(c_nof_10GbE_offload_streams+c_quad-1 DOWNTO c_quad) <= nw_10gbe_src_out_arr; + unb2_board_qsfp_leds_tx_siso_arr(c_nof_10GbE_beamlet_output+c_quad-1 DOWNTO c_quad) <= nw_10gbe_beamlet_output_snk_out_arr; + unb2_board_qsfp_leds_tx_sosi_arr(c_nof_10GbE_beamlet_output+c_quad-1 DOWNTO c_quad) <= nw_10gbe_beamlet_output_snk_in_arr; + unb2_board_qsfp_leds_rx_sosi_arr(c_nof_10GbE_beamlet_output+c_quad-1 DOWNTO c_quad) <= nw_10gbe_beamlet_output_src_out_arr; -- QSFP 0 - Ring - unb2_board_qsfp_leds_tx_siso_arr(0 DOWNTO 0) <= tr_10gbe_snk_out_arr(0 DOWNTO 0); - unb2_board_qsfp_leds_tx_sosi_arr(0 DOWNTO 0) <= tr_10gbe_snk_in_arr(0 DOWNTO 0); - unb2_board_qsfp_leds_rx_sosi_arr(0 DOWNTO 0) <= tr_10gbe_src_out_arr(0 DOWNTO 0); + unb2_board_qsfp_leds_tx_siso_arr(0 DOWNTO 0) <= tr_10gbe_ring_snk_out_arr(0 DOWNTO 0); + unb2_board_qsfp_leds_tx_sosi_arr(0 DOWNTO 0) <= tr_10gbe_ring_snk_in_arr(0 DOWNTO 0); + unb2_board_qsfp_leds_rx_sosi_arr(0 DOWNTO 0) <= tr_10gbe_ring_src_out_arr(0 DOWNTO 0); END str; -- GitLab