diff --git a/applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd b/applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd
index 6fd0b9ef1185ef24f1ec00c9c2d075e87cf3d71b..8fdfcfe5dc5eba9c7d71664b4cb1fc834f887f41 100644
--- a/applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd
+++ b/applications/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_processing.vhd
@@ -115,7 +115,8 @@ BEGIN
       g_nof_beamlets          => g_nof_beamlets,
       g_data_w                => g_data_w,
       g_weights_w             => g_weights_w,
-      g_weights_ram_dual_port => FALSE
+      g_weights_ram_dual_port => FALSE,
+      g_mult_variant          => "RTL" --FIXME IP uses 5 instead of 4 multipliers! Therefor use RTL.
     )
     PORT MAP (
       dp_clk      => dp_clk,
diff --git a/applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd b/applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
index 2b6ac9f6d3ec910a72616a620968a8a72f0b2809..d0adb88475817c4754288c2c9af47e88ebbe8715 100644
--- a/applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
+++ b/applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
@@ -52,7 +52,8 @@ ENTITY arts_tab_beamformer IS
     g_weights_w             : NATURAL := 16;
     g_out_data_w            : NATURAL := 12;
     g_weights_ram_dual_port : BOOLEAN := TRUE;
-    g_weights_file          : STRING  := "hex/beamformer_weights"
+    g_weights_file          : STRING  := "hex/beamformer_weights";
+    g_mult_variant          : STRING  := "IP" 
   );
   PORT (
     dp_clk            : IN  STD_LOGIC; 
@@ -171,7 +172,8 @@ BEGIN
       g_nof_weights           => c_nof_weights,
       g_weights_w             => g_weights_w,
       g_weights_file          => sel_a_b(g_weights_file="UNUSED", "UNUSED", g_weights_file & "_" & NATURAL'IMAGE(i)),
-      g_weights_ram_dual_port => g_weights_ram_dual_port
+      g_weights_ram_dual_port => g_weights_ram_dual_port,
+      g_mult_variant          => g_mult_variant
     )
     PORT MAP (
       dp_clk      => dp_clk,
diff --git a/libraries/base/dp/src/vhdl/dp_complex_mult.vhd b/libraries/base/dp/src/vhdl/dp_complex_mult.vhd
index 80b0c46c2fa6f7fedccfaa009339e3e255259b3f..80fef84e256467a4dc75eb41bea950494f8cf35d 100644
--- a/libraries/base/dp/src/vhdl/dp_complex_mult.vhd
+++ b/libraries/base/dp/src/vhdl/dp_complex_mult.vhd
@@ -41,7 +41,8 @@ ENTITY dp_complex_mult IS
     g_technology      : NATURAL := c_tech_select_default;
     g_nof_multipliers : NATURAL;
     g_conjugate_b     : BOOLEAN := FALSE; -- Conjugate input 1 of snk_in_2arr2(i)(1 DOWNTO 0)
-    g_data_w          : NATURAL -- Input data width. Output data width = 2*input data width.
+    g_data_w          : NATURAL; -- Input data width. Output data width = 2*input data width.
+    g_variant         : STRING := "IP"
    ); 
   PORT (
     rst            : IN  STD_LOGIC;
@@ -69,7 +70,7 @@ BEGIN
     u_common_complex_mult : ENTITY common_mult_lib.common_complex_mult
     GENERIC MAP (
       g_technology       => g_technology,
-      g_variant          => "IP",
+      g_variant          => g_variant,
       g_in_a_w           => g_data_w,
       g_in_b_w           => g_data_w,
       g_out_p_w          => 2*g_data_w,     -- default use g_out_p_w = g_in_a_w+g_in_b_w
diff --git a/libraries/dsp/beamformer/src/vhdl/beamformer.vhd b/libraries/dsp/beamformer/src/vhdl/beamformer.vhd
index 8bd716aba1535aca90ea8b114b0b1c1ec89e54eb..c7e82a0a11f487cc2f24dc11544b35cddcf35a48 100644
--- a/libraries/dsp/beamformer/src/vhdl/beamformer.vhd
+++ b/libraries/dsp/beamformer/src/vhdl/beamformer.vhd
@@ -53,7 +53,8 @@ ENTITY beamformer IS
     g_nof_weights           : NATURAL;
     g_weights_w             : NATURAL := 16;
     g_weights_file          : STRING  := "hex/beamformer_weights";
-    g_weights_ram_dual_port : BOOLEAN := TRUE
+    g_weights_ram_dual_port : BOOLEAN := TRUE;
+    g_mult_variant          : STRING := "IP"
   );
   PORT (
     dp_clk      : IN  STD_LOGIC; 
@@ -196,7 +197,8 @@ BEGIN
   u_dp_complex_mult : ENTITY dp_lib.dp_complex_mult
   GENERIC MAP (
     g_nof_multipliers => g_nof_inputs,
-    g_data_w          => g_data_w
+    g_data_w          => g_data_w,
+    g_variant         => g_mult_variant
   )
   PORT MAP (
     clk           => dp_clk,