From 68db1bfed56c4ed1849a7cb46bfc43b62bed5e38 Mon Sep 17 00:00:00 2001 From: Dumez <dumez> Date: Thu, 15 Oct 2015 07:20:14 +0000 Subject: [PATCH] Add SignalTap monitoring module for incoming beamlets --- .../rfidb/designs/rfidb/quartus/stp32.stp | 142 ++++++++++++++++ .../rfidb/designs/rfidb/src/vhdl/stp32.qip | 3 + .../rfidb/designs/rfidb/src/vhdl/stp32.vhd | 156 ++++++++++++++++++ 3 files changed, 301 insertions(+) create mode 100644 applications/rfidb/designs/rfidb/quartus/stp32.stp create mode 100644 applications/rfidb/designs/rfidb/src/vhdl/stp32.qip create mode 100644 applications/rfidb/designs/rfidb/src/vhdl/stp32.vhd diff --git a/applications/rfidb/designs/rfidb/quartus/stp32.stp b/applications/rfidb/designs/rfidb/quartus/stp32.stp new file mode 100644 index 0000000000..53cdb60276 --- /dev/null +++ b/applications/rfidb/designs/rfidb/quartus/stp32.stp @@ -0,0 +1,142 @@ +<session sof_file=""> + <display_tree/> + <global_info/> + <instance name="signaltap_megafunction_2"> + <node_ip_info instance_id="0" mfg_id="110" node_id="2" version="6"/> + <position_info/> + <signal_set name=""> + <clock name="stp32:stp32_inst|acq_clk" polarity="posedge" tap_mode="classic"/> + <config ram_type="AUTO" reserved_data_nodes="100" reserved_trigger_nodes="4" sample_depth="4096" trigger_in_enable="no" trigger_in_node="" trigger_in_tap_mode="classic" trigger_out_enable="no" trigger_out_node=""/> + <top_entity/> + <signal_vec> + <trigger_input_vec> + <wire alias="stp32:stp32_inst|acq_trigger_in[0]" name="acq_trigger_in[0]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_trigger_in[1]" name="acq_trigger_in[1]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_trigger_in[2]" name="acq_trigger_in[2]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_trigger_in[3]" name="acq_trigger_in[3]" tap_mode="classic"/> + </trigger_input_vec> + <data_input_vec> + <wire alias="stp32:stp32_inst|acq_data_in[0]" name="acq_data_in[0]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[1]" name="acq_data_in[1]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[2]" name="acq_data_in[2]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[3]" name="acq_data_in[3]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[4]" name="acq_data_in[4]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[5]" name="acq_data_in[5]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[6]" name="acq_data_in[6]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[7]" name="acq_data_in[7]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[8]" name="acq_data_in[8]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[9]" name="acq_data_in[9]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[10]" name="acq_data_in[10]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[11]" name="acq_data_in[11]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[12]" name="acq_data_in[12]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[13]" name="acq_data_in[13]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[14]" name="acq_data_in[14]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[15]" name="acq_data_in[15]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[16]" name="acq_data_in[16]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[17]" name="acq_data_in[17]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[18]" name="acq_data_in[18]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[19]" name="acq_data_in[19]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[20]" name="acq_data_in[20]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[21]" name="acq_data_in[21]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[22]" name="acq_data_in[22]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[23]" name="acq_data_in[23]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[24]" name="acq_data_in[24]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[25]" name="acq_data_in[25]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[26]" name="acq_data_in[26]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[27]" name="acq_data_in[27]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[28]" name="acq_data_in[28]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[29]" name="acq_data_in[29]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[30]" name="acq_data_in[30]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[31]" name="acq_data_in[31]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[32]" name="acq_data_in[32]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[33]" name="acq_data_in[33]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[34]" name="acq_data_in[34]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[35]" name="acq_data_in[35]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[36]" name="acq_data_in[36]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[37]" name="acq_data_in[37]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[38]" name="acq_data_in[38]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[39]" name="acq_data_in[39]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[40]" name="acq_data_in[40]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[41]" name="acq_data_in[41]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[42]" name="acq_data_in[42]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[43]" name="acq_data_in[43]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[44]" name="acq_data_in[44]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[45]" name="acq_data_in[45]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[46]" name="acq_data_in[46]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[47]" name="acq_data_in[47]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[48]" name="acq_data_in[48]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[49]" name="acq_data_in[49]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[50]" name="acq_data_in[50]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[51]" name="acq_data_in[51]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[52]" name="acq_data_in[52]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[53]" name="acq_data_in[53]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[54]" name="acq_data_in[54]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[55]" name="acq_data_in[55]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[56]" name="acq_data_in[56]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[57]" name="acq_data_in[57]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[58]" name="acq_data_in[58]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[59]" name="acq_data_in[59]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[60]" name="acq_data_in[60]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[61]" name="acq_data_in[61]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[62]" name="acq_data_in[62]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[63]" name="acq_data_in[63]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[64]" name="acq_data_in[64]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[65]" name="acq_data_in[65]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[66]" name="acq_data_in[66]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[67]" name="acq_data_in[67]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[68]" name="acq_data_in[68]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[69]" name="acq_data_in[69]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[70]" name="acq_data_in[70]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[71]" name="acq_data_in[71]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[72]" name="acq_data_in[72]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[73]" name="acq_data_in[73]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[74]" name="acq_data_in[74]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[75]" name="acq_data_in[75]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[76]" name="acq_data_in[76]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[77]" name="acq_data_in[77]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[78]" name="acq_data_in[78]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[79]" name="acq_data_in[79]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[80]" name="acq_data_in[80]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[81]" name="acq_data_in[81]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[82]" name="acq_data_in[82]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[83]" name="acq_data_in[83]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[84]" name="acq_data_in[84]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[85]" name="acq_data_in[85]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[86]" name="acq_data_in[86]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[87]" name="acq_data_in[87]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[88]" name="acq_data_in[88]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[89]" name="acq_data_in[89]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[90]" name="acq_data_in[90]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[91]" name="acq_data_in[91]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[92]" name="acq_data_in[92]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[93]" name="acq_data_in[93]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[94]" name="acq_data_in[94]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[95]" name="acq_data_in[95]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[96]" name="acq_data_in[96]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[97]" name="acq_data_in[97]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[98]" name="acq_data_in[98]" tap_mode="classic"/> + <wire alias="stp32:stp32_inst|acq_data_in[99]" name="acq_data_in[99]" tap_mode="classic"/> + </data_input_vec> + <storage_qualifier_input_vec/> + </signal_vec> + <presentation> + <data_view/> + <setup_view/> + </presentation> + <trigger CRC="CC39622C" name="" record_data_gap="true" storage_mode="off"> + <power_up_trigger/> + <events> + <level type="basic"> + <power_up> + </power_up> + </level> + </events> + <storage_qualifier> + <transitional> + <pwr_up_transitional/> + </transitional> + </storage_qualifier> + </trigger> + </signal_set> + </instance> +</session> diff --git a/applications/rfidb/designs/rfidb/src/vhdl/stp32.qip b/applications/rfidb/designs/rfidb/src/vhdl/stp32.qip new file mode 100644 index 0000000000..bec0a441ad --- /dev/null +++ b/applications/rfidb/designs/rfidb/src/vhdl/stp32.qip @@ -0,0 +1,3 @@ +set_global_assignment -name IP_TOOL_NAME "SignalTap II Logic Analyzer" +set_global_assignment -name IP_TOOL_VERSION "11.1" +#set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "stp32.vhd"] diff --git a/applications/rfidb/designs/rfidb/src/vhdl/stp32.vhd b/applications/rfidb/designs/rfidb/src/vhdl/stp32.vhd new file mode 100644 index 0000000000..0122871a87 --- /dev/null +++ b/applications/rfidb/designs/rfidb/src/vhdl/stp32.vhd @@ -0,0 +1,156 @@ +-- megafunction wizard: %SignalTap II Logic Analyzer% +-- GENERATION: STANDARD +-- VERSION: WM1.0 +-- MODULE: sld_signaltap + +-- ============================================================ +-- File Name: stp32.vhd +-- Megafunction Name(s): +-- sld_signaltap +-- +-- Simulation Library Files(s): +-- +-- ============================================================ +-- ************************************************************ +-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +-- +-- 11.1 Build 259 01/25/2012 SP 2 SJ Full Version +-- ************************************************************ + + +--Copyright (C) 1991-2011 Altera Corporation +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and its AMPP partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, Altera MegaCore Function License +--Agreement, or other applicable license agreement, including, +--without limitation, that your use is for the sole purpose of +--programming logic devices manufactured by Altera and sold by +--Altera or its authorized distributors. Please refer to the +--applicable agreement for further details. + + +LIBRARY ieee; +USE ieee.std_logic_1164.all; + +LIBRARY altera_mf; +USE altera_mf.all; + +ENTITY stp32 IS + PORT + ( + acq_clk : IN STD_LOGIC ; + acq_data_in : IN STD_LOGIC_VECTOR (35 DOWNTO 0); + acq_trigger_in : IN STD_LOGIC_VECTOR (3 DOWNTO 0) + ); +END stp32; + + +ARCHITECTURE SYN OF stp32 IS + + + + + COMPONENT sld_signaltap + GENERIC ( + sld_advanced_trigger_entity : STRING; + sld_data_bits : NATURAL; + sld_data_bit_cntr_bits : NATURAL; + sld_enable_advanced_trigger : NATURAL; + sld_mem_address_bits : NATURAL; + sld_node_crc_bits : NATURAL; + sld_node_crc_hiword : NATURAL; + sld_node_crc_loword : NATURAL; + sld_node_info : NATURAL; + sld_ram_block_type : STRING; + sld_sample_depth : NATURAL; + sld_storage_qualifier_gap_record : NATURAL; + sld_storage_qualifier_mode : STRING; + sld_trigger_bits : NATURAL; + sld_trigger_in_enabled : NATURAL; + sld_trigger_level : NATURAL; + sld_trigger_level_pipeline : NATURAL; + lpm_type : STRING + ); + PORT ( + acq_clk : IN STD_LOGIC ; + acq_data_in : IN STD_LOGIC_VECTOR (35 DOWNTO 0); + acq_trigger_in : IN STD_LOGIC_VECTOR (3 DOWNTO 0) + ); + END COMPONENT; + +BEGIN + + sld_signaltap_component : sld_signaltap + GENERIC MAP ( + sld_advanced_trigger_entity => "basic,1,", + sld_data_bits => 36, + sld_data_bit_cntr_bits => 7, + sld_enable_advanced_trigger => 0, + sld_mem_address_bits => 12, + sld_node_crc_bits => 32, + sld_node_crc_hiword => 12773, + sld_node_crc_loword => 22968, + sld_node_info => 1076736, + sld_ram_block_type => "Auto", + sld_sample_depth => 4096, + sld_storage_qualifier_gap_record => 0, + sld_storage_qualifier_mode => "OFF", + sld_trigger_bits => 4, + sld_trigger_in_enabled => 0, + sld_trigger_level => 1, + sld_trigger_level_pipeline => 1, + lpm_type => "sld_signaltap" + ) + PORT MAP ( + acq_clk => acq_clk, + acq_data_in => acq_data_in, + acq_trigger_in => acq_trigger_in + ); + + + +END SYN; + +-- ============================================================ +-- CNX file retrieval info +-- ============================================================ +-- Retrieval info: PRIVATE: DATA_WIDTH_SPIN STRING "" +-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV GX" +-- Retrieval info: PRIVATE: RAM_TYPE_COMBO STRING "Auto" +-- Retrieval info: PRIVATE: SAMPLE_DEPTH_COMBO STRING "4 K" +-- Retrieval info: PRIVATE: SLD_TRIGGER_OUT_ENABLED NUMERIC "0" +-- Retrieval info: PRIVATE: TRIGGER_LEVELS_COMBO STRING "1" +-- Retrieval info: PRIVATE: TRIGGER_WIDTH_SPIN STRING "" +-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +-- Retrieval info: CONSTANT: SLD_ADVANCED_TRIGGER_ENTITY STRING "basic,1," +-- Retrieval info: CONSTANT: SLD_DATA_BITS NUMERIC "36" +-- Retrieval info: CONSTANT: SLD_DATA_BIT_CNTR_BITS NUMERIC "7" +-- Retrieval info: CONSTANT: SLD_ENABLE_ADVANCED_TRIGGER NUMERIC "0" +-- Retrieval info: CONSTANT: SLD_MEM_ADDRESS_BITS NUMERIC "12" +-- Retrieval info: CONSTANT: SLD_NODE_CRC_BITS NUMERIC "32" +-- Retrieval info: CONSTANT: SLD_NODE_CRC_HIWORD NUMERIC "12773" +-- Retrieval info: CONSTANT: SLD_NODE_CRC_LOWORD NUMERIC "22968" +-- Retrieval info: CONSTANT: SLD_NODE_INFO NUMERIC "1076736" +-- Retrieval info: CONSTANT: SLD_RAM_BLOCK_TYPE STRING "Auto" +-- Retrieval info: CONSTANT: SLD_SAMPLE_DEPTH NUMERIC "4096" +-- Retrieval info: CONSTANT: SLD_STORAGE_QUALIFIER_GAP_RECORD NUMERIC "0" +-- Retrieval info: CONSTANT: SLD_STORAGE_QUALIFIER_MODE STRING "OFF" +-- Retrieval info: CONSTANT: SLD_TRIGGER_BITS NUMERIC "4" +-- Retrieval info: CONSTANT: SLD_TRIGGER_IN_ENABLED NUMERIC "0" +-- Retrieval info: CONSTANT: SLD_TRIGGER_LEVEL NUMERIC "1" +-- Retrieval info: CONSTANT: SLD_TRIGGER_LEVEL_PIPELINE NUMERIC "1" +-- Retrieval info: USED_PORT: acq_clk 0 0 0 0 INPUT NODEFVAL "acq_clk" +-- Retrieval info: USED_PORT: acq_data_in 0 0 36 0 INPUT NODEFVAL "acq_data_in[35..0]" +-- Retrieval info: USED_PORT: acq_trigger_in 0 0 4 0 INPUT NODEFVAL "acq_trigger_in[3..0]" +-- Retrieval info: CONNECT: @acq_clk 0 0 0 0 acq_clk 0 0 0 0 +-- Retrieval info: CONNECT: @acq_data_in 0 0 36 0 acq_data_in 0 0 36 0 +-- Retrieval info: CONNECT: @acq_trigger_in 0 0 4 0 acq_trigger_in 0 0 4 0 +-- Retrieval info: GEN_FILE: TYPE_NORMAL stp32.vhd TRUE +-- Retrieval info: GEN_FILE: TYPE_NORMAL stp32.inc FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL stp32.cmp FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL stp32.bsf FALSE +-- Retrieval info: GEN_FILE: TYPE_NORMAL stp32_inst.vhd FALSE -- GitLab