From 67c8bcec05189a39b0b08593745b6533f6ba626c Mon Sep 17 00:00:00 2001
From: Zanting <zanting>
Date: Mon, 28 Sep 2015 08:45:58 +0000
Subject: [PATCH] IP for 16GB DDR3 So-Dimm modules added
---
libraries/technology/ddr/hdllib.cfg | 1 +
1 file changed, 1 insertion(+)
diff --git a/libraries/technology/ddr/hdllib.cfg b/libraries/technology/ddr/hdllib.cfg
index fb82184f8e..e716d12ad3 100644
--- a/libraries/technology/ddr/hdllib.cfg
+++ b/libraries/technology/ddr/hdllib.cfg
@@ -4,6 +4,7 @@ hdl_lib_uses_synth = ip_stratixiv_ddr3_uphy_4g_800_master
ip_stratixiv_ddr3_uphy_4g_800_slave
ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+ ip_stratixiv_ddr3_uphy_16g_dual_rank_800
ip_arria10_ddr4_4g_1600
ip_arria10_ddr4_4g_2000
ip_arria10_ddr4_8g_2400
--
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