diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
new file mode 100644
index 0000000000000000000000000000000000000000..2a63a2180617ebb1e7de8b81d5fe45dd970e987a
--- /dev/null
+++ b/.gitlab-ci.yml
@@ -0,0 +1,101 @@
+###############################################################################
+#
+# Copyright 2022
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+###############################################################################
+
+# Author:
+# . Daniel van der Schuur
+# Purpose:
+# . Define automated test stages for the HDL repository this file belongs to.
+# Description:
+# . See https://support.astron.nl/confluence/display/L2M/L3+SDP+Decision%3A+Gitlab+pipeline+automation+to+test+SDPFW+with+OPC+UA
+
+stages:
+    - simulation
+    - synthesis
+    - hardware
+
+
+###############################################################################
+# HDL simulation stage
+###############################################################################
+sim-compile:
+    tags: 
+        - fpga
+    stage: simulation
+    script:
+        - echo "Compiling for simulation"
+        - mkdir build
+        - touch build/info.txt
+    artifacts:
+        paths:
+            - build/
+
+sim-run:
+    tags: 
+        - fpga
+    stage: simulation
+    script:
+        - echo "Running simulations"
+#        - test -f "build/info.txt" # This fails despite having artifact (see 
+                                    # sim-compile code block where a folder and
+                                    # file are generated and preserved by using
+                                    # 'artifacts').
+
+###############################################################################
+# HDL synthesis stage
+###############################################################################
+synth-compile:
+    tags: 
+        - fpga
+    stage: synthesis
+    script:
+        - echo "Compiling for synthesis"
+
+synth-check-fmax:
+    tags: 
+        - fpga
+    stage: synthesis
+    script:
+        - echo "Checking achieved fMax"
+
+synth-check-programming-files:
+    tags: 
+        - fpga
+    stage: synthesis
+    script:
+        - echo "Checking if programming files have been generated"
+
+
+###############################################################################
+# Hardware stage
+# . for some reason we cannot use tags + trigger together. So this will be
+#   run on the shared Gitlab runner - which is fine.
+###############################################################################
+trigger-opc-ua-test:
+    stage: hardware
+    only:
+        changes:
+            - applications/lofar2/images/lofar2_unb2b_sdp_station_full.tar.gz
+#  script:
+#      - echo "Found updated programming file. Triggering OPC UA test in SDPTR repo."
+    trigger:
+        project: LOFAR2.0/sdptr
+        branch: L2SDP-534
+
+
diff --git a/applications/lofar2/images/lofar2_unb2b_sdp_station_full.tar.gz b/applications/lofar2/images/lofar2_unb2b_sdp_station_full.tar.gz
new file mode 120000
index 0000000000000000000000000000000000000000..7dee884c8253b5084754d0bdfe736673225b1cc8
--- /dev/null
+++ b/applications/lofar2/images/lofar2_unb2b_sdp_station_full.tar.gz
@@ -0,0 +1 @@
+lofar2_unb2b_sdp_station_bf-r087d98be6.tar.gz
\ No newline at end of file