From 65afdd306295dc068b721d8783fd37e2c80a5266 Mon Sep 17 00:00:00 2001
From: David Brouwer <dbrouwer@astron.nl>
Date: Sun, 12 Nov 2023 12:58:33 +0100
Subject: [PATCH] During synthesis, an error occurred. Add remark to
information header regarding synthesis error. As a result, the parameter
'read_during_write mode_mixed_ports' is now set to DONT_CARE instead of
OLD_DATA.
---
.../ip_agi027_xxxx/ram/ip_agi027_xxxx_ram_rw_rw.vhd | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/libraries/technology/ip_agi027_xxxx/ram/ip_agi027_xxxx_ram_rw_rw.vhd b/libraries/technology/ip_agi027_xxxx/ram/ip_agi027_xxxx_ram_rw_rw.vhd
index b66a6c4c31..a7e4463718 100644
--- a/libraries/technology/ip_agi027_xxxx/ram/ip_agi027_xxxx_ram_rw_rw.vhd
+++ b/libraries/technology/ip_agi027_xxxx/ram/ip_agi027_xxxx_ram_rw_rw.vhd
@@ -22,7 +22,12 @@
-- Purpose:
-- RadioHDL wrapper / Instantiate RAM IP with generics
-- Description:
--- Copied component declaration and instance example from generated/ram_2port_2040/sim/ip_agi027_xxxx_ram_rw_rw_ram_2port_2040_uxwhvmq.vhd
+-- Copied component declaration and instance example from
+-- generated/ram_2port_2040/sim/ip_agi027_xxxx_ram_rw_rw_ram_2port_2040_uxwhvmq.vhd
+-- Remark:
+-- The outcome of the synthesis is that the parameter
+-- read_during_write_mode_mixed_ports cannot be set to the
+-- value OLD_DATA for the Agilex 7, otherwise an error occurs.
library ieee, technology_lib;
use ieee.std_logic_1164.all;
@@ -139,8 +144,7 @@ begin
power_up_uninitialized => "FALSE",
read_during_write_mode_port_a => "NEW_DATA_NO_NBE_READ",
read_during_write_mode_port_b => "NEW_DATA_NO_NBE_READ",
- read_during_write_mode_mixed_ports => "OLD_DATA",
- --read_during_write_mode_mixed_ports => "DONT_CARE",
+ read_during_write_mode_mixed_ports => "DONT_CARE",
widthad_a => g_adr_w,
widthad_b => g_adr_w,
width_a => g_dat_w,
--
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