diff --git a/libraries/base/diag/tb/vhdl/tb_diag_block_gen.vhd b/libraries/base/diag/tb/vhdl/tb_diag_block_gen.vhd
index e46bcffc92296cbd5a7655ccdc339cd618305e70..bc930241819b771ae314abf63a9b3c76e097eab3 100644
--- a/libraries/base/diag/tb/vhdl/tb_diag_block_gen.vhd
+++ b/libraries/base/diag/tb/vhdl/tb_diag_block_gen.vhd
@@ -111,12 +111,13 @@ ARCHITECTURE tb OF tb_diag_block_gen IS
   SIGNAL out_sosi       : t_dp_sosi;
   SIGNAL prev_out_sosi  : t_dp_sosi;
   SIGNAL hold_sop       : STD_LOGIC;
+  SIGNAL last_size      : NATURAL;
   SIGNAL exp_size       : NATURAL;
   SIGNAL cnt_size       : NATURAL;
   
 BEGIN
 
-  rst <= '1', '0' AFTER clk_period/10;
+  rst <= '1', '0' AFTER clk_period*10;
 
   clk <= NOT clk OR tb_end AFTER clk_period/2;
   
@@ -205,12 +206,13 @@ BEGIN
   
   -- Verification
   exp_size <= TO_UINT(bg_ctrl.samples_per_packet);
+  last_size <= exp_size'last_value;
   
   proc_dp_verify_data("BSN",                                                            clk, verify_en, out_sosi.sop,   out_sosi.bsn,  prev_out_sosi.bsn);
   proc_dp_verify_data("DATA", TO_UINT(c_bg_ctrl.mem_high_adrs), c_alternative_data_gap, clk, verify_en, out_sosi.valid, out_sosi.data, prev_out_sosi.data);
   
   proc_dp_verify_sop_and_eop(clk, out_sosi.valid, out_sosi.sop, out_sosi.eop, hold_sop);
-  proc_dp_verify_block_size(exp_size, clk, out_sosi.valid, out_sosi.sop, out_sosi.eop, cnt_size);
+  proc_dp_verify_block_size(last_size, exp_size, clk, out_sosi.valid, out_sosi.sop, out_sosi.eop, cnt_size);
 
   -- Waveform buffer
   u_buf : ENTITY common_lib.common_ram_crw_crw