diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring.vhd b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring.vhd
index 612609097a171c416a5f92c2e4dd1992c99ea4e6..f9c128cc79594a95831a8b4b2c4e6b93dabba468 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring.vhd
@@ -113,7 +113,7 @@ ARCHITECTURE str OF lofar2_unb2b_ring IS
-- Firmware version x.y
CONSTANT c_fw_version : t_unb2b_board_fw_version := (2, 0);
CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
- CONSTANT c_lofar2_sample_clk_freq : NATURAL := c_sdp_f_adc_MHz * 10**6; -- fixed 200 MHz for LOFAR2.0 stage 1
+ CONSTANT c_lofar2_sample_clk_freq : NATURAL := c_sdp_N_clk_per_sync; -- fixed 200 MHz for LOFAR2.0 stage 1
-- QSFP
CONSTANT c_nof_qsfp_bus : NATURAL := 1;
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
index 7790d20c01c070a274d02b6d86867d9a73451054..0d5e39337f12886870b4ca7c10d456db785e7a98 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd
@@ -58,7 +58,7 @@ ENTITY lofar2_unb2b_sdp_station IS
g_factory_image : BOOLEAN := FALSE;
g_protect_addr_range : BOOLEAN := FALSE;
g_wpfb : t_wpfb := c_sdp_wpfb_subbands;
- g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation
+ g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation
g_scope_selected_subband : NATURAL := 0
);
PORT (
@@ -115,7 +115,6 @@ ARCHITECTURE str OF lofar2_unb2b_sdp_station IS
-- Firmware version x.y
CONSTANT c_fw_version : t_unb2b_board_fw_version := (2, 0);
CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
- CONSTANT c_lofar2_sample_clk_freq : NATURAL := c_sdp_f_adc_MHz * 10**6; -- fixed 200 MHz for LOFAR2.0 stage 1
-- 10 GbE Interface
CONSTANT c_nof_streams_qsfp : NATURAL := c_unb2b_board_tr_qsfp.nof_bus * c_quad;
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd
index 3d23da21e2dc0cb487733b0f97f72582a786c2f9..9fa5e7c992d91c196005ab1df901828c90c1a99a 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd
@@ -58,7 +58,7 @@ ENTITY lofar2_unb2c_sdp_station IS
g_factory_image : BOOLEAN := FALSE;
g_protect_addr_range : BOOLEAN := FALSE;
g_wpfb : t_wpfb := c_sdp_wpfb_subbands;
- g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation
+ g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation
g_scope_selected_subband : NATURAL := 0
);
PORT (
@@ -107,7 +107,6 @@ ARCHITECTURE str OF lofar2_unb2c_sdp_station IS
-- Firmware version x.y
CONSTANT c_fw_version : t_unb2c_board_fw_version := (2, 0);
CONSTANT c_mm_clk_freq : NATURAL := c_unb2c_board_mm_clk_freq_100M;
- CONSTANT c_lofar2_sample_clk_freq : NATURAL := c_sdp_f_adc_MHz * 10**6; -- fixed 200 MHz for LOFAR2.0 stage 1
-- 10 GbE Interface
CONSTANT c_nof_streams_qsfp : NATURAL := c_unb2c_board_tr_qsfp.nof_bus * c_quad;
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/tb/vhdl/tb_lofar2_unb2c_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/tb/vhdl/tb_lofar2_unb2c_sdp_station.vhd
index a4546f69142f776fae09ee60cb2050384b8a778b..5e4731f8efc4c1ec2c19ca601199af0f98a27a60 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/tb/vhdl/tb_lofar2_unb2c_sdp_station.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/tb/vhdl/tb_lofar2_unb2c_sdp_station.vhd
@@ -101,14 +101,10 @@ ARCHITECTURE tb OF tb_lofar2_unb2c_sdp_station IS
SIGNAL INTB : STD_LOGIC;
SIGNAL eth_clk : STD_LOGIC := '0';
+ SIGNAL eth_clk_slv : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0);
SIGNAL eth_txp : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0);
SIGNAL eth_rxp : STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 downto 0);
- SIGNAL sens_scl : STD_LOGIC;
- SIGNAL sens_sda : STD_LOGIC;
- SIGNAL pmbus_scl : STD_LOGIC;
- SIGNAL pmbus_sda : STD_LOGIC;
-
-- back transceivers
SIGNAL JESD204B_SERIAL_DATA : STD_LOGIC_VECTOR((c_unb2c_board_tr_jesd204b.bus_w * c_unb2c_board_tr_jesd204b.nof_bus)-1 downto 0);
SIGNAL JESD204B_REFCLK : STD_LOGIC := '1';
@@ -124,14 +120,11 @@ BEGIN
eth_clk <= (NOT eth_clk) OR tb_end AFTER c_eth_clk_period/2; -- Ethernet ref clock (125 MHz)
JESD204B_REFCLK <= (NOT JESD204B_REFCLK) OR tb_end AFTER c_bck_ref_clk_period/2; -- JESD sample clock (200MHz)
+ eth_clk_slv <= (OTHERS => eth_clk);
+
INTA <= 'H'; -- pull up
INTB <= 'H'; -- pull up
- sens_scl <= 'H'; -- pull up
- sens_sda <= 'H'; -- pull up
- pmbus_scl <= 'H'; -- pull up
- pmbus_sda <= 'H'; -- pull up
-
-- External PPS
proc_common_gen_pulse(10, c_pps_period, '1', pps_rst, ext_clk, pps);
jesd204b_sysref <= pps;
@@ -161,16 +154,8 @@ BEGIN
ID => c_id,
TESTIO => open,
- -- I2C Interface to Sensors
- SENS_SC => sens_scl,
- SENS_SD => sens_sda,
-
- PMBUS_SC => pmbus_scl,
- PMBUS_SD => pmbus_sda,
- PMBUS_ALERT => open,
-
-- 1GbE Control Interface
- ETH_CLK => eth_clk,
+ ETH_CLK => eth_clk_slv,
ETH_SGIN => eth_rxp,
ETH_SGOUT => eth_txp,
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd
index 82cf3bf7ecad0733de0f8a1462a60cc02b195b85..223364fb8a7f54efc2b9ed2459dd91a49460c1a3 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd
@@ -41,7 +41,7 @@ ENTITY node_sdp_adc_input_and_timing IS
GENERIC (
g_technology : NATURAL := c_tech_select_default;
g_buf_nof_data : NATURAL := c_sdp_V_si_db;
- g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation
+ g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation
g_sim : BOOLEAN := FALSE
);
PORT (
@@ -119,8 +119,9 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS
CONSTANT c_wg_buf_addr_w : NATURAL := 10; --default value of WG for 1024 samples;
SIGNAL trigger_wg : STD_LOGIC;
- -- Frame parameters TBC
- CONSTANT c_bs_bsn_w : NATURAL := 64; --51;
+ -- Frame parameters
+ CONSTANT c_bs_sync_timeout : NATURAL := (g_bsn_nof_clk_per_sync * 11) / 10; -- +10% margin
+ CONSTANT c_bs_bsn_w : NATURAL := 64; -- > 51;
CONSTANT c_bs_block_size : NATURAL := c_sdp_N_fft; -- =1024;
CONSTANT c_dp_fifo_dc_size : NATURAL := 64;
@@ -375,7 +376,7 @@ BEGIN
u_bsn_monitor : ENTITY dp_lib.mms_dp_bsn_monitor
GENERIC MAP (
g_nof_streams => 1, -- They're all the same
- g_sync_timeout => g_bsn_nof_clk_per_sync,
+ g_sync_timeout => c_bs_sync_timeout,
g_bsn_w => c_bs_bsn_w,
g_log_first_bsn => FALSE
)
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index 213dea60f73b825b798bd6dc837203d35b59f09f..4dbd3fd7db8170a70d4ce3779301d426b6bb5d34 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -110,6 +110,7 @@ PACKAGE sdp_pkg is
-- Derived constants
CONSTANT c_sdp_FS_adc : NATURAL := 2**(c_sdp_W_adc - 1); -- full scale FS corresponds to amplitude 1.0
+ CONSTANT c_sdp_N_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M clock cycles per second
CONSTANT c_sdp_N_sync_jesd : NATURAL := c_sdp_S_pn * c_sdp_N_sync_rcu / c_sdp_S_rcu; -- = 4, nof JESD IP sync outputs per PN
CONSTANT c_sdp_P_pfb : NATURAL := c_sdp_S_pn / c_sdp_Q_fft;
CONSTANT c_sdp_T_adc : TIME := (10**6 / c_sdp_f_adc_MHz) * 1 ps;
@@ -341,7 +342,7 @@ PACKAGE sdp_pkg is
init_sl => '0'); -- Default = 1
CONSTANT c_sdp_nof_crosslets_reg_w : NATURAL := c_sdp_mm_reg_nof_crosslets.nof_dat*c_sdp_mm_reg_nof_crosslets.dat_w;
- CONSTANT c_sdp_xst_nof_clk_per_sync_min : NATURAL := (c_sdp_f_adc_MHz *10**6) / 10; -- 0.1 second
+ CONSTANT c_sdp_xst_nof_clk_per_sync_min : NATURAL := c_sdp_N_clk_per_sync / 10; -- 0.1 second
-- XSUB MM address widths
CONSTANT c_sdp_reg_crosslets_info_addr_w : NATURAL := c_sdp_mm_reg_crosslets_info.adr_w;
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
index abe7debfc7267ffccaee9193915e765381011f85..a0d6261300e81b140aa2db9bb9c2ccfd85094d2d 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd
@@ -46,7 +46,7 @@ ENTITY sdp_station IS
g_technology : NATURAL := c_tech_arria10_e1sg;
g_sim : BOOLEAN := FALSE; --Overridden by TB
g_wpfb : t_wpfb := c_sdp_wpfb_subbands;
- g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation
+ g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation
g_scope_selected_subband : NATURAL := 0;
g_use_fsub : BOOLEAN := TRUE;
g_use_xsub : BOOLEAN := TRUE;