diff --git a/tools/oneclick/base/quartus_config.py b/tools/oneclick/base/quartus_config.py
index a85b402af12f99705e26e0cf57f37875ee25cd90..5500c1a0be9aae0cdbbeb89af7a1d350186e5827 100644
--- a/tools/oneclick/base/quartus_config.py
+++ b/tools/oneclick/base/quartus_config.py
@@ -82,7 +82,17 @@ class QuartusConfig(hdl_config.HdlConfig):
                     synth_files = lib_dict['synth_files'].split()
                     for fn in synth_files:
                         filePathName = cm.expand_file_path_name(fn, lib_path)
-                        fp.write('set_global_assignment -name VHDL_FILE %s\n' % filePathName)
+
+                        file_ext = fn.split('.')[-1]
+                        if file_ext=='vhd' or file_ext=='vhdl':
+                            file_type = 'VHDL_FILE'                         
+                        elif file_ext=='v':
+                            file_type = 'VERILOG_FILE'                              
+                        else:
+                             print '\nERROR - Undefined file extension in synth_files:', fn
+                             sys.exit()
+
+                        fp.write('set_global_assignment -name %s %s\n' % (file_type, filePathName))
     
                 if 'quartus_vhdl_files' in lib_dict:
                     fp.write('\n')
@@ -90,6 +100,16 @@ class QuartusConfig(hdl_config.HdlConfig):
                     quartus_vhdl_files = lib_dict['quartus_vhdl_files'].split()
                     for fn in quartus_vhdl_files:
                         filePathName = cm.expand_file_path_name(fn, lib_path)
+
+                        file_ext = fn.split('.')[-1]
+                        if file_ext=='vhd' or file_ext=='vhdl':
+                            file_type = 'VHDL_FILE'                         
+                        elif file_ext=='v':
+                            file_type = 'VERILOG_FILE'                              
+                        else:
+                             print '\nERROR - Undefined file extension in quartus_vhdl_files:', fn
+                             sys.exit()
+
                         fp.write('set_global_assignment -name VHDL_FILE %s\n' % filePathName)
                     
                 if 'quartus_tcl_files' in lib_dict: