From 61e02d0f242b7b16c87120e9aaab020fe1cb0bb2 Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Thu, 30 Apr 2020 15:29:46 +0200
Subject: [PATCH] updated README
---
boards/uniboard2b/designs/unb2b_minimal/doc/README | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/boards/uniboard2b/designs/unb2b_minimal/doc/README b/boards/uniboard2b/designs/unb2b_minimal/doc/README
index 489b8ccd8e..cc12cf8fa0 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/doc/README
+++ b/boards/uniboard2b/designs/unb2b_minimal/doc/README
@@ -7,6 +7,7 @@ On uni-boards 26287-001..26287-005 (unb2b) the used FPGA is '10AX115U2F45E1SG'
-> In case of a new installation, the IP's have to be generated for Arria10.
cd ~/git/hdl
. init_hdl.sh
+ compile_altera_simlibs unb2b
generate_ip_libs unb2b
-> For compilation it might be necessary to check the .vhd file:
@@ -19,10 +20,10 @@ On uni-boards 26287-001..26287-005 (unb2b) the used FPGA is '10AX115U2F45E1SG'
1. Start with the Oneclick Commands:
cd ~/git/hdl
. init_hdl.sh
- quartus_config
+ quartus_config unb2b
# 2. Generate MMM for QSYS:
- run_qsys unb2b unb2b_minimal
+ run_qsys_pro unb2b unb2b_minimal
3. -> From here either continue to Modelsim (simulation) or Quartus (synthesis)
--
GitLab