diff --git a/libraries/base/reorder/tb/python/tc_reorder_transpose.py b/libraries/base/reorder/tb/python/tc_reorder_transpose.py
index e6ebdfe64bd987a0c2e7c3b782b624d8c95910ad..ea28394e42a001df8b15c2247294633710b9e61a 100644
--- a/libraries/base/reorder/tb/python/tc_reorder_transpose.py
+++ b/libraries/base/reorder/tb/python/tc_reorder_transpose.py
@@ -60,14 +60,13 @@ tc = test_case.Testcase('TB - ', '')
 # Constants/Generics that are shared between VHDL and Python
 # Name                   Value   Default   Description
 # START_VHDL_GENERICS
-g_wr_chunksize     = 16 
-g_wr_nof_chunks    = 1   
-g_rd_chunksize     = 4  
-g_rd_nof_chunks    = 4  
-g_rd_interval      = 4 
+g_wr_chunksize     = 256 
+g_rd_chunksize     = 16  
+g_rd_nof_chunks    = 16  
+g_rd_interval      = 16 
 g_gapsize          = 0   
-g_nof_blocks       = 32
-g_nof_blk_per_sync = 32
+g_nof_blocks       = 16
+g_nof_blk_per_sync = 16
 # END_VHDL_GENERICS
 
 # Overwrite generics with argumented generics from autoscript or command line. 
@@ -148,7 +147,6 @@ def gen_bg_hex_files(c_framesize = 64, c_nof_frames = 32, c_nof_streams = 4):
         mem_init_file.list_to_hex(list_in=data_concat, filename=filename, mem_width=c_nof_complex*c_in_dat_w, mem_depth=2**(ceil_log2(c_bg_ram_size)))
     return data
 
-
 if __name__ == "__main__":      
     ###############################################################################
     #