diff --git a/libraries/technology/ip_arria10/phy_10gbase_r/ip/ip_arria10_phy_10gbase_r.qsys b/libraries/technology/ip_arria10/phy_10gbase_r/ip/ip_arria10_phy_10gbase_r.qsys
index 2e3f76de67de388771bacaa8659c18a1893b5f99..f3dab4dd161cd4004b2bb15d60971204318e7261 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r/ip/ip_arria10_phy_10gbase_r.qsys
+++ b/libraries/technology/ip_arria10/phy_10gbase_r/ip/ip_arria10_phy_10gbase_r.qsys
@@ -306,13 +306,7 @@
    dir="end">
   <port name="rx_enh_blk_lock" internal="rx_enh_blk_lock" />
  </interface>
- <interface
-   name="tx_pma_clkout"
-   internal="xcvr_native_a10_0.tx_pma_clkout"
-   type="conduit"
-   dir="end">
-  <port name="tx_pma_clkout" internal="tx_pma_clkout" />
- </interface>
+ <interface name="tx_pma_clkout" internal="xcvr_native_a10_0.tx_pma_clkout" />
  <module
    kind="altera_xcvr_native_a10"
    version="14.0"
@@ -340,9 +334,9 @@
   <parameter name="tx_pma_clk_div" value="1" />
   <parameter name="plls" value="1" />
   <parameter name="pll_select" value="0" />
-  <parameter name="enable_port_tx_pma_clkout" value="1" />
+  <parameter name="enable_port_tx_pma_clkout" value="0" />
   <parameter name="enable_port_tx_pma_div_clkout" value="1" />
-  <parameter name="tx_pma_div_clkout_divider" value="66" />
+  <parameter name="tx_pma_div_clkout_divider" value="33" />
   <parameter name="enable_port_tx_pma_iqtxrx_clkout" value="0" />
   <parameter name="enable_port_tx_pma_elecidle" value="0" />
   <parameter name="enable_port_tx_pma_qpipullup" value="0" />
diff --git a/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r_top.vhd b/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r_top.vhd
index a127947e5ebf7928fc33b378373c215f6e37d165..3ca94b5c254526635c0efd8014ae34acba2a278f 100644
--- a/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r_top.vhd
+++ b/libraries/technology/ip_arria10/phy_10gbase_r/ip_arria10_phy_10gbase_r_top.vhd
@@ -71,8 +71,7 @@ entity ip_arria10_phy_10gbase_r_top is
     rx_enh_fifo_del         : out std_logic_vector(0 downto 0);                     --         rx_enh_fifo_del.rx_enh_fifo_del
     rx_enh_fifo_insert      : out std_logic_vector(0 downto 0);                     --      rx_enh_fifo_insert.rx_enh_fifo_insert
     rx_enh_highber          : out std_logic_vector(0 downto 0);                     --          rx_enh_highber.rx_enh_highber
-    rx_enh_blk_lock         : out std_logic_vector(0 downto 0);                     --         rx_enh_blk_lock.rx_enh_blk_lock
-    tx_pma_clkout           : out std_logic_vector(0 downto 0)                      --           tx_pma_clkout.clk
+    rx_enh_blk_lock         : out std_logic_vector(0 downto 0)                      --         rx_enh_blk_lock.rx_enh_blk_lock
   );
 end ip_arria10_phy_10gbase_r_top;
 
@@ -118,8 +117,7 @@ begin
     rx_enh_fifo_del         => rx_enh_fifo_del        ,  --         rx_enh_fifo_del.rx_enh_fifo_del
     rx_enh_fifo_insert      => rx_enh_fifo_insert     ,  --      rx_enh_fifo_insert.rx_enh_fifo_insert
     rx_enh_highber          => rx_enh_highber         ,  --          rx_enh_highber.rx_enh_highber
-    rx_enh_blk_lock         => rx_enh_blk_lock        ,  --         rx_enh_blk_lock.rx_enh_blk_lock
-    tx_pma_clkout           => tx_pma_clkout             --           tx_pma_clkout.clk
+    rx_enh_blk_lock         => rx_enh_blk_lock           --         rx_enh_blk_lock.rx_enh_blk_lock
   );
 
 end str;