diff --git a/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_align_v2.vhd b/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_align_v2.vhd
index 7a612c135a18c40a6aa024527a6d69e1cad8d1e8..26a18faa8e276e4eac31227f7b83342607a29041 100644
--- a/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_align_v2.vhd
@@ -210,7 +210,7 @@ begin
   begin
     proc_common_wait_until_low(dp_clk, mm_rst);
     proc_common_wait_until_low(dp_clk, dp_rst);
-    proc_common_wait_some_cycles(mm_clk, 5);
+    proc_common_wait_some_cycles(mm_clk, 10);
 
     -- Read stream enable bits, default '1' after power up
     for I in 0 to c_nof_streams - 1 loop
diff --git a/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_sync_scheduler.vhd b/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_sync_scheduler.vhd
index f35a8bd290a55d34f3ee9d2955233c8b57ca4ee5..a3565d0983b1f79e9e531b09d22233e64420f0ad 100644
--- a/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_sync_scheduler.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mmp_dp_bsn_sync_scheduler.vhd
@@ -102,7 +102,7 @@ begin
   begin
     proc_common_wait_until_low(dp_clk, mm_rst);
     proc_common_wait_until_low(dp_clk, dp_rst);
-    proc_common_wait_some_cycles(mm_clk, 5);
+    proc_common_wait_some_cycles(mm_clk, 10);
 
     ---------------------------------------------------------------------------
     -- Initial check